tg3: Improve 5785 PCIe performance

[net-next-2.6.git] / drivers / net / tg3.h

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 82b45d8797b4eb6b2e6b8ad5ba6f08ed2a23709c..68431da5aad33abef6f65e747e6284dfdeab2525 100644 (file)
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1264,8 +1264,9 @@
 #define  WDMAC_MODE_FIFOURUN_ENAB       0x00000080
 #define  WDMAC_MODE_FIFOOREAD_ENAB      0x00000100
 #define  WDMAC_MODE_LNGREAD_ENAB        0x00000200
-#define  WDMAC_MODE_RX_ACCEL            0x00000400
+#define  WDMAC_MODE_RX_ACCEL            0x00000400
 #define  WDMAC_MODE_STATUS_TAG_FIX      0x20000000
+#define  WDMAC_MODE_BURST_ALL_DATA      0xc0000000
 #define WDMAC_STATUS                   0x00004c04
 #define  WDMAC_STATUS_TGTABORT          0x00000004
 #define  WDMAC_STATUS_MSTABORT          0x00000008
@@ -1953,10 +1954,34 @@
 #define  NIC_SRAM_MBUF_POOL_BASE5705   0x00010000
 #define  NIC_SRAM_MBUF_POOL_SIZE5705   0x0000e000
 
+
 /* Currently this is fixed. */
-#define PHY_ADDR               0x01
+#define TG3_PHY_PCIE_ADDR              0x00
+#define TG3_PHY_MII_ADDR               0x01
+
+
+/*** Tigon3 specific PHY PCIE registers. ***/
+
+#define TG3_PCIEPHY_BLOCK_ADDR         0x1f
+#define  TG3_PCIEPHY_XGXS_BLK1         0x0801
+#define  TG3_PCIEPHY_TXB_BLK           0x0861
+#define  TG3_PCIEPHY_BLOCK_SHIFT       4
+
+/* TG3_PCIEPHY_TXB_BLK */
+#define TG3_PCIEPHY_TX0CTRL1           0x15
+#define  TG3_PCIEPHY_TX0CTRL1_TXOCM    0x0003
+#define  TG3_PCIEPHY_TX0CTRL1_RDCTL    0x0008
+#define  TG3_PCIEPHY_TX0CTRL1_TXCMV    0x0030
+#define  TG3_PCIEPHY_TX0CTRL1_TKSEL    0x0040
+#define  TG3_PCIEPHY_TX0CTRL1_NB_EN    0x0400
+
+/* TG3_PCIEPHY_XGXS_BLK1 */
+#define TG3_PCIEPHY_PWRMGMT4           0x1a
+#define TG3_PCIEPHY_PWRMGMT4_L1PLLPD_EN        0x0038
+#define TG3_PCIEPHY_PWRMGMT4_LOWPWR_EN 0x4000
+
 
-/* Tigon3 specific PHY MII registers. */
+/*** Tigon3 specific PHY MII registers. ***/
 #define  TG3_BMCR_SPEED1000            0x0040
 
 #define MII_TG3_CTRL                   0x09 /* 1000-baseT control register */
@@ -2412,7 +2437,6 @@ struct ring_info {
 
 struct tx_ring_info {
        struct sk_buff                  *skb;
-       u32                             prev_vlan_tag;
 };
 
 struct tg3_config_info {
@@ -2749,7 +2773,6 @@ struct tg3 {
 #define TG3_FLG3_5701_DMA_BUG          0x00000008
 #define TG3_FLG3_USE_PHYLIB            0x00000010
 #define TG3_FLG3_MDIOBUS_INITED                0x00000020
-#define TG3_FLG3_MDIOBUS_PAUSED                0x00000040
 #define TG3_FLG3_PHY_CONNECTED         0x00000080
 #define TG3_FLG3_RGMII_STD_IBND_DISABLE        0x00000100
 #define TG3_FLG3_RGMII_EXT_IBND_RX_EN  0x00000200
@@ -2758,9 +2781,11 @@ struct tg3 {
 #define TG3_FLG3_PHY_ENABLE_APD                0x00001000
 #define TG3_FLG3_5755_PLUS             0x00002000
 #define TG3_FLG3_NO_NVRAM              0x00004000
-#define TG3_FLG3_TOGGLE_10_100_L1PLLPD 0x00008000
 #define TG3_FLG3_PHY_IS_FET            0x00010000
 #define TG3_FLG3_ENABLE_RSS            0x00020000
+#define TG3_FLG3_4G_DMA_BNDRY_BUG      0x00080000
+#define TG3_FLG3_40BIT_DMA_LIMIT_BUG   0x00100000
+#define TG3_FLG3_SHORT_DMA_BUG         0x00200000
 
        struct timer_list               timer;
        u16                             timer_counter;