spinlock_t indirect_lock;
u32 phy_flags;
-#define PHY_SERDES_FLAG 1
-#define PHY_CRC_FIX_FLAG 2
-#define PHY_PARALLEL_DETECT_FLAG 4
-#define PHY_2_5G_CAPABLE_FLAG 8
-#define PHY_INT_MODE_MASK_FLAG 0x300
-#define PHY_INT_MODE_AUTO_POLLING_FLAG 0x100
-#define PHY_INT_MODE_LINK_READY_FLAG 0x200
-#define PHY_DIS_EARLY_DAC_FLAG 0x400
-#define REMOTE_PHY_CAP_FLAG 0x800
-#define PHY_FORCED_DOWN_FLAG 0x1000
+#define BNX2_PHY_FLAG_SERDES 0x00000001
+#define BNX2_PHY_FLAG_CRC_FIX 0x00000002
+#define BNX2_PHY_FLAG_PARALLEL_DETECT 0x00000004
+#define BNX2_PHY_FLAG_2_5G_CAPABLE 0x00000008
+#define BNX2_PHY_FLAG_INT_MODE_MASK 0x00000300
+#define BNX2_PHY_FLAG_INT_MODE_AUTO_POLLING 0x00000100
+#define BNX2_PHY_FLAG_INT_MODE_LINK_READY 0x00000200
+#define BNX2_PHY_FLAG_DIS_EARLY_DAC 0x00000400
+#define BNX2_PHY_FLAG_REMOTE_PHY_CAP 0x00000800
+#define BNX2_PHY_FLAG_FORCED_DOWN 0x00001000
u32 mii_bmcr;
u32 mii_bmsr;