drm/radeon/kms: r600/r700 command stream checker

[net-next-2.6.git] / drivers / gpu / drm / radeon / rv770.c

diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index eb065bbe1eebe1b4fa39e5c9703afdf977975cd7..3ecd138815d879cc5ace5228ab1c1e77b77bb558 100644 (file)
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -516,15 +516,19 @@ static void rv770_gpu_init(struct radeon_device *rdev)
        switch (rdev->config.rv770.max_tile_pipes) {
        case 1:
                gb_tiling_config |= PIPE_TILING(0);
+               rdev->config.rv770.tiling_npipes = 1;
                break;
        case 2:
                gb_tiling_config |= PIPE_TILING(1);
+               rdev->config.rv770.tiling_npipes = 2;
                break;
        case 4:
                gb_tiling_config |= PIPE_TILING(2);
+               rdev->config.rv770.tiling_npipes = 4;
                break;
        case 8:
                gb_tiling_config |= PIPE_TILING(3);
+               rdev->config.rv770.tiling_npipes = 8;
                break;
        default:
                break;
@@ -534,8 +538,10 @@ static void rv770_gpu_init(struct radeon_device *rdev)
                gb_tiling_config |= BANK_TILING(1);
        else
                gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
+       rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3);
 
        gb_tiling_config |= GROUP_SIZE(0);
+       rdev->config.rv770.tiling_group_size = 256;
 
        if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
                gb_tiling_config |= ROW_TILING(3);
@@ -887,26 +893,25 @@ static int rv770_startup(struct radeon_device *rdev)
                        return r;
        }
        rv770_gpu_init(rdev);
-
-       if (!rdev->r600_blit.shader_obj) {
-               r = r600_blit_init(rdev);
+       r = r600_blit_init(rdev);
+       if (r) {
+               r600_blit_fini(rdev);
+               rdev->asic->copy = NULL;
+               dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
+       }
+       /* pin copy shader into vram */
+       if (rdev->r600_blit.shader_obj) {
+               r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
+               if (unlikely(r != 0))
+                       return r;
+               r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
+                               &rdev->r600_blit.shader_gpu_addr);
+               radeon_bo_unreserve(rdev->r600_blit.shader_obj);
                if (r) {
-                       DRM_ERROR("radeon: failed blitter (%d).\n", r);
+                       DRM_ERROR("failed to pin blit object %d\n", r);
                        return r;
                }
        }
-
-       r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
-       if (unlikely(r != 0))
-               return r;
-       r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
-                       &rdev->r600_blit.shader_gpu_addr);
-       radeon_bo_unreserve(rdev->r600_blit.shader_obj);
-       if (r) {
-               DRM_ERROR("failed to pin blit object %d\n", r);
-               return r;
-       }
-
        /* Enable IRQ */
        r = r600_irq_init(rdev);
        if (r) {
@@ -968,6 +973,7 @@ int rv770_suspend(struct radeon_device *rdev)
        /* FIXME: we should wait for ring to be empty */
        r700_cp_stop(rdev);
        rdev->cp.ready = false;
+       r600_irq_suspend(rdev);
        r600_wb_disable(rdev);
        rv770_pcie_gart_disable(rdev);
        /* unpin shaders bo */
@@ -1065,22 +1071,25 @@ int rv770_init(struct radeon_device *rdev)
        rdev->accel_working = true;
        r = rv770_startup(rdev);
        if (r) {
-               rv770_suspend(rdev);
+               dev_err(rdev->dev, "disabling GPU acceleration\n");
+               r600_cp_fini(rdev);
                r600_wb_fini(rdev);
-               radeon_ring_fini(rdev);
+               r600_irq_fini(rdev);
+               radeon_irq_kms_fini(rdev);
                rv770_pcie_gart_fini(rdev);
                rdev->accel_working = false;
        }
        if (rdev->accel_working) {
                r = radeon_ib_pool_init(rdev);
                if (r) {
-                       DRM_ERROR("radeon: failed initializing IB pool (%d).\n", r);
-                       rdev->accel_working = false;
-               }
-               r = r600_ib_test(rdev);
-               if (r) {
-                       DRM_ERROR("radeon: failed testing IB (%d).\n", r);
+                       dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
                        rdev->accel_working = false;
+               } else {
+                       r = r600_ib_test(rdev);
+                       if (r) {
+                               dev_err(rdev->dev, "IB test failed (%d).\n", r);
+                               rdev->accel_working = false;
+                       }
                }
        }
        return 0;
@@ -1088,13 +1097,11 @@ int rv770_init(struct radeon_device *rdev)
 
 void rv770_fini(struct radeon_device *rdev)
 {
-       rv770_suspend(rdev);
-
        r600_blit_fini(rdev);
+       r600_cp_fini(rdev);
+       r600_wb_fini(rdev);
        r600_irq_fini(rdev);
        radeon_irq_kms_fini(rdev);
-       radeon_ring_fini(rdev);
-       r600_wb_fini(rdev);
        rv770_pcie_gart_fini(rdev);
        radeon_gem_fini(rdev);
        radeon_fence_driver_fini(rdev);