MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.

[net-next-2.6.git] / arch / mips / sibyte / sb1250 / setup.c

diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index 0444da1e23c24e2dc675a40034a2e7adc087ba41..92da3155ce074ac16840c715fde220946a13b4fd 100644 (file)
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -87,6 +87,21 @@ static int __init setup_bcm1250(void)
        return ret;
 }
 
+int sb1250_m3_workaround_needed(void)
+{
+       switch (soc_type) {
+       case K_SYS_SOC_TYPE_BCM1250:
+       case K_SYS_SOC_TYPE_BCM1250_ALT:
+       case K_SYS_SOC_TYPE_BCM1250_ALT2:
+       case K_SYS_SOC_TYPE_BCM1125:
+       case K_SYS_SOC_TYPE_BCM1125H:
+               return soc_pass < K_SYS_REVISION_BCM1250_C0;
+
+       default:
+               return 0;
+       }
+}
+
 static int __init setup_bcm112x(void)
 {
        int ret = 0;