2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/pm_runtime.h>
18 #include <linux/slab.h>
19 #include <sound/soc.h>
20 #include <sound/sh_fsi.h>
23 #define DOFF_CTL 0x0004
24 #define DOFF_ST 0x0008
26 #define DIFF_CTL 0x0010
27 #define DIFF_ST 0x0014
32 #define MUTE_ST 0x0028
33 #define REG_END MUTE_ST
36 #define CPU_INT_ST 0x01F4
37 #define CPU_IEMSK 0x01F8
38 #define CPU_IMSK 0x01FC
43 #define CLK_RST 0x0210
44 #define SOFT_RST 0x0214
45 #define FIFO_SZ 0x0218
46 #define MREG_START CPU_INT_ST
47 #define MREG_END FIFO_SZ
51 #define CR_MONO (0x0 << 4)
52 #define CR_MONO_D (0x1 << 4)
53 #define CR_PCM (0x2 << 4)
54 #define CR_I2S (0x3 << 4)
55 #define CR_TDM (0x4 << 4)
56 #define CR_TDM_D (0x5 << 4)
60 #define IRQ_HALF 0x00100000
61 #define FIFO_CLR 0x00000001
64 #define ERR_OVER 0x00000010
65 #define ERR_UNDER 0x00000001
66 #define ST_ERR (ERR_OVER | ERR_UNDER)
69 #define ACKMD_MASK 0x00007000
70 #define BPFMD_MASK 0x00000700
73 #define B_CLK 0x00000010
74 #define A_CLK 0x00000001
77 #define INT_B_IN (1 << 12)
78 #define INT_B_OUT (1 << 8)
79 #define INT_A_IN (1 << 4)
80 #define INT_A_OUT (1 << 0)
83 #define PBSR (1 << 12) /* Port B Software Reset */
84 #define PASR (1 << 8) /* Port A Software Reset */
85 #define IR (1 << 4) /* Interrupt Reset */
86 #define FSISR (1 << 0) /* Software Reset */
89 #define OUT_SZ_MASK 0x7
93 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
95 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
97 /************************************************************************
103 ************************************************************************/
106 struct snd_pcm_substream *substream;
107 struct fsi_master *master;
129 struct fsi_priv fsia;
130 struct fsi_priv fsib;
131 struct fsi_core *core;
132 struct sh_fsi_platform_info *info;
136 /************************************************************************
139 basic read write function
142 ************************************************************************/
143 static void __fsi_reg_write(u32 reg, u32 data)
145 /* valid data area is 24bit */
148 __raw_writel(data, reg);
151 static u32 __fsi_reg_read(u32 reg)
153 return __raw_readl(reg);
156 static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
158 u32 val = __fsi_reg_read(reg);
163 __fsi_reg_write(reg, val);
166 static void fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
169 pr_err("fsi: register access err (%s)\n", __func__);
173 __fsi_reg_write((u32)(fsi->base + reg), data);
176 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
179 pr_err("fsi: register access err (%s)\n", __func__);
183 return __fsi_reg_read((u32)(fsi->base + reg));
186 static void fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
189 pr_err("fsi: register access err (%s)\n", __func__);
193 __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
196 static void fsi_master_write(struct fsi_master *master, u32 reg, u32 data)
200 if ((reg < MREG_START) ||
202 pr_err("fsi: register access err (%s)\n", __func__);
206 spin_lock_irqsave(&master->lock, flags);
207 __fsi_reg_write((u32)(master->base + reg), data);
208 spin_unlock_irqrestore(&master->lock, flags);
211 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
216 if ((reg < MREG_START) ||
218 pr_err("fsi: register access err (%s)\n", __func__);
222 spin_lock_irqsave(&master->lock, flags);
223 ret = __fsi_reg_read((u32)(master->base + reg));
224 spin_unlock_irqrestore(&master->lock, flags);
229 static void fsi_master_mask_set(struct fsi_master *master,
230 u32 reg, u32 mask, u32 data)
234 if ((reg < MREG_START) ||
236 pr_err("fsi: register access err (%s)\n", __func__);
240 spin_lock_irqsave(&master->lock, flags);
241 __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
242 spin_unlock_irqrestore(&master->lock, flags);
245 /************************************************************************
251 ************************************************************************/
252 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
257 static int fsi_is_port_a(struct fsi_priv *fsi)
259 return fsi->master->base == fsi->base;
262 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
264 struct snd_soc_pcm_runtime *rtd = substream->private_data;
265 struct snd_soc_dai_link *machine = rtd->dai;
267 return machine->cpu_dai;
270 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
272 struct snd_soc_dai *dai = fsi_get_dai(substream);
274 return dai->private_data;
277 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
279 int is_porta = fsi_is_port_a(fsi);
280 struct fsi_master *master = fsi_get_master(fsi);
282 return is_porta ? master->info->porta_flags :
283 master->info->portb_flags;
286 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
289 u32 flags = fsi_get_info_flags(fsi);
291 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
298 return (mode & flags) != mode;
301 static u32 fsi_port_ab_io_bit(struct fsi_priv *fsi, int is_play)
303 int is_porta = fsi_is_port_a(fsi);
307 data = is_play ? (1 << 0) : (1 << 4);
309 data = is_play ? (1 << 8) : (1 << 12);
314 static void fsi_stream_push(struct fsi_priv *fsi,
315 struct snd_pcm_substream *substream,
319 fsi->substream = substream;
320 fsi->buffer_len = buffer_len;
321 fsi->period_len = period_len;
322 fsi->byte_offset = 0;
326 static void fsi_stream_pop(struct fsi_priv *fsi)
328 fsi->substream = NULL;
331 fsi->byte_offset = 0;
335 static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play)
338 u32 reg = is_play ? DOFF_ST : DIFF_ST;
341 status = fsi_reg_read(fsi, reg);
342 residue = 0x1ff & (status >> 8);
343 residue *= fsi->chan;
348 /************************************************************************
354 ************************************************************************/
355 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
357 u32 data = fsi_port_ab_io_bit(fsi, is_play);
358 struct fsi_master *master = fsi_get_master(fsi);
360 fsi_master_mask_set(master, master->core->imsk, data, data);
361 fsi_master_mask_set(master, master->core->iemsk, data, data);
364 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
366 u32 data = fsi_port_ab_io_bit(fsi, is_play);
367 struct fsi_master *master = fsi_get_master(fsi);
369 fsi_master_mask_set(master, master->core->imsk, data, 0);
370 fsi_master_mask_set(master, master->core->iemsk, data, 0);
373 static u32 fsi_irq_get_status(struct fsi_master *master)
375 return fsi_master_read(master, master->core->int_st);
378 static void fsi_irq_clear_all_status(struct fsi_master *master)
380 fsi_master_write(master, master->core->int_st, 0);
383 static void fsi_irq_clear_status(struct fsi_priv *fsi)
386 struct fsi_master *master = fsi_get_master(fsi);
388 data |= fsi_port_ab_io_bit(fsi, 0);
389 data |= fsi_port_ab_io_bit(fsi, 1);
391 /* clear interrupt factor */
392 fsi_master_mask_set(master, master->core->int_st, data, 0);
395 /************************************************************************
401 ************************************************************************/
402 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
404 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
405 struct fsi_master *master = fsi_get_master(fsi);
408 fsi_master_mask_set(master, CLK_RST, val, val);
410 fsi_master_mask_set(master, CLK_RST, val, 0);
413 static void fsi_fifo_init(struct fsi_priv *fsi,
415 struct snd_soc_dai *dai)
417 struct fsi_master *master = fsi_get_master(fsi);
420 /* get on-chip RAM capacity */
421 shift = fsi_master_read(master, FIFO_SZ);
422 shift >>= fsi_is_port_a(fsi) ? AO_SZ_SHIFT : BO_SZ_SHIFT;
423 shift &= OUT_SZ_MASK;
424 fsi->fifo_max = 256 << shift;
425 dev_dbg(dai->dev, "fifo = %d words\n", fsi->fifo_max);
428 * The maximum number of sample data varies depending
429 * on the number of channels selected for the format.
431 * FIFOs are used in 4-channel units in 3-channel mode
432 * and in 8-channel units in 5- to 7-channel mode
433 * meaning that more FIFOs than the required size of DPRAM
436 * ex) if 256 words of DP-RAM is connected
437 * 1 channel: 256 (256 x 1 = 256)
438 * 2 channels: 128 (128 x 2 = 256)
439 * 3 channels: 64 ( 64 x 3 = 192)
440 * 4 channels: 64 ( 64 x 4 = 256)
441 * 5 channels: 32 ( 32 x 5 = 160)
442 * 6 channels: 32 ( 32 x 6 = 192)
443 * 7 channels: 32 ( 32 x 7 = 224)
444 * 8 channels: 32 ( 32 x 8 = 256)
446 for (i = 1; i < fsi->chan; i <<= 1)
448 dev_dbg(dai->dev, "%d channel %d store\n", fsi->chan, fsi->fifo_max);
450 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
452 /* set interrupt generation factor */
453 fsi_reg_write(fsi, ctrl, IRQ_HALF);
456 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
459 static void fsi_soft_all_reset(struct fsi_master *master)
462 fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
466 fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
467 fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
471 /* playback interrupt */
472 static int fsi_data_push(struct fsi_priv *fsi, int startup)
474 struct snd_pcm_runtime *runtime;
475 struct snd_pcm_substream *substream = NULL;
485 !fsi->substream->runtime)
489 substream = fsi->substream;
490 runtime = substream->runtime;
492 /* FSI FIFO has limit.
493 * So, this driver can not send periods data at a time
495 if (fsi->byte_offset >=
496 fsi->period_len * (fsi->periods + 1)) {
499 fsi->periods = (fsi->periods + 1) % runtime->periods;
501 if (0 == fsi->periods)
502 fsi->byte_offset = 0;
505 /* get 1 channel data width */
506 width = frames_to_bytes(runtime, 1) / fsi->chan;
508 /* get send size for alsa */
509 send = (fsi->buffer_len - fsi->byte_offset) / width;
511 /* get FIFO free size */
512 fifo_free = (fsi->fifo_max * fsi->chan) - fsi_get_fifo_residue(fsi, 1);
515 if (fifo_free < send)
518 start = runtime->dma_area;
519 start += fsi->byte_offset;
523 for (i = 0; i < send; i++)
524 fsi_reg_write(fsi, DODT,
525 ((u32)*((u16 *)start + i) << 8));
528 for (i = 0; i < send; i++)
529 fsi_reg_write(fsi, DODT, *((u32 *)start + i));
535 fsi->byte_offset += send * width;
537 status = fsi_reg_read(fsi, DOFF_ST);
539 struct snd_soc_dai *dai = fsi_get_dai(substream);
541 if (status & ERR_OVER)
542 dev_err(dai->dev, "over run\n");
543 if (status & ERR_UNDER)
544 dev_err(dai->dev, "under run\n");
546 fsi_reg_write(fsi, DOFF_ST, 0);
548 fsi_irq_enable(fsi, 1);
551 snd_pcm_period_elapsed(substream);
556 static int fsi_data_pop(struct fsi_priv *fsi, int startup)
558 struct snd_pcm_runtime *runtime;
559 struct snd_pcm_substream *substream = NULL;
569 !fsi->substream->runtime)
573 substream = fsi->substream;
574 runtime = substream->runtime;
576 /* FSI FIFO has limit.
577 * So, this driver can not send periods data at a time
579 if (fsi->byte_offset >=
580 fsi->period_len * (fsi->periods + 1)) {
583 fsi->periods = (fsi->periods + 1) % runtime->periods;
585 if (0 == fsi->periods)
586 fsi->byte_offset = 0;
589 /* get 1 channel data width */
590 width = frames_to_bytes(runtime, 1) / fsi->chan;
592 /* get free space for alsa */
593 free = (fsi->buffer_len - fsi->byte_offset) / width;
596 fifo_fill = fsi_get_fifo_residue(fsi, 0);
598 if (free < fifo_fill)
601 start = runtime->dma_area;
602 start += fsi->byte_offset;
606 for (i = 0; i < fifo_fill; i++)
607 *((u16 *)start + i) =
608 (u16)(fsi_reg_read(fsi, DIDT) >> 8);
611 for (i = 0; i < fifo_fill; i++)
612 *((u32 *)start + i) = fsi_reg_read(fsi, DIDT);
618 fsi->byte_offset += fifo_fill * width;
620 status = fsi_reg_read(fsi, DIFF_ST);
622 struct snd_soc_dai *dai = fsi_get_dai(substream);
624 if (status & ERR_OVER)
625 dev_err(dai->dev, "over run\n");
626 if (status & ERR_UNDER)
627 dev_err(dai->dev, "under run\n");
629 fsi_reg_write(fsi, DIFF_ST, 0);
631 fsi_irq_enable(fsi, 0);
634 snd_pcm_period_elapsed(substream);
639 static irqreturn_t fsi_interrupt(int irq, void *data)
641 struct fsi_master *master = data;
642 u32 int_st = fsi_irq_get_status(master);
644 /* clear irq status */
645 fsi_master_mask_set(master, SOFT_RST, IR, 0);
646 fsi_master_mask_set(master, SOFT_RST, IR, IR);
648 if (int_st & INT_A_OUT)
649 fsi_data_push(&master->fsia, 0);
650 if (int_st & INT_B_OUT)
651 fsi_data_push(&master->fsib, 0);
652 if (int_st & INT_A_IN)
653 fsi_data_pop(&master->fsia, 0);
654 if (int_st & INT_B_IN)
655 fsi_data_pop(&master->fsib, 0);
657 fsi_irq_clear_all_status(master);
662 /************************************************************************
668 ************************************************************************/
669 static int fsi_dai_startup(struct snd_pcm_substream *substream,
670 struct snd_soc_dai *dai)
672 struct fsi_priv *fsi = fsi_get_priv(substream);
673 u32 flags = fsi_get_info_flags(fsi);
677 int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
681 pm_runtime_get_sync(dai->dev);
684 data = is_play ? (1 << 0) : (1 << 4);
685 is_master = fsi_is_master_mode(fsi, is_play);
687 fsi_reg_mask_set(fsi, CKG1, data, data);
689 fsi_reg_mask_set(fsi, CKG1, data, 0);
691 /* clock inversion (CKG2) */
693 if (SH_FSI_LRM_INV & flags)
695 if (SH_FSI_BRM_INV & flags)
697 if (SH_FSI_LRS_INV & flags)
699 if (SH_FSI_BRS_INV & flags)
702 fsi_reg_write(fsi, CKG2, data);
706 reg = is_play ? DO_FMT : DI_FMT;
707 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
709 case SH_FSI_FMT_MONO:
713 case SH_FSI_FMT_MONO_DELAY:
726 fsi->chan = is_play ?
727 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
728 data = CR_TDM | (fsi->chan - 1);
730 case SH_FSI_FMT_TDM_DELAY:
731 fsi->chan = is_play ?
732 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
733 data = CR_TDM_D | (fsi->chan - 1);
736 dev_err(dai->dev, "unknown format.\n");
739 fsi_reg_write(fsi, reg, data);
742 fsi_irq_disable(fsi, is_play);
743 fsi_irq_clear_status(fsi);
746 fsi_fifo_init(fsi, is_play, dai);
751 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
752 struct snd_soc_dai *dai)
754 struct fsi_priv *fsi = fsi_get_priv(substream);
755 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
757 fsi_irq_disable(fsi, is_play);
758 fsi_clk_ctrl(fsi, 0);
760 pm_runtime_put_sync(dai->dev);
763 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
764 struct snd_soc_dai *dai)
766 struct fsi_priv *fsi = fsi_get_priv(substream);
767 struct snd_pcm_runtime *runtime = substream->runtime;
768 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
772 case SNDRV_PCM_TRIGGER_START:
773 fsi_stream_push(fsi, substream,
774 frames_to_bytes(runtime, runtime->buffer_size),
775 frames_to_bytes(runtime, runtime->period_size));
776 ret = is_play ? fsi_data_push(fsi, 1) : fsi_data_pop(fsi, 1);
778 case SNDRV_PCM_TRIGGER_STOP:
779 fsi_irq_disable(fsi, is_play);
787 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
788 struct snd_pcm_hw_params *params,
789 struct snd_soc_dai *dai)
791 struct fsi_priv *fsi = fsi_get_priv(substream);
792 struct fsi_master *master = fsi_get_master(fsi);
793 int (*set_rate)(int is_porta, int rate) = master->info->set_rate;
794 int fsi_ver = master->core->ver;
795 int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
798 /* if slave mode, set_rate is not needed */
799 if (!fsi_is_master_mode(fsi, is_play))
802 /* it is error if no set_rate */
806 ret = set_rate(fsi_is_port_a(fsi), params_rate(params));
810 switch (ret & SH_FSI_ACKMD_MASK) {
813 case SH_FSI_ACKMD_512:
816 case SH_FSI_ACKMD_256:
819 case SH_FSI_ACKMD_128:
822 case SH_FSI_ACKMD_64:
825 case SH_FSI_ACKMD_32:
827 dev_err(dai->dev, "unsupported ACKMD\n");
833 switch (ret & SH_FSI_BPFMD_MASK) {
836 case SH_FSI_BPFMD_32:
839 case SH_FSI_BPFMD_64:
842 case SH_FSI_BPFMD_128:
845 case SH_FSI_BPFMD_256:
848 case SH_FSI_BPFMD_512:
851 case SH_FSI_BPFMD_16:
853 dev_err(dai->dev, "unsupported ACKMD\n");
859 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
861 fsi_clk_ctrl(fsi, 1);
869 static struct snd_soc_dai_ops fsi_dai_ops = {
870 .startup = fsi_dai_startup,
871 .shutdown = fsi_dai_shutdown,
872 .trigger = fsi_dai_trigger,
873 .hw_params = fsi_dai_hw_params,
876 /************************************************************************
882 ************************************************************************/
883 static struct snd_pcm_hardware fsi_pcm_hardware = {
884 .info = SNDRV_PCM_INFO_INTERLEAVED |
885 SNDRV_PCM_INFO_MMAP |
886 SNDRV_PCM_INFO_MMAP_VALID |
887 SNDRV_PCM_INFO_PAUSE,
894 .buffer_bytes_max = 64 * 1024,
895 .period_bytes_min = 32,
896 .period_bytes_max = 8192,
902 static int fsi_pcm_open(struct snd_pcm_substream *substream)
904 struct snd_pcm_runtime *runtime = substream->runtime;
907 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
909 ret = snd_pcm_hw_constraint_integer(runtime,
910 SNDRV_PCM_HW_PARAM_PERIODS);
915 static int fsi_hw_params(struct snd_pcm_substream *substream,
916 struct snd_pcm_hw_params *hw_params)
918 return snd_pcm_lib_malloc_pages(substream,
919 params_buffer_bytes(hw_params));
922 static int fsi_hw_free(struct snd_pcm_substream *substream)
924 return snd_pcm_lib_free_pages(substream);
927 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
929 struct snd_pcm_runtime *runtime = substream->runtime;
930 struct fsi_priv *fsi = fsi_get_priv(substream);
933 location = (fsi->byte_offset - 1);
937 return bytes_to_frames(runtime, location);
940 static struct snd_pcm_ops fsi_pcm_ops = {
941 .open = fsi_pcm_open,
942 .ioctl = snd_pcm_lib_ioctl,
943 .hw_params = fsi_hw_params,
944 .hw_free = fsi_hw_free,
945 .pointer = fsi_pointer,
948 /************************************************************************
954 ************************************************************************/
955 #define PREALLOC_BUFFER (32 * 1024)
956 #define PREALLOC_BUFFER_MAX (32 * 1024)
958 static void fsi_pcm_free(struct snd_pcm *pcm)
960 snd_pcm_lib_preallocate_free_for_all(pcm);
963 static int fsi_pcm_new(struct snd_card *card,
964 struct snd_soc_dai *dai,
968 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
969 * in MMAP mode (i.e. aplay -M)
971 return snd_pcm_lib_preallocate_pages_for_all(
973 SNDRV_DMA_TYPE_CONTINUOUS,
974 snd_dma_continuous_data(GFP_KERNEL),
975 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
978 /************************************************************************
984 ************************************************************************/
985 struct snd_soc_dai fsi_soc_dai[] = {
1001 .ops = &fsi_dai_ops,
1008 .formats = FSI_FMTS,
1014 .formats = FSI_FMTS,
1018 .ops = &fsi_dai_ops,
1021 EXPORT_SYMBOL_GPL(fsi_soc_dai);
1023 struct snd_soc_platform fsi_soc_platform = {
1025 .pcm_ops = &fsi_pcm_ops,
1026 .pcm_new = fsi_pcm_new,
1027 .pcm_free = fsi_pcm_free,
1029 EXPORT_SYMBOL_GPL(fsi_soc_platform);
1031 /************************************************************************
1037 ************************************************************************/
1038 static int fsi_probe(struct platform_device *pdev)
1040 struct fsi_master *master;
1041 const struct platform_device_id *id_entry;
1042 struct resource *res;
1046 id_entry = pdev->id_entry;
1048 dev_err(&pdev->dev, "unknown fsi device\n");
1052 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1053 irq = platform_get_irq(pdev, 0);
1054 if (!res || (int)irq <= 0) {
1055 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1060 master = kzalloc(sizeof(*master), GFP_KERNEL);
1062 dev_err(&pdev->dev, "Could not allocate master\n");
1067 master->base = ioremap_nocache(res->start, resource_size(res));
1068 if (!master->base) {
1070 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1075 master->info = pdev->dev.platform_data;
1076 master->fsia.base = master->base;
1077 master->fsia.master = master;
1078 master->fsib.base = master->base + 0x40;
1079 master->fsib.master = master;
1080 master->core = (struct fsi_core *)id_entry->driver_data;
1081 spin_lock_init(&master->lock);
1083 pm_runtime_enable(&pdev->dev);
1084 pm_runtime_resume(&pdev->dev);
1086 fsi_soc_dai[0].dev = &pdev->dev;
1087 fsi_soc_dai[0].private_data = &master->fsia;
1088 fsi_soc_dai[1].dev = &pdev->dev;
1089 fsi_soc_dai[1].private_data = &master->fsib;
1091 fsi_soft_all_reset(master);
1093 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
1094 id_entry->name, master);
1096 dev_err(&pdev->dev, "irq request err\n");
1100 ret = snd_soc_register_platform(&fsi_soc_platform);
1102 dev_err(&pdev->dev, "cannot snd soc register\n");
1106 return snd_soc_register_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1109 free_irq(irq, master);
1111 iounmap(master->base);
1112 pm_runtime_disable(&pdev->dev);
1120 static int fsi_remove(struct platform_device *pdev)
1122 struct fsi_master *master;
1124 master = fsi_get_master(fsi_soc_dai[0].private_data);
1126 snd_soc_unregister_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1127 snd_soc_unregister_platform(&fsi_soc_platform);
1129 pm_runtime_disable(&pdev->dev);
1131 free_irq(master->irq, master);
1133 iounmap(master->base);
1136 fsi_soc_dai[0].dev = NULL;
1137 fsi_soc_dai[0].private_data = NULL;
1138 fsi_soc_dai[1].dev = NULL;
1139 fsi_soc_dai[1].private_data = NULL;
1144 static int fsi_runtime_nop(struct device *dev)
1146 /* Runtime PM callback shared between ->runtime_suspend()
1147 * and ->runtime_resume(). Simply returns success.
1149 * This driver re-initializes all registers after
1150 * pm_runtime_get_sync() anyway so there is no need
1151 * to save and restore registers here.
1156 static struct dev_pm_ops fsi_pm_ops = {
1157 .runtime_suspend = fsi_runtime_nop,
1158 .runtime_resume = fsi_runtime_nop,
1161 static struct fsi_core fsi1_core = {
1170 static struct fsi_core fsi2_core = {
1174 .int_st = CPU_INT_ST,
1179 static struct platform_device_id fsi_id_table[] = {
1180 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
1181 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
1184 static struct platform_driver fsi_driver = {
1190 .remove = fsi_remove,
1191 .id_table = fsi_id_table,
1194 static int __init fsi_mobile_init(void)
1196 return platform_driver_register(&fsi_driver);
1199 static void __exit fsi_mobile_exit(void)
1201 platform_driver_unregister(&fsi_driver);
1203 module_init(fsi_mobile_init);
1204 module_exit(fsi_mobile_exit);
1206 MODULE_LICENSE("GPL");
1207 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1208 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");