sound/oss/au1550_ac97.c

   1 /*
   2  * au1550_ac97.c  --  Sound driver for Alchemy Au1550 MIPS Internet Edge
   3  *                    Processor.
   4  *
   5  * Copyright 2004 Embedded Edge, LLC
   6  *      dan@embeddededge.com
   7  *
   8  * Mostly copied from the au1000.c driver and some from the
   9  * PowerMac dbdma driver.
  10  * We assume the processor can do memory coherent DMA.
  11  *
  12  * Ported to 2.6 by Matt Porter <mporter@kernel.crashing.org>
  13  *
  14  *  This program is free software; you can redistribute  it and/or modify it
  15  *  under  the terms of  the GNU General  Public License as published by the
  16  *  Free Software Foundation;  either version 2 of the  License, or (at your
  17  *  option) any later version.
  18  *
  19  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  20  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  21  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  22  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  23  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  25  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  27  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  28  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  *
  30  *  You should have received a copy of the  GNU General Public License along
  31  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  32  *  675 Mass Ave, Cambridge, MA 02139, USA.
  33  *
  34  */
  35
  36 #undef DEBUG
  37
  38 #include <linux/module.h>
  39 #include <linux/string.h>
  40 #include <linux/ioport.h>
  41 #include <linux/sched.h>
  42 #include <linux/delay.h>
  43 #include <linux/sound.h>
  44 #include <linux/slab.h>
  45 #include <linux/soundcard.h>
  46 #include <linux/smp_lock.h>
  47 #include <linux/init.h>
  48 #include <linux/interrupt.h>
  49 #include <linux/kernel.h>
  50 #include <linux/poll.h>
  51 #include <linux/bitops.h>
  52 #include <linux/spinlock.h>
  53 #include <linux/smp_lock.h>
  54 #include <linux/ac97_codec.h>
  55 #include <linux/mutex.h>
  56
  57 #include <asm/io.h>
  58 #include <asm/uaccess.h>
  59 #include <asm/hardirq.h>
  60 #include <asm/mach-au1x00/au1xxx_psc.h>
  61 #include <asm/mach-au1x00/au1xxx_dbdma.h>
  62 #include <asm/mach-au1x00/au1xxx.h>
  63
  64 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
  65
  66 /* misc stuff */
  67 #define POLL_COUNT   0x50000
  68 #define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC)
  69
  70 /* The number of DBDMA ring descriptors to allocate.  No sense making
  71  * this too large....if you can't keep up with a few you aren't likely
  72  * to be able to with lots of them, either.
  73  */
  74 #define NUM_DBDMA_DESCRIPTORS 4
  75
  76 #define err(format, arg...) printk(KERN_ERR format "\n" , ## arg)
  77
  78 /* Boot options
  79  * 0 = no VRA, 1 = use VRA if codec supports it
  80  */
  81 static int      vra = 1;
  82 module_param(vra, bool, 0);
  83 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
  84
  85 static struct au1550_state {
  86         /* soundcore stuff */
  87         int             dev_audio;
  88
  89         struct ac97_codec *codec;
  90         unsigned        codec_base_caps; /* AC'97 reg 00h, "Reset Register" */
  91         unsigned        codec_ext_caps;  /* AC'97 reg 28h, "Extended Audio ID" */
  92         int             no_vra;         /* do not use VRA */
  93
  94         spinlock_t      lock;
  95         struct mutex open_mutex;
  96         struct mutex sem;
  97         fmode_t          open_mode;
  98         wait_queue_head_t open_wait;
  99
 100         struct dmabuf {
 101                 u32             dmanr;
 102                 unsigned        sample_rate;
 103                 unsigned        src_factor;
 104                 unsigned        sample_size;
 105                 int             num_channels;
 106                 int             dma_bytes_per_sample;
 107                 int             user_bytes_per_sample;
 108                 int             cnt_factor;
 109
 110                 void            *rawbuf;
 111                 unsigned        buforder;
 112                 unsigned        numfrag;
 113                 unsigned        fragshift;
 114                 void            *nextIn;
 115                 void            *nextOut;
 116                 int             count;
 117                 unsigned        total_bytes;
 118                 unsigned        error;
 119                 wait_queue_head_t wait;
 120
 121                 /* redundant, but makes calculations easier */
 122                 unsigned        fragsize;
 123                 unsigned        dma_fragsize;
 124                 unsigned        dmasize;
 125                 unsigned        dma_qcount;
 126
 127                 /* OSS stuff */
 128                 unsigned        mapped:1;
 129                 unsigned        ready:1;
 130                 unsigned        stopped:1;
 131                 unsigned        ossfragshift;
 132                 int             ossmaxfrags;
 133                 unsigned        subdivision;
 134         } dma_dac, dma_adc;
 135 } au1550_state;
 136
 137 static unsigned
 138 ld2(unsigned int x)
 139 {
 140         unsigned        r = 0;
 141
 142         if (x >= 0x10000) {
 143                 x >>= 16;
 144                 r += 16;
 145         }
 146         if (x >= 0x100) {
 147                 x >>= 8;
 148                 r += 8;
 149         }
 150         if (x >= 0x10) {
 151                 x >>= 4;
 152                 r += 4;
 153         }
 154         if (x >= 4) {
 155                 x >>= 2;
 156                 r += 2;
 157         }
 158         if (x >= 2)
 159                 r++;
 160         return r;
 161 }
 162
 163 static void
 164 au1550_delay(int msec)
 165 {
 166         unsigned long   tmo;
 167         signed long     tmo2;
 168
 169         if (in_interrupt())
 170                 return;
 171
 172         tmo = jiffies + (msec * HZ) / 1000;
 173         for (;;) {
 174                 tmo2 = tmo - jiffies;
 175                 if (tmo2 <= 0)
 176                         break;
 177                 schedule_timeout(tmo2);
 178         }
 179 }
 180
 181 static u16
 182 rdcodec(struct ac97_codec *codec, u8 addr)
 183 {
 184         struct au1550_state *s = (struct au1550_state *)codec->private_data;
 185         unsigned long   flags;
 186         u32             cmd, val;
 187         u16             data;
 188         int             i;
 189
 190         spin_lock_irqsave(&s->lock, flags);
 191
 192         for (i = 0; i < POLL_COUNT; i++) {
 193                 val = au_readl(PSC_AC97STAT);
 194                 au_sync();
 195                 if (!(val & PSC_AC97STAT_CP))
 196                         break;
 197         }
 198         if (i == POLL_COUNT)
 199                 err("rdcodec: codec cmd pending expired!");
 200
 201         cmd = (u32)PSC_AC97CDC_INDX(addr);
 202         cmd |= PSC_AC97CDC_RD;  /* read command */
 203         au_writel(cmd, PSC_AC97CDC);
 204         au_sync();
 205
 206         /* now wait for the data
 207         */
 208         for (i = 0; i < POLL_COUNT; i++) {
 209                 val = au_readl(PSC_AC97STAT);
 210                 au_sync();
 211                 if (!(val & PSC_AC97STAT_CP))
 212                         break;
 213         }
 214         if (i == POLL_COUNT) {
 215                 err("rdcodec: read poll expired!");
 216                 data = 0;
 217                 goto out;
 218         }
 219
 220         /* wait for command done?
 221         */
 222         for (i = 0; i < POLL_COUNT; i++) {
 223                 val = au_readl(PSC_AC97EVNT);
 224                 au_sync();
 225                 if (val & PSC_AC97EVNT_CD)
 226                         break;
 227         }
 228         if (i == POLL_COUNT) {
 229                 err("rdcodec: read cmdwait expired!");
 230                 data = 0;
 231                 goto out;
 232         }
 233
 234         data = au_readl(PSC_AC97CDC) & 0xffff;
 235         au_sync();
 236
 237         /* Clear command done event.
 238         */
 239         au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT);
 240         au_sync();
 241
 242  out:
 243         spin_unlock_irqrestore(&s->lock, flags);
 244
 245         return data;
 246 }
 247
 248
 249 static void
 250 wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 251 {
 252         struct au1550_state *s = (struct au1550_state *)codec->private_data;
 253         unsigned long   flags;
 254         u32             cmd, val;
 255         int             i;
 256
 257         spin_lock_irqsave(&s->lock, flags);
 258
 259         for (i = 0; i < POLL_COUNT; i++) {
 260                 val = au_readl(PSC_AC97STAT);
 261                 au_sync();
 262                 if (!(val & PSC_AC97STAT_CP))
 263                         break;
 264         }
 265         if (i == POLL_COUNT)
 266                 err("wrcodec: codec cmd pending expired!");
 267
 268         cmd = (u32)PSC_AC97CDC_INDX(addr);
 269         cmd |= (u32)data;
 270         au_writel(cmd, PSC_AC97CDC);
 271         au_sync();
 272
 273         for (i = 0; i < POLL_COUNT; i++) {
 274                 val = au_readl(PSC_AC97STAT);
 275                 au_sync();
 276                 if (!(val & PSC_AC97STAT_CP))
 277                         break;
 278         }
 279         if (i == POLL_COUNT)
 280                 err("wrcodec: codec cmd pending expired!");
 281
 282         for (i = 0; i < POLL_COUNT; i++) {
 283                 val = au_readl(PSC_AC97EVNT);
 284                 au_sync();
 285                 if (val & PSC_AC97EVNT_CD)
 286                         break;
 287         }
 288         if (i == POLL_COUNT)
 289                 err("wrcodec: read cmdwait expired!");
 290
 291         /* Clear command done event.
 292         */
 293         au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT);
 294         au_sync();
 295
 296         spin_unlock_irqrestore(&s->lock, flags);
 297 }
 298
 299 static void
 300 waitcodec(struct ac97_codec *codec)
 301 {
 302         u16     temp;
 303         u32     val;
 304         int     i;
 305
 306         /* codec_wait is used to wait for a ready state after
 307          * an AC97C_RESET.
 308          */
 309         au1550_delay(10);
 310
 311         /* first poll the CODEC_READY tag bit
 312         */
 313         for (i = 0; i < POLL_COUNT; i++) {
 314                 val = au_readl(PSC_AC97STAT);
 315                 au_sync();
 316                 if (val & PSC_AC97STAT_CR)
 317                         break;
 318         }
 319         if (i == POLL_COUNT) {
 320                 err("waitcodec: CODEC_READY poll expired!");
 321                 return;
 322         }
 323
 324         /* get AC'97 powerdown control/status register
 325         */
 326         temp = rdcodec(codec, AC97_POWER_CONTROL);
 327
 328         /* If anything is powered down, power'em up
 329         */
 330         if (temp & 0x7f00) {
 331                 /* Power on
 332                 */
 333                 wrcodec(codec, AC97_POWER_CONTROL, 0);
 334                 au1550_delay(100);
 335
 336                 /* Reread
 337                 */
 338                 temp = rdcodec(codec, AC97_POWER_CONTROL);
 339         }
 340
 341         /* Check if Codec REF,ANL,DAC,ADC ready
 342         */
 343         if ((temp & 0x7f0f) != 0x000f)
 344                 err("codec reg 26 status (0x%x) not ready!!", temp);
 345 }
 346
 347 /* stop the ADC before calling */
 348 static void
 349 set_adc_rate(struct au1550_state *s, unsigned rate)
 350 {
 351         struct dmabuf  *adc = &s->dma_adc;
 352         struct dmabuf  *dac = &s->dma_dac;
 353         unsigned        adc_rate, dac_rate;
 354         u16             ac97_extstat;
 355
 356         if (s->no_vra) {
 357                 /* calc SRC factor
 358                 */
 359                 adc->src_factor = ((96000 / rate) + 1) >> 1;
 360                 adc->sample_rate = 48000 / adc->src_factor;
 361                 return;
 362         }
 363
 364         adc->src_factor = 1;
 365
 366         ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
 367
 368         rate = rate > 48000 ? 48000 : rate;
 369
 370         /* enable VRA
 371         */
 372         wrcodec(s->codec, AC97_EXTENDED_STATUS,
 373                 ac97_extstat | AC97_EXTSTAT_VRA);
 374
 375         /* now write the sample rate
 376         */
 377         wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, (u16) rate);
 378
 379         /* read it back for actual supported rate
 380         */
 381         adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
 382
 383         pr_debug("set_adc_rate: set to %d Hz\n", adc_rate);
 384
 385         /* some codec's don't allow unequal DAC and ADC rates, in which case
 386          * writing one rate reg actually changes both.
 387          */
 388         dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
 389         if (dac->num_channels > 2)
 390                 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, dac_rate);
 391         if (dac->num_channels > 4)
 392                 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, dac_rate);
 393
 394         adc->sample_rate = adc_rate;
 395         dac->sample_rate = dac_rate;
 396 }
 397
 398 /* stop the DAC before calling */
 399 static void
 400 set_dac_rate(struct au1550_state *s, unsigned rate)
 401 {
 402         struct dmabuf  *dac = &s->dma_dac;
 403         struct dmabuf  *adc = &s->dma_adc;
 404         unsigned        adc_rate, dac_rate;
 405         u16             ac97_extstat;
 406
 407         if (s->no_vra) {
 408                 /* calc SRC factor
 409                 */
 410                 dac->src_factor = ((96000 / rate) + 1) >> 1;
 411                 dac->sample_rate = 48000 / dac->src_factor;
 412                 return;
 413         }
 414
 415         dac->src_factor = 1;
 416
 417         ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
 418
 419         rate = rate > 48000 ? 48000 : rate;
 420
 421         /* enable VRA
 422         */
 423         wrcodec(s->codec, AC97_EXTENDED_STATUS,
 424                 ac97_extstat | AC97_EXTSTAT_VRA);
 425
 426         /* now write the sample rate
 427         */
 428         wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate);
 429
 430         /* I don't support different sample rates for multichannel,
 431          * so make these channels the same.
 432          */
 433         if (dac->num_channels > 2)
 434                 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate);
 435         if (dac->num_channels > 4)
 436                 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate);
 437         /* read it back for actual supported rate
 438         */
 439         dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
 440
 441         pr_debug("set_dac_rate: set to %d Hz\n", dac_rate);
 442
 443         /* some codec's don't allow unequal DAC and ADC rates, in which case
 444          * writing one rate reg actually changes both.
 445          */
 446         adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
 447
 448         dac->sample_rate = dac_rate;
 449         adc->sample_rate = adc_rate;
 450 }
 451
 452 static void
 453 stop_dac(struct au1550_state *s)
 454 {
 455         struct dmabuf  *db = &s->dma_dac;
 456         u32             stat;
 457         unsigned long   flags;
 458
 459         if (db->stopped)
 460                 return;
 461
 462         spin_lock_irqsave(&s->lock, flags);
 463
 464         au_writel(PSC_AC97PCR_TP, PSC_AC97PCR);
 465         au_sync();
 466
 467         /* Wait for Transmit Busy to show disabled.
 468         */
 469         do {
 470                 stat = au_readl(PSC_AC97STAT);
 471                 au_sync();
 472         } while ((stat & PSC_AC97STAT_TB) != 0);
 473
 474         au1xxx_dbdma_reset(db->dmanr);
 475
 476         db->stopped = 1;
 477
 478         spin_unlock_irqrestore(&s->lock, flags);
 479 }
 480
 481 static void
 482 stop_adc(struct au1550_state *s)
 483 {
 484         struct dmabuf  *db = &s->dma_adc;
 485         unsigned long   flags;
 486         u32             stat;
 487
 488         if (db->stopped)
 489                 return;
 490
 491         spin_lock_irqsave(&s->lock, flags);
 492
 493         au_writel(PSC_AC97PCR_RP, PSC_AC97PCR);
 494         au_sync();
 495
 496         /* Wait for Receive Busy to show disabled.
 497         */
 498         do {
 499                 stat = au_readl(PSC_AC97STAT);
 500                 au_sync();
 501         } while ((stat & PSC_AC97STAT_RB) != 0);
 502
 503         au1xxx_dbdma_reset(db->dmanr);
 504
 505         db->stopped = 1;
 506
 507         spin_unlock_irqrestore(&s->lock, flags);
 508 }
 509
 510
 511 static void
 512 set_xmit_slots(int num_channels)
 513 {
 514         u32     ac97_config, stat;
 515
 516         ac97_config = au_readl(PSC_AC97CFG);
 517         au_sync();
 518         ac97_config &= ~(PSC_AC97CFG_TXSLOT_MASK | PSC_AC97CFG_DE_ENABLE);
 519         au_writel(ac97_config, PSC_AC97CFG);
 520         au_sync();
 521
 522         switch (num_channels) {
 523         case 6:         /* stereo with surround and center/LFE,
 524                          * slots 3,4,6,7,8,9
 525                          */
 526                 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(6);
 527                 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(9);
 528
 529         case 4:         /* stereo with surround, slots 3,4,7,8 */
 530                 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(7);
 531                 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(8);
 532
 533         case 2:         /* stereo, slots 3,4 */
 534         case 1:         /* mono */
 535                 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(3);
 536                 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(4);
 537         }
 538
 539         au_writel(ac97_config, PSC_AC97CFG);
 540         au_sync();
 541
 542         ac97_config |= PSC_AC97CFG_DE_ENABLE;
 543         au_writel(ac97_config, PSC_AC97CFG);
 544         au_sync();
 545
 546         /* Wait for Device ready.
 547         */
 548         do {
 549                 stat = au_readl(PSC_AC97STAT);
 550                 au_sync();
 551         } while ((stat & PSC_AC97STAT_DR) == 0);
 552 }
 553
 554 static void
 555 set_recv_slots(int num_channels)
 556 {
 557         u32     ac97_config, stat;
 558
 559         ac97_config = au_readl(PSC_AC97CFG);
 560         au_sync();
 561         ac97_config &= ~(PSC_AC97CFG_RXSLOT_MASK | PSC_AC97CFG_DE_ENABLE);
 562         au_writel(ac97_config, PSC_AC97CFG);
 563         au_sync();
 564
 565         /* Always enable slots 3 and 4 (stereo). Slot 6 is
 566          * optional Mic ADC, which we don't support yet.
 567          */
 568         ac97_config |= PSC_AC97CFG_RXSLOT_ENA(3);
 569         ac97_config |= PSC_AC97CFG_RXSLOT_ENA(4);
 570
 571         au_writel(ac97_config, PSC_AC97CFG);
 572         au_sync();
 573
 574         ac97_config |= PSC_AC97CFG_DE_ENABLE;
 575         au_writel(ac97_config, PSC_AC97CFG);
 576         au_sync();
 577
 578         /* Wait for Device ready.
 579         */
 580         do {
 581                 stat = au_readl(PSC_AC97STAT);
 582                 au_sync();
 583         } while ((stat & PSC_AC97STAT_DR) == 0);
 584 }
 585
 586 /* Hold spinlock for both start_dac() and start_adc() calls */
 587 static void
 588 start_dac(struct au1550_state *s)
 589 {
 590         struct dmabuf  *db = &s->dma_dac;
 591
 592         if (!db->stopped)
 593                 return;
 594
 595         set_xmit_slots(db->num_channels);
 596         au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
 597         au_sync();
 598         au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
 599         au_sync();
 600
 601         au1xxx_dbdma_start(db->dmanr);
 602
 603         db->stopped = 0;
 604 }
 605
 606 static void
 607 start_adc(struct au1550_state *s)
 608 {
 609         struct dmabuf  *db = &s->dma_adc;
 610         int     i;
 611
 612         if (!db->stopped)
 613                 return;
 614
 615         /* Put two buffers on the ring to get things started.
 616         */
 617         for (i=0; i<2; i++) {
 618                 au1xxx_dbdma_put_dest(db->dmanr, virt_to_phys(db->nextIn),
 619                                 db->dma_fragsize, DDMA_FLAGS_IE);
 620
 621                 db->nextIn += db->dma_fragsize;
 622                 if (db->nextIn >= db->rawbuf + db->dmasize)
 623                         db->nextIn -= db->dmasize;
 624         }
 625
 626         set_recv_slots(db->num_channels);
 627         au1xxx_dbdma_start(db->dmanr);
 628         au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
 629         au_sync();
 630         au_writel(PSC_AC97PCR_RS, PSC_AC97PCR);
 631         au_sync();
 632
 633         db->stopped = 0;
 634 }
 635
 636 static int
 637 prog_dmabuf(struct au1550_state *s, struct dmabuf *db)
 638 {
 639         unsigned user_bytes_per_sec;
 640         unsigned        bufs;
 641         unsigned        rate = db->sample_rate;
 642
 643         if (!db->rawbuf) {
 644                 db->ready = db->mapped = 0;
 645                 db->buforder = 5;       /* 32 * PAGE_SIZE */
 646                 db->rawbuf = kmalloc((PAGE_SIZE << db->buforder), GFP_KERNEL);
 647                 if (!db->rawbuf)
 648                         return -ENOMEM;
 649         }
 650
 651         db->cnt_factor = 1;
 652         if (db->sample_size == 8)
 653                 db->cnt_factor *= 2;
 654         if (db->num_channels == 1)
 655                 db->cnt_factor *= 2;
 656         db->cnt_factor *= db->src_factor;
 657
 658         db->count = 0;
 659         db->dma_qcount = 0;
 660         db->nextIn = db->nextOut = db->rawbuf;
 661
 662         db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels;
 663         db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ?
 664                                         2 : db->num_channels);
 665
 666         user_bytes_per_sec = rate * db->user_bytes_per_sample;
 667         bufs = PAGE_SIZE << db->buforder;
 668         if (db->ossfragshift) {
 669                 if ((1000 << db->ossfragshift) < user_bytes_per_sec)
 670                         db->fragshift = ld2(user_bytes_per_sec/1000);
 671                 else
 672                         db->fragshift = db->ossfragshift;
 673         } else {
 674                 db->fragshift = ld2(user_bytes_per_sec / 100 /
 675                                     (db->subdivision ? db->subdivision : 1));
 676                 if (db->fragshift < 3)
 677                         db->fragshift = 3;
 678         }
 679
 680         db->fragsize = 1 << db->fragshift;
 681         db->dma_fragsize = db->fragsize * db->cnt_factor;
 682         db->numfrag = bufs / db->dma_fragsize;
 683
 684         while (db->numfrag < 4 && db->fragshift > 3) {
 685                 db->fragshift--;
 686                 db->fragsize = 1 << db->fragshift;
 687                 db->dma_fragsize = db->fragsize * db->cnt_factor;
 688                 db->numfrag = bufs / db->dma_fragsize;
 689         }
 690
 691         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 692                 db->numfrag = db->ossmaxfrags;
 693
 694         db->dmasize = db->dma_fragsize * db->numfrag;
 695         memset(db->rawbuf, 0, bufs);
 696
 697         pr_debug("prog_dmabuf: rate=%d, samplesize=%d, channels=%d\n",
 698             rate, db->sample_size, db->num_channels);
 699         pr_debug("prog_dmabuf: fragsize=%d, cnt_factor=%d, dma_fragsize=%d\n",
 700             db->fragsize, db->cnt_factor, db->dma_fragsize);
 701         pr_debug("prog_dmabuf: numfrag=%d, dmasize=%d\n", db->numfrag, db->dmasize);
 702
 703         db->ready = 1;
 704         return 0;
 705 }
 706
 707 static int
 708 prog_dmabuf_adc(struct au1550_state *s)
 709 {
 710         stop_adc(s);
 711         return prog_dmabuf(s, &s->dma_adc);
 712
 713 }
 714
 715 static int
 716 prog_dmabuf_dac(struct au1550_state *s)
 717 {
 718         stop_dac(s);
 719         return prog_dmabuf(s, &s->dma_dac);
 720 }
 721
 722
 723 static void dac_dma_interrupt(int irq, void *dev_id)
 724 {
 725         struct au1550_state *s = (struct au1550_state *) dev_id;
 726         struct dmabuf  *db = &s->dma_dac;
 727         u32     ac97c_stat;
 728
 729         spin_lock(&s->lock);
 730
 731         ac97c_stat = au_readl(PSC_AC97STAT);
 732         if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
 733                 pr_debug("AC97C status = 0x%08x\n", ac97c_stat);
 734         db->dma_qcount--;
 735
 736         if (db->count >= db->fragsize) {
 737                 if (au1xxx_dbdma_put_source(db->dmanr,
 738                                 virt_to_phys(db->nextOut), db->fragsize,
 739                                 DDMA_FLAGS_IE) == 0) {
 740                         err("qcount < 2 and no ring room!");
 741                 }
 742                 db->nextOut += db->fragsize;
 743                 if (db->nextOut >= db->rawbuf + db->dmasize)
 744                         db->nextOut -= db->dmasize;
 745                 db->count -= db->fragsize;
 746                 db->total_bytes += db->dma_fragsize;
 747                 db->dma_qcount++;
 748         }
 749
 750         /* wake up anybody listening */
 751         if (waitqueue_active(&db->wait))
 752                 wake_up(&db->wait);
 753
 754         spin_unlock(&s->lock);
 755 }
 756
 757
 758 static void adc_dma_interrupt(int irq, void *dev_id)
 759 {
 760         struct  au1550_state *s = (struct au1550_state *)dev_id;
 761         struct  dmabuf  *dp = &s->dma_adc;
 762         u32     obytes;
 763         char    *obuf;
 764
 765         spin_lock(&s->lock);
 766
 767         /* Pull the buffer from the dma queue.
 768         */
 769         au1xxx_dbdma_get_dest(dp->dmanr, (void *)(&obuf), &obytes);
 770
 771         if ((dp->count + obytes) > dp->dmasize) {
 772                 /* Overrun. Stop ADC and log the error
 773                 */
 774                 spin_unlock(&s->lock);
 775                 stop_adc(s);
 776                 dp->error++;
 777                 err("adc overrun");
 778                 return;
 779         }
 780
 781         /* Put a new empty buffer on the destination DMA.
 782         */
 783         au1xxx_dbdma_put_dest(dp->dmanr, virt_to_phys(dp->nextIn),
 784                               dp->dma_fragsize, DDMA_FLAGS_IE);
 785
 786         dp->nextIn += dp->dma_fragsize;
 787         if (dp->nextIn >= dp->rawbuf + dp->dmasize)
 788                 dp->nextIn -= dp->dmasize;
 789
 790         dp->count += obytes;
 791         dp->total_bytes += obytes;
 792
 793         /* wake up anybody listening
 794         */
 795         if (waitqueue_active(&dp->wait))
 796                 wake_up(&dp->wait);
 797
 798         spin_unlock(&s->lock);
 799 }
 800
 801 static loff_t
 802 au1550_llseek(struct file *file, loff_t offset, int origin)
 803 {
 804         return -ESPIPE;
 805 }
 806
 807
 808 static int
 809 au1550_open_mixdev(struct inode *inode, struct file *file)
 810 {
 811         lock_kernel();
 812         file->private_data = &au1550_state;
 813         unlock_kernel();
 814         return 0;
 815 }
 816
 817 static int
 818 au1550_release_mixdev(struct inode *inode, struct file *file)
 819 {
 820         return 0;
 821 }
 822
 823 static int
 824 mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
 825                         unsigned long arg)
 826 {
 827         return codec->mixer_ioctl(codec, cmd, arg);
 828 }
 829
 830 static int
 831 au1550_ioctl_mixdev(struct inode *inode, struct file *file,
 832                                unsigned int cmd, unsigned long arg)
 833 {
 834         struct au1550_state *s = (struct au1550_state *)file->private_data;
 835         struct ac97_codec *codec = s->codec;
 836
 837         return mixdev_ioctl(codec, cmd, arg);
 838 }
 839
 840 static /*const */ struct file_operations au1550_mixer_fops = {
 841         owner:THIS_MODULE,
 842         llseek:au1550_llseek,
 843         ioctl:au1550_ioctl_mixdev,
 844         open:au1550_open_mixdev,
 845         release:au1550_release_mixdev,
 846 };
 847
 848 static int
 849 drain_dac(struct au1550_state *s, int nonblock)
 850 {
 851         unsigned long   flags;
 852         int             count, tmo;
 853
 854         if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
 855                 return 0;
 856
 857         for (;;) {
 858                 spin_lock_irqsave(&s->lock, flags);
 859                 count = s->dma_dac.count;
 860                 spin_unlock_irqrestore(&s->lock, flags);
 861                 if (count <= s->dma_dac.fragsize)
 862                         break;
 863                 if (signal_pending(current))
 864                         break;
 865                 if (nonblock)
 866                         return -EBUSY;
 867                 tmo = 1000 * count / (s->no_vra ?
 868                                       48000 : s->dma_dac.sample_rate);
 869                 tmo /= s->dma_dac.dma_bytes_per_sample;
 870                 au1550_delay(tmo);
 871         }
 872         if (signal_pending(current))
 873                 return -ERESTARTSYS;
 874         return 0;
 875 }
 876
 877 static inline u8 S16_TO_U8(s16 ch)
 878 {
 879         return (u8) (ch >> 8) + 0x80;
 880 }
 881 static inline s16 U8_TO_S16(u8 ch)
 882 {
 883         return (s16) (ch - 0x80) << 8;
 884 }
 885
 886 /*
 887  * Translates user samples to dma buffer suitable for AC'97 DAC data:
 888  *     If mono, copy left channel to right channel in dma buffer.
 889  *     If 8 bit samples, cvt to 16-bit before writing to dma buffer.
 890  *     If interpolating (no VRA), duplicate every audio frame src_factor times.
 891  */
 892 static int
 893 translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
 894                                                                int dmacount)
 895 {
 896         int             sample, i;
 897         int             interp_bytes_per_sample;
 898         int             num_samples;
 899         int             mono = (db->num_channels == 1);
 900         char            usersample[12];
 901         s16             ch, dmasample[6];
 902
 903         if (db->sample_size == 16 && !mono && db->src_factor == 1) {
 904                 /* no translation necessary, just copy
 905                 */
 906                 if (copy_from_user(dmabuf, userbuf, dmacount))
 907                         return -EFAULT;
 908                 return dmacount;
 909         }
 910
 911         interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
 912         num_samples = dmacount / interp_bytes_per_sample;
 913
 914         for (sample = 0; sample < num_samples; sample++) {
 915                 if (copy_from_user(usersample, userbuf,
 916                                    db->user_bytes_per_sample)) {
 917                         return -EFAULT;
 918                 }
 919
 920                 for (i = 0; i < db->num_channels; i++) {
 921                         if (db->sample_size == 8)
 922                                 ch = U8_TO_S16(usersample[i]);
 923                         else
 924                                 ch = *((s16 *) (&usersample[i * 2]));
 925                         dmasample[i] = ch;
 926                         if (mono)
 927                                 dmasample[i + 1] = ch;  /* right channel */
 928                 }
 929
 930                 /* duplicate every audio frame src_factor times
 931                 */
 932                 for (i = 0; i < db->src_factor; i++)
 933                         memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
 934
 935                 userbuf += db->user_bytes_per_sample;
 936                 dmabuf += interp_bytes_per_sample;
 937         }
 938
 939         return num_samples * interp_bytes_per_sample;
 940 }
 941
 942 /*
 943  * Translates AC'97 ADC samples to user buffer:
 944  *     If mono, send only left channel to user buffer.
 945  *     If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer.
 946  *     If decimating (no VRA), skip over src_factor audio frames.
 947  */
 948 static int
 949 translate_to_user(struct dmabuf *db, char* userbuf, char* dmabuf,
 950                                                              int dmacount)
 951 {
 952         int             sample, i;
 953         int             interp_bytes_per_sample;
 954         int             num_samples;
 955         int             mono = (db->num_channels == 1);
 956         char            usersample[12];
 957
 958         if (db->sample_size == 16 && !mono && db->src_factor == 1) {
 959                 /* no translation necessary, just copy
 960                 */
 961                 if (copy_to_user(userbuf, dmabuf, dmacount))
 962                         return -EFAULT;
 963                 return dmacount;
 964         }
 965
 966         interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
 967         num_samples = dmacount / interp_bytes_per_sample;
 968
 969         for (sample = 0; sample < num_samples; sample++) {
 970                 for (i = 0; i < db->num_channels; i++) {
 971                         if (db->sample_size == 8)
 972                                 usersample[i] =
 973                                         S16_TO_U8(*((s16 *) (&dmabuf[i * 2])));
 974                         else
 975                                 *((s16 *) (&usersample[i * 2])) =
 976                                         *((s16 *) (&dmabuf[i * 2]));
 977                 }
 978
 979                 if (copy_to_user(userbuf, usersample,
 980                                  db->user_bytes_per_sample)) {
 981                         return -EFAULT;
 982                 }
 983
 984                 userbuf += db->user_bytes_per_sample;
 985                 dmabuf += interp_bytes_per_sample;
 986         }
 987
 988         return num_samples * interp_bytes_per_sample;
 989 }
 990
 991 /*
 992  * Copy audio data to/from user buffer from/to dma buffer, taking care
 993  * that we wrap when reading/writing the dma buffer. Returns actual byte
 994  * count written to or read from the dma buffer.
 995  */
 996 static int
 997 copy_dmabuf_user(struct dmabuf *db, char* userbuf, int count, int to_user)
 998 {
 999         char           *bufptr = to_user ? db->nextOut : db->nextIn;
1000         char           *bufend = db->rawbuf + db->dmasize;
1001         int             cnt, ret;
1002
1003         if (bufptr + count > bufend) {
1004                 int             partial = (int) (bufend - bufptr);
1005                 if (to_user) {
1006                         if ((cnt = translate_to_user(db, userbuf,
1007                                                      bufptr, partial)) < 0)
1008                                 return cnt;
1009                         ret = cnt;
1010                         if ((cnt = translate_to_user(db, userbuf + partial,
1011                                                      db->rawbuf,
1012                                                      count - partial)) < 0)
1013                                 return cnt;
1014                         ret += cnt;
1015                 } else {
1016                         if ((cnt = translate_from_user(db, bufptr, userbuf,
1017                                                        partial)) < 0)
1018                                 return cnt;
1019                         ret = cnt;
1020                         if ((cnt = translate_from_user(db, db->rawbuf,
1021                                                        userbuf + partial,
1022                                                        count - partial)) < 0)
1023                                 return cnt;
1024                         ret += cnt;
1025                 }
1026         } else {
1027                 if (to_user)
1028                         ret = translate_to_user(db, userbuf, bufptr, count);
1029                 else
1030                         ret = translate_from_user(db, bufptr, userbuf, count);
1031         }
1032
1033         return ret;
1034 }
1035
1036
1037 static ssize_t
1038 au1550_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1039 {
1040         struct au1550_state *s = (struct au1550_state *)file->private_data;
1041         struct dmabuf  *db = &s->dma_adc;
1042         DECLARE_WAITQUEUE(wait, current);
1043         ssize_t         ret;
1044         unsigned long   flags;
1045         int             cnt, usercnt, avail;
1046
1047         if (db->mapped)
1048                 return -ENXIO;
1049         if (!access_ok(VERIFY_WRITE, buffer, count))
1050                 return -EFAULT;
1051         ret = 0;
1052
1053         count *= db->cnt_factor;
1054
1055         mutex_lock(&s->sem);
1056         add_wait_queue(&db->wait, &wait);
1057
1058         while (count > 0) {
1059                 /* wait for samples in ADC dma buffer
1060                 */
1061                 do {
1062                         spin_lock_irqsave(&s->lock, flags);
1063                         if (db->stopped)
1064                                 start_adc(s);
1065                         avail = db->count;
1066                         if (avail <= 0)
1067                                 __set_current_state(TASK_INTERRUPTIBLE);
1068                         spin_unlock_irqrestore(&s->lock, flags);
1069                         if (avail <= 0) {
1070                                 if (file->f_flags & O_NONBLOCK) {
1071                                         if (!ret)
1072                                                 ret = -EAGAIN;
1073                                         goto out;
1074                                 }
1075                                 mutex_unlock(&s->sem);
1076                                 schedule();
1077                                 if (signal_pending(current)) {
1078                                         if (!ret)
1079                                                 ret = -ERESTARTSYS;
1080                                         goto out2;
1081                                 }
1082                                 mutex_lock(&s->sem);
1083                         }
1084                 } while (avail <= 0);
1085
1086                 /* copy from nextOut to user
1087                 */
1088                 if ((cnt = copy_dmabuf_user(db, buffer,
1089                                             count > avail ?
1090                                             avail : count, 1)) < 0) {
1091                         if (!ret)
1092                                 ret = -EFAULT;
1093                         goto out;
1094                 }
1095
1096                 spin_lock_irqsave(&s->lock, flags);
1097                 db->count -= cnt;
1098                 db->nextOut += cnt;
1099                 if (db->nextOut >= db->rawbuf + db->dmasize)
1100                         db->nextOut -= db->dmasize;
1101                 spin_unlock_irqrestore(&s->lock, flags);
1102
1103                 count -= cnt;
1104                 usercnt = cnt / db->cnt_factor;
1105                 buffer += usercnt;
1106                 ret += usercnt;
1107         }                       /* while (count > 0) */
1108
1109 out:
1110         mutex_unlock(&s->sem);
1111 out2:
1112         remove_wait_queue(&db->wait, &wait);
1113         set_current_state(TASK_RUNNING);
1114         return ret;
1115 }
1116
1117 static ssize_t
1118 au1550_write(struct file *file, const char *buffer, size_t count, loff_t * ppos)
1119 {
1120         struct au1550_state *s = (struct au1550_state *)file->private_data;
1121         struct dmabuf  *db = &s->dma_dac;
1122         DECLARE_WAITQUEUE(wait, current);
1123         ssize_t         ret = 0;
1124         unsigned long   flags;
1125         int             cnt, usercnt, avail;
1126
1127         pr_debug("write: count=%d\n", count);
1128
1129         if (db->mapped)
1130                 return -ENXIO;
1131         if (!access_ok(VERIFY_READ, buffer, count))
1132                 return -EFAULT;
1133
1134         count *= db->cnt_factor;
1135
1136         mutex_lock(&s->sem);
1137         add_wait_queue(&db->wait, &wait);
1138
1139         while (count > 0) {
1140                 /* wait for space in playback buffer
1141                 */
1142                 do {
1143                         spin_lock_irqsave(&s->lock, flags);
1144                         avail = (int) db->dmasize - db->count;
1145                         if (avail <= 0)
1146                                 __set_current_state(TASK_INTERRUPTIBLE);
1147                         spin_unlock_irqrestore(&s->lock, flags);
1148                         if (avail <= 0) {
1149                                 if (file->f_flags & O_NONBLOCK) {
1150                                         if (!ret)
1151                                                 ret = -EAGAIN;
1152                                         goto out;
1153                                 }
1154                                 mutex_unlock(&s->sem);
1155                                 schedule();
1156                                 if (signal_pending(current)) {
1157                                         if (!ret)
1158                                                 ret = -ERESTARTSYS;
1159                                         goto out2;
1160                                 }
1161                                 mutex_lock(&s->sem);
1162                         }
1163                 } while (avail <= 0);
1164
1165                 /* copy from user to nextIn
1166                 */
1167                 if ((cnt = copy_dmabuf_user(db, (char *) buffer,
1168                                             count > avail ?
1169                                             avail : count, 0)) < 0) {
1170                         if (!ret)
1171                                 ret = -EFAULT;
1172                         goto out;
1173                 }
1174
1175                 spin_lock_irqsave(&s->lock, flags);
1176                 db->count += cnt;
1177                 db->nextIn += cnt;
1178                 if (db->nextIn >= db->rawbuf + db->dmasize)
1179                         db->nextIn -= db->dmasize;
1180
1181                 /* If the data is available, we want to keep two buffers
1182                  * on the dma queue.  If the queue count reaches zero,
1183                  * we know the dma has stopped.
1184                  */
1185                 while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
1186                         if (au1xxx_dbdma_put_source(db->dmanr,
1187                                 virt_to_phys(db->nextOut), db->fragsize,
1188                                 DDMA_FLAGS_IE) == 0) {
1189                                 err("qcount < 2 and no ring room!");
1190                         }
1191                         db->nextOut += db->fragsize;
1192                         if (db->nextOut >= db->rawbuf + db->dmasize)
1193                                 db->nextOut -= db->dmasize;
1194                         db->total_bytes += db->dma_fragsize;
1195                         if (db->dma_qcount == 0)
1196                                 start_dac(s);
1197                         db->dma_qcount++;
1198                 }
1199                 spin_unlock_irqrestore(&s->lock, flags);
1200
1201                 count -= cnt;
1202                 usercnt = cnt / db->cnt_factor;
1203                 buffer += usercnt;
1204                 ret += usercnt;
1205         }                       /* while (count > 0) */
1206
1207 out:
1208         mutex_unlock(&s->sem);
1209 out2:
1210         remove_wait_queue(&db->wait, &wait);
1211         set_current_state(TASK_RUNNING);
1212         return ret;
1213 }
1214
1215
1216 /* No kernel lock - we have our own spinlock */
1217 static unsigned int
1218 au1550_poll(struct file *file, struct poll_table_struct *wait)
1219 {
1220         struct au1550_state *s = (struct au1550_state *)file->private_data;
1221         unsigned long   flags;
1222         unsigned int    mask = 0;
1223
1224         if (file->f_mode & FMODE_WRITE) {
1225                 if (!s->dma_dac.ready)
1226                         return 0;
1227                 poll_wait(file, &s->dma_dac.wait, wait);
1228         }
1229         if (file->f_mode & FMODE_READ) {
1230                 if (!s->dma_adc.ready)
1231                         return 0;
1232                 poll_wait(file, &s->dma_adc.wait, wait);
1233         }
1234
1235         spin_lock_irqsave(&s->lock, flags);
1236
1237         if (file->f_mode & FMODE_READ) {
1238                 if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize)
1239                         mask |= POLLIN | POLLRDNORM;
1240         }
1241         if (file->f_mode & FMODE_WRITE) {
1242                 if (s->dma_dac.mapped) {
1243                         if (s->dma_dac.count >=
1244                             (signed)s->dma_dac.dma_fragsize)
1245                                 mask |= POLLOUT | POLLWRNORM;
1246                 } else {
1247                         if ((signed) s->dma_dac.dmasize >=
1248                             s->dma_dac.count + (signed)s->dma_dac.dma_fragsize)
1249                                 mask |= POLLOUT | POLLWRNORM;
1250                 }
1251         }
1252         spin_unlock_irqrestore(&s->lock, flags);
1253         return mask;
1254 }
1255
1256 static int
1257 au1550_mmap(struct file *file, struct vm_area_struct *vma)
1258 {
1259         struct au1550_state *s = (struct au1550_state *)file->private_data;
1260         struct dmabuf  *db;
1261         unsigned long   size;
1262         int ret = 0;
1263
1264         lock_kernel();
1265         mutex_lock(&s->sem);
1266         if (vma->vm_flags & VM_WRITE)
1267                 db = &s->dma_dac;
1268         else if (vma->vm_flags & VM_READ)
1269                 db = &s->dma_adc;
1270         else {
1271                 ret = -EINVAL;
1272                 goto out;
1273         }
1274         if (vma->vm_pgoff != 0) {
1275                 ret = -EINVAL;
1276                 goto out;
1277         }
1278         size = vma->vm_end - vma->vm_start;
1279         if (size > (PAGE_SIZE << db->buforder)) {
1280                 ret = -EINVAL;
1281                 goto out;
1282         }
1283         if (remap_pfn_range(vma, vma->vm_start, page_to_pfn(virt_to_page(db->rawbuf)),
1284                              size, vma->vm_page_prot)) {
1285                 ret = -EAGAIN;
1286                 goto out;
1287         }
1288         vma->vm_flags &= ~VM_IO;
1289         db->mapped = 1;
1290 out:
1291         mutex_unlock(&s->sem);
1292         unlock_kernel();
1293         return ret;
1294 }
1295
1296 #ifdef DEBUG
1297 static struct ioctl_str_t {
1298         unsigned int    cmd;
1299         const char     *str;
1300 } ioctl_str[] = {
1301         {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1302         {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1303         {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1304         {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1305         {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1306         {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1307         {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1308         {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1309         {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1310         {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1311         {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1312         {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1313         {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1314         {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1315         {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1316         {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1317         {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1318         {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1319         {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1320         {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1321         {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1322         {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1323         {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1324         {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1325         {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1326         {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1327         {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1328         {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1329         {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1330         {OSS_GETVERSION, "OSS_GETVERSION"},
1331         {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1332         {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1333         {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1334         {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1335 };
1336 #endif
1337
1338 static int
1339 dma_count_done(struct dmabuf *db)
1340 {
1341         if (db->stopped)
1342                 return 0;
1343
1344         return db->dma_fragsize - au1xxx_get_dma_residue(db->dmanr);
1345 }
1346
1347
1348 static int
1349 au1550_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
1350                                                         unsigned long arg)
1351 {
1352         struct au1550_state *s = (struct au1550_state *)file->private_data;
1353         unsigned long   flags;
1354         audio_buf_info  abinfo;
1355         count_info      cinfo;
1356         int             count;
1357         int             val, mapped, ret, diff;
1358
1359         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1360                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1361
1362 #ifdef DEBUG
1363         for (count = 0; count < ARRAY_SIZE(ioctl_str); count++) {
1364                 if (ioctl_str[count].cmd == cmd)
1365                         break;
1366         }
1367         if (count < ARRAY_SIZE(ioctl_str))
1368                 pr_debug("ioctl %s, arg=0x%lxn", ioctl_str[count].str, arg);
1369         else
1370                 pr_debug("ioctl 0x%x unknown, arg=0x%lx\n", cmd, arg);
1371 #endif
1372
1373         switch (cmd) {
1374         case OSS_GETVERSION:
1375                 return put_user(SOUND_VERSION, (int *) arg);
1376
1377         case SNDCTL_DSP_SYNC:
1378                 if (file->f_mode & FMODE_WRITE)
1379                         return drain_dac(s, file->f_flags & O_NONBLOCK);
1380                 return 0;
1381
1382         case SNDCTL_DSP_SETDUPLEX:
1383                 return 0;
1384
1385         case SNDCTL_DSP_GETCAPS:
1386                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME |
1387                                 DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1388
1389         case SNDCTL_DSP_RESET:
1390                 if (file->f_mode & FMODE_WRITE) {
1391                         stop_dac(s);
1392                         synchronize_irq();
1393                         s->dma_dac.count = s->dma_dac.total_bytes = 0;
1394                         s->dma_dac.nextIn = s->dma_dac.nextOut =
1395                                 s->dma_dac.rawbuf;
1396                 }
1397                 if (file->f_mode & FMODE_READ) {
1398                         stop_adc(s);
1399                         synchronize_irq();
1400                         s->dma_adc.count = s->dma_adc.total_bytes = 0;
1401                         s->dma_adc.nextIn = s->dma_adc.nextOut =
1402                                 s->dma_adc.rawbuf;
1403                 }
1404                 return 0;
1405
1406         case SNDCTL_DSP_SPEED:
1407                 if (get_user(val, (int *) arg))
1408                         return -EFAULT;
1409                 if (val >= 0) {
1410                         if (file->f_mode & FMODE_READ) {
1411                                 stop_adc(s);
1412                                 set_adc_rate(s, val);
1413                         }
1414                         if (file->f_mode & FMODE_WRITE) {
1415                                 stop_dac(s);
1416                                 set_dac_rate(s, val);
1417                         }
1418                         if (s->open_mode & FMODE_READ)
1419                                 if ((ret = prog_dmabuf_adc(s)))
1420                                         return ret;
1421                         if (s->open_mode & FMODE_WRITE)
1422                                 if ((ret = prog_dmabuf_dac(s)))
1423                                         return ret;
1424                 }
1425                 return put_user((file->f_mode & FMODE_READ) ?
1426                                 s->dma_adc.sample_rate :
1427                                 s->dma_dac.sample_rate,
1428                                 (int *)arg);
1429
1430         case SNDCTL_DSP_STEREO:
1431                 if (get_user(val, (int *) arg))
1432                         return -EFAULT;
1433                 if (file->f_mode & FMODE_READ) {
1434                         stop_adc(s);
1435                         s->dma_adc.num_channels = val ? 2 : 1;
1436                         if ((ret = prog_dmabuf_adc(s)))
1437                                 return ret;
1438                 }
1439                 if (file->f_mode & FMODE_WRITE) {
1440                         stop_dac(s);
1441                         s->dma_dac.num_channels = val ? 2 : 1;
1442                         if (s->codec_ext_caps & AC97_EXT_DACS) {
1443                                 /* disable surround and center/lfe in AC'97
1444                                 */
1445                                 u16 ext_stat = rdcodec(s->codec,
1446                                                        AC97_EXTENDED_STATUS);
1447                                 wrcodec(s->codec, AC97_EXTENDED_STATUS,
1448                                         ext_stat | (AC97_EXTSTAT_PRI |
1449                                                     AC97_EXTSTAT_PRJ |
1450                                                     AC97_EXTSTAT_PRK));
1451                         }
1452                         if ((ret = prog_dmabuf_dac(s)))
1453                                 return ret;
1454                 }
1455                 return 0;
1456
1457         case SNDCTL_DSP_CHANNELS:
1458                 if (get_user(val, (int *) arg))
1459                         return -EFAULT;
1460                 if (val != 0) {
1461                         if (file->f_mode & FMODE_READ) {
1462                                 if (val < 0 || val > 2)
1463                                         return -EINVAL;
1464                                 stop_adc(s);
1465                                 s->dma_adc.num_channels = val;
1466                                 if ((ret = prog_dmabuf_adc(s)))
1467                                         return ret;
1468                         }
1469                         if (file->f_mode & FMODE_WRITE) {
1470                                 switch (val) {
1471                                 case 1:
1472                                 case 2:
1473                                         break;
1474                                 case 3:
1475                                 case 5:
1476                                         return -EINVAL;
1477                                 case 4:
1478                                         if (!(s->codec_ext_caps &
1479                                               AC97_EXTID_SDAC))
1480                                                 return -EINVAL;
1481                                         break;
1482                                 case 6:
1483                                         if ((s->codec_ext_caps &
1484                                              AC97_EXT_DACS) != AC97_EXT_DACS)
1485                                                 return -EINVAL;
1486                                         break;
1487                                 default:
1488                                         return -EINVAL;
1489                                 }
1490
1491                                 stop_dac(s);
1492                                 if (val <= 2 &&
1493                                     (s->codec_ext_caps & AC97_EXT_DACS)) {
1494                                         /* disable surround and center/lfe
1495                                          * channels in AC'97
1496                                          */
1497                                         u16             ext_stat =
1498                                                 rdcodec(s->codec,
1499                                                         AC97_EXTENDED_STATUS);
1500                                         wrcodec(s->codec,
1501                                                 AC97_EXTENDED_STATUS,
1502                                                 ext_stat | (AC97_EXTSTAT_PRI |
1503                                                             AC97_EXTSTAT_PRJ |
1504                                                             AC97_EXTSTAT_PRK));
1505                                 } else if (val >= 4) {
1506                                         /* enable surround, center/lfe
1507                                          * channels in AC'97
1508                                          */
1509                                         u16             ext_stat =
1510                                                 rdcodec(s->codec,
1511                                                         AC97_EXTENDED_STATUS);
1512                                         ext_stat &= ~AC97_EXTSTAT_PRJ;
1513                                         if (val == 6)
1514                                                 ext_stat &=
1515                                                         ~(AC97_EXTSTAT_PRI |
1516                                                           AC97_EXTSTAT_PRK);
1517                                         wrcodec(s->codec,
1518                                                 AC97_EXTENDED_STATUS,
1519                                                 ext_stat);
1520                                 }
1521
1522                                 s->dma_dac.num_channels = val;
1523                                 if ((ret = prog_dmabuf_dac(s)))
1524                                         return ret;
1525                         }
1526                 }
1527                 return put_user(val, (int *) arg);
1528
1529         case SNDCTL_DSP_GETFMTS:        /* Returns a mask */
1530                 return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
1531
1532         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */
1533                 if (get_user(val, (int *) arg))
1534                         return -EFAULT;
1535                 if (val != AFMT_QUERY) {
1536                         if (file->f_mode & FMODE_READ) {
1537                                 stop_adc(s);
1538                                 if (val == AFMT_S16_LE)
1539                                         s->dma_adc.sample_size = 16;
1540                                 else {
1541                                         val = AFMT_U8;
1542                                         s->dma_adc.sample_size = 8;
1543                                 }
1544                                 if ((ret = prog_dmabuf_adc(s)))
1545                                         return ret;
1546                         }
1547                         if (file->f_mode & FMODE_WRITE) {
1548                                 stop_dac(s);
1549                                 if (val == AFMT_S16_LE)
1550                                         s->dma_dac.sample_size = 16;
1551                                 else {
1552                                         val = AFMT_U8;
1553                                         s->dma_dac.sample_size = 8;
1554                                 }
1555                                 if ((ret = prog_dmabuf_dac(s)))
1556                                         return ret;
1557                         }
1558                 } else {
1559                         if (file->f_mode & FMODE_READ)
1560                                 val = (s->dma_adc.sample_size == 16) ?
1561                                         AFMT_S16_LE : AFMT_U8;
1562                         else
1563                                 val = (s->dma_dac.sample_size == 16) ?
1564                                         AFMT_S16_LE : AFMT_U8;
1565                 }
1566                 return put_user(val, (int *) arg);
1567
1568         case SNDCTL_DSP_POST:
1569                 return 0;
1570
1571         case SNDCTL_DSP_GETTRIGGER:
1572                 val = 0;
1573                 spin_lock_irqsave(&s->lock, flags);
1574                 if (file->f_mode & FMODE_READ && !s->dma_adc.stopped)
1575                         val |= PCM_ENABLE_INPUT;
1576                 if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped)
1577                         val |= PCM_ENABLE_OUTPUT;
1578                 spin_unlock_irqrestore(&s->lock, flags);
1579                 return put_user(val, (int *) arg);
1580
1581         case SNDCTL_DSP_SETTRIGGER:
1582                 if (get_user(val, (int *) arg))
1583                         return -EFAULT;
1584                 if (file->f_mode & FMODE_READ) {
1585                         if (val & PCM_ENABLE_INPUT) {
1586                                 spin_lock_irqsave(&s->lock, flags);
1587                                 start_adc(s);
1588                                 spin_unlock_irqrestore(&s->lock, flags);
1589                         } else
1590                                 stop_adc(s);
1591                 }
1592                 if (file->f_mode & FMODE_WRITE) {
1593                         if (val & PCM_ENABLE_OUTPUT) {
1594                                 spin_lock_irqsave(&s->lock, flags);
1595                                 start_dac(s);
1596                                 spin_unlock_irqrestore(&s->lock, flags);
1597                         } else
1598                                 stop_dac(s);
1599                 }
1600                 return 0;
1601
1602         case SNDCTL_DSP_GETOSPACE:
1603                 if (!(file->f_mode & FMODE_WRITE))
1604                         return -EINVAL;
1605                 abinfo.fragsize = s->dma_dac.fragsize;
1606                 spin_lock_irqsave(&s->lock, flags);
1607                 count = s->dma_dac.count;
1608                 count -= dma_count_done(&s->dma_dac);
1609                 spin_unlock_irqrestore(&s->lock, flags);
1610                 if (count < 0)
1611                         count = 0;
1612                 abinfo.bytes = (s->dma_dac.dmasize - count) /
1613                         s->dma_dac.cnt_factor;
1614                 abinfo.fragstotal = s->dma_dac.numfrag;
1615                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1616                 pr_debug("ioctl SNDCTL_DSP_GETOSPACE: bytes=%d, fragments=%d\n", abinfo.bytes, abinfo.fragments);
1617                 return copy_to_user((void *) arg, &abinfo,
1618                                     sizeof(abinfo)) ? -EFAULT : 0;
1619
1620         case SNDCTL_DSP_GETISPACE:
1621                 if (!(file->f_mode & FMODE_READ))
1622                         return -EINVAL;
1623                 abinfo.fragsize = s->dma_adc.fragsize;
1624                 spin_lock_irqsave(&s->lock, flags);
1625                 count = s->dma_adc.count;
1626                 count += dma_count_done(&s->dma_adc);
1627                 spin_unlock_irqrestore(&s->lock, flags);
1628                 if (count < 0)
1629                         count = 0;
1630                 abinfo.bytes = count / s->dma_adc.cnt_factor;
1631                 abinfo.fragstotal = s->dma_adc.numfrag;
1632                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1633                 return copy_to_user((void *) arg, &abinfo,
1634                                     sizeof(abinfo)) ? -EFAULT : 0;
1635
1636         case SNDCTL_DSP_NONBLOCK:
1637                 spin_lock(&file->f_lock);
1638                 file->f_flags |= O_NONBLOCK;
1639                 spin_unlock(&file->f_lock);
1640                 return 0;
1641
1642         case SNDCTL_DSP_GETODELAY:
1643                 if (!(file->f_mode & FMODE_WRITE))
1644                         return -EINVAL;
1645                 spin_lock_irqsave(&s->lock, flags);
1646                 count = s->dma_dac.count;
1647                 count -= dma_count_done(&s->dma_dac);
1648                 spin_unlock_irqrestore(&s->lock, flags);
1649                 if (count < 0)
1650                         count = 0;
1651                 count /= s->dma_dac.cnt_factor;
1652                 return put_user(count, (int *) arg);
1653
1654         case SNDCTL_DSP_GETIPTR:
1655                 if (!(file->f_mode & FMODE_READ))
1656                         return -EINVAL;
1657                 spin_lock_irqsave(&s->lock, flags);
1658                 cinfo.bytes = s->dma_adc.total_bytes;
1659                 count = s->dma_adc.count;
1660                 if (!s->dma_adc.stopped) {
1661                         diff = dma_count_done(&s->dma_adc);
1662                         count += diff;
1663                         cinfo.bytes += diff;
1664                         cinfo.ptr =  virt_to_phys(s->dma_adc.nextIn) + diff -
1665                                 virt_to_phys(s->dma_adc.rawbuf);
1666                 } else
1667                         cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) -
1668                                 virt_to_phys(s->dma_adc.rawbuf);
1669                 if (s->dma_adc.mapped)
1670                         s->dma_adc.count &= (s->dma_adc.dma_fragsize-1);
1671                 spin_unlock_irqrestore(&s->lock, flags);
1672                 if (count < 0)
1673                         count = 0;
1674                 cinfo.blocks = count >> s->dma_adc.fragshift;
1675                 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
1676
1677         case SNDCTL_DSP_GETOPTR:
1678                 if (!(file->f_mode & FMODE_READ))
1679                         return -EINVAL;
1680                 spin_lock_irqsave(&s->lock, flags);
1681                 cinfo.bytes = s->dma_dac.total_bytes;
1682                 count = s->dma_dac.count;
1683                 if (!s->dma_dac.stopped) {
1684                         diff = dma_count_done(&s->dma_dac);
1685                         count -= diff;
1686                         cinfo.bytes += diff;
1687                         cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff -
1688                                 virt_to_phys(s->dma_dac.rawbuf);
1689                 } else
1690                         cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) -
1691                                 virt_to_phys(s->dma_dac.rawbuf);
1692                 if (s->dma_dac.mapped)
1693                         s->dma_dac.count &= (s->dma_dac.dma_fragsize-1);
1694                 spin_unlock_irqrestore(&s->lock, flags);
1695                 if (count < 0)
1696                         count = 0;
1697                 cinfo.blocks = count >> s->dma_dac.fragshift;
1698                 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
1699
1700         case SNDCTL_DSP_GETBLKSIZE:
1701                 if (file->f_mode & FMODE_WRITE)
1702                         return put_user(s->dma_dac.fragsize, (int *) arg);
1703                 else
1704                         return put_user(s->dma_adc.fragsize, (int *) arg);
1705
1706         case SNDCTL_DSP_SETFRAGMENT:
1707                 if (get_user(val, (int *) arg))
1708                         return -EFAULT;
1709                 if (file->f_mode & FMODE_READ) {
1710                         stop_adc(s);
1711                         s->dma_adc.ossfragshift = val & 0xffff;
1712                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1713                         if (s->dma_adc.ossfragshift < 4)
1714                                 s->dma_adc.ossfragshift = 4;
1715                         if (s->dma_adc.ossfragshift > 15)
1716                                 s->dma_adc.ossfragshift = 15;
1717                         if (s->dma_adc.ossmaxfrags < 4)
1718                                 s->dma_adc.ossmaxfrags = 4;
1719                         if ((ret = prog_dmabuf_adc(s)))
1720                                 return ret;
1721                 }
1722                 if (file->f_mode & FMODE_WRITE) {
1723                         stop_dac(s);
1724                         s->dma_dac.ossfragshift = val & 0xffff;
1725                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1726                         if (s->dma_dac.ossfragshift < 4)
1727                                 s->dma_dac.ossfragshift = 4;
1728                         if (s->dma_dac.ossfragshift > 15)
1729                                 s->dma_dac.ossfragshift = 15;
1730                         if (s->dma_dac.ossmaxfrags < 4)
1731                                 s->dma_dac.ossmaxfrags = 4;
1732                         if ((ret = prog_dmabuf_dac(s)))
1733                                 return ret;
1734                 }
1735                 return 0;
1736
1737         case SNDCTL_DSP_SUBDIVIDE:
1738                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1739                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1740                         return -EINVAL;
1741                 if (get_user(val, (int *) arg))
1742                         return -EFAULT;
1743                 if (val != 1 && val != 2 && val != 4)
1744                         return -EINVAL;
1745                 if (file->f_mode & FMODE_READ) {
1746                         stop_adc(s);
1747                         s->dma_adc.subdivision = val;
1748                         if ((ret = prog_dmabuf_adc(s)))
1749                                 return ret;
1750                 }
1751                 if (file->f_mode & FMODE_WRITE) {
1752                         stop_dac(s);
1753                         s->dma_dac.subdivision = val;
1754                         if ((ret = prog_dmabuf_dac(s)))
1755                                 return ret;
1756                 }
1757                 return 0;
1758
1759         case SOUND_PCM_READ_RATE:
1760                 return put_user((file->f_mode & FMODE_READ) ?
1761                                 s->dma_adc.sample_rate :
1762                                 s->dma_dac.sample_rate,
1763                                 (int *)arg);
1764
1765         case SOUND_PCM_READ_CHANNELS:
1766                 if (file->f_mode & FMODE_READ)
1767                         return put_user(s->dma_adc.num_channels, (int *)arg);
1768                 else
1769                         return put_user(s->dma_dac.num_channels, (int *)arg);
1770
1771         case SOUND_PCM_READ_BITS:
1772                 if (file->f_mode & FMODE_READ)
1773                         return put_user(s->dma_adc.sample_size, (int *)arg);
1774                 else
1775                         return put_user(s->dma_dac.sample_size, (int *)arg);
1776
1777         case SOUND_PCM_WRITE_FILTER:
1778         case SNDCTL_DSP_SETSYNCRO:
1779         case SOUND_PCM_READ_FILTER:
1780                 return -EINVAL;
1781         }
1782
1783         return mixdev_ioctl(s->codec, cmd, arg);
1784 }
1785
1786
1787 static int
1788 au1550_open(struct inode *inode, struct file *file)
1789 {
1790         int             minor = MINOR(inode->i_rdev);
1791         DECLARE_WAITQUEUE(wait, current);
1792         struct au1550_state *s = &au1550_state;
1793         int             ret;
1794
1795 #ifdef DEBUG
1796         if (file->f_flags & O_NONBLOCK)
1797                 pr_debug("open: non-blocking\n");
1798         else
1799                 pr_debug("open: blocking\n");
1800 #endif
1801
1802         file->private_data = s;
1803         lock_kernel();
1804         /* wait for device to become free */
1805         mutex_lock(&s->open_mutex);
1806         while (s->open_mode & file->f_mode) {
1807                 ret = -EBUSY;
1808                 if (file->f_flags & O_NONBLOCK)
1809                         goto out;
1810                 add_wait_queue(&s->open_wait, &wait);
1811                 __set_current_state(TASK_INTERRUPTIBLE);
1812                 mutex_unlock(&s->open_mutex);
1813                 schedule();
1814                 remove_wait_queue(&s->open_wait, &wait);
1815                 set_current_state(TASK_RUNNING);
1816                 ret = -ERESTARTSYS;
1817                 if (signal_pending(current))
1818                         goto out2;
1819                 mutex_lock(&s->open_mutex);
1820         }
1821
1822         stop_dac(s);
1823         stop_adc(s);
1824
1825         if (file->f_mode & FMODE_READ) {
1826                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
1827                         s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
1828                 s->dma_adc.num_channels = 1;
1829                 s->dma_adc.sample_size = 8;
1830                 set_adc_rate(s, 8000);
1831                 if ((minor & 0xf) == SND_DEV_DSP16)
1832                         s->dma_adc.sample_size = 16;
1833         }
1834
1835         if (file->f_mode & FMODE_WRITE) {
1836                 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
1837                         s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
1838                 s->dma_dac.num_channels = 1;
1839                 s->dma_dac.sample_size = 8;
1840                 set_dac_rate(s, 8000);
1841                 if ((minor & 0xf) == SND_DEV_DSP16)
1842                         s->dma_dac.sample_size = 16;
1843         }
1844
1845         if (file->f_mode & FMODE_READ) {
1846                 if ((ret = prog_dmabuf_adc(s)))
1847                         goto out;
1848         }
1849         if (file->f_mode & FMODE_WRITE) {
1850                 if ((ret = prog_dmabuf_dac(s)))
1851                         goto out;
1852         }
1853
1854         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1855         mutex_init(&s->sem);
1856         ret = 0;
1857 out:
1858         mutex_unlock(&s->open_mutex);
1859 out2:
1860         unlock_kernel();
1861         return ret;
1862 }
1863
1864 static int
1865 au1550_release(struct inode *inode, struct file *file)
1866 {
1867         struct au1550_state *s = (struct au1550_state *)file->private_data;
1868
1869         lock_kernel();
1870
1871         if (file->f_mode & FMODE_WRITE) {
1872                 unlock_kernel();
1873                 drain_dac(s, file->f_flags & O_NONBLOCK);
1874                 lock_kernel();
1875         }
1876
1877         mutex_lock(&s->open_mutex);
1878         if (file->f_mode & FMODE_WRITE) {
1879                 stop_dac(s);
1880                 kfree(s->dma_dac.rawbuf);
1881                 s->dma_dac.rawbuf = NULL;
1882         }
1883         if (file->f_mode & FMODE_READ) {
1884                 stop_adc(s);
1885                 kfree(s->dma_adc.rawbuf);
1886                 s->dma_adc.rawbuf = NULL;
1887         }
1888         s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE));
1889         mutex_unlock(&s->open_mutex);
1890         wake_up(&s->open_wait);
1891         unlock_kernel();
1892         return 0;
1893 }
1894
1895 static /*const */ struct file_operations au1550_audio_fops = {
1896         owner:          THIS_MODULE,
1897         llseek:         au1550_llseek,
1898         read:           au1550_read,
1899         write:          au1550_write,
1900         poll:           au1550_poll,
1901         ioctl:          au1550_ioctl,
1902         mmap:           au1550_mmap,
1903         open:           au1550_open,
1904         release:        au1550_release,
1905 };
1906
1907 MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
1908 MODULE_DESCRIPTION("Au1550 AC97 Audio Driver");
1909 MODULE_LICENSE("GPL");
1910
1911
1912 static int __devinit
1913 au1550_probe(void)
1914 {
1915         struct au1550_state *s = &au1550_state;
1916         int             val;
1917
1918         memset(s, 0, sizeof(struct au1550_state));
1919
1920         init_waitqueue_head(&s->dma_adc.wait);
1921         init_waitqueue_head(&s->dma_dac.wait);
1922         init_waitqueue_head(&s->open_wait);
1923         mutex_init(&s->open_mutex);
1924         spin_lock_init(&s->lock);
1925
1926         s->codec = ac97_alloc_codec();
1927         if(s->codec == NULL) {
1928                 err("Out of memory");
1929                 return -1;
1930         }
1931         s->codec->private_data = s;
1932         s->codec->id = 0;
1933         s->codec->codec_read = rdcodec;
1934         s->codec->codec_write = wrcodec;
1935         s->codec->codec_wait = waitcodec;
1936
1937         if (!request_mem_region(CPHYSADDR(AC97_PSC_SEL),
1938                             0x30, "Au1550 AC97")) {
1939                 err("AC'97 ports in use");
1940         }
1941
1942         /* Allocate the DMA Channels
1943         */
1944         if ((s->dma_dac.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_MEM_CHAN,
1945             DBDMA_AC97_TX_CHAN, dac_dma_interrupt, (void *)s)) == 0) {
1946                 err("Can't get DAC DMA");
1947                 goto err_dma1;
1948         }
1949         au1xxx_dbdma_set_devwidth(s->dma_dac.dmanr, 16);
1950         if (au1xxx_dbdma_ring_alloc(s->dma_dac.dmanr,
1951                                         NUM_DBDMA_DESCRIPTORS) == 0) {
1952                 err("Can't get DAC DMA descriptors");
1953                 goto err_dma1;
1954         }
1955
1956         if ((s->dma_adc.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_AC97_RX_CHAN,
1957             DBDMA_MEM_CHAN, adc_dma_interrupt, (void *)s)) == 0) {
1958                 err("Can't get ADC DMA");
1959                 goto err_dma2;
1960         }
1961         au1xxx_dbdma_set_devwidth(s->dma_adc.dmanr, 16);
1962         if (au1xxx_dbdma_ring_alloc(s->dma_adc.dmanr,
1963                                         NUM_DBDMA_DESCRIPTORS) == 0) {
1964                 err("Can't get ADC DMA descriptors");
1965                 goto err_dma2;
1966         }
1967
1968         pr_info("DAC: DMA%d, ADC: DMA%d", DBDMA_AC97_TX_CHAN, DBDMA_AC97_RX_CHAN);
1969
1970         /* register devices */
1971
1972         if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
1973                 goto err_dev1;
1974         if ((s->codec->dev_mixer =
1975              register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
1976                 goto err_dev2;
1977
1978         /* The GPIO for the appropriate PSC was configured by the
1979          * board specific start up.
1980          *
1981          * configure PSC for AC'97
1982          */
1983         au_writel(0, AC97_PSC_CTRL);    /* Disable PSC */
1984         au_sync();
1985         au_writel((PSC_SEL_CLK_SERCLK | PSC_SEL_PS_AC97MODE), AC97_PSC_SEL);
1986         au_sync();
1987
1988         /* cold reset the AC'97
1989         */
1990         au_writel(PSC_AC97RST_RST, PSC_AC97RST);
1991         au_sync();
1992         au1550_delay(10);
1993         au_writel(0, PSC_AC97RST);
1994         au_sync();
1995
1996         /* need to delay around 500msec(bleech) to give
1997            some CODECs enough time to wakeup */
1998         au1550_delay(500);
1999
2000         /* warm reset the AC'97 to start the bitclk
2001         */
2002         au_writel(PSC_AC97RST_SNC, PSC_AC97RST);
2003         au_sync();
2004         udelay(100);
2005         au_writel(0, PSC_AC97RST);
2006         au_sync();
2007
2008         /* Enable PSC
2009         */
2010         au_writel(PSC_CTRL_ENABLE, AC97_PSC_CTRL);
2011         au_sync();
2012
2013         /* Wait for PSC ready.
2014         */
2015         do {
2016                 val = au_readl(PSC_AC97STAT);
2017                 au_sync();
2018         } while ((val & PSC_AC97STAT_SR) == 0);
2019
2020         /* Configure AC97 controller.
2021          * Deep FIFO, 16-bit sample, DMA, make sure DMA matches fifo size.
2022          */
2023         val = PSC_AC97CFG_SET_LEN(16);
2024         val |= PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8;
2025
2026         /* Enable device so we can at least
2027          * talk over the AC-link.
2028          */
2029         au_writel(val, PSC_AC97CFG);
2030         au_writel(PSC_AC97MSK_ALLMASK, PSC_AC97MSK);
2031         au_sync();
2032         val |= PSC_AC97CFG_DE_ENABLE;
2033         au_writel(val, PSC_AC97CFG);
2034         au_sync();
2035
2036         /* Wait for Device ready.
2037         */
2038         do {
2039                 val = au_readl(PSC_AC97STAT);
2040                 au_sync();
2041         } while ((val & PSC_AC97STAT_DR) == 0);
2042
2043         /* codec init */
2044         if (!ac97_probe_codec(s->codec))
2045                 goto err_dev3;
2046
2047         s->codec_base_caps = rdcodec(s->codec, AC97_RESET);
2048         s->codec_ext_caps = rdcodec(s->codec, AC97_EXTENDED_ID);
2049         pr_info("AC'97 Base/Extended ID = %04x/%04x",
2050              s->codec_base_caps, s->codec_ext_caps);
2051
2052         if (!(s->codec_ext_caps & AC97_EXTID_VRA)) {
2053                 /* codec does not support VRA
2054                 */
2055                 s->no_vra = 1;
2056         } else if (!vra) {
2057                 /* Boot option says disable VRA
2058                 */
2059                 u16 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
2060                 wrcodec(s->codec, AC97_EXTENDED_STATUS,
2061                         ac97_extstat & ~AC97_EXTSTAT_VRA);
2062                 s->no_vra = 1;
2063         }
2064         if (s->no_vra)
2065                 pr_info("no VRA, interpolating and decimating");
2066
2067         /* set mic to be the recording source */
2068         val = SOUND_MASK_MIC;
2069         mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC,
2070                      (unsigned long) &val);
2071
2072         return 0;
2073
2074  err_dev3:
2075         unregister_sound_mixer(s->codec->dev_mixer);
2076  err_dev2:
2077         unregister_sound_dsp(s->dev_audio);
2078  err_dev1:
2079         au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
2080  err_dma2:
2081         au1xxx_dbdma_chan_free(s->dma_dac.dmanr);
2082  err_dma1:
2083         release_mem_region(CPHYSADDR(AC97_PSC_SEL), 0x30);
2084
2085         ac97_release_codec(s->codec);
2086         return -1;
2087 }
2088
2089 static void __devinit
2090 au1550_remove(void)
2091 {
2092         struct au1550_state *s = &au1550_state;
2093
2094         if (!s)
2095                 return;
2096         synchronize_irq();
2097         au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
2098         au1xxx_dbdma_chan_free(s->dma_dac.dmanr);
2099         release_mem_region(CPHYSADDR(AC97_PSC_SEL), 0x30);
2100         unregister_sound_dsp(s->dev_audio);
2101         unregister_sound_mixer(s->codec->dev_mixer);
2102         ac97_release_codec(s->codec);
2103 }
2104
2105 static int __init
2106 init_au1550(void)
2107 {
2108         return au1550_probe();
2109 }
2110
2111 static void __exit
2112 cleanup_au1550(void)
2113 {
2114         au1550_remove();
2115 }
2116
2117 module_init(init_au1550);
2118 module_exit(cleanup_au1550);
2119
2120 #ifndef MODULE
2121
2122 static int __init
2123 au1550_setup(char *options)
2124 {
2125         char           *this_opt;
2126
2127         if (!options || !*options)
2128                 return 0;
2129
2130         while ((this_opt = strsep(&options, ","))) {
2131                 if (!*this_opt)
2132                         continue;
2133                 if (!strncmp(this_opt, "vra", 3)) {
2134                         vra = 1;
2135                 }
2136         }
2137
2138         return 1;
2139 }
2140
2141 __setup("au1550_audio=", au1550_setup);
2142
2143 #endif /* MODULE */