4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
56 /* Include the ID list */
57 #include <linux/pci_ids.h>
59 /* pci_slot represents a physical slot */
61 struct pci_bus *bus; /* The bus this slot is on */
62 struct list_head list; /* node in list of slots on this bus */
63 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
64 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
68 static inline const char *pci_slot_name(const struct pci_slot *slot)
70 return kobject_name(&slot->kobj);
73 /* File state for mmap()s on /proc/bus/pci/X/Y */
79 /* This defines the direction arg to the DMA mapping routines. */
80 #define PCI_DMA_BIDIRECTIONAL 0
81 #define PCI_DMA_TODEVICE 1
82 #define PCI_DMA_FROMDEVICE 2
83 #define PCI_DMA_NONE 3
86 * For PCI devices, the region numbers are assigned this way:
89 /* #0-5: standard PCI resources */
91 PCI_STD_RESOURCE_END = 5,
93 /* #6: expansion ROM resource */
96 /* device specific resources */
99 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
102 /* resources assigned to buses behind the bridge */
103 #define PCI_BRIDGE_RESOURCE_NUM 4
105 PCI_BRIDGE_RESOURCES,
106 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
107 PCI_BRIDGE_RESOURCE_NUM - 1,
109 /* total resources associated with a PCI device */
112 /* preserve this for compatibility */
113 DEVICE_COUNT_RESOURCE
116 typedef int __bitwise pci_power_t;
118 #define PCI_D0 ((pci_power_t __force) 0)
119 #define PCI_D1 ((pci_power_t __force) 1)
120 #define PCI_D2 ((pci_power_t __force) 2)
121 #define PCI_D3hot ((pci_power_t __force) 3)
122 #define PCI_D3cold ((pci_power_t __force) 4)
123 #define PCI_UNKNOWN ((pci_power_t __force) 5)
124 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
126 #define PCI_PM_D2_DELAY 200
127 #define PCI_PM_D3_WAIT 10
128 #define PCI_PM_BUS_WAIT 50
130 /** The pci_channel state describes connectivity between the CPU and
131 * the pci device. If some PCI bus between here and the pci device
132 * has crashed or locked up, this info is reflected here.
134 typedef unsigned int __bitwise pci_channel_state_t;
136 enum pci_channel_state {
137 /* I/O channel is in normal state */
138 pci_channel_io_normal = (__force pci_channel_state_t) 1,
140 /* I/O to channel is blocked */
141 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
143 /* PCI card is dead */
144 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
147 typedef unsigned int __bitwise pcie_reset_state_t;
149 enum pcie_reset_state {
150 /* Reset is NOT asserted (Use to deassert reset) */
151 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
153 /* Use #PERST to reset PCI-E device */
154 pcie_warm_reset = (__force pcie_reset_state_t) 2,
156 /* Use PCI-E Hot Reset to reset device */
157 pcie_hot_reset = (__force pcie_reset_state_t) 3
160 typedef unsigned short __bitwise pci_dev_flags_t;
162 /* INTX_DISABLE in PCI_COMMAND register disables MSI
165 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
166 /* Device configuration is irrevocably lost if disabled into D3 */
167 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
170 enum pci_irq_reroute_variant {
171 INTEL_IRQ_REROUTE_VARIANT = 1,
172 MAX_IRQ_REROUTE_VARIANTS = 3
175 typedef unsigned short __bitwise pci_bus_flags_t;
177 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
178 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
181 struct pci_cap_saved_state {
182 struct hlist_node next;
187 struct pcie_link_state;
192 * The pci_dev structure is used to describe PCI devices.
195 struct list_head bus_list; /* node in per-bus list */
196 struct pci_bus *bus; /* bus this device is on */
197 struct pci_bus *subordinate; /* bus this device bridges to */
199 void *sysdata; /* hook for sys-specific extension */
200 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
201 struct pci_slot *slot; /* Physical slot this device is in */
203 unsigned int devfn; /* encoded device & function index */
204 unsigned short vendor;
205 unsigned short device;
206 unsigned short subsystem_vendor;
207 unsigned short subsystem_device;
208 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
209 u8 revision; /* PCI revision, low byte of class word */
210 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
211 u8 pcie_type; /* PCI-E device/port type */
212 u8 rom_base_reg; /* which config register controls the ROM */
213 u8 pin; /* which interrupt pin this device uses */
215 struct pci_driver *driver; /* which driver has allocated this device */
216 u64 dma_mask; /* Mask of the bits of bus address this
217 device implements. Normally this is
218 0xffffffff. You only need to change
219 this if your device has broken DMA
220 or supports 64-bit transfers. */
222 struct device_dma_parameters dma_parms;
224 pci_power_t current_state; /* Current operating state. In ACPI-speak,
225 this is D0-D3, D0 being fully functional,
227 int pm_cap; /* PM capability offset in the
228 configuration space */
229 unsigned int pme_support:5; /* Bitmask of states from which PME#
231 unsigned int d1_support:1; /* Low power state D1 is supported */
232 unsigned int d2_support:1; /* Low power state D2 is supported */
233 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
235 #ifdef CONFIG_PCIEASPM
236 struct pcie_link_state *link_state; /* ASPM link state. */
239 pci_channel_state_t error_state; /* current connectivity state */
240 struct device dev; /* Generic device interface */
242 int cfg_size; /* Size of configuration space */
245 * Instead of touching interrupt line and base address registers
246 * directly, use the values stored here. They might be different!
249 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
251 /* These fields are used by common fixups */
252 unsigned int transparent:1; /* Transparent PCI bridge */
253 unsigned int multifunction:1;/* Part of multi-function device */
254 /* keep track of device state */
255 unsigned int is_added:1;
256 unsigned int is_busmaster:1; /* device is busmaster */
257 unsigned int no_msi:1; /* device may not use msi */
258 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
259 unsigned int broken_parity_status:1; /* Device generates false positive parity */
260 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
261 unsigned int msi_enabled:1;
262 unsigned int msix_enabled:1;
263 unsigned int ari_enabled:1; /* ARI forwarding */
264 unsigned int is_managed:1;
265 unsigned int is_pcie:1;
266 unsigned int state_saved:1;
267 unsigned int is_physfn:1;
268 pci_dev_flags_t dev_flags;
269 atomic_t enable_cnt; /* pci_enable_device has been called */
271 u32 saved_config_space[16]; /* config space saved at suspend time */
272 struct hlist_head saved_cap_space;
273 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
274 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
275 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
276 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
277 #ifdef CONFIG_PCI_MSI
278 struct list_head msi_list;
281 #ifdef CONFIG_PCI_IOV
282 struct pci_sriov *sriov; /* SR-IOV capability related */
286 extern struct pci_dev *alloc_pci_dev(void);
288 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
289 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
290 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
292 static inline int pci_channel_offline(struct pci_dev *pdev)
294 return (pdev->error_state != pci_channel_io_normal);
297 static inline struct pci_cap_saved_state *pci_find_saved_cap(
298 struct pci_dev *pci_dev, char cap)
300 struct pci_cap_saved_state *tmp;
301 struct hlist_node *pos;
303 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
304 if (tmp->cap_nr == cap)
310 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
311 struct pci_cap_saved_state *new_cap)
313 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
316 #ifndef PCI_BUS_NUM_RESOURCES
317 #define PCI_BUS_NUM_RESOURCES 16
320 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
323 struct list_head node; /* node in list of buses */
324 struct pci_bus *parent; /* parent bus this bridge is on */
325 struct list_head children; /* list of child buses */
326 struct list_head devices; /* list of devices on this bus */
327 struct pci_dev *self; /* bridge device as seen by parent */
328 struct list_head slots; /* list of slots on this bus */
329 struct resource *resource[PCI_BUS_NUM_RESOURCES];
330 /* address space routed to this bus */
332 struct pci_ops *ops; /* configuration access functions */
333 void *sysdata; /* hook for sys-specific extension */
334 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
336 unsigned char number; /* bus number */
337 unsigned char primary; /* number of primary bridge */
338 unsigned char secondary; /* number of secondary bridge */
339 unsigned char subordinate; /* max number of subordinate buses */
343 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
344 pci_bus_flags_t bus_flags; /* Inherited by child busses */
345 struct device *bridge;
347 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
348 struct bin_attribute *legacy_mem; /* legacy mem */
349 unsigned int is_added:1;
352 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
353 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
355 #ifdef CONFIG_PCI_MSI
356 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
358 return pci_dev->msi_enabled || pci_dev->msix_enabled;
361 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
365 * Error values that may be returned by PCI functions.
367 #define PCIBIOS_SUCCESSFUL 0x00
368 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
369 #define PCIBIOS_BAD_VENDOR_ID 0x83
370 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
371 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
372 #define PCIBIOS_SET_FAILED 0x88
373 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
375 /* Low-level architecture-dependent routines */
378 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
379 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
383 * ACPI needs to be able to access PCI config space before we've done a
384 * PCI bus scan and created pci_bus structures.
386 extern int raw_pci_read(unsigned int domain, unsigned int bus,
387 unsigned int devfn, int reg, int len, u32 *val);
388 extern int raw_pci_write(unsigned int domain, unsigned int bus,
389 unsigned int devfn, int reg, int len, u32 val);
391 struct pci_bus_region {
392 resource_size_t start;
397 spinlock_t lock; /* protects list, index */
398 struct list_head list; /* for IDs added at runtime */
401 /* ---------------------------------------------------------------- */
402 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
403 * a set of callbacks in struct pci_error_handlers, then that device driver
404 * will be notified of PCI bus errors, and will be driven to recovery
405 * when an error occurs.
408 typedef unsigned int __bitwise pci_ers_result_t;
410 enum pci_ers_result {
411 /* no result/none/not supported in device driver */
412 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
414 /* Device driver can recover without slot reset */
415 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
417 /* Device driver wants slot to be reset. */
418 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
420 /* Device has completely failed, is unrecoverable */
421 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
423 /* Device driver is fully recovered and operational */
424 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
427 /* PCI bus error event callbacks */
428 struct pci_error_handlers {
429 /* PCI bus error detected on this device */
430 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
431 enum pci_channel_state error);
433 /* MMIO has been re-enabled, but not DMA */
434 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
436 /* PCI Express link has been reset */
437 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
439 /* PCI slot has been reset */
440 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
442 /* Device driver may resume normal operations */
443 void (*resume)(struct pci_dev *dev);
446 /* ---------------------------------------------------------------- */
450 struct list_head node;
452 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
453 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
454 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
455 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
456 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
457 int (*resume_early) (struct pci_dev *dev);
458 int (*resume) (struct pci_dev *dev); /* Device woken up */
459 void (*shutdown) (struct pci_dev *dev);
460 struct pci_error_handlers *err_handler;
461 struct device_driver driver;
462 struct pci_dynids dynids;
465 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
468 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
469 * @_table: device table name
471 * This macro is used to create a struct pci_device_id array (a device table)
472 * in a generic manner.
474 #define DEFINE_PCI_DEVICE_TABLE(_table) \
475 const struct pci_device_id _table[] __devinitconst
478 * PCI_DEVICE - macro used to describe a specific pci device
479 * @vend: the 16 bit PCI Vendor ID
480 * @dev: the 16 bit PCI Device ID
482 * This macro is used to create a struct pci_device_id that matches a
483 * specific device. The subvendor and subdevice fields will be set to
486 #define PCI_DEVICE(vend,dev) \
487 .vendor = (vend), .device = (dev), \
488 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
491 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
492 * @dev_class: the class, subclass, prog-if triple for this device
493 * @dev_class_mask: the class mask for this device
495 * This macro is used to create a struct pci_device_id that matches a
496 * specific PCI class. The vendor, device, subvendor, and subdevice
497 * fields will be set to PCI_ANY_ID.
499 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
500 .class = (dev_class), .class_mask = (dev_class_mask), \
501 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
502 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
505 * PCI_VDEVICE - macro used to describe a specific pci device in short form
506 * @vendor: the vendor name
507 * @device: the 16 bit PCI Device ID
509 * This macro is used to create a struct pci_device_id that matches a
510 * specific PCI device. The subvendor, and subdevice fields will be set
511 * to PCI_ANY_ID. The macro allows the next field to follow as the device
515 #define PCI_VDEVICE(vendor, device) \
516 PCI_VENDOR_ID_##vendor, (device), \
517 PCI_ANY_ID, PCI_ANY_ID, 0, 0
519 /* these external functions are only available when PCI support is enabled */
522 extern struct bus_type pci_bus_type;
524 /* Do NOT directly access these two variables, unless you are arch specific pci
525 * code, or pci core code. */
526 extern struct list_head pci_root_buses; /* list of all known PCI buses */
527 /* Some device drivers need know if pci is initiated */
528 extern int no_pci_devices(void);
530 void pcibios_fixup_bus(struct pci_bus *);
531 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
532 char *pcibios_setup(char *str);
534 /* Used only when drivers/pci/setup.c is used */
535 void pcibios_align_resource(void *, struct resource *, resource_size_t,
537 void pcibios_update_irq(struct pci_dev *, int irq);
539 /* Generic PCI functions used internally */
541 extern struct pci_bus *pci_find_bus(int domain, int busnr);
542 void pci_bus_add_devices(const struct pci_bus *bus);
543 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
544 struct pci_ops *ops, void *sysdata);
545 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
548 struct pci_bus *root_bus;
549 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
551 pci_bus_add_devices(root_bus);
554 struct pci_bus *pci_create_bus(struct device *parent, int bus,
555 struct pci_ops *ops, void *sysdata);
556 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
558 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
560 struct hotplug_slot *hotplug);
561 void pci_destroy_slot(struct pci_slot *slot);
562 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
563 int pci_scan_slot(struct pci_bus *bus, int devfn);
564 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
565 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
566 unsigned int pci_scan_child_bus(struct pci_bus *bus);
567 int __must_check pci_bus_add_device(struct pci_dev *dev);
568 void pci_read_bridge_bases(struct pci_bus *child);
569 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
570 struct resource *res);
571 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
572 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
573 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
574 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
575 extern void pci_dev_put(struct pci_dev *dev);
576 extern void pci_remove_bus(struct pci_bus *b);
577 extern void pci_remove_bus_device(struct pci_dev *dev);
578 extern void pci_stop_bus_device(struct pci_dev *dev);
579 void pci_setup_cardbus(struct pci_bus *bus);
580 extern void pci_sort_breadthfirst(void);
582 /* Generic PCI functions exported to card drivers */
584 #ifdef CONFIG_PCI_LEGACY
585 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
587 struct pci_dev *from);
588 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
590 #endif /* CONFIG_PCI_LEGACY */
592 enum pci_lost_interrupt_reason {
593 PCI_LOST_IRQ_NO_INFORMATION = 0,
594 PCI_LOST_IRQ_DISABLE_MSI,
595 PCI_LOST_IRQ_DISABLE_MSIX,
596 PCI_LOST_IRQ_DISABLE_ACPI,
598 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
599 int pci_find_capability(struct pci_dev *dev, int cap);
600 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
601 int pci_find_ext_capability(struct pci_dev *dev, int cap);
602 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
603 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
604 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
606 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
607 struct pci_dev *from);
608 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
609 unsigned int ss_vendor, unsigned int ss_device,
610 struct pci_dev *from);
611 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
612 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
613 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
614 int pci_dev_present(const struct pci_device_id *ids);
616 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
618 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
619 int where, u16 *val);
620 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
621 int where, u32 *val);
622 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
624 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
626 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
629 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
631 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
633 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
635 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
637 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
640 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
642 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
644 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
646 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
648 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
650 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
653 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
656 int __must_check pci_enable_device(struct pci_dev *dev);
657 int __must_check pci_enable_device_io(struct pci_dev *dev);
658 int __must_check pci_enable_device_mem(struct pci_dev *dev);
659 int __must_check pci_reenable_device(struct pci_dev *);
660 int __must_check pcim_enable_device(struct pci_dev *pdev);
661 void pcim_pin_device(struct pci_dev *pdev);
663 static inline int pci_is_managed(struct pci_dev *pdev)
665 return pdev->is_managed;
668 void pci_disable_device(struct pci_dev *dev);
669 void pci_set_master(struct pci_dev *dev);
670 void pci_clear_master(struct pci_dev *dev);
671 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
672 #define HAVE_PCI_SET_MWI
673 int __must_check pci_set_mwi(struct pci_dev *dev);
674 int pci_try_set_mwi(struct pci_dev *dev);
675 void pci_clear_mwi(struct pci_dev *dev);
676 void pci_intx(struct pci_dev *dev, int enable);
677 void pci_msi_off(struct pci_dev *dev);
678 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
679 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
680 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
681 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
682 int pcix_get_max_mmrbc(struct pci_dev *dev);
683 int pcix_get_mmrbc(struct pci_dev *dev);
684 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
685 int pcie_get_readrq(struct pci_dev *dev);
686 int pcie_set_readrq(struct pci_dev *dev, int rq);
687 int pci_reset_function(struct pci_dev *dev);
688 int pci_execute_reset_function(struct pci_dev *dev);
689 void pci_update_resource(struct pci_dev *dev, int resno);
690 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
691 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
693 /* ROM control related routines */
694 int pci_enable_rom(struct pci_dev *pdev);
695 void pci_disable_rom(struct pci_dev *pdev);
696 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
697 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
698 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
700 /* Power management related routines */
701 int pci_save_state(struct pci_dev *dev);
702 int pci_restore_state(struct pci_dev *dev);
703 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
704 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
705 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
706 void pci_pme_active(struct pci_dev *dev, bool enable);
707 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
708 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
709 pci_power_t pci_target_state(struct pci_dev *dev);
710 int pci_prepare_to_sleep(struct pci_dev *dev);
711 int pci_back_from_sleep(struct pci_dev *dev);
713 /* Functions for PCI Hotplug drivers to use */
714 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
716 /* Vital product data routines */
717 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
718 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
719 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
721 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
722 void pci_bus_assign_resources(const struct pci_bus *bus);
723 void pci_bus_size_bridges(struct pci_bus *bus);
724 int pci_claim_resource(struct pci_dev *, int);
725 void pci_assign_unassigned_resources(void);
726 void pdev_enable_device(struct pci_dev *);
727 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
728 int pci_enable_resources(struct pci_dev *, int mask);
729 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
730 int (*)(struct pci_dev *, u8, u8));
731 #define HAVE_PCI_REQ_REGIONS 2
732 int __must_check pci_request_regions(struct pci_dev *, const char *);
733 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
734 void pci_release_regions(struct pci_dev *);
735 int __must_check pci_request_region(struct pci_dev *, int, const char *);
736 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
737 void pci_release_region(struct pci_dev *, int);
738 int pci_request_selected_regions(struct pci_dev *, int, const char *);
739 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
740 void pci_release_selected_regions(struct pci_dev *, int);
742 /* drivers/pci/bus.c */
743 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
744 struct resource *res, resource_size_t size,
745 resource_size_t align, resource_size_t min,
746 unsigned int type_mask,
747 void (*alignf)(void *, struct resource *,
748 resource_size_t, resource_size_t),
750 void pci_enable_bridges(struct pci_bus *bus);
752 /* Proper probing supporting hot-pluggable devices */
753 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
754 const char *mod_name);
757 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
759 #define pci_register_driver(driver) \
760 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
762 void pci_unregister_driver(struct pci_driver *dev);
763 void pci_remove_behind_bridge(struct pci_dev *dev);
764 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
765 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
766 struct pci_dev *dev);
767 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
770 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
772 int pci_cfg_space_size_ext(struct pci_dev *dev);
773 int pci_cfg_space_size(struct pci_dev *dev);
774 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
776 /* kmem_cache style wrapper around pci_alloc_consistent() */
778 #include <linux/dmapool.h>
780 #define pci_pool dma_pool
781 #define pci_pool_create(name, pdev, size, align, allocation) \
782 dma_pool_create(name, &pdev->dev, size, align, allocation)
783 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
784 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
785 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
787 enum pci_dma_burst_strategy {
788 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
789 strategy_parameter is N/A */
790 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
792 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
793 strategy_parameter byte boundaries */
797 u32 vector; /* kernel uses to write allocated vector */
798 u16 entry; /* driver uses to specify entry, OS writes */
802 #ifndef CONFIG_PCI_MSI
803 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
808 static inline void pci_msi_shutdown(struct pci_dev *dev)
810 static inline void pci_disable_msi(struct pci_dev *dev)
813 static inline int pci_msix_table_size(struct pci_dev *dev)
817 static inline int pci_enable_msix(struct pci_dev *dev,
818 struct msix_entry *entries, int nvec)
823 static inline void pci_msix_shutdown(struct pci_dev *dev)
825 static inline void pci_disable_msix(struct pci_dev *dev)
828 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
831 static inline void pci_restore_msi_state(struct pci_dev *dev)
833 static inline int pci_msi_enabled(void)
838 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
839 extern void pci_msi_shutdown(struct pci_dev *dev);
840 extern void pci_disable_msi(struct pci_dev *dev);
841 extern int pci_msix_table_size(struct pci_dev *dev);
842 extern int pci_enable_msix(struct pci_dev *dev,
843 struct msix_entry *entries, int nvec);
844 extern void pci_msix_shutdown(struct pci_dev *dev);
845 extern void pci_disable_msix(struct pci_dev *dev);
846 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
847 extern void pci_restore_msi_state(struct pci_dev *dev);
848 extern int pci_msi_enabled(void);
851 #ifndef CONFIG_PCIEASPM
852 static inline int pcie_aspm_enabled(void)
857 extern int pcie_aspm_enabled(void);
860 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
863 /* The functions a driver should call */
864 int ht_create_irq(struct pci_dev *dev, int idx);
865 void ht_destroy_irq(unsigned int irq);
866 #endif /* CONFIG_HT_IRQ */
868 extern void pci_block_user_cfg_access(struct pci_dev *dev);
869 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
872 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
873 * a PCI domain is defined to be a set of PCI busses which share
874 * configuration space.
876 #ifdef CONFIG_PCI_DOMAINS
877 extern int pci_domains_supported;
879 enum { pci_domains_supported = 0 };
880 static inline int pci_domain_nr(struct pci_bus *bus)
885 static inline int pci_proc_domain(struct pci_bus *bus)
889 #endif /* CONFIG_PCI_DOMAINS */
891 #else /* CONFIG_PCI is not enabled */
894 * If the system does not have PCI, clearly these return errors. Define
895 * these as simple inline functions to avoid hair in drivers.
898 #define _PCI_NOP(o, s, t) \
899 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
901 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
903 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
904 _PCI_NOP(o, word, u16 x) \
905 _PCI_NOP(o, dword, u32 x)
906 _PCI_NOP_ALL(read, *)
909 static inline struct pci_dev *pci_find_device(unsigned int vendor,
911 struct pci_dev *from)
916 static inline struct pci_dev *pci_find_slot(unsigned int bus,
922 static inline struct pci_dev *pci_get_device(unsigned int vendor,
924 struct pci_dev *from)
929 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
931 unsigned int ss_vendor,
932 unsigned int ss_device,
933 struct pci_dev *from)
938 static inline struct pci_dev *pci_get_class(unsigned int class,
939 struct pci_dev *from)
944 #define pci_dev_present(ids) (0)
945 #define no_pci_devices() (1)
946 #define pci_dev_put(dev) do { } while (0)
948 static inline void pci_set_master(struct pci_dev *dev)
951 static inline int pci_enable_device(struct pci_dev *dev)
956 static inline void pci_disable_device(struct pci_dev *dev)
959 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
964 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
969 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
975 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
981 static inline int pci_assign_resource(struct pci_dev *dev, int i)
986 static inline int __pci_register_driver(struct pci_driver *drv,
987 struct module *owner)
992 static inline int pci_register_driver(struct pci_driver *drv)
997 static inline void pci_unregister_driver(struct pci_driver *drv)
1000 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1005 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1011 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1016 /* Power management related routines */
1017 static inline int pci_save_state(struct pci_dev *dev)
1022 static inline int pci_restore_state(struct pci_dev *dev)
1027 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1032 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1038 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1044 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1049 static inline void pci_release_regions(struct pci_dev *dev)
1052 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1054 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1057 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1060 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1063 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1067 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1071 #endif /* CONFIG_PCI */
1073 /* Include architecture-dependent settings and functions */
1075 #include <asm/pci.h>
1077 /* these helpers provide future and backwards compatibility
1078 * for accessing popular PCI BAR info */
1079 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1080 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1081 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1082 #define pci_resource_len(dev,bar) \
1083 ((pci_resource_start((dev), (bar)) == 0 && \
1084 pci_resource_end((dev), (bar)) == \
1085 pci_resource_start((dev), (bar))) ? 0 : \
1087 (pci_resource_end((dev), (bar)) - \
1088 pci_resource_start((dev), (bar)) + 1))
1090 /* Similar to the helpers above, these manipulate per-pci_dev
1091 * driver-specific data. They are really just a wrapper around
1092 * the generic device structure functions of these calls.
1094 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1096 return dev_get_drvdata(&pdev->dev);
1099 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1101 dev_set_drvdata(&pdev->dev, data);
1104 /* If you want to know what to call your pci_dev, ask this function.
1105 * Again, it's a wrapper around the generic device.
1107 static inline const char *pci_name(struct pci_dev *pdev)
1109 return dev_name(&pdev->dev);
1113 /* Some archs don't want to expose struct resource to userland as-is
1114 * in sysfs and /proc
1116 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1117 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1118 const struct resource *rsrc, resource_size_t *start,
1119 resource_size_t *end)
1121 *start = rsrc->start;
1124 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1128 * The world is not perfect and supplies us with broken PCI devices.
1129 * For at least a part of these bugs we need a work-around, so both
1130 * generic (drivers/pci/quirks.c) and per-architecture code can define
1131 * fixup hooks to be called for particular buggy devices.
1135 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1136 void (*hook)(struct pci_dev *dev);
1139 enum pci_fixup_pass {
1140 pci_fixup_early, /* Before probing BARs */
1141 pci_fixup_header, /* After reading configuration header */
1142 pci_fixup_final, /* Final phase of device fixups */
1143 pci_fixup_enable, /* pci_enable_device() time */
1144 pci_fixup_resume, /* pci_device_resume() */
1145 pci_fixup_suspend, /* pci_device_suspend */
1146 pci_fixup_resume_early, /* pci_device_resume_early() */
1149 /* Anonymous variables would be nice... */
1150 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1151 static const struct pci_fixup __pci_fixup_##name __used \
1152 __attribute__((__section__(#section))) = { vendor, device, hook };
1153 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1154 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1155 vendor##device##hook, vendor, device, hook)
1156 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1157 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1158 vendor##device##hook, vendor, device, hook)
1159 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1160 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1161 vendor##device##hook, vendor, device, hook)
1162 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1163 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1164 vendor##device##hook, vendor, device, hook)
1165 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1166 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1167 resume##vendor##device##hook, vendor, device, hook)
1168 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1169 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1170 resume_early##vendor##device##hook, vendor, device, hook)
1171 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1172 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1173 suspend##vendor##device##hook, vendor, device, hook)
1176 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1178 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1179 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1180 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1181 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1182 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1184 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1186 extern int pci_pci_problems;
1187 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1188 #define PCIPCI_TRITON 2
1189 #define PCIPCI_NATOMA 4
1190 #define PCIPCI_VIAETBF 8
1191 #define PCIPCI_VSFX 16
1192 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1193 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1195 extern unsigned long pci_cardbus_io_size;
1196 extern unsigned long pci_cardbus_mem_size;
1198 int pcibios_add_platform_entries(struct pci_dev *dev);
1199 void pcibios_disable_device(struct pci_dev *dev);
1200 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1201 enum pcie_reset_state state);
1203 #ifdef CONFIG_PCI_MMCONFIG
1204 extern void __init pci_mmcfg_early_init(void);
1205 extern void __init pci_mmcfg_late_init(void);
1207 static inline void pci_mmcfg_early_init(void) { }
1208 static inline void pci_mmcfg_late_init(void) { }
1211 int pci_ext_cfg_avail(struct pci_dev *dev);
1213 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1215 #endif /* __KERNEL__ */
1216 #endif /* LINUX_PCI_H */