2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 microframes of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
98 * XXX: shouldn't we set HC_STATE_HALT here somewhere?
100 int xhci_halt(struct xhci_hcd *xhci)
102 xhci_dbg(xhci, "// Halt the HC\n");
105 return handshake(xhci, &xhci->op_regs->status,
106 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
110 * Set the run bit and wait for the host to be running.
112 int xhci_start(struct xhci_hcd *xhci)
117 temp = xhci_readl(xhci, &xhci->op_regs->command);
119 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
121 xhci_writel(xhci, temp, &xhci->op_regs->command);
124 * Wait for the HCHalted Status bit to be 0 to indicate the host is
127 ret = handshake(xhci, &xhci->op_regs->status,
128 STS_HALT, 0, XHCI_MAX_HALT_USEC);
129 if (ret == -ETIMEDOUT)
130 xhci_err(xhci, "Host took too long to start, "
131 "waited %u microseconds.\n",
137 * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
139 * This resets pipelines, timers, counters, state machines, etc.
140 * Transactions will be terminated immediately, and operational registers
141 * will be set to their defaults.
143 int xhci_reset(struct xhci_hcd *xhci)
149 state = xhci_readl(xhci, &xhci->op_regs->status);
150 if ((state & STS_HALT) == 0) {
151 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
155 xhci_dbg(xhci, "// Reset the HC\n");
156 command = xhci_readl(xhci, &xhci->op_regs->command);
157 command |= CMD_RESET;
158 xhci_writel(xhci, command, &xhci->op_regs->command);
159 /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
160 xhci_to_hcd(xhci)->state = HC_STATE_HALT;
162 ret = handshake(xhci, &xhci->op_regs->command,
163 CMD_RESET, 0, 250 * 1000);
167 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
169 * xHCI cannot write to any doorbells or operational registers other
170 * than status until the "Controller Not Ready" flag is cleared.
172 return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
177 * free all IRQs request
179 static void xhci_free_irq(struct xhci_hcd *xhci)
182 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
184 /* return if using legacy interrupt */
185 if (xhci_to_hcd(xhci)->irq >= 0)
188 if (xhci->msix_entries) {
189 for (i = 0; i < xhci->msix_count; i++)
190 if (xhci->msix_entries[i].vector)
191 free_irq(xhci->msix_entries[i].vector,
193 } else if (pdev->irq >= 0)
194 free_irq(pdev->irq, xhci_to_hcd(xhci));
202 static int xhci_setup_msi(struct xhci_hcd *xhci)
205 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
207 ret = pci_enable_msi(pdev);
209 xhci_err(xhci, "failed to allocate MSI entry\n");
213 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
214 0, "xhci_hcd", xhci_to_hcd(xhci));
216 xhci_err(xhci, "disable MSI interrupt\n");
217 pci_disable_msi(pdev);
226 static int xhci_setup_msix(struct xhci_hcd *xhci)
229 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
232 * calculate number of msi-x vectors supported.
233 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
234 * with max number of interrupters based on the xhci HCSPARAMS1.
235 * - num_online_cpus: maximum msi-x vectors per CPUs core.
236 * Add additional 1 vector to ensure always available interrupt.
238 xhci->msix_count = min(num_online_cpus() + 1,
239 HCS_MAX_INTRS(xhci->hcs_params1));
242 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
244 if (!xhci->msix_entries) {
245 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
249 for (i = 0; i < xhci->msix_count; i++) {
250 xhci->msix_entries[i].entry = i;
251 xhci->msix_entries[i].vector = 0;
254 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
256 xhci_err(xhci, "Failed to enable MSI-X\n");
260 for (i = 0; i < xhci->msix_count; i++) {
261 ret = request_irq(xhci->msix_entries[i].vector,
262 (irq_handler_t)xhci_msi_irq,
263 0, "xhci_hcd", xhci_to_hcd(xhci));
271 xhci_err(xhci, "disable MSI-X interrupt\n");
273 pci_disable_msix(pdev);
275 kfree(xhci->msix_entries);
276 xhci->msix_entries = NULL;
280 /* Free any IRQs and disable MSI-X */
281 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
283 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
287 if (xhci->msix_entries) {
288 pci_disable_msix(pdev);
289 kfree(xhci->msix_entries);
290 xhci->msix_entries = NULL;
292 pci_disable_msi(pdev);
299 * Initialize memory for HCD and xHC (one-time init).
301 * Program the PAGESIZE register, initialize the device context array, create
302 * device contexts (?), set up a command ring segment (or two?), create event
303 * ring (one for now).
305 int xhci_init(struct usb_hcd *hcd)
307 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
310 xhci_dbg(xhci, "xhci_init\n");
311 spin_lock_init(&xhci->lock);
313 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
314 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
316 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
318 retval = xhci_mem_init(xhci, GFP_KERNEL);
319 xhci_dbg(xhci, "Finished xhci_init\n");
324 /*-------------------------------------------------------------------------*/
327 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
328 void xhci_event_ring_work(unsigned long arg)
333 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
336 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
338 spin_lock_irqsave(&xhci->lock, flags);
339 temp = xhci_readl(xhci, &xhci->op_regs->status);
340 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
341 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
342 xhci_dbg(xhci, "HW died, polling stopped.\n");
343 spin_unlock_irqrestore(&xhci->lock, flags);
347 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
348 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
349 xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
350 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
351 xhci->error_bitmask = 0;
352 xhci_dbg(xhci, "Event ring:\n");
353 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
354 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
355 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
356 temp_64 &= ~ERST_PTR_MASK;
357 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
358 xhci_dbg(xhci, "Command ring:\n");
359 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
360 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
361 xhci_dbg_cmd_ptrs(xhci);
362 for (i = 0; i < MAX_HC_SLOTS; ++i) {
365 for (j = 0; j < 31; ++j) {
366 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
370 if (xhci->noops_submitted != NUM_TEST_NOOPS)
371 if (xhci_setup_one_noop(xhci))
372 xhci_ring_cmd_db(xhci);
373 spin_unlock_irqrestore(&xhci->lock, flags);
376 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
378 xhci_dbg(xhci, "Quit polling the event ring.\n");
383 * Start the HC after it was halted.
385 * This function is called by the USB core when the HC driver is added.
386 * Its opposite is xhci_stop().
388 * xhci_init() must be called once before this function can be called.
389 * Reset the HC, enable device slot contexts, program DCBAAP, and
390 * set command ring pointer and event ring pointer.
392 * Setup MSI-X vectors and enable interrupts.
394 int xhci_run(struct usb_hcd *hcd)
399 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
400 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
401 void (*doorbell)(struct xhci_hcd *) = NULL;
403 hcd->uses_new_polling = 1;
405 xhci_dbg(xhci, "xhci_run\n");
406 /* unregister the legacy interrupt */
408 free_irq(hcd->irq, hcd);
411 ret = xhci_setup_msix(xhci);
413 /* fall back to msi*/
414 ret = xhci_setup_msi(xhci);
417 /* fall back to legacy interrupt*/
418 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
419 hcd->irq_descr, hcd);
421 xhci_err(xhci, "request interrupt %d failed\n",
425 hcd->irq = pdev->irq;
428 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
429 init_timer(&xhci->event_ring_timer);
430 xhci->event_ring_timer.data = (unsigned long) xhci;
431 xhci->event_ring_timer.function = xhci_event_ring_work;
432 /* Poll the event ring */
433 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
435 xhci_dbg(xhci, "Setting event ring polling timer\n");
436 add_timer(&xhci->event_ring_timer);
439 xhci_dbg(xhci, "Command ring memory map follows:\n");
440 xhci_debug_ring(xhci, xhci->cmd_ring);
441 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
442 xhci_dbg_cmd_ptrs(xhci);
444 xhci_dbg(xhci, "ERST memory map follows:\n");
445 xhci_dbg_erst(xhci, &xhci->erst);
446 xhci_dbg(xhci, "Event ring:\n");
447 xhci_debug_ring(xhci, xhci->event_ring);
448 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
449 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
450 temp_64 &= ~ERST_PTR_MASK;
451 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
453 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
454 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
455 temp &= ~ER_IRQ_INTERVAL_MASK;
457 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
459 /* Set the HCD state before we enable the irqs */
460 hcd->state = HC_STATE_RUNNING;
461 temp = xhci_readl(xhci, &xhci->op_regs->command);
463 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
465 xhci_writel(xhci, temp, &xhci->op_regs->command);
467 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
468 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
469 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
470 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
471 &xhci->ir_set->irq_pending);
472 xhci_print_ir_set(xhci, xhci->ir_set, 0);
474 if (NUM_TEST_NOOPS > 0)
475 doorbell = xhci_setup_one_noop(xhci);
476 if (xhci->quirks & XHCI_NEC_HOST)
477 xhci_queue_vendor_command(xhci, 0, 0, 0,
478 TRB_TYPE(TRB_NEC_GET_FW));
480 if (xhci_start(xhci)) {
487 if (xhci->quirks & XHCI_NEC_HOST)
488 xhci_ring_cmd_db(xhci);
490 xhci_dbg(xhci, "Finished xhci_run\n");
497 * This function is called by the USB core when the HC driver is removed.
498 * Its opposite is xhci_run().
500 * Disable device contexts, disable IRQs, and quiesce the HC.
501 * Reset the HC, finish any completed transactions, and cleanup memory.
503 void xhci_stop(struct usb_hcd *hcd)
506 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
508 spin_lock_irq(&xhci->lock);
511 xhci_cleanup_msix(xhci);
512 spin_unlock_irq(&xhci->lock);
514 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
515 /* Tell the event ring poll function not to reschedule */
517 del_timer_sync(&xhci->event_ring_timer);
520 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
521 temp = xhci_readl(xhci, &xhci->op_regs->status);
522 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
523 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
524 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
525 &xhci->ir_set->irq_pending);
526 xhci_print_ir_set(xhci, xhci->ir_set, 0);
528 xhci_dbg(xhci, "cleaning up memory\n");
529 xhci_mem_cleanup(xhci);
530 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
531 xhci_readl(xhci, &xhci->op_regs->status));
535 * Shutdown HC (not bus-specific)
537 * This is called when the machine is rebooting or halting. We assume that the
538 * machine will be powered off, and the HC's internal state will be reset.
539 * Don't bother to free memory.
541 void xhci_shutdown(struct usb_hcd *hcd)
543 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
545 spin_lock_irq(&xhci->lock);
547 xhci_cleanup_msix(xhci);
548 spin_unlock_irq(&xhci->lock);
550 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
551 xhci_readl(xhci, &xhci->op_regs->status));
555 static void xhci_save_registers(struct xhci_hcd *xhci)
557 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
558 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
559 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
560 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
561 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
562 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
563 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
564 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
565 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
568 static void xhci_restore_registers(struct xhci_hcd *xhci)
570 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
571 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
572 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
573 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
574 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
575 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
576 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
577 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
581 * Stop HC (not bus-specific)
583 * This is called when the machine transition into S3/S4 mode.
586 int xhci_suspend(struct xhci_hcd *xhci)
589 struct usb_hcd *hcd = xhci_to_hcd(xhci);
592 spin_lock_irq(&xhci->lock);
593 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
594 /* step 1: stop endpoint */
595 /* skipped assuming that port suspend has done */
597 /* step 2: clear Run/Stop bit */
598 command = xhci_readl(xhci, &xhci->op_regs->command);
600 xhci_writel(xhci, command, &xhci->op_regs->command);
601 if (handshake(xhci, &xhci->op_regs->status,
602 STS_HALT, STS_HALT, 100*100)) {
603 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
604 spin_unlock_irq(&xhci->lock);
608 /* step 3: save registers */
609 xhci_save_registers(xhci);
611 /* step 4: set CSS flag */
612 command = xhci_readl(xhci, &xhci->op_regs->command);
614 xhci_writel(xhci, command, &xhci->op_regs->command);
615 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
616 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
617 spin_unlock_irq(&xhci->lock);
620 /* step 5: remove core well power */
621 xhci_cleanup_msix(xhci);
622 spin_unlock_irq(&xhci->lock);
628 * start xHC (not bus-specific)
630 * This is called when the machine transition from S3/S4 mode.
633 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
635 u32 command, temp = 0;
636 struct usb_hcd *hcd = xhci_to_hcd(xhci);
637 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
639 int old_state, retval;
641 old_state = hcd->state;
642 if (time_before(jiffies, xhci->next_statechange))
645 spin_lock_irq(&xhci->lock);
648 /* step 1: restore register */
649 xhci_restore_registers(xhci);
650 /* step 2: initialize command ring buffer */
651 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
652 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
653 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
654 xhci->cmd_ring->dequeue) &
655 (u64) ~CMD_RING_RSVD_BITS) |
656 xhci->cmd_ring->cycle_state;
657 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
658 (long unsigned long) val_64);
659 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
660 /* step 3: restore state and start state*/
661 /* step 3: set CRS flag */
662 command = xhci_readl(xhci, &xhci->op_regs->command);
664 xhci_writel(xhci, command, &xhci->op_regs->command);
665 if (handshake(xhci, &xhci->op_regs->status,
666 STS_RESTORE, 0, 10*100)) {
667 xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
668 spin_unlock_irq(&xhci->lock);
671 temp = xhci_readl(xhci, &xhci->op_regs->status);
674 /* If restore operation fails, re-initialize the HC during resume */
675 if ((temp & STS_SRE) || hibernated) {
676 usb_root_hub_lost_power(hcd->self.root_hub);
678 xhci_dbg(xhci, "Stop HCD\n");
682 xhci_cleanup_msix(xhci);
683 spin_unlock_irq(&xhci->lock);
685 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
686 /* Tell the event ring poll function not to reschedule */
688 del_timer_sync(&xhci->event_ring_timer);
691 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
692 temp = xhci_readl(xhci, &xhci->op_regs->status);
693 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
694 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
695 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
696 &xhci->ir_set->irq_pending);
697 xhci_print_ir_set(xhci, xhci->ir_set, 0);
699 xhci_dbg(xhci, "cleaning up memory\n");
700 xhci_mem_cleanup(xhci);
701 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
702 xhci_readl(xhci, &xhci->op_regs->status));
704 xhci_dbg(xhci, "Initialize the HCD\n");
705 retval = xhci_init(hcd);
709 xhci_dbg(xhci, "Start the HCD\n");
710 retval = xhci_run(hcd);
712 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
713 hcd->state = HC_STATE_SUSPENDED;
719 free_irq(hcd->irq, hcd);
722 retval = xhci_setup_msix(xhci);
724 /* fall back to msi*/
725 retval = xhci_setup_msi(xhci);
728 /* fall back to legacy interrupt*/
729 retval = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
730 hcd->irq_descr, hcd);
732 xhci_err(xhci, "request interrupt %d failed\n",
736 hcd->irq = pdev->irq;
739 /* step 4: set Run/Stop bit */
740 command = xhci_readl(xhci, &xhci->op_regs->command);
742 xhci_writel(xhci, command, &xhci->op_regs->command);
743 handshake(xhci, &xhci->op_regs->status, STS_HALT,
746 /* step 5: walk topology and initialize portsc,
747 * portpmsc and portli
749 /* this is done in bus_resume */
751 /* step 6: restart each of the previously
752 * Running endpoints by ringing their doorbells
755 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
757 hcd->state = old_state;
759 hcd->state = HC_STATE_SUSPENDED;
761 spin_unlock_irq(&xhci->lock);
767 #define xhci_suspend NULL
768 #define xhci_resume NULL
770 #endif /* CONFIG_PM */
772 /*-------------------------------------------------------------------------*/
775 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
776 * HCDs. Find the index for an endpoint given its descriptor. Use the return
777 * value to right shift 1 for the bitmask.
779 * Index = (epnum * 2) + direction - 1,
780 * where direction = 0 for OUT, 1 for IN.
781 * For control endpoints, the IN index is used (OUT index is unused), so
782 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
784 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
787 if (usb_endpoint_xfer_control(desc))
788 index = (unsigned int) (usb_endpoint_num(desc)*2);
790 index = (unsigned int) (usb_endpoint_num(desc)*2) +
791 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
795 /* Find the flag for this endpoint (for use in the control context). Use the
796 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
799 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
801 return 1 << (xhci_get_endpoint_index(desc) + 1);
804 /* Find the flag for this endpoint (for use in the control context). Use the
805 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
808 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
810 return 1 << (ep_index + 1);
813 /* Compute the last valid endpoint context index. Basically, this is the
814 * endpoint index plus one. For slot contexts with more than valid endpoint,
815 * we find the most significant bit set in the added contexts flags.
816 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
817 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
819 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
821 return fls(added_ctxs) - 1;
824 /* Returns 1 if the arguments are OK;
825 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
827 int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
828 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
830 struct xhci_hcd *xhci;
831 struct xhci_virt_device *virt_dev;
833 if (!hcd || (check_ep && !ep) || !udev) {
834 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
839 printk(KERN_DEBUG "xHCI %s called for root hub\n",
844 if (check_virt_dev) {
845 xhci = hcd_to_xhci(hcd);
846 if (!udev->slot_id || !xhci->devs
847 || !xhci->devs[udev->slot_id]) {
848 printk(KERN_DEBUG "xHCI %s called with unaddressed "
853 virt_dev = xhci->devs[udev->slot_id];
854 if (virt_dev->udev != udev) {
855 printk(KERN_DEBUG "xHCI %s called with udev and "
856 "virt_dev does not match\n", func);
864 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
865 struct usb_device *udev, struct xhci_command *command,
866 bool ctx_change, bool must_succeed);
869 * Full speed devices may have a max packet size greater than 8 bytes, but the
870 * USB core doesn't know that until it reads the first 8 bytes of the
871 * descriptor. If the usb_device's max packet size changes after that point,
872 * we need to issue an evaluate context command and wait on it.
874 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
875 unsigned int ep_index, struct urb *urb)
877 struct xhci_container_ctx *in_ctx;
878 struct xhci_container_ctx *out_ctx;
879 struct xhci_input_control_ctx *ctrl_ctx;
880 struct xhci_ep_ctx *ep_ctx;
882 int hw_max_packet_size;
885 out_ctx = xhci->devs[slot_id]->out_ctx;
886 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
887 hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
888 max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
889 if (hw_max_packet_size != max_packet_size) {
890 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
891 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
893 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
895 xhci_dbg(xhci, "Issuing evaluate context command.\n");
897 /* Set up the modified control endpoint 0 */
898 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
899 xhci->devs[slot_id]->out_ctx, ep_index);
900 in_ctx = xhci->devs[slot_id]->in_ctx;
901 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
902 ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
903 ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
905 /* Set up the input context flags for the command */
906 /* FIXME: This won't work if a non-default control endpoint
907 * changes max packet sizes.
909 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
910 ctrl_ctx->add_flags = EP0_FLAG;
911 ctrl_ctx->drop_flags = 0;
913 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
914 xhci_dbg_ctx(xhci, in_ctx, ep_index);
915 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
916 xhci_dbg_ctx(xhci, out_ctx, ep_index);
918 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
921 /* Clean up the input context for later use by bandwidth
924 ctrl_ctx->add_flags = SLOT_FLAG;
930 * non-error returns are a promise to giveback() the urb later
931 * we drop ownership so next owner (or urb unlink) can get it
933 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
935 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
938 unsigned int slot_id, ep_index;
939 struct urb_priv *urb_priv;
942 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
943 true, true, __func__) <= 0)
946 slot_id = urb->dev->slot_id;
947 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
949 if (!HCD_HW_ACCESSIBLE(hcd)) {
951 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
956 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
957 size = urb->number_of_packets;
961 urb_priv = kzalloc(sizeof(struct urb_priv) +
962 size * sizeof(struct xhci_td *), mem_flags);
966 for (i = 0; i < size; i++) {
967 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
968 if (!urb_priv->td[i]) {
969 urb_priv->length = i;
970 xhci_urb_free_priv(xhci, urb_priv);
975 urb_priv->length = size;
976 urb_priv->td_cnt = 0;
977 urb->hcpriv = urb_priv;
979 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
980 /* Check to see if the max packet size for the default control
981 * endpoint changed during FS device enumeration
983 if (urb->dev->speed == USB_SPEED_FULL) {
984 ret = xhci_check_maxpacket(xhci, slot_id,
990 /* We have a spinlock and interrupts disabled, so we must pass
991 * atomic context to this function, which may allocate memory.
993 spin_lock_irqsave(&xhci->lock, flags);
994 if (xhci->xhc_state & XHCI_STATE_DYING)
996 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
998 spin_unlock_irqrestore(&xhci->lock, flags);
999 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1000 spin_lock_irqsave(&xhci->lock, flags);
1001 if (xhci->xhc_state & XHCI_STATE_DYING)
1003 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1004 EP_GETTING_STREAMS) {
1005 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1006 "is transitioning to using streams.\n");
1008 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1009 EP_GETTING_NO_STREAMS) {
1010 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1011 "is transitioning to "
1012 "not having streams.\n");
1015 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1018 spin_unlock_irqrestore(&xhci->lock, flags);
1019 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1020 spin_lock_irqsave(&xhci->lock, flags);
1021 if (xhci->xhc_state & XHCI_STATE_DYING)
1023 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1025 spin_unlock_irqrestore(&xhci->lock, flags);
1027 spin_lock_irqsave(&xhci->lock, flags);
1028 if (xhci->xhc_state & XHCI_STATE_DYING)
1030 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1032 spin_unlock_irqrestore(&xhci->lock, flags);
1037 xhci_urb_free_priv(xhci, urb_priv);
1039 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1040 "non-responsive xHCI host.\n",
1041 urb->ep->desc.bEndpointAddress, urb);
1042 spin_unlock_irqrestore(&xhci->lock, flags);
1046 /* Get the right ring for the given URB.
1047 * If the endpoint supports streams, boundary check the URB's stream ID.
1048 * If the endpoint doesn't support streams, return the singular endpoint ring.
1050 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1053 unsigned int slot_id;
1054 unsigned int ep_index;
1055 unsigned int stream_id;
1056 struct xhci_virt_ep *ep;
1058 slot_id = urb->dev->slot_id;
1059 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1060 stream_id = urb->stream_id;
1061 ep = &xhci->devs[slot_id]->eps[ep_index];
1062 /* Common case: no streams */
1063 if (!(ep->ep_state & EP_HAS_STREAMS))
1066 if (stream_id == 0) {
1068 "WARN: Slot ID %u, ep index %u has streams, "
1069 "but URB has no stream ID.\n",
1074 if (stream_id < ep->stream_info->num_streams)
1075 return ep->stream_info->stream_rings[stream_id];
1078 "WARN: Slot ID %u, ep index %u has "
1079 "stream IDs 1 to %u allocated, "
1080 "but stream ID %u is requested.\n",
1082 ep->stream_info->num_streams - 1,
1088 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1089 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1090 * should pick up where it left off in the TD, unless a Set Transfer Ring
1091 * Dequeue Pointer is issued.
1093 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1094 * the ring. Since the ring is a contiguous structure, they can't be physically
1095 * removed. Instead, there are two options:
1097 * 1) If the HC is in the middle of processing the URB to be canceled, we
1098 * simply move the ring's dequeue pointer past those TRBs using the Set
1099 * Transfer Ring Dequeue Pointer command. This will be the common case,
1100 * when drivers timeout on the last submitted URB and attempt to cancel.
1102 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1103 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1104 * HC will need to invalidate the any TRBs it has cached after the stop
1105 * endpoint command, as noted in the xHCI 0.95 errata.
1107 * 3) The TD may have completed by the time the Stop Endpoint Command
1108 * completes, so software needs to handle that case too.
1110 * This function should protect against the TD enqueueing code ringing the
1111 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1112 * It also needs to account for multiple cancellations on happening at the same
1113 * time for the same endpoint.
1115 * Note that this function can be called in any context, or so says
1116 * usb_hcd_unlink_urb()
1118 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1120 unsigned long flags;
1123 struct xhci_hcd *xhci;
1124 struct urb_priv *urb_priv;
1126 unsigned int ep_index;
1127 struct xhci_ring *ep_ring;
1128 struct xhci_virt_ep *ep;
1130 xhci = hcd_to_xhci(hcd);
1131 spin_lock_irqsave(&xhci->lock, flags);
1132 /* Make sure the URB hasn't completed or been unlinked already */
1133 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1134 if (ret || !urb->hcpriv)
1136 temp = xhci_readl(xhci, &xhci->op_regs->status);
1137 if (temp == 0xffffffff) {
1138 xhci_dbg(xhci, "HW died, freeing TD.\n");
1139 urb_priv = urb->hcpriv;
1141 usb_hcd_unlink_urb_from_ep(hcd, urb);
1142 spin_unlock_irqrestore(&xhci->lock, flags);
1143 usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, -ESHUTDOWN);
1144 xhci_urb_free_priv(xhci, urb_priv);
1147 if (xhci->xhc_state & XHCI_STATE_DYING) {
1148 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1149 "non-responsive xHCI host.\n",
1150 urb->ep->desc.bEndpointAddress, urb);
1151 /* Let the stop endpoint command watchdog timer (which set this
1152 * state) finish cleaning up the endpoint TD lists. We must
1153 * have caught it in the middle of dropping a lock and giving
1159 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1160 xhci_dbg(xhci, "Event ring:\n");
1161 xhci_debug_ring(xhci, xhci->event_ring);
1162 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1163 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1164 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1170 xhci_dbg(xhci, "Endpoint ring:\n");
1171 xhci_debug_ring(xhci, ep_ring);
1173 urb_priv = urb->hcpriv;
1175 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1176 td = urb_priv->td[i];
1177 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1180 /* Queue a stop endpoint command, but only if this is
1181 * the first cancellation to be handled.
1183 if (!(ep->ep_state & EP_HALT_PENDING)) {
1184 ep->ep_state |= EP_HALT_PENDING;
1185 ep->stop_cmds_pending++;
1186 ep->stop_cmd_timer.expires = jiffies +
1187 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1188 add_timer(&ep->stop_cmd_timer);
1189 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1190 xhci_ring_cmd_db(xhci);
1193 spin_unlock_irqrestore(&xhci->lock, flags);
1197 /* Drop an endpoint from a new bandwidth configuration for this device.
1198 * Only one call to this function is allowed per endpoint before
1199 * check_bandwidth() or reset_bandwidth() must be called.
1200 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1201 * add the endpoint to the schedule with possibly new parameters denoted by a
1202 * different endpoint descriptor in usb_host_endpoint.
1203 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1206 * The USB core will not allow URBs to be queued to an endpoint that is being
1207 * disabled, so there's no need for mutual exclusion to protect
1208 * the xhci->devs[slot_id] structure.
1210 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1211 struct usb_host_endpoint *ep)
1213 struct xhci_hcd *xhci;
1214 struct xhci_container_ctx *in_ctx, *out_ctx;
1215 struct xhci_input_control_ctx *ctrl_ctx;
1216 struct xhci_slot_ctx *slot_ctx;
1217 unsigned int last_ctx;
1218 unsigned int ep_index;
1219 struct xhci_ep_ctx *ep_ctx;
1221 u32 new_add_flags, new_drop_flags, new_slot_info;
1224 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1227 xhci = hcd_to_xhci(hcd);
1228 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1230 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1231 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1232 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1233 __func__, drop_flag);
1237 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1238 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1239 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1240 ep_index = xhci_get_endpoint_index(&ep->desc);
1241 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1242 /* If the HC already knows the endpoint is disabled,
1243 * or the HCD has noted it is disabled, ignore this request
1245 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
1246 ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
1247 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1252 ctrl_ctx->drop_flags |= drop_flag;
1253 new_drop_flags = ctrl_ctx->drop_flags;
1255 ctrl_ctx->add_flags &= ~drop_flag;
1256 new_add_flags = ctrl_ctx->add_flags;
1258 last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
1259 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1260 /* Update the last valid endpoint context, if we deleted the last one */
1261 if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
1262 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1263 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1265 new_slot_info = slot_ctx->dev_info;
1267 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1269 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1270 (unsigned int) ep->desc.bEndpointAddress,
1272 (unsigned int) new_drop_flags,
1273 (unsigned int) new_add_flags,
1274 (unsigned int) new_slot_info);
1278 /* Add an endpoint to a new possible bandwidth configuration for this device.
1279 * Only one call to this function is allowed per endpoint before
1280 * check_bandwidth() or reset_bandwidth() must be called.
1281 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1282 * add the endpoint to the schedule with possibly new parameters denoted by a
1283 * different endpoint descriptor in usb_host_endpoint.
1284 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1287 * The USB core will not allow URBs to be queued to an endpoint until the
1288 * configuration or alt setting is installed in the device, so there's no need
1289 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1291 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1292 struct usb_host_endpoint *ep)
1294 struct xhci_hcd *xhci;
1295 struct xhci_container_ctx *in_ctx, *out_ctx;
1296 unsigned int ep_index;
1297 struct xhci_ep_ctx *ep_ctx;
1298 struct xhci_slot_ctx *slot_ctx;
1299 struct xhci_input_control_ctx *ctrl_ctx;
1301 unsigned int last_ctx;
1302 u32 new_add_flags, new_drop_flags, new_slot_info;
1305 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1307 /* So we won't queue a reset ep command for a root hub */
1311 xhci = hcd_to_xhci(hcd);
1313 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1314 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1315 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1316 /* FIXME when we have to issue an evaluate endpoint command to
1317 * deal with ep0 max packet size changing once we get the
1320 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1321 __func__, added_ctxs);
1325 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1326 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1327 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1328 ep_index = xhci_get_endpoint_index(&ep->desc);
1329 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1330 /* If the HCD has already noted the endpoint is enabled,
1331 * ignore this request.
1333 if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
1334 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1340 * Configuration and alternate setting changes must be done in
1341 * process context, not interrupt context (or so documenation
1342 * for usb_set_interface() and usb_set_configuration() claim).
1344 if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
1345 udev, ep, GFP_NOIO) < 0) {
1346 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1347 __func__, ep->desc.bEndpointAddress);
1351 ctrl_ctx->add_flags |= added_ctxs;
1352 new_add_flags = ctrl_ctx->add_flags;
1354 /* If xhci_endpoint_disable() was called for this endpoint, but the
1355 * xHC hasn't been notified yet through the check_bandwidth() call,
1356 * this re-adds a new state for the endpoint from the new endpoint
1357 * descriptors. We must drop and re-add this endpoint, so we leave the
1360 new_drop_flags = ctrl_ctx->drop_flags;
1362 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1363 /* Update the last valid endpoint context, if we just added one past */
1364 if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
1365 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1366 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1368 new_slot_info = slot_ctx->dev_info;
1370 /* Store the usb_device pointer for later use */
1373 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1374 (unsigned int) ep->desc.bEndpointAddress,
1376 (unsigned int) new_drop_flags,
1377 (unsigned int) new_add_flags,
1378 (unsigned int) new_slot_info);
1382 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1384 struct xhci_input_control_ctx *ctrl_ctx;
1385 struct xhci_ep_ctx *ep_ctx;
1386 struct xhci_slot_ctx *slot_ctx;
1389 /* When a device's add flag and drop flag are zero, any subsequent
1390 * configure endpoint command will leave that endpoint's state
1391 * untouched. Make sure we don't leave any old state in the input
1392 * endpoint contexts.
1394 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1395 ctrl_ctx->drop_flags = 0;
1396 ctrl_ctx->add_flags = 0;
1397 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1398 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1399 /* Endpoint 0 is always valid */
1400 slot_ctx->dev_info |= LAST_CTX(1);
1401 for (i = 1; i < 31; ++i) {
1402 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1403 ep_ctx->ep_info = 0;
1404 ep_ctx->ep_info2 = 0;
1406 ep_ctx->tx_info = 0;
1410 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1411 struct usb_device *udev, int *cmd_status)
1415 switch (*cmd_status) {
1417 dev_warn(&udev->dev, "Not enough host controller resources "
1418 "for new device state.\n");
1420 /* FIXME: can we allocate more resources for the HC? */
1423 dev_warn(&udev->dev, "Not enough bandwidth "
1424 "for new device state.\n");
1426 /* FIXME: can we go back to the old state? */
1429 /* the HCD set up something wrong */
1430 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1432 "and endpoint is not disabled.\n");
1436 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1440 xhci_err(xhci, "ERROR: unexpected command completion "
1441 "code 0x%x.\n", *cmd_status);
1448 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1449 struct usb_device *udev, int *cmd_status)
1452 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1454 switch (*cmd_status) {
1456 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1457 "context command.\n");
1461 dev_warn(&udev->dev, "WARN: slot not enabled for"
1462 "evaluate context command.\n");
1463 case COMP_CTX_STATE:
1464 dev_warn(&udev->dev, "WARN: invalid context state for "
1465 "evaluate context command.\n");
1466 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1470 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1474 xhci_err(xhci, "ERROR: unexpected command completion "
1475 "code 0x%x.\n", *cmd_status);
1482 /* Issue a configure endpoint command or evaluate context command
1483 * and wait for it to finish.
1485 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1486 struct usb_device *udev,
1487 struct xhci_command *command,
1488 bool ctx_change, bool must_succeed)
1492 unsigned long flags;
1493 struct xhci_container_ctx *in_ctx;
1494 struct completion *cmd_completion;
1496 struct xhci_virt_device *virt_dev;
1498 spin_lock_irqsave(&xhci->lock, flags);
1499 virt_dev = xhci->devs[udev->slot_id];
1501 in_ctx = command->in_ctx;
1502 cmd_completion = command->completion;
1503 cmd_status = &command->status;
1504 command->command_trb = xhci->cmd_ring->enqueue;
1505 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1507 in_ctx = virt_dev->in_ctx;
1508 cmd_completion = &virt_dev->cmd_completion;
1509 cmd_status = &virt_dev->cmd_status;
1511 init_completion(cmd_completion);
1514 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1515 udev->slot_id, must_succeed);
1517 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1521 list_del(&command->cmd_list);
1522 spin_unlock_irqrestore(&xhci->lock, flags);
1523 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1526 xhci_ring_cmd_db(xhci);
1527 spin_unlock_irqrestore(&xhci->lock, flags);
1529 /* Wait for the configure endpoint command to complete */
1530 timeleft = wait_for_completion_interruptible_timeout(
1532 USB_CTRL_SET_TIMEOUT);
1533 if (timeleft <= 0) {
1534 xhci_warn(xhci, "%s while waiting for %s command\n",
1535 timeleft == 0 ? "Timeout" : "Signal",
1537 "configure endpoint" :
1538 "evaluate context");
1539 /* FIXME cancel the configure endpoint command */
1544 return xhci_configure_endpoint_result(xhci, udev, cmd_status);
1545 return xhci_evaluate_context_result(xhci, udev, cmd_status);
1548 /* Called after one or more calls to xhci_add_endpoint() or
1549 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1550 * to call xhci_reset_bandwidth().
1552 * Since we are in the middle of changing either configuration or
1553 * installing a new alt setting, the USB core won't allow URBs to be
1554 * enqueued for any endpoint on the old config or interface. Nothing
1555 * else should be touching the xhci->devs[slot_id] structure, so we
1556 * don't need to take the xhci->lock for manipulating that.
1558 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1562 struct xhci_hcd *xhci;
1563 struct xhci_virt_device *virt_dev;
1564 struct xhci_input_control_ctx *ctrl_ctx;
1565 struct xhci_slot_ctx *slot_ctx;
1567 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1570 xhci = hcd_to_xhci(hcd);
1572 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1573 virt_dev = xhci->devs[udev->slot_id];
1575 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1576 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1577 ctrl_ctx->add_flags |= SLOT_FLAG;
1578 ctrl_ctx->add_flags &= ~EP0_FLAG;
1579 ctrl_ctx->drop_flags &= ~SLOT_FLAG;
1580 ctrl_ctx->drop_flags &= ~EP0_FLAG;
1581 xhci_dbg(xhci, "New Input Control Context:\n");
1582 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1583 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1584 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1586 ret = xhci_configure_endpoint(xhci, udev, NULL,
1589 /* Callee should call reset_bandwidth() */
1593 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1594 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1595 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1597 xhci_zero_in_ctx(xhci, virt_dev);
1598 /* Install new rings and free or cache any old rings */
1599 for (i = 1; i < 31; ++i) {
1600 if (!virt_dev->eps[i].new_ring)
1602 /* Only cache or free the old ring if it exists.
1603 * It may not if this is the first add of an endpoint.
1605 if (virt_dev->eps[i].ring) {
1606 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1608 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1609 virt_dev->eps[i].new_ring = NULL;
1615 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1617 struct xhci_hcd *xhci;
1618 struct xhci_virt_device *virt_dev;
1621 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1624 xhci = hcd_to_xhci(hcd);
1626 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1627 virt_dev = xhci->devs[udev->slot_id];
1628 /* Free any rings allocated for added endpoints */
1629 for (i = 0; i < 31; ++i) {
1630 if (virt_dev->eps[i].new_ring) {
1631 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1632 virt_dev->eps[i].new_ring = NULL;
1635 xhci_zero_in_ctx(xhci, virt_dev);
1638 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1639 struct xhci_container_ctx *in_ctx,
1640 struct xhci_container_ctx *out_ctx,
1641 u32 add_flags, u32 drop_flags)
1643 struct xhci_input_control_ctx *ctrl_ctx;
1644 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1645 ctrl_ctx->add_flags = add_flags;
1646 ctrl_ctx->drop_flags = drop_flags;
1647 xhci_slot_copy(xhci, in_ctx, out_ctx);
1648 ctrl_ctx->add_flags |= SLOT_FLAG;
1650 xhci_dbg(xhci, "Input Context:\n");
1651 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1654 void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1655 unsigned int slot_id, unsigned int ep_index,
1656 struct xhci_dequeue_state *deq_state)
1658 struct xhci_container_ctx *in_ctx;
1659 struct xhci_ep_ctx *ep_ctx;
1663 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1664 xhci->devs[slot_id]->out_ctx, ep_index);
1665 in_ctx = xhci->devs[slot_id]->in_ctx;
1666 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1667 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1668 deq_state->new_deq_ptr);
1670 xhci_warn(xhci, "WARN Cannot submit config ep after "
1671 "reset ep command\n");
1672 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1673 deq_state->new_deq_seg,
1674 deq_state->new_deq_ptr);
1677 ep_ctx->deq = addr | deq_state->new_cycle_state;
1679 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1680 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1681 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1684 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1685 struct usb_device *udev, unsigned int ep_index)
1687 struct xhci_dequeue_state deq_state;
1688 struct xhci_virt_ep *ep;
1690 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1691 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1692 /* We need to move the HW's dequeue pointer past this TD,
1693 * or it will attempt to resend it on the next doorbell ring.
1695 xhci_find_new_dequeue_state(xhci, udev->slot_id,
1696 ep_index, ep->stopped_stream, ep->stopped_td,
1699 /* HW with the reset endpoint quirk will use the saved dequeue state to
1700 * issue a configure endpoint command later.
1702 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
1703 xhci_dbg(xhci, "Queueing new dequeue state\n");
1704 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
1705 ep_index, ep->stopped_stream, &deq_state);
1707 /* Better hope no one uses the input context between now and the
1708 * reset endpoint completion!
1709 * XXX: No idea how this hardware will react when stream rings
1712 xhci_dbg(xhci, "Setting up input context for "
1713 "configure endpoint command\n");
1714 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
1715 ep_index, &deq_state);
1719 /* Deal with stalled endpoints. The core should have sent the control message
1720 * to clear the halt condition. However, we need to make the xHCI hardware
1721 * reset its sequence number, since a device will expect a sequence number of
1722 * zero after the halt condition is cleared.
1723 * Context: in_interrupt
1725 void xhci_endpoint_reset(struct usb_hcd *hcd,
1726 struct usb_host_endpoint *ep)
1728 struct xhci_hcd *xhci;
1729 struct usb_device *udev;
1730 unsigned int ep_index;
1731 unsigned long flags;
1733 struct xhci_virt_ep *virt_ep;
1735 xhci = hcd_to_xhci(hcd);
1736 udev = (struct usb_device *) ep->hcpriv;
1737 /* Called with a root hub endpoint (or an endpoint that wasn't added
1738 * with xhci_add_endpoint()
1742 ep_index = xhci_get_endpoint_index(&ep->desc);
1743 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1744 if (!virt_ep->stopped_td) {
1745 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
1746 ep->desc.bEndpointAddress);
1749 if (usb_endpoint_xfer_control(&ep->desc)) {
1750 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
1754 xhci_dbg(xhci, "Queueing reset endpoint command\n");
1755 spin_lock_irqsave(&xhci->lock, flags);
1756 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
1758 * Can't change the ring dequeue pointer until it's transitioned to the
1759 * stopped state, which is only upon a successful reset endpoint
1760 * command. Better hope that last command worked!
1763 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
1764 kfree(virt_ep->stopped_td);
1765 xhci_ring_cmd_db(xhci);
1767 virt_ep->stopped_td = NULL;
1768 virt_ep->stopped_trb = NULL;
1769 virt_ep->stopped_stream = 0;
1770 spin_unlock_irqrestore(&xhci->lock, flags);
1773 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
1776 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
1777 struct usb_device *udev, struct usb_host_endpoint *ep,
1778 unsigned int slot_id)
1781 unsigned int ep_index;
1782 unsigned int ep_state;
1786 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
1789 if (ep->ss_ep_comp.bmAttributes == 0) {
1790 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
1791 " descriptor for ep 0x%x does not support streams\n",
1792 ep->desc.bEndpointAddress);
1796 ep_index = xhci_get_endpoint_index(&ep->desc);
1797 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1798 if (ep_state & EP_HAS_STREAMS ||
1799 ep_state & EP_GETTING_STREAMS) {
1800 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
1801 "already has streams set up.\n",
1802 ep->desc.bEndpointAddress);
1803 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
1804 "dynamic stream context array reallocation.\n");
1807 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
1808 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
1809 "endpoint 0x%x; URBs are pending.\n",
1810 ep->desc.bEndpointAddress);
1816 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
1817 unsigned int *num_streams, unsigned int *num_stream_ctxs)
1819 unsigned int max_streams;
1821 /* The stream context array size must be a power of two */
1822 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
1824 * Find out how many primary stream array entries the host controller
1825 * supports. Later we may use secondary stream arrays (similar to 2nd
1826 * level page entries), but that's an optional feature for xHCI host
1827 * controllers. xHCs must support at least 4 stream IDs.
1829 max_streams = HCC_MAX_PSA(xhci->hcc_params);
1830 if (*num_stream_ctxs > max_streams) {
1831 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
1833 *num_stream_ctxs = max_streams;
1834 *num_streams = max_streams;
1838 /* Returns an error code if one of the endpoint already has streams.
1839 * This does not change any data structures, it only checks and gathers
1842 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
1843 struct usb_device *udev,
1844 struct usb_host_endpoint **eps, unsigned int num_eps,
1845 unsigned int *num_streams, u32 *changed_ep_bitmask)
1847 unsigned int max_streams;
1848 unsigned int endpoint_flag;
1852 for (i = 0; i < num_eps; i++) {
1853 ret = xhci_check_streams_endpoint(xhci, udev,
1854 eps[i], udev->slot_id);
1858 max_streams = USB_SS_MAX_STREAMS(
1859 eps[i]->ss_ep_comp.bmAttributes);
1860 if (max_streams < (*num_streams - 1)) {
1861 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
1862 eps[i]->desc.bEndpointAddress,
1864 *num_streams = max_streams+1;
1867 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
1868 if (*changed_ep_bitmask & endpoint_flag)
1870 *changed_ep_bitmask |= endpoint_flag;
1875 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
1876 struct usb_device *udev,
1877 struct usb_host_endpoint **eps, unsigned int num_eps)
1879 u32 changed_ep_bitmask = 0;
1880 unsigned int slot_id;
1881 unsigned int ep_index;
1882 unsigned int ep_state;
1885 slot_id = udev->slot_id;
1886 if (!xhci->devs[slot_id])
1889 for (i = 0; i < num_eps; i++) {
1890 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1891 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1892 /* Are streams already being freed for the endpoint? */
1893 if (ep_state & EP_GETTING_NO_STREAMS) {
1894 xhci_warn(xhci, "WARN Can't disable streams for "
1896 "streams are being disabled already.",
1897 eps[i]->desc.bEndpointAddress);
1900 /* Are there actually any streams to free? */
1901 if (!(ep_state & EP_HAS_STREAMS) &&
1902 !(ep_state & EP_GETTING_STREAMS)) {
1903 xhci_warn(xhci, "WARN Can't disable streams for "
1905 "streams are already disabled!",
1906 eps[i]->desc.bEndpointAddress);
1907 xhci_warn(xhci, "WARN xhci_free_streams() called "
1908 "with non-streams endpoint\n");
1911 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
1913 return changed_ep_bitmask;
1917 * The USB device drivers use this function (though the HCD interface in USB
1918 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
1919 * coordinate mass storage command queueing across multiple endpoints (basically
1920 * a stream ID == a task ID).
1922 * Setting up streams involves allocating the same size stream context array
1923 * for each endpoint and issuing a configure endpoint command for all endpoints.
1925 * Don't allow the call to succeed if one endpoint only supports one stream
1926 * (which means it doesn't support streams at all).
1928 * Drivers may get less stream IDs than they asked for, if the host controller
1929 * hardware or endpoints claim they can't support the number of requested
1932 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
1933 struct usb_host_endpoint **eps, unsigned int num_eps,
1934 unsigned int num_streams, gfp_t mem_flags)
1937 struct xhci_hcd *xhci;
1938 struct xhci_virt_device *vdev;
1939 struct xhci_command *config_cmd;
1940 unsigned int ep_index;
1941 unsigned int num_stream_ctxs;
1942 unsigned long flags;
1943 u32 changed_ep_bitmask = 0;
1948 /* Add one to the number of streams requested to account for
1949 * stream 0 that is reserved for xHCI usage.
1952 xhci = hcd_to_xhci(hcd);
1953 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
1956 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
1958 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
1962 /* Check to make sure all endpoints are not already configured for
1963 * streams. While we're at it, find the maximum number of streams that
1964 * all the endpoints will support and check for duplicate endpoints.
1966 spin_lock_irqsave(&xhci->lock, flags);
1967 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
1968 num_eps, &num_streams, &changed_ep_bitmask);
1970 xhci_free_command(xhci, config_cmd);
1971 spin_unlock_irqrestore(&xhci->lock, flags);
1974 if (num_streams <= 1) {
1975 xhci_warn(xhci, "WARN: endpoints can't handle "
1976 "more than one stream.\n");
1977 xhci_free_command(xhci, config_cmd);
1978 spin_unlock_irqrestore(&xhci->lock, flags);
1981 vdev = xhci->devs[udev->slot_id];
1982 /* Mark each endpoint as being in transistion, so
1983 * xhci_urb_enqueue() will reject all URBs.
1985 for (i = 0; i < num_eps; i++) {
1986 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1987 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
1989 spin_unlock_irqrestore(&xhci->lock, flags);
1991 /* Setup internal data structures and allocate HW data structures for
1992 * streams (but don't install the HW structures in the input context
1993 * until we're sure all memory allocation succeeded).
1995 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
1996 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
1997 num_stream_ctxs, num_streams);
1999 for (i = 0; i < num_eps; i++) {
2000 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2001 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2003 num_streams, mem_flags);
2004 if (!vdev->eps[ep_index].stream_info)
2006 /* Set maxPstreams in endpoint context and update deq ptr to
2007 * point to stream context array. FIXME
2011 /* Set up the input context for a configure endpoint command. */
2012 for (i = 0; i < num_eps; i++) {
2013 struct xhci_ep_ctx *ep_ctx;
2015 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2016 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2018 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2019 vdev->out_ctx, ep_index);
2020 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2021 vdev->eps[ep_index].stream_info);
2023 /* Tell the HW to drop its old copy of the endpoint context info
2024 * and add the updated copy from the input context.
2026 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2027 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2029 /* Issue and wait for the configure endpoint command */
2030 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2033 /* xHC rejected the configure endpoint command for some reason, so we
2034 * leave the old ring intact and free our internal streams data
2040 spin_lock_irqsave(&xhci->lock, flags);
2041 for (i = 0; i < num_eps; i++) {
2042 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2043 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2044 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2045 udev->slot_id, ep_index);
2046 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2048 xhci_free_command(xhci, config_cmd);
2049 spin_unlock_irqrestore(&xhci->lock, flags);
2051 /* Subtract 1 for stream 0, which drivers can't use */
2052 return num_streams - 1;
2055 /* If it didn't work, free the streams! */
2056 for (i = 0; i < num_eps; i++) {
2057 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2058 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2059 vdev->eps[ep_index].stream_info = NULL;
2060 /* FIXME Unset maxPstreams in endpoint context and
2061 * update deq ptr to point to normal string ring.
2063 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2064 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2065 xhci_endpoint_zero(xhci, vdev, eps[i]);
2067 xhci_free_command(xhci, config_cmd);
2071 /* Transition the endpoint from using streams to being a "normal" endpoint
2074 * Modify the endpoint context state, submit a configure endpoint command,
2075 * and free all endpoint rings for streams if that completes successfully.
2077 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2078 struct usb_host_endpoint **eps, unsigned int num_eps,
2082 struct xhci_hcd *xhci;
2083 struct xhci_virt_device *vdev;
2084 struct xhci_command *command;
2085 unsigned int ep_index;
2086 unsigned long flags;
2087 u32 changed_ep_bitmask;
2089 xhci = hcd_to_xhci(hcd);
2090 vdev = xhci->devs[udev->slot_id];
2092 /* Set up a configure endpoint command to remove the streams rings */
2093 spin_lock_irqsave(&xhci->lock, flags);
2094 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2095 udev, eps, num_eps);
2096 if (changed_ep_bitmask == 0) {
2097 spin_unlock_irqrestore(&xhci->lock, flags);
2101 /* Use the xhci_command structure from the first endpoint. We may have
2102 * allocated too many, but the driver may call xhci_free_streams() for
2103 * each endpoint it grouped into one call to xhci_alloc_streams().
2105 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2106 command = vdev->eps[ep_index].stream_info->free_streams_command;
2107 for (i = 0; i < num_eps; i++) {
2108 struct xhci_ep_ctx *ep_ctx;
2110 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2111 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2112 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2113 EP_GETTING_NO_STREAMS;
2115 xhci_endpoint_copy(xhci, command->in_ctx,
2116 vdev->out_ctx, ep_index);
2117 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2118 &vdev->eps[ep_index]);
2120 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2121 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2122 spin_unlock_irqrestore(&xhci->lock, flags);
2124 /* Issue and wait for the configure endpoint command,
2125 * which must succeed.
2127 ret = xhci_configure_endpoint(xhci, udev, command,
2130 /* xHC rejected the configure endpoint command for some reason, so we
2131 * leave the streams rings intact.
2136 spin_lock_irqsave(&xhci->lock, flags);
2137 for (i = 0; i < num_eps; i++) {
2138 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2139 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2140 vdev->eps[ep_index].stream_info = NULL;
2141 /* FIXME Unset maxPstreams in endpoint context and
2142 * update deq ptr to point to normal string ring.
2144 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2145 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2147 spin_unlock_irqrestore(&xhci->lock, flags);
2153 * This submits a Reset Device Command, which will set the device state to 0,
2154 * set the device address to 0, and disable all the endpoints except the default
2155 * control endpoint. The USB core should come back and call
2156 * xhci_address_device(), and then re-set up the configuration. If this is
2157 * called because of a usb_reset_and_verify_device(), then the old alternate
2158 * settings will be re-installed through the normal bandwidth allocation
2161 * Wait for the Reset Device command to finish. Remove all structures
2162 * associated with the endpoints that were disabled. Clear the input device
2163 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
2165 * If the virt_dev to be reset does not exist or does not match the udev,
2166 * it means the device is lost, possibly due to the xHC restore error and
2167 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2168 * re-allocate the device.
2170 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2173 unsigned long flags;
2174 struct xhci_hcd *xhci;
2175 unsigned int slot_id;
2176 struct xhci_virt_device *virt_dev;
2177 struct xhci_command *reset_device_cmd;
2179 int last_freed_endpoint;
2181 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2184 xhci = hcd_to_xhci(hcd);
2185 slot_id = udev->slot_id;
2186 virt_dev = xhci->devs[slot_id];
2188 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2189 "not exist. Re-allocate the device\n", slot_id);
2190 ret = xhci_alloc_dev(hcd, udev);
2197 if (virt_dev->udev != udev) {
2198 /* If the virt_dev and the udev does not match, this virt_dev
2199 * may belong to another udev.
2200 * Re-allocate the device.
2202 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2203 "not match the udev. Re-allocate the device\n",
2205 ret = xhci_alloc_dev(hcd, udev);
2212 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2213 /* Allocate the command structure that holds the struct completion.
2214 * Assume we're in process context, since the normal device reset
2215 * process has to wait for the device anyway. Storage devices are
2216 * reset as part of error handling, so use GFP_NOIO instead of
2219 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2220 if (!reset_device_cmd) {
2221 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2225 /* Attempt to submit the Reset Device command to the command ring */
2226 spin_lock_irqsave(&xhci->lock, flags);
2227 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2228 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2229 ret = xhci_queue_reset_device(xhci, slot_id);
2231 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2232 list_del(&reset_device_cmd->cmd_list);
2233 spin_unlock_irqrestore(&xhci->lock, flags);
2234 goto command_cleanup;
2236 xhci_ring_cmd_db(xhci);
2237 spin_unlock_irqrestore(&xhci->lock, flags);
2239 /* Wait for the Reset Device command to finish */
2240 timeleft = wait_for_completion_interruptible_timeout(
2241 reset_device_cmd->completion,
2242 USB_CTRL_SET_TIMEOUT);
2243 if (timeleft <= 0) {
2244 xhci_warn(xhci, "%s while waiting for reset device command\n",
2245 timeleft == 0 ? "Timeout" : "Signal");
2246 spin_lock_irqsave(&xhci->lock, flags);
2247 /* The timeout might have raced with the event ring handler, so
2248 * only delete from the list if the item isn't poisoned.
2250 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2251 list_del(&reset_device_cmd->cmd_list);
2252 spin_unlock_irqrestore(&xhci->lock, flags);
2254 goto command_cleanup;
2257 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2258 * unless we tried to reset a slot ID that wasn't enabled,
2259 * or the device wasn't in the addressed or configured state.
2261 ret = reset_device_cmd->status;
2263 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2264 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2265 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2267 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2268 xhci_info(xhci, "Not freeing device rings.\n");
2269 /* Don't treat this as an error. May change my mind later. */
2271 goto command_cleanup;
2273 xhci_dbg(xhci, "Successful reset device command.\n");
2276 if (xhci_is_vendor_info_code(xhci, ret))
2278 xhci_warn(xhci, "Unknown completion code %u for "
2279 "reset device command.\n", ret);
2281 goto command_cleanup;
2284 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2285 last_freed_endpoint = 1;
2286 for (i = 1; i < 31; ++i) {
2287 if (!virt_dev->eps[i].ring)
2289 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2290 last_freed_endpoint = i;
2292 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2293 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2297 xhci_free_command(xhci, reset_device_cmd);
2302 * At this point, the struct usb_device is about to go away, the device has
2303 * disconnected, and all traffic has been stopped and the endpoints have been
2304 * disabled. Free any HC data structures associated with that device.
2306 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2308 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2309 struct xhci_virt_device *virt_dev;
2310 unsigned long flags;
2314 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2318 virt_dev = xhci->devs[udev->slot_id];
2320 /* Stop any wayward timer functions (which may grab the lock) */
2321 for (i = 0; i < 31; ++i) {
2322 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2323 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2326 spin_lock_irqsave(&xhci->lock, flags);
2327 /* Don't disable the slot if the host controller is dead. */
2328 state = xhci_readl(xhci, &xhci->op_regs->status);
2329 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
2330 xhci_free_virt_device(xhci, udev->slot_id);
2331 spin_unlock_irqrestore(&xhci->lock, flags);
2335 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2336 spin_unlock_irqrestore(&xhci->lock, flags);
2337 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2340 xhci_ring_cmd_db(xhci);
2341 spin_unlock_irqrestore(&xhci->lock, flags);
2343 * Event command completion handler will free any data structures
2344 * associated with the slot. XXX Can free sleep?
2349 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2350 * timed out, or allocating memory failed. Returns 1 on success.
2352 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2354 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2355 unsigned long flags;
2359 spin_lock_irqsave(&xhci->lock, flags);
2360 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2362 spin_unlock_irqrestore(&xhci->lock, flags);
2363 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2366 xhci_ring_cmd_db(xhci);
2367 spin_unlock_irqrestore(&xhci->lock, flags);
2369 /* XXX: how much time for xHC slot assignment? */
2370 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2371 USB_CTRL_SET_TIMEOUT);
2372 if (timeleft <= 0) {
2373 xhci_warn(xhci, "%s while waiting for a slot\n",
2374 timeleft == 0 ? "Timeout" : "Signal");
2375 /* FIXME cancel the enable slot request */
2379 if (!xhci->slot_id) {
2380 xhci_err(xhci, "Error while assigning device slot ID\n");
2383 /* xhci_alloc_virt_device() does not touch rings; no need to lock */
2384 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
2385 /* Disable slot, if we can do it without mem alloc */
2386 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2387 spin_lock_irqsave(&xhci->lock, flags);
2388 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2389 xhci_ring_cmd_db(xhci);
2390 spin_unlock_irqrestore(&xhci->lock, flags);
2393 udev->slot_id = xhci->slot_id;
2394 /* Is this a LS or FS device under a HS hub? */
2395 /* Hub or peripherial? */
2400 * Issue an Address Device command (which will issue a SetAddress request to
2402 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2403 * we should only issue and wait on one address command at the same time.
2405 * We add one to the device address issued by the hardware because the USB core
2406 * uses address 1 for the root hubs (even though they're not really devices).
2408 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2410 unsigned long flags;
2412 struct xhci_virt_device *virt_dev;
2414 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2415 struct xhci_slot_ctx *slot_ctx;
2416 struct xhci_input_control_ctx *ctrl_ctx;
2419 if (!udev->slot_id) {
2420 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2424 virt_dev = xhci->devs[udev->slot_id];
2426 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2428 * If this is the first Set Address since device plug-in or
2429 * virt_device realloaction after a resume with an xHCI power loss,
2430 * then set up the slot context.
2432 if (!slot_ctx->dev_info)
2433 xhci_setup_addressable_virt_dev(xhci, udev);
2434 /* Otherwise, update the control endpoint ring enqueue pointer. */
2436 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2437 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2438 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2440 spin_lock_irqsave(&xhci->lock, flags);
2441 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2444 spin_unlock_irqrestore(&xhci->lock, flags);
2445 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2448 xhci_ring_cmd_db(xhci);
2449 spin_unlock_irqrestore(&xhci->lock, flags);
2451 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2452 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2453 USB_CTRL_SET_TIMEOUT);
2454 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2455 * the SetAddress() "recovery interval" required by USB and aborting the
2456 * command on a timeout.
2458 if (timeleft <= 0) {
2459 xhci_warn(xhci, "%s while waiting for a slot\n",
2460 timeleft == 0 ? "Timeout" : "Signal");
2461 /* FIXME cancel the address device command */
2465 switch (virt_dev->cmd_status) {
2466 case COMP_CTX_STATE:
2468 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2473 dev_warn(&udev->dev, "Device not responding to set address.\n");
2477 xhci_dbg(xhci, "Successful Address Device command\n");
2480 xhci_err(xhci, "ERROR: unexpected command completion "
2481 "code 0x%x.\n", virt_dev->cmd_status);
2482 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2483 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2490 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2491 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2492 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2494 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2495 (unsigned long long)
2496 xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
2497 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2498 (unsigned long long)virt_dev->out_ctx->dma);
2499 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2500 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2501 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2502 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2504 * USB core uses address 1 for the roothubs, so we add one to the
2505 * address given back to us by the HC.
2507 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2508 /* Use kernel assigned address for devices; store xHC assigned
2509 * address locally. */
2510 virt_dev->address = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
2511 /* Zero the input context control for later use */
2512 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2513 ctrl_ctx->add_flags = 0;
2514 ctrl_ctx->drop_flags = 0;
2516 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2521 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2522 * internal data structures for the device.
2524 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2525 struct usb_tt *tt, gfp_t mem_flags)
2527 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2528 struct xhci_virt_device *vdev;
2529 struct xhci_command *config_cmd;
2530 struct xhci_input_control_ctx *ctrl_ctx;
2531 struct xhci_slot_ctx *slot_ctx;
2532 unsigned long flags;
2533 unsigned think_time;
2536 /* Ignore root hubs */
2540 vdev = xhci->devs[hdev->slot_id];
2542 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2545 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2547 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2551 spin_lock_irqsave(&xhci->lock, flags);
2552 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2553 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2554 ctrl_ctx->add_flags |= SLOT_FLAG;
2555 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2556 slot_ctx->dev_info |= DEV_HUB;
2558 slot_ctx->dev_info |= DEV_MTT;
2559 if (xhci->hci_version > 0x95) {
2560 xhci_dbg(xhci, "xHCI version %x needs hub "
2561 "TT think time and number of ports\n",
2562 (unsigned int) xhci->hci_version);
2563 slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
2564 /* Set TT think time - convert from ns to FS bit times.
2565 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2566 * 2 = 24 FS bit times, 3 = 32 FS bit times.
2568 think_time = tt->think_time;
2569 if (think_time != 0)
2570 think_time = (think_time / 666) - 1;
2571 slot_ctx->tt_info |= TT_THINK_TIME(think_time);
2573 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2574 "TT think time or number of ports\n",
2575 (unsigned int) xhci->hci_version);
2577 slot_ctx->dev_state = 0;
2578 spin_unlock_irqrestore(&xhci->lock, flags);
2580 xhci_dbg(xhci, "Set up %s for hub device.\n",
2581 (xhci->hci_version > 0x95) ?
2582 "configure endpoint" : "evaluate context");
2583 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
2584 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
2586 /* Issue and wait for the configure endpoint or
2587 * evaluate context command.
2589 if (xhci->hci_version > 0x95)
2590 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2593 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2596 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
2597 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
2599 xhci_free_command(xhci, config_cmd);
2603 int xhci_get_frame(struct usb_hcd *hcd)
2605 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2606 /* EHCI mods by the periodic size. Why? */
2607 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
2610 MODULE_DESCRIPTION(DRIVER_DESC);
2611 MODULE_AUTHOR(DRIVER_AUTHOR);
2612 MODULE_LICENSE("GPL");
2614 static int __init xhci_hcd_init(void)
2619 retval = xhci_register_pci();
2622 printk(KERN_DEBUG "Problem registering PCI driver.");
2627 * Check the compiler generated sizes of structures that must be laid
2628 * out in specific ways for hardware access.
2630 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2631 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
2632 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
2633 /* xhci_device_control has eight fields, and also
2634 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
2636 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
2637 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
2638 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
2639 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
2640 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
2641 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
2642 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
2643 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2646 module_init(xhci_hcd_init);
2648 static void __exit xhci_hcd_cleanup(void)
2651 xhci_unregister_pci();
2654 module_exit(xhci_hcd_cleanup);