2 tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
4 Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
6 Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation version 2
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/usb.h>
27 #include <linux/i2c.h>
29 #include "tm6000-regs.h"
30 #include <media/v4l2-common.h>
31 #include <media/tuner.h>
33 #define USB_TIMEOUT 5*HZ /* ms */
35 int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
36 u16 value, u16 index, u8 *buf, u16 len)
40 static int ini = 0, last = 0, n = 0;
44 data = kzalloc(len, GFP_KERNEL);
47 if (req_type & USB_DIR_IN)
48 pipe = usb_rcvctrlpipe(dev->udev, 0);
50 pipe = usb_sndctrlpipe(dev->udev, 0);
51 memcpy(data, buf, len);
54 if (tm6000_debug & V4L2_DEBUG_I2C) {
58 printk("%06i (dev %p, pipe %08x): ", n, dev->udev, pipe);
60 printk("%s: %06u ms %06u ms %02x %02x %02x %02x %02x %02x %02x %02x ",
61 (req_type & USB_DIR_IN) ? " IN" : "OUT",
62 jiffies_to_msecs(jiffies-last),
63 jiffies_to_msecs(jiffies-ini),
64 req_type, req, value&0xff, value>>8, index&0xff,
65 index>>8, len&0xff, len>>8);
69 if (!(req_type & USB_DIR_IN)) {
71 for (i = 0; i < len; i++)
72 printk(" %02x", buf[i]);
77 ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index,
78 data, len, USB_TIMEOUT);
80 if (req_type & USB_DIR_IN)
81 memcpy(buf, data, len);
83 if (tm6000_debug & V4L2_DEBUG_I2C) {
85 if (req_type & USB_DIR_IN)
86 printk("<<< (len=%d)\n", len);
88 printk("%s: Error #%d\n", __FUNCTION__, ret);
89 } else if (req_type & USB_DIR_IN) {
91 for (i = 0; i < len; i++)
92 printk(" %02x", buf[i]);
104 int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
107 tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
108 req, value, index, NULL, 0);
110 EXPORT_SYMBOL_GPL(tm6000_set_reg);
112 int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
117 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
118 value, index, buf, 1);
125 EXPORT_SYMBOL_GPL(tm6000_get_reg);
127 int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index)
132 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
133 value, index, buf, 2);
138 return buf[1]|buf[0]<<8;
141 int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index)
146 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
147 value, index, buf, 4);
152 return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
155 int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
159 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
165 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
171 void tm6000_set_fourcc_format(struct tm6000_core *dev)
173 if (dev->dev_type == TM6010) {
176 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0) & 0xfc;
177 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
178 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
180 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val | 1);
182 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
183 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
185 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
189 int tm6000_init_analog_mode(struct tm6000_core *dev)
191 struct v4l2_frequency f;
193 if (dev->dev_type == TM6010) {
197 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0);
199 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
200 val = tm6000_get_reg(dev,
201 TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0);
203 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, val);
206 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
207 tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
208 tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
209 tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
210 tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
211 tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
213 TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
215 TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
217 TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
219 TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
221 TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
223 TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
225 TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
227 TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
229 TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
231 TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
233 TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
235 TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
237 TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
239 TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
241 TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
243 TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
245 TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
247 TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
248 tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
249 tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
250 tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
251 tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
252 tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
253 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
257 tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00);
258 tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04);
259 tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00);
260 tm6000_set_reg(dev, TM6010_REQ08_R04_A_SIF_AMP_CTRL, 0xa0);
261 tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06);
262 tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, 0x00);
263 tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, 0x00);
264 tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08);
265 tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91);
266 tm6000_set_reg(dev, TM6010_REQ08_R0B_A_ASD_THRES1, 0x20);
267 tm6000_set_reg(dev, TM6010_REQ08_R0C_A_ASD_THRES2, 0x12);
268 tm6000_set_reg(dev, TM6010_REQ08_R0D_A_AMD_THRES, 0x20);
269 tm6000_set_reg(dev, TM6010_REQ08_R0E_A_MONO_THRES1, 0xf0);
270 tm6000_set_reg(dev, TM6010_REQ08_R0F_A_MONO_THRES2, 0x80);
271 tm6000_set_reg(dev, TM6010_REQ08_R10_A_MUTE_THRES1, 0xc0);
272 tm6000_set_reg(dev, TM6010_REQ08_R11_A_MUTE_THRES2, 0x80);
273 tm6000_set_reg(dev, TM6010_REQ08_R12_A_AGC_U, 0x12);
274 tm6000_set_reg(dev, TM6010_REQ08_R13_A_AGC_ERR_T, 0xfe);
275 tm6000_set_reg(dev, TM6010_REQ08_R14_A_AGC_GAIN_INIT, 0x20);
276 tm6000_set_reg(dev, TM6010_REQ08_R15_A_AGC_STEP_THR, 0x14);
277 tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe);
278 tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01);
279 tm6000_set_reg(dev, TM6010_REQ08_R18_A_TR_CTRL, 0xa0);
280 tm6000_set_reg(dev, TM6010_REQ08_R19_A_FH_2FH_GAIN, 0x32);
281 tm6000_set_reg(dev, TM6010_REQ08_R1A_A_NICAM_SER_MAX, 0x64);
282 tm6000_set_reg(dev, TM6010_REQ08_R1B_A_NICAM_SER_MIN, 0x20);
283 tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1c, 0x00);
284 tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1d, 0x00);
285 tm6000_set_reg(dev, TM6010_REQ08_R1E_A_GAIN_DEEMPH_OUT, 0x13);
286 tm6000_set_reg(dev, TM6010_REQ08_R1F_A_TEST_INTF_SEL, 0x00);
287 tm6000_set_reg(dev, TM6010_REQ08_R20_A_TEST_PIN_SEL, 0x00);
288 tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3);
289 tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x00);
290 tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80);
293 /* Enables soft reset */
294 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
297 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
298 else /* Enable Hfilter and disable TS Drop err */
299 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
301 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
302 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x23);
303 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
304 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
305 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
306 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x1f);
308 /* AP Software reset */
309 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
310 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
312 tm6000_set_fourcc_format(dev);
314 /* Disables soft reset */
315 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
317 /* E3: Select input 0 - TV tuner */
318 tm6000_set_reg(dev, TM6010_REQ07_RE3_OUT_SEL1, 0x00);
319 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
321 /* This controls input */
322 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0);
323 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01);
327 /* Tuner firmware can now be loaded */
330 * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
331 * for more than a few seconds. Not sure why, as this behavior does
332 * not happen on other devices with xc3028. So, I suspect that it
333 * is yet another bug at tm6000. After start sleeping, decoding
334 * doesn't start automatically. Instead, it requires some
335 * I2C commands to wake it up. As we want to have image at the
336 * beginning, we needed to add this hack. The better would be to
337 * discover some way to make tm6000 to wake up without this hack.
339 mutex_lock(&dev->lock);
340 f.frequency = dev->freq;
341 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
342 mutex_unlock(&dev->lock);
345 tm6000_set_standard(dev, &dev->norm);
346 tm6000_set_audio_bitrate(dev, 48000);
348 /* switch dvb led off */
349 if (dev->gpio.dvb_led) {
350 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
351 dev->gpio.dvb_led, 0x01);
357 int tm6000_init_digital_mode(struct tm6000_core *dev)
359 if (dev->dev_type == TM6010) {
364 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0);
366 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
367 val = tm6000_get_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0);
369 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, val);
370 tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
371 tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
372 tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
373 tm6000_set_reg(dev, TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe);
374 tm6000_read_write_usb(dev, 0xc0, 0x0e, 0x00c2, 0x0008, buf, 2);
375 printk(KERN_INFO"buf %#x %#x\n", buf[0], buf[1]);
377 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
378 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
379 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
380 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x08);
381 tm6000_set_reg(dev, TM6010_REQ07_RE2_OUT_SEL2, 0x0c);
382 tm6000_set_reg(dev, TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0xff);
383 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x00eb, 0xd8);
384 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
385 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
386 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
387 tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x37);
388 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
389 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
390 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
392 tm6000_set_reg(dev, TM6010_REQ07_RE2_OUT_SEL2, 0x0c);
393 tm6000_set_reg(dev, TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0xff);
394 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x00eb, 0x08);
397 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
399 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
401 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
405 /* switch dvb led on */
406 if (dev->gpio.dvb_led) {
407 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
408 dev->gpio.dvb_led, 0x00);
413 EXPORT_SYMBOL(tm6000_init_digital_mode);
421 /* The meaning of those initializations are unknown */
422 struct reg_init tm6000_init_tab[] = {
424 { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x1f },
425 { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
426 { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
427 { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
428 { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x23 },
429 { TM6010_REQ07_RD8_IR_WAKEUP_ADD, 0x08 },
430 { TM6010_REQ07_RE2_OUT_SEL2, 0x00 },
431 { TM6010_REQ07_RE3_OUT_SEL1, 0x10 },
432 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0x00 },
433 { TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0x00 },
434 { REQ_07_SET_GET_AVREG, 0xeb, 0x64 }, /* 48000 bits/sample, external input */
435 { REQ_07_SET_GET_AVREG, 0xee, 0xc2 },
436 { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
437 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
438 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
439 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
440 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
441 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
442 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
443 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
444 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
445 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
446 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
447 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
448 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
449 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
450 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
451 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
452 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
453 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
454 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
455 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
456 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
457 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
458 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
459 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
460 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
461 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
462 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
463 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
464 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
465 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
466 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
467 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
468 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
469 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
470 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
471 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
472 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
473 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
474 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
475 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
476 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
477 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
478 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
479 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
480 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
481 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
482 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
483 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
484 { TM6010_REQ07_RC3_HSTART1, 0x88 },
485 { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
486 { TM6010_REQ05_R18_IMASK7, 0x00 },
489 struct reg_init tm6010_init_tab[] = {
490 { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
491 { TM6010_REQ07_RC4_HSTART0, 0xa0 },
492 { TM6010_REQ07_RC6_HEND0, 0x40 },
493 { TM6010_REQ07_RCA_VEND0, 0x31 },
494 { TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0xe1 },
495 { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
496 { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
498 { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
499 { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
500 { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
501 { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
502 { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
503 { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
504 { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
505 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
506 { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
508 { TM6010_REQ07_R3F_RESET, 0x01 },
509 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
510 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
511 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
512 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
513 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
514 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
515 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
516 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
517 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
518 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
519 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
520 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
521 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
522 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
523 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
524 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
525 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
526 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
527 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
528 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
529 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
530 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
531 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
532 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
533 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
534 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
535 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
536 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
537 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
538 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
539 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
540 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
541 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
542 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
543 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
544 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
545 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
546 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
547 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
548 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
549 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
550 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
551 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
552 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
553 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
554 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
555 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
556 { TM6010_REQ07_RC3_HSTART1, 0x88 },
557 { TM6010_REQ07_R3F_RESET, 0x00 },
559 { TM6010_REQ05_R18_IMASK7, 0x00 },
561 { TM6010_REQ07_RD8_IR_LEADER1, 0xaa },
562 { TM6010_REQ07_RD8_IR_LEADER0, 0x30 },
563 { TM6010_REQ07_RD8_IR_PULSE_CNT1, 0x20 },
564 { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0xd0 },
565 { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
566 { TM6010_REQ07_RD8_IR, 0x2f },
568 /* set remote wakeup key:any key wakeup */
569 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
570 { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0xff },
573 int tm6000_init(struct tm6000_core *dev)
575 int board, rc = 0, i, size;
576 struct reg_init *tab;
578 if (dev->dev_type == TM6010) {
579 tab = tm6010_init_tab;
580 size = ARRAY_SIZE(tm6010_init_tab);
582 tab = tm6000_init_tab;
583 size = ARRAY_SIZE(tm6000_init_tab);
586 /* Load board's initialization table */
587 for (i = 0; i < size; i++) {
588 rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val);
590 printk(KERN_ERR "Error %i while setting req %d, "
591 "reg %d to value %d\n", rc,
592 tab[i].req, tab[i].reg, tab[i].val);
597 msleep(5); /* Just to be conservative */
599 /* Check board version - maybe 10Moons specific */
600 board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0);
602 printk(KERN_INFO "Board version = 0x%08x\n", board);
604 printk(KERN_ERR "Error %i while retrieving board version\n", board);
606 rc = tm6000_cards_setup(dev);
611 int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
615 if (dev->dev_type == TM6010) {
616 val = tm6000_get_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0);
619 val = (val & 0xf0) | 0x1; /* 48 kHz, not muted */
620 val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, val);
625 val = tm6000_get_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x0);
629 val &= 0x0f; /* Preserve the audio input control bits */
633 dev->audio_bitrate = bitrate;
637 dev->audio_bitrate = bitrate;
640 val = tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, val);
644 EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
646 static LIST_HEAD(tm6000_devlist);
647 static DEFINE_MUTEX(tm6000_devlist_mutex);
650 * tm6000_realease_resource()
653 void tm6000_remove_from_devlist(struct tm6000_core *dev)
655 mutex_lock(&tm6000_devlist_mutex);
656 list_del(&dev->devlist);
657 mutex_unlock(&tm6000_devlist_mutex);
660 void tm6000_add_into_devlist(struct tm6000_core *dev)
662 mutex_lock(&tm6000_devlist_mutex);
663 list_add_tail(&dev->devlist, &tm6000_devlist);
664 mutex_unlock(&tm6000_devlist_mutex);
668 * Extension interface
671 static LIST_HEAD(tm6000_extension_devlist);
672 static DEFINE_MUTEX(tm6000_extension_devlist_lock);
674 int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
677 struct tm6000_ops *ops = NULL;
679 /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
681 if (!list_empty(&tm6000_extension_devlist)) {
682 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
683 if (ops->fillbuf && ops->type == type)
684 ops->fillbuf(dev, buf, size);
691 int tm6000_register_extension(struct tm6000_ops *ops)
693 struct tm6000_core *dev = NULL;
695 mutex_lock(&tm6000_devlist_mutex);
696 mutex_lock(&tm6000_extension_devlist_lock);
697 list_add_tail(&ops->next, &tm6000_extension_devlist);
698 list_for_each_entry(dev, &tm6000_devlist, devlist) {
700 printk(KERN_INFO "%s: Initialized (%s) extension\n",
701 dev->name, ops->name);
703 mutex_unlock(&tm6000_extension_devlist_lock);
704 mutex_unlock(&tm6000_devlist_mutex);
707 EXPORT_SYMBOL(tm6000_register_extension);
709 void tm6000_unregister_extension(struct tm6000_ops *ops)
711 struct tm6000_core *dev = NULL;
713 mutex_lock(&tm6000_devlist_mutex);
714 list_for_each_entry(dev, &tm6000_devlist, devlist) {
719 mutex_lock(&tm6000_extension_devlist_lock);
720 printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
721 list_del(&ops->next);
722 mutex_unlock(&tm6000_extension_devlist_lock);
723 mutex_unlock(&tm6000_devlist_mutex);
725 EXPORT_SYMBOL(tm6000_unregister_extension);
727 void tm6000_init_extension(struct tm6000_core *dev)
729 struct tm6000_ops *ops = NULL;
731 mutex_lock(&tm6000_extension_devlist_lock);
732 if (!list_empty(&tm6000_extension_devlist)) {
733 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
738 mutex_unlock(&tm6000_extension_devlist_lock);
741 void tm6000_close_extension(struct tm6000_core *dev)
743 struct tm6000_ops *ops = NULL;
745 mutex_lock(&tm6000_extension_devlist_lock);
746 if (!list_empty(&tm6000_extension_devlist)) {
747 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
752 mutex_unlock(&tm6000_extension_devlist_lock);