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[net-next-2.6.git] / drivers / staging / rtl8187se / r8180_core.c
1 /*
2    This is part of rtl818x pci OpenSource driver - v 0.1
3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
4    Released under the terms of GPL (General Public License)
5
6    Parts of this driver are based on the GPL part of the official
7    Realtek driver.
8
9    Parts of this driver are based on the rtl8180 driver skeleton
10    from Patric Schenke & Andres Salomon.
11
12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16    RSSI calc function from 'The Deuce'
17
18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20    We (I?) want to thanks the Authors of those projecs and also the
21    Ndiswrapper's project Authors.
22
23    A big big thanks goes also to Realtek corp. for their help in my attempt to
24    add RTL8185 and RTL8225 support, and to David Young also.
25
26    Power management interface routines.
27    Written by Mariusz Matuszek.
28 */
29
30 #undef RX_DONT_PASS_UL
31 #undef DUMMY_RX
32
33 #include <linux/syscalls.h>
34
35 #include "r8180_hw.h"
36 #include "r8180.h"
37 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
38 #include "r8180_93cx6.h"   /* Card EEPROM */
39 #include "r8180_wx.h"
40 #include "r8180_dm.h"
41
42 #include "ieee80211/dot11d.h"
43
44 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
45         {
46                 .vendor = PCI_VENDOR_ID_REALTEK,
47                 .device = 0x8199,
48                 .subvendor = PCI_ANY_ID,
49                 .subdevice = PCI_ANY_ID,
50                 .driver_data = 0,
51         },
52         {
53                 .vendor = 0,
54                 .device = 0,
55                 .subvendor = 0,
56                 .subdevice = 0,
57                 .driver_data = 0,
58         }
59 };
60
61
62 static char* ifname = "wlan%d";
63 static int hwseqnum = 0;
64 static int hwwep = 0;
65 static int channels = 0x3fff;
66
67 #define eqMacAddr(a,b)          ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
68 #define cpMacAddr(des,src)            ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
69 MODULE_LICENSE("GPL");
70 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
71 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
72 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
73
74
75 module_param(ifname, charp, S_IRUGO|S_IWUSR );
76 module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
77 module_param(hwwep,int, S_IRUGO|S_IWUSR);
78 module_param(channels,int, S_IRUGO|S_IWUSR);
79
80 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
81 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
82 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
83 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
84
85
86 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
87                                        const struct pci_device_id *id);
88
89 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
90
91 static void rtl8180_shutdown (struct pci_dev *pdev)
92 {
93         struct net_device *dev = pci_get_drvdata(pdev);
94         if (dev->netdev_ops->ndo_stop)
95                 dev->netdev_ops->ndo_stop(dev);
96         pci_disable_device(pdev);
97 }
98
99 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
100 {
101         struct net_device *dev = pci_get_drvdata(pdev);
102
103         if (!netif_running(dev))
104                 goto out_pci_suspend;
105
106         if (dev->netdev_ops->ndo_stop)
107                 dev->netdev_ops->ndo_stop(dev);
108
109         netif_device_detach(dev);
110
111 out_pci_suspend:
112         pci_save_state(pdev);
113         pci_disable_device(pdev);
114         pci_set_power_state(pdev, pci_choose_state(pdev, state));
115         return 0;
116 }
117
118 static int rtl8180_resume(struct pci_dev *pdev)
119 {
120         struct net_device *dev = pci_get_drvdata(pdev);
121         int err;
122         u32 val;
123
124         pci_set_power_state(pdev, PCI_D0);
125
126         err = pci_enable_device(pdev);
127         if (err) {
128                 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
129                                 dev->name);
130
131                 return err;
132         }
133
134         pci_restore_state(pdev);
135
136         /*
137          * Suspend/Resume resets the PCI configuration space, so we have to
138          * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
139          * from interfering with C3 CPU state. pci_restore_state won't help
140          * here since it only restores the first 64 bytes pci config header.
141          */
142         pci_read_config_dword(pdev, 0x40, &val);
143         if ((val & 0x0000ff00) != 0)
144                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
145
146         if (!netif_running(dev))
147                 goto out;
148
149         if (dev->netdev_ops->ndo_open)
150                 dev->netdev_ops->ndo_open(dev);
151
152         netif_device_attach(dev);
153 out:
154         return 0;
155 }
156
157 static struct pci_driver rtl8180_pci_driver = {
158         .name           = RTL8180_MODULE_NAME,
159         .id_table       = rtl8180_pci_id_tbl,
160         .probe          = rtl8180_pci_probe,
161         .remove         = __devexit_p(rtl8180_pci_remove),
162         .suspend        = rtl8180_suspend,
163         .resume         = rtl8180_resume,
164         .shutdown       = rtl8180_shutdown,
165 };
166
167 u8 read_nic_byte(struct net_device *dev, int x)
168 {
169         return 0xff&readb((u8*)dev->mem_start +x);
170 }
171
172 u32 read_nic_dword(struct net_device *dev, int x)
173 {
174         return readl((u8*)dev->mem_start +x);
175 }
176
177 u16 read_nic_word(struct net_device *dev, int x)
178 {
179         return readw((u8*)dev->mem_start +x);
180 }
181
182 void write_nic_byte(struct net_device *dev, int x,u8 y)
183 {
184         writeb(y,(u8*)dev->mem_start +x);
185         udelay(20);
186 }
187
188 void write_nic_dword(struct net_device *dev, int x,u32 y)
189 {
190         writel(y,(u8*)dev->mem_start +x);
191         udelay(20);
192 }
193
194 void write_nic_word(struct net_device *dev, int x,u16 y)
195 {
196         writew(y,(u8*)dev->mem_start +x);
197         udelay(20);
198 }
199
200 inline void force_pci_posting(struct net_device *dev)
201 {
202         read_nic_byte(dev,EPROM_CMD);
203         mb();
204 }
205
206 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
207 void set_nic_rxring(struct net_device *dev);
208 void set_nic_txring(struct net_device *dev);
209 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
210 void rtl8180_commit(struct net_device *dev);
211 void rtl8180_start_tx_beacon(struct net_device *dev);
212
213 static struct proc_dir_entry *rtl8180_proc = NULL;
214
215 static int proc_get_registers(char *page, char **start,
216                           off_t offset, int count,
217                           int *eof, void *data)
218 {
219         struct net_device *dev = data;
220         int len = 0;
221         int i,n;
222         int max = 0xff;
223
224         /* This dump the current register page */
225         for (n = 0; n <= max;) {
226                 len += snprintf(page + len, count - len, "\nD:  %2x > ", n);
227
228                 for (i = 0; i < 16 && n <= max; i++, n++)
229                         len += snprintf(page + len, count - len, "%2x ",
230                                         read_nic_byte(dev, n));
231         }
232         len += snprintf(page + len, count - len,"\n");
233
234         *eof = 1;
235         return len;
236 }
237
238 int get_curr_tx_free_desc(struct net_device *dev, int priority);
239
240 static int proc_get_stats_hw(char *page, char **start,
241                           off_t offset, int count,
242                           int *eof, void *data)
243 {
244         int len = 0;
245
246         *eof = 1;
247         return len;
248 }
249
250 static int proc_get_stats_rx(char *page, char **start,
251                           off_t offset, int count,
252                           int *eof, void *data)
253 {
254         struct net_device *dev = data;
255         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
256
257         int len = 0;
258
259         len += snprintf(page + len, count - len,
260                 "RX OK: %lu\n"
261                 "RX Retry: %lu\n"
262                 "RX CRC Error(0-500): %lu\n"
263                 "RX CRC Error(500-1000): %lu\n"
264                 "RX CRC Error(>1000): %lu\n"
265                 "RX ICV Error: %lu\n",
266                 priv->stats.rxint,
267                 priv->stats.rxerr,
268                 priv->stats.rxcrcerrmin,
269                 priv->stats.rxcrcerrmid,
270                 priv->stats.rxcrcerrmax,
271                 priv->stats.rxicverr
272                 );
273
274         *eof = 1;
275         return len;
276 }
277
278 static int proc_get_stats_tx(char *page, char **start,
279                           off_t offset, int count,
280                           int *eof, void *data)
281 {
282         struct net_device *dev = data;
283         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
284
285         int len = 0;
286         unsigned long totalOK;
287
288         totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
289         len += snprintf(page + len, count - len,
290                 "TX OK: %lu\n"
291                 "TX Error: %lu\n"
292                 "TX Retry: %lu\n"
293                 "TX beacon OK: %lu\n"
294                 "TX beacon error: %lu\n",
295                 totalOK,
296                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
297                 priv->stats.txretry,
298                 priv->stats.txbeacon,
299                 priv->stats.txbeaconerr
300         );
301
302         *eof = 1;
303         return len;
304 }
305
306 void rtl8180_proc_module_init(void)
307 {
308         DMESG("Initializing proc filesystem");
309         rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
310 }
311
312 void rtl8180_proc_module_remove(void)
313 {
314         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
315 }
316
317 void rtl8180_proc_remove_one(struct net_device *dev)
318 {
319         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
320         if (priv->dir_dev) {
321                 remove_proc_entry("stats-hw", priv->dir_dev);
322                 remove_proc_entry("stats-tx", priv->dir_dev);
323                 remove_proc_entry("stats-rx", priv->dir_dev);
324                 remove_proc_entry("registers", priv->dir_dev);
325                 remove_proc_entry(dev->name, rtl8180_proc);
326                 priv->dir_dev = NULL;
327         }
328 }
329
330 void rtl8180_proc_init_one(struct net_device *dev)
331 {
332         struct proc_dir_entry *e;
333         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
334
335         priv->dir_dev = rtl8180_proc;
336         if (!priv->dir_dev) {
337                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
338                       dev->name);
339                 return;
340         }
341
342         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
343                                    priv->dir_dev, proc_get_stats_hw, dev);
344         if (!e) {
345                 DMESGE("Unable to initialize "
346                       "/proc/net/r8180/%s/stats-hw\n",
347                       dev->name);
348         }
349
350         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
351                                    priv->dir_dev, proc_get_stats_rx, dev);
352         if (!e) {
353                 DMESGE("Unable to initialize "
354                       "/proc/net/r8180/%s/stats-rx\n",
355                       dev->name);
356         }
357
358
359         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
360                                    priv->dir_dev, proc_get_stats_tx, dev);
361         if (!e) {
362                 DMESGE("Unable to initialize "
363                       "/proc/net/r8180/%s/stats-tx\n",
364                       dev->name);
365         }
366
367         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
368                                    priv->dir_dev, proc_get_registers, dev);
369         if (!e) {
370                 DMESGE("Unable to initialize "
371                       "/proc/net/r8180/%s/registers\n",
372                       dev->name);
373         }
374 }
375
376 /*
377   FIXME: check if we can use some standard already-existent
378   data type+functions in kernel
379 */
380
381 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
382                 struct buffer **bufferhead)
383 {
384         struct buffer *tmp;
385
386         if(! *buffer){
387
388                 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
389
390                 if (*buffer == NULL) {
391                         DMESGE("Failed to kmalloc head of TX/RX struct");
392                         return -1;
393                 }
394                 (*buffer)->next=*buffer;
395                 (*buffer)->buf=buf;
396                 (*buffer)->dma=dma;
397                 if(bufferhead !=NULL)
398                         (*bufferhead) = (*buffer);
399                 return 0;
400         }
401         tmp=*buffer;
402
403         while(tmp->next!=(*buffer)) tmp=tmp->next;
404         if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
405                 DMESGE("Failed to kmalloc TX/RX struct");
406                 return -1;
407         }
408         tmp->next->buf=buf;
409         tmp->next->dma=dma;
410         tmp->next->next=*buffer;
411
412         return 0;
413 }
414
415 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
416 consistent)
417 {
418
419         struct buffer *tmp,*next;
420         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
421         struct pci_dev *pdev=priv->pdev;
422
423         if (!*buffer)
424                 return;
425
426         tmp = *buffer;
427
428         do{
429                 next=tmp->next;
430                 if(consistent){
431                         pci_free_consistent(pdev,len,
432                                     tmp->buf,tmp->dma);
433                 }else{
434                         pci_unmap_single(pdev, tmp->dma,
435                         len,PCI_DMA_FROMDEVICE);
436                         kfree(tmp->buf);
437                 }
438                 kfree(tmp);
439                 tmp = next;
440         }
441         while(next != *buffer);
442
443         *buffer=NULL;
444 }
445
446 void print_buffer(u32 *buffer, int len)
447 {
448         int i;
449         u8 *buf =(u8*)buffer;
450
451         printk("ASCII BUFFER DUMP (len: %x):\n",len);
452
453         for(i=0;i<len;i++)
454                 printk("%c",buf[i]);
455
456         printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
457
458         for(i=0;i<len;i++)
459                 printk("%02x",buf[i]);
460
461         printk("\n");
462 }
463
464 int get_curr_tx_free_desc(struct net_device *dev, int priority)
465 {
466         struct r8180_priv *priv = ieee80211_priv(dev);
467         u32* tail;
468         u32* head;
469         int ret;
470
471         switch (priority){
472                 case MANAGE_PRIORITY:
473                         head = priv->txmapringhead;
474                         tail = priv->txmapringtail;
475                         break;
476                 case BK_PRIORITY:
477                         head = priv->txbkpringhead;
478                         tail = priv->txbkpringtail;
479                         break;
480                 case BE_PRIORITY:
481                         head = priv->txbepringhead;
482                         tail = priv->txbepringtail;
483                         break;
484                 case VI_PRIORITY:
485                         head = priv->txvipringhead;
486                         tail = priv->txvipringtail;
487                         break;
488                 case VO_PRIORITY:
489                         head = priv->txvopringhead;
490                         tail = priv->txvopringtail;
491                         break;
492                 case HI_PRIORITY:
493                         head = priv->txhpringhead;
494                         tail = priv->txhpringtail;
495                         break;
496                 default:
497                         return -1;
498         }
499
500         if (head <= tail)
501                 ret = priv->txringcount - (tail - head)/8;
502         else
503                 ret = (head - tail)/8;
504
505         if (ret > priv->txringcount)
506                 DMESG("BUG");
507
508         return ret;
509 }
510
511 short check_nic_enought_desc(struct net_device *dev, int priority)
512 {
513         struct r8180_priv *priv = ieee80211_priv(dev);
514         struct ieee80211_device *ieee = netdev_priv(dev);
515         int requiredbyte, required;
516
517         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
518
519         if (ieee->current_network.QoS_Enable)
520                 requiredbyte += 2;
521
522         required = requiredbyte / (priv->txbuffsize-4);
523
524         if (requiredbyte % priv->txbuffsize)
525                 required++;
526
527         /* for now we keep two free descriptor as a safety boundary
528          * between the tail and the head
529          */
530
531         return (required+2 < get_curr_tx_free_desc(dev,priority));
532 }
533
534 void fix_tx_fifo(struct net_device *dev)
535 {
536         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
537         u32 *tmp;
538         int i;
539
540         for (tmp=priv->txmapring, i=0;
541              i < priv->txringcount;
542              tmp+=8, i++){
543                 *tmp = *tmp &~ (1<<31);
544         }
545
546         for (tmp=priv->txbkpring, i=0;
547              i < priv->txringcount;
548              tmp+=8, i++) {
549                 *tmp = *tmp &~ (1<<31);
550         }
551
552         for (tmp=priv->txbepring, i=0;
553              i < priv->txringcount;
554              tmp+=8, i++){
555                 *tmp = *tmp &~ (1<<31);
556         }
557         for (tmp=priv->txvipring, i=0;
558              i < priv->txringcount;
559              tmp+=8, i++) {
560                 *tmp = *tmp &~ (1<<31);
561         }
562
563         for (tmp=priv->txvopring, i=0;
564              i < priv->txringcount;
565              tmp+=8, i++){
566                 *tmp = *tmp &~ (1<<31);
567         }
568
569         for (tmp=priv->txhpring, i=0;
570              i < priv->txringcount;
571              tmp+=8,i++){
572                 *tmp = *tmp &~ (1<<31);
573         }
574
575         for (tmp=priv->txbeaconring, i=0;
576              i < priv->txbeaconcount;
577              tmp+=8, i++){
578                 *tmp = *tmp &~ (1<<31);
579         }
580
581         priv->txmapringtail = priv->txmapring;
582         priv->txmapringhead = priv->txmapring;
583         priv->txmapbufstail = priv->txmapbufs;
584
585         priv->txbkpringtail = priv->txbkpring;
586         priv->txbkpringhead = priv->txbkpring;
587         priv->txbkpbufstail = priv->txbkpbufs;
588
589         priv->txbepringtail = priv->txbepring;
590         priv->txbepringhead = priv->txbepring;
591         priv->txbepbufstail = priv->txbepbufs;
592
593         priv->txvipringtail = priv->txvipring;
594         priv->txvipringhead = priv->txvipring;
595         priv->txvipbufstail = priv->txvipbufs;
596
597         priv->txvopringtail = priv->txvopring;
598         priv->txvopringhead = priv->txvopring;
599         priv->txvopbufstail = priv->txvopbufs;
600
601         priv->txhpringtail = priv->txhpring;
602         priv->txhpringhead = priv->txhpring;
603         priv->txhpbufstail = priv->txhpbufs;
604
605         priv->txbeaconringtail = priv->txbeaconring;
606         priv->txbeaconbufstail = priv->txbeaconbufs;
607         set_nic_txring(dev);
608
609         ieee80211_reset_queue(priv->ieee80211);
610         priv->ack_tx_to_ieee = 0;
611 }
612
613 void fix_rx_fifo(struct net_device *dev)
614 {
615         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
616         u32 *tmp;
617         struct buffer *rxbuf;
618         u8 rx_desc_size;
619
620         rx_desc_size = 8; // 4*8 = 32 bytes
621
622         for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
623              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
624              tmp+=rx_desc_size,rxbuf=rxbuf->next){
625                 *(tmp+2) = rxbuf->dma;
626                 *tmp=*tmp &~ 0xfff;
627                 *tmp=*tmp | priv->rxbuffersize;
628                 *tmp |= (1<<31);
629         }
630
631         priv->rxringtail=priv->rxring;
632         priv->rxbuffer=priv->rxbufferhead;
633         priv->rx_skb_complete=1;
634         set_nic_rxring(dev);
635 }
636
637 unsigned char QUALITY_MAP[] = {
638         0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
639         0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
640         0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
641         0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
642         0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
643         0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
644         0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
645         0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
646         0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
647         0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
648 };
649
650 unsigned char STRENGTH_MAP[] = {
651         0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
652         0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
653         0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
654         0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
655         0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
656         0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
657         0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
658         0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
659         0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
660         0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
661 };
662
663 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
664 {
665         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
666         u32 temp;
667         u32 temp2;
668         u32 temp3;
669         u32 lsb;
670         u32 q;
671         u32 orig_qual;
672         u8  _rssi;
673
674         q = *qual;
675         orig_qual = *qual;
676         _rssi = 0; // avoid gcc complains..
677
678         if (q <= 0x4e) {
679                 temp = QUALITY_MAP[q];
680         } else {
681                 if( q & 0x80 ) {
682                         temp = 0x32;
683                 } else {
684                         temp = 1;
685                 }
686         }
687
688         *qual = temp;
689         temp2 = *rssi;
690
691         switch(priv->rf_chip){
692         case RFCHIPID_RFMD:
693                 lsb = temp2 & 1;
694                 temp2 &= 0x7e;
695                 if ( !lsb || !(temp2 <= 0x3c) ) {
696                         temp2 = 0x64;
697                 } else {
698                         temp2 = 100 * temp2 / 0x3c;
699                 }
700                 *rssi = temp2 & 0xff;
701                 _rssi = temp2 & 0xff;
702                 break;
703         case RFCHIPID_INTERSIL:
704                 lsb = temp2;
705                 temp2 &= 0xfffffffe;
706                 temp2 *= 251;
707                 temp3 = temp2;
708                 temp2 <<= 6;
709                 temp3 += temp2;
710                 temp3 <<= 1;
711                 temp2 = 0x4950df;
712                 temp2 -= temp3;
713                 lsb &= 1;
714                 if ( temp2 <= 0x3e0000 ) {
715                         if ( temp2 < 0xffef0000 )
716                                 temp2 = 0xffef0000;
717                 } else {
718                         temp2 = 0x3e0000;
719                 }
720                 if ( !lsb ) {
721                         temp2 -= 0xf0000;
722                 } else {
723                         temp2 += 0xf0000;
724                 }
725
726                 temp3 = 0x4d0000;
727                 temp3 -= temp2;
728                 temp3 *= 100;
729                 temp3 = temp3 / 0x6d;
730                 temp3 >>= 0x10;
731                 _rssi = temp3 & 0xff;
732                 *rssi = temp3 & 0xff;
733                 break;
734         case RFCHIPID_GCT:
735                 lsb = temp2 & 1;
736                 temp2 &= 0x7e;
737                 if ( ! lsb || !(temp2 <= 0x3c) ){
738                         temp2 = 0x64;
739                 } else {
740                         temp2 = (100 * temp2) / 0x3c;
741                 }
742                 *rssi = temp2 & 0xff;
743                 _rssi = temp2 & 0xff;
744                 break;
745         case RFCHIPID_PHILIPS:
746                 if( orig_qual <= 0x4e ){
747                         _rssi = STRENGTH_MAP[orig_qual];
748                         *rssi = _rssi;
749                 } else {
750                         orig_qual -= 0x80;
751                         if ( !orig_qual ){
752                                 _rssi = 1;
753                                 *rssi = 1;
754                         } else {
755                                 _rssi = 0x32;
756                                 *rssi = 0x32;
757                         }
758                 }
759                 break;
760         case RFCHIPID_MAXIM:
761                 lsb = temp2 & 1;
762                 temp2 &= 0x7e;
763                 temp2 >>= 1;
764                 temp2 += 0x42;
765                 if( lsb != 0 ){
766                         temp2 += 0xa;
767                 }
768                 *rssi = temp2 & 0xff;
769                 _rssi = temp2 & 0xff;
770                 break;
771         }
772
773         if ( _rssi < 0x64 ){
774                 if ( _rssi == 0 ) {
775                         *rssi = 1;
776                 }
777         } else {
778                 *rssi = 0x64;
779         }
780
781         return;
782 }
783
784 void rtl8180_irq_enable(struct net_device *dev)
785 {
786         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
787
788         priv->irq_enabled = 1;
789         write_nic_word(dev,INTA_MASK, priv->irq_mask);
790 }
791
792 void rtl8180_irq_disable(struct net_device *dev)
793 {
794         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
795
796         write_nic_dword(dev,IMR,0);
797         force_pci_posting(dev);
798         priv->irq_enabled = 0;
799 }
800
801 void rtl8180_set_mode(struct net_device *dev,int mode)
802 {
803         u8 ecmd;
804
805         ecmd=read_nic_byte(dev, EPROM_CMD);
806         ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
807         ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
808         ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
809         ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
810         write_nic_byte(dev, EPROM_CMD, ecmd);
811 }
812
813 void rtl8180_adapter_start(struct net_device *dev);
814 void rtl8180_beacon_tx_enable(struct net_device *dev);
815
816 void rtl8180_update_msr(struct net_device *dev)
817 {
818         struct r8180_priv *priv = ieee80211_priv(dev);
819         u8 msr;
820         u32 rxconf;
821
822         msr  = read_nic_byte(dev, MSR);
823         msr &= ~ MSR_LINK_MASK;
824
825         rxconf=read_nic_dword(dev,RX_CONF);
826
827         if(priv->ieee80211->state == IEEE80211_LINKED)
828         {
829                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
830                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
831                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
832                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
833                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
834                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
835                 else
836                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
837                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
838
839         }else {
840                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
841                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
842         }
843
844         write_nic_byte(dev, MSR, msr);
845         write_nic_dword(dev, RX_CONF, rxconf);
846 }
847
848 void rtl8180_set_chan(struct net_device *dev,short ch)
849 {
850         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
851
852         if ((ch > 14) || (ch < 1)) {
853                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
854                 return;
855         }
856
857         priv->chan=ch;
858         priv->rf_set_chan(dev,priv->chan);
859 }
860
861 void rtl8180_rx_enable(struct net_device *dev)
862 {
863         u8 cmd;
864         u32 rxconf;
865         /* for now we accept data, management & ctl frame*/
866         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
867
868         rxconf=read_nic_dword(dev,RX_CONF);
869         rxconf = rxconf &~ MAC_FILTER_MASK;
870         rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
871         rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
872         rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
873         rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
874         if (dev->flags & IFF_PROMISC)
875                 DMESG("NIC in promisc mode");
876
877         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
878            dev->flags & IFF_PROMISC){
879                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
880         }else{
881                 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
882         }
883
884         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
885                 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
886                 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
887                 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
888         }
889
890         if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
891                 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
892
893         rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK;
894         rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT);
895
896         rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
897         rxconf = rxconf &~ MAX_RX_DMA_MASK;
898         rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
899
900         rxconf = rxconf | RCR_ONLYERLPKT;
901
902         rxconf = rxconf &~ RCR_CS_MASK;
903
904         write_nic_dword(dev, RX_CONF, rxconf);
905
906         fix_rx_fifo(dev);
907
908         cmd=read_nic_byte(dev,CMD);
909         write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
910 }
911
912 void set_nic_txring(struct net_device *dev)
913 {
914         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
915
916         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
917         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
918         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
919         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
920         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
921         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
922         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
923 }
924
925 void rtl8180_conttx_enable(struct net_device *dev)
926 {
927         u32 txconf;
928
929         txconf = read_nic_dword(dev,TX_CONF);
930         txconf = txconf &~ TX_LOOPBACK_MASK;
931         txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
932         write_nic_dword(dev,TX_CONF,txconf);
933 }
934
935 void rtl8180_conttx_disable(struct net_device *dev)
936 {
937         u32 txconf;
938
939         txconf = read_nic_dword(dev,TX_CONF);
940         txconf = txconf &~ TX_LOOPBACK_MASK;
941         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
942         write_nic_dword(dev,TX_CONF,txconf);
943 }
944
945 void rtl8180_tx_enable(struct net_device *dev)
946 {
947         u8 cmd;
948         u8 tx_agc_ctl;
949         u8 byte;
950         u32 txconf;
951         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
952
953         txconf = read_nic_dword(dev, TX_CONF);
954
955         byte = read_nic_byte(dev, CW_CONF);
956         byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
957         byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
958         write_nic_byte(dev, CW_CONF, byte);
959
960         tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
961         tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
962         tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
963         tx_agc_ctl |= (1<<TX_AGC_CTL_FEEDBACK_ANT);
964         write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
965         write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
966
967         txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
968
969         txconf = txconf &~ TX_LOOPBACK_MASK;
970         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
971         txconf = txconf &~ TCR_DPRETRY_MASK;
972         txconf = txconf &~ TCR_RTSRETRY_MASK;
973         txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
974         txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
975         txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
976
977         if (priv->hw_plcp_len)
978                 txconf = txconf & ~TCR_PLCP_LEN;
979         else
980                 txconf = txconf | TCR_PLCP_LEN;
981
982         txconf = txconf &~ TCR_MXDMA_MASK;
983         txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
984         txconf = txconf | TCR_CWMIN;
985         txconf = txconf | TCR_DISCW;
986
987         txconf = txconf | (1 << TX_NOICV_SHIFT);
988
989         write_nic_dword(dev,TX_CONF,txconf);
990
991         fix_tx_fifo(dev);
992
993         cmd=read_nic_byte(dev,CMD);
994         write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
995
996         write_nic_dword(dev,TX_CONF,txconf);
997 }
998
999 void rtl8180_beacon_tx_enable(struct net_device *dev)
1000 {
1001         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1002
1003         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1004         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1005         write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1006         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1007 }
1008
1009 void rtl8180_beacon_tx_disable(struct net_device *dev)
1010 {
1011         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1012
1013         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1014         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1015         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1016         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1017
1018 }
1019
1020 void rtl8180_rtx_disable(struct net_device *dev)
1021 {
1022         u8 cmd;
1023         struct r8180_priv *priv = ieee80211_priv(dev);
1024
1025         cmd=read_nic_byte(dev,CMD);
1026         write_nic_byte(dev, CMD, cmd &~ \
1027                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1028         force_pci_posting(dev);
1029         mdelay(10);
1030
1031         if(!priv->rx_skb_complete)
1032                 dev_kfree_skb_any(priv->rx_skb);
1033 }
1034
1035 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1036                          int addr)
1037 {
1038         int i;
1039         u32 *desc;
1040         u32 *tmp;
1041         dma_addr_t dma_desc, dma_tmp;
1042         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1043         struct pci_dev *pdev = priv->pdev;
1044         void *buf;
1045
1046         if((bufsize & 0xfff) != bufsize) {
1047                 DMESGE ("TX buffer allocation too large");
1048                 return 0;
1049         }
1050         desc = (u32*)pci_alloc_consistent(pdev,
1051                                           sizeof(u32)*8*count+256, &dma_desc);
1052         if (desc == NULL)
1053                 return -1;
1054
1055         if (dma_desc & 0xff)
1056                 /*
1057                  * descriptor's buffer must be 256 byte aligned
1058                  * we shouldn't be here, since we set DMA mask !
1059                  */
1060                 WARN(1, "DMA buffer is not aligned\n");
1061
1062         tmp = desc;
1063
1064         for (i = 0; i < count; i++) {
1065                 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
1066                 if (buf == NULL)
1067                         return -ENOMEM;
1068
1069                 switch(addr) {
1070                 case TX_MANAGEPRIORITY_RING_ADDR:
1071                         if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1072                                 DMESGE("Unable to allocate mem for buffer NP");
1073                                 return -ENOMEM;
1074                         }
1075                         break;
1076                 case TX_BKPRIORITY_RING_ADDR:
1077                         if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1078                                 DMESGE("Unable to allocate mem for buffer LP");
1079                                 return -ENOMEM;
1080                         }
1081                         break;
1082                 case TX_BEPRIORITY_RING_ADDR:
1083                         if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1084                                 DMESGE("Unable to allocate mem for buffer NP");
1085                                 return -ENOMEM;
1086                         }
1087                         break;
1088                 case TX_VIPRIORITY_RING_ADDR:
1089                         if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1090                                 DMESGE("Unable to allocate mem for buffer LP");
1091                                 return -ENOMEM;
1092                         }
1093                         break;
1094                 case TX_VOPRIORITY_RING_ADDR:
1095                         if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1096                                 DMESGE("Unable to allocate mem for buffer NP");
1097                                 return -ENOMEM;
1098                         }
1099                         break;
1100                 case TX_HIGHPRIORITY_RING_ADDR:
1101                         if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1102                                 DMESGE("Unable to allocate mem for buffer HP");
1103                                 return -ENOMEM;
1104                         }
1105                         break;
1106                 case TX_BEACON_RING_ADDR:
1107                         if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1108                         DMESGE("Unable to allocate mem for buffer BP");
1109                                 return -ENOMEM;
1110                         }
1111                         break;
1112                 }
1113                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1114                 *(tmp+2) = (u32)dma_tmp;
1115                 *(tmp+3) = bufsize;
1116
1117                 if(i+1<count)
1118                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1119                 else
1120                         *(tmp+4) = (u32)dma_desc;
1121
1122                 tmp=tmp+8;
1123         }
1124
1125         switch(addr) {
1126         case TX_MANAGEPRIORITY_RING_ADDR:
1127                 priv->txmapringdma=dma_desc;
1128                 priv->txmapring=desc;
1129                 break;
1130         case TX_BKPRIORITY_RING_ADDR:
1131                 priv->txbkpringdma=dma_desc;
1132                 priv->txbkpring=desc;
1133                 break;
1134         case TX_BEPRIORITY_RING_ADDR:
1135                 priv->txbepringdma=dma_desc;
1136                 priv->txbepring=desc;
1137                 break;
1138         case TX_VIPRIORITY_RING_ADDR:
1139                 priv->txvipringdma=dma_desc;
1140                 priv->txvipring=desc;
1141                 break;
1142         case TX_VOPRIORITY_RING_ADDR:
1143                 priv->txvopringdma=dma_desc;
1144                 priv->txvopring=desc;
1145                 break;
1146         case TX_HIGHPRIORITY_RING_ADDR:
1147                 priv->txhpringdma=dma_desc;
1148                 priv->txhpring=desc;
1149                 break;
1150         case TX_BEACON_RING_ADDR:
1151                 priv->txbeaconringdma=dma_desc;
1152                 priv->txbeaconring=desc;
1153                 break;
1154
1155         }
1156
1157         return 0;
1158 }
1159
1160 void free_tx_desc_rings(struct net_device *dev)
1161 {
1162         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1163         struct pci_dev *pdev=priv->pdev;
1164         int count = priv->txringcount;
1165
1166         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1167                             priv->txmapring, priv->txmapringdma);
1168         buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1169
1170         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1171                             priv->txbkpring, priv->txbkpringdma);
1172         buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1173
1174         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1175                             priv->txbepring, priv->txbepringdma);
1176         buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1177
1178         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1179                             priv->txvipring, priv->txvipringdma);
1180         buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1181
1182         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1183                             priv->txvopring, priv->txvopringdma);
1184         buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1185
1186         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1187                             priv->txhpring, priv->txhpringdma);
1188         buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1189
1190         count = priv->txbeaconcount;
1191         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1192                             priv->txbeaconring, priv->txbeaconringdma);
1193         buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1194 }
1195
1196 void free_rx_desc_ring(struct net_device *dev)
1197 {
1198         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1199         struct pci_dev *pdev = priv->pdev;
1200         int count = priv->rxringcount;
1201
1202         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1203                             priv->rxring, priv->rxringdma);
1204
1205         buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1206 }
1207
1208 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1209 {
1210         int i;
1211         u32 *desc;
1212         u32 *tmp;
1213         dma_addr_t dma_desc,dma_tmp;
1214         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1215         struct pci_dev *pdev=priv->pdev;
1216         void *buf;
1217         u8 rx_desc_size;
1218
1219         rx_desc_size = 8; // 4*8 = 32 bytes
1220
1221         if((bufsize & 0xfff) != bufsize){
1222                 DMESGE ("RX buffer allocation too large");
1223                 return -1;
1224         }
1225
1226         desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1227                                           &dma_desc);
1228
1229         if (dma_desc & 0xff)
1230                 /*
1231                  * descriptor's buffer must be 256 byte aligned
1232                  * should never happen since we specify the DMA mask
1233                  */
1234                 WARN(1, "DMA buffer is not aligned\n");
1235
1236         priv->rxring=desc;
1237         priv->rxringdma=dma_desc;
1238         tmp=desc;
1239
1240         for (i = 0; i < count; i++) {
1241                 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
1242                         DMESGE("Failed to kmalloc RX buffer");
1243                         return -1;
1244                 }
1245
1246                 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
1247                                          PCI_DMA_FROMDEVICE);
1248
1249                 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
1250                            &(priv->rxbufferhead))){
1251                            DMESGE("Unable to allocate mem RX buf");
1252                            return -1;
1253                 }
1254                 *tmp = 0; //zero pads the header of the descriptor
1255                 *tmp = *tmp |( bufsize&0xfff);
1256                 *(tmp+2) = (u32)dma_tmp;
1257                 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
1258
1259                 tmp=tmp+rx_desc_size;
1260         }
1261
1262         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
1263
1264         return 0;
1265 }
1266
1267
1268 void set_nic_rxring(struct net_device *dev)
1269 {
1270         u8 pgreg;
1271         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1272
1273         pgreg=read_nic_byte(dev, PGSELECT);
1274         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
1275
1276         write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
1277 }
1278
1279 void rtl8180_reset(struct net_device *dev)
1280 {
1281         u8 cr;
1282
1283         rtl8180_irq_disable(dev);
1284
1285         cr=read_nic_byte(dev,CMD);
1286         cr = cr & 2;
1287         cr = cr | (1<<CMD_RST_SHIFT);
1288         write_nic_byte(dev,CMD,cr);
1289
1290         force_pci_posting(dev);
1291
1292         mdelay(200);
1293
1294         if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
1295                 DMESGW("Card reset timeout!");
1296         else
1297                 DMESG("Card successfully reset");
1298
1299         rtl8180_set_mode(dev,EPROM_CMD_LOAD);
1300         force_pci_posting(dev);
1301         mdelay(200);
1302 }
1303
1304 inline u16 ieeerate2rtlrate(int rate)
1305 {
1306         switch(rate){
1307         case 10:
1308                 return 0;
1309         case 20:
1310                 return 1;
1311         case 55:
1312                 return 2;
1313         case 110:
1314                 return 3;
1315         case 60:
1316                 return 4;
1317         case 90:
1318                 return 5;
1319         case 120:
1320                 return 6;
1321         case 180:
1322                 return 7;
1323         case 240:
1324                 return 8;
1325         case 360:
1326                 return 9;
1327         case 480:
1328                 return 10;
1329         case 540:
1330                 return 11;
1331         default:
1332                 return 3;
1333         }
1334 }
1335
1336 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
1337
1338 inline u16 rtl8180_rate2rate(short rate)
1339 {
1340         if (rate > 12)
1341                 return 10;
1342         return rtl_rate[rate];
1343 }
1344
1345 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1346 {
1347         if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1348                 return 1;
1349         else
1350                 return 0;
1351 }
1352
1353 u16 N_DBPSOfRate(u16 DataRate);
1354
1355 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1356                   u8 bShortPreamble)
1357 {
1358         u16     FrameTime;
1359         u16     N_DBPS;
1360         u16     Ceiling;
1361
1362         if (rtl8180_IsWirelessBMode(DataRate)) {
1363                 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1364                         /* long preamble */
1365                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1366                 else
1367                         /* short preamble */
1368                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1369
1370                 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1371                         FrameTime++;
1372         } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
1373                 N_DBPS = N_DBPSOfRate(DataRate);
1374                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1375                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1376                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1377         }
1378         return FrameTime;
1379 }
1380
1381 u16 N_DBPSOfRate(u16 DataRate)
1382 {
1383          u16 N_DBPS = 24;
1384
1385         switch (DataRate) {
1386         case 60:
1387                 N_DBPS = 24;
1388                 break;
1389         case 90:
1390                 N_DBPS = 36;
1391                 break;
1392         case 120:
1393                 N_DBPS = 48;
1394                 break;
1395         case 180:
1396                 N_DBPS = 72;
1397                 break;
1398         case 240:
1399                 N_DBPS = 96;
1400                 break;
1401         case 360:
1402                 N_DBPS = 144;
1403                 break;
1404         case 480:
1405                 N_DBPS = 192;
1406                 break;
1407         case 540:
1408                 N_DBPS = 216;
1409                 break;
1410         default:
1411                 break;
1412         }
1413
1414         return N_DBPS;
1415 }
1416
1417 //
1418 //      Description:
1419 //      For Netgear case, they want good-looking singal strength.
1420 //
1421 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1422 {
1423         long RetSS;
1424
1425         // Step 1. Scale mapping.
1426         if (CurrSS >= 71 && CurrSS <= 100)
1427                 RetSS = 90 + ((CurrSS - 70) / 3);
1428         else if (CurrSS >= 41 && CurrSS <= 70)
1429                 RetSS = 78 + ((CurrSS - 40) / 3);
1430         else if (CurrSS >= 31 && CurrSS <= 40)
1431                 RetSS = 66 + (CurrSS - 30);
1432         else if (CurrSS >= 21 && CurrSS <= 30)
1433                 RetSS = 54 + (CurrSS - 20);
1434         else if (CurrSS >= 5 && CurrSS <= 20)
1435                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1436         else if (CurrSS == 4)
1437                 RetSS = 36;
1438         else if (CurrSS == 3)
1439                 RetSS = 27;
1440         else if (CurrSS == 2)
1441                 RetSS = 18;
1442         else if (CurrSS == 1)
1443                 RetSS = 9;
1444         else
1445                 RetSS = CurrSS;
1446
1447         // Step 2. Smoothing.
1448         if(LastSS > 0)
1449                 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
1450
1451         return RetSS;
1452 }
1453
1454 //
1455 //      Description:
1456 //              Translate 0-100 signal strength index into dBm.
1457 //
1458 long TranslateToDbm8185(u8 SignalStrengthIndex)
1459 {
1460         long SignalPower;
1461
1462         // Translate to dBm (x=0.5y-95).
1463         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1464         SignalPower -= 95;
1465
1466         return SignalPower;
1467 }
1468
1469 //
1470 //      Description:
1471 //              Perform signal smoothing for dynamic mechanism.
1472 //              This is different with PerformSignalSmoothing8185 in smoothing fomula.
1473 //              No dramatic adjustion is apply because dynamic mechanism need some degree
1474 //              of correctness. Ported from 8187B.
1475 //
1476 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1477                                            bool bCckRate)
1478 {
1479         // Determin the current packet is CCK rate.
1480         priv->bCurCCKPkt = bCckRate;
1481
1482         if (priv->UndecoratedSmoothedSS >= 0)
1483                 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
1484         else
1485                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1486
1487         priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
1488
1489         if (bCckRate)
1490                 priv->CurCCKRSSI = priv->RSSI;
1491         else
1492                 priv->CurCCKRSSI = 0;
1493 }
1494
1495
1496 /* This is rough RX isr handling routine*/
1497 void rtl8180_rx(struct net_device *dev)
1498 {
1499         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1500         struct sk_buff *tmp_skb;
1501         short first,last;
1502         u32 len;
1503         int lastlen;
1504         unsigned char quality, signal;
1505         u8 rate;
1506         u32 *tmp,*tmp2;
1507         u8 rx_desc_size;
1508         u8 padding;
1509         char rxpower = 0;
1510         u32 RXAGC = 0;
1511         long RxAGC_dBm = 0;
1512         u8      LNA=0, BB=0;
1513         u8      LNA_gain[4]={02, 17, 29, 39};
1514         u8  Antenna = 0;
1515         struct ieee80211_hdr_4addr *hdr;
1516         u16 fc,type;
1517         u8 bHwError = 0,bCRC = 0,bICV = 0;
1518         bool    bCckRate = false;
1519         u8     RSSI = 0;
1520         long    SignalStrengthIndex = 0;
1521         struct ieee80211_rx_stats stats = {
1522                 .signal = 0,
1523                 .noise = -98,
1524                 .rate = 0,
1525                 .freq = IEEE80211_24GHZ_BAND,
1526         };
1527
1528         stats.nic_type = NIC_8185B;
1529         rx_desc_size = 8;
1530
1531         if ((*(priv->rxringtail)) & (1<<31)) {
1532                 /* we have got an RX int, but the descriptor
1533                  * we are pointing is empty*/
1534
1535                 priv->stats.rxnodata++;
1536                 priv->ieee80211->stats.rx_errors++;
1537
1538                 tmp2 = NULL;
1539                 tmp = priv->rxringtail;
1540                 do{
1541                         if(tmp == priv->rxring)
1542                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1543                         else
1544                                 tmp -= rx_desc_size;
1545
1546                         if(! (*tmp & (1<<31)))
1547                                 tmp2 = tmp;
1548                 }while(tmp != priv->rxring);
1549
1550                 if(tmp2) priv->rxringtail = tmp2;
1551         }
1552
1553         /* while there are filled descriptors */
1554         while(!(*(priv->rxringtail) & (1<<31))){
1555                 if(*(priv->rxringtail) & (1<<26))
1556                         DMESGW("RX buffer overflow");
1557                 if(*(priv->rxringtail) & (1<<12))
1558                         priv->stats.rxicverr++;
1559
1560                 if(*(priv->rxringtail) & (1<<27)){
1561                         priv->stats.rxdmafail++;
1562                         //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
1563                         goto drop;
1564                 }
1565
1566                 pci_dma_sync_single_for_cpu(priv->pdev,
1567                                     priv->rxbuffer->dma,
1568                                     priv->rxbuffersize * \
1569                                     sizeof(u8),
1570                                     PCI_DMA_FROMDEVICE);
1571
1572                 first = *(priv->rxringtail) & (1<<29) ? 1:0;
1573                 if(first) priv->rx_prevlen=0;
1574
1575                 last = *(priv->rxringtail) & (1<<28) ? 1:0;
1576                 if(last){
1577                         lastlen=((*priv->rxringtail) &0xfff);
1578
1579                         /* if the last descriptor (that should
1580                          * tell us the total packet len) tell
1581                          * us something less than the descriptors
1582                          * len we had until now, then there is some
1583                          * problem..
1584                          * workaround to prevent kernel panic
1585                          */
1586                         if(lastlen < priv->rx_prevlen)
1587                                 len=0;
1588                         else
1589                                 len=lastlen-priv->rx_prevlen;
1590
1591                         if(*(priv->rxringtail) & (1<<13)) {
1592                                 if ((*(priv->rxringtail) & 0xfff) <500)
1593                                         priv->stats.rxcrcerrmin++;
1594                                 else if ((*(priv->rxringtail) & 0x0fff) >1000)
1595                                         priv->stats.rxcrcerrmax++;
1596                                 else
1597                                         priv->stats.rxcrcerrmid++;
1598
1599                         }
1600
1601                 }else{
1602                         len = priv->rxbuffersize;
1603                 }
1604
1605                 if(first && last) {
1606                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1607                 }else if(first) {
1608                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1609                         if(padding) {
1610                                 len -= 2;
1611                         }
1612                 }else {
1613                         padding = 0;
1614                 }
1615                padding = 0;
1616                 priv->rx_prevlen+=len;
1617
1618                 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
1619                         /* HW is probably passing several buggy frames
1620                         * without FD or LD flag set.
1621                         * Throw this garbage away to prevent skb
1622                         * memory exausting
1623                         */
1624                         if(!priv->rx_skb_complete)
1625                                 dev_kfree_skb_any(priv->rx_skb);
1626                         priv->rx_skb_complete = 1;
1627                 }
1628
1629                 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
1630                 signal = (signal & 0xfe) >> 1;
1631
1632                 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
1633
1634                 stats.mac_time[0] = *(priv->rxringtail+1);
1635                 stats.mac_time[1] = *(priv->rxringtail+2);
1636                 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
1637                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
1638
1639                 rate=((*(priv->rxringtail)) &
1640                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1641
1642                 stats.rate = rtl8180_rate2rate(rate);
1643                 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
1644                 if(!rtl8180_IsWirelessBMode(stats.rate))
1645                 { // OFDM rate.
1646
1647                         RxAGC_dBm = rxpower+1;  //bias
1648                 }
1649                 else
1650                 { // CCK rate.
1651                         RxAGC_dBm = signal;//bit 0 discard
1652
1653                         LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
1654                         BB  = (u8) (RxAGC_dBm & 0x1F);  // bit 4 ~ bit 0
1655
1656                         RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
1657
1658                         RxAGC_dBm +=4; //bias
1659                 }
1660
1661                 if(RxAGC_dBm & 0x80) //absolute value
1662                         RXAGC= ~(RxAGC_dBm)+1;
1663                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1664                 // Translate RXAGC into 1-100.
1665                 if(!rtl8180_IsWirelessBMode(stats.rate))
1666                 { // OFDM rate.
1667                         if(RXAGC>90)
1668                                 RXAGC=90;
1669                         else if(RXAGC<25)
1670                                 RXAGC=25;
1671                         RXAGC=(90-RXAGC)*100/65;
1672                 }
1673                 else
1674                 { // CCK rate.
1675                         if(RXAGC>95)
1676                                 RXAGC=95;
1677                         else if(RXAGC<30)
1678                                 RXAGC=30;
1679                         RXAGC=(95-RXAGC)*100/65;
1680                 }
1681                 priv->SignalStrength = (u8)RXAGC;
1682                 priv->RecvSignalPower = RxAGC_dBm;
1683                 priv->RxPower = rxpower;
1684                 priv->RSSI = RSSI;
1685                 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1686                 if(quality >= 127)
1687                         quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
1688                 else if(quality < 27)
1689                         quality = 100;
1690                 else
1691                         quality = 127 - quality;
1692                 priv->SignalQuality = quality;
1693
1694                 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
1695                 stats.signalstrength = RXAGC;
1696                 if(stats.signalstrength > 100)
1697                         stats.signalstrength = 100;
1698                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1699         //      printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
1700                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1701                 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
1702                 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
1703                         | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
1704                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1705                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1706                 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1707                     fc = le16_to_cpu(hdr->frame_ctl);
1708                 type = WLAN_FC_GET_TYPE(fc);
1709
1710                         if((IEEE80211_FTYPE_CTL != type) &&
1711                                 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
1712                                  && (!bHwError) && (!bCRC)&& (!bICV))
1713                         {
1714                                 /* Perform signal smoothing for dynamic
1715                                  * mechanism on demand. This is different
1716                                  * with PerformSignalSmoothing8185 in smoothing
1717                                  * fomula. No dramatic adjustion is apply
1718                                  * because dynamic mechanism need some degree
1719                                  * of correctness. */
1720                                 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
1721                                 //
1722                                 // For good-looking singal strength.
1723                                 //
1724                                 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1725                                                                 priv->LastSignalStrengthInPercent,
1726                                                                 priv->SignalStrength);
1727
1728                                 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1729                                 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1730                 //
1731                 // We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
1732                 // so we record the correct power here.
1733                 //
1734                                 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1735                                 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
1736
1737                 // Figure out which antenna that received the lasted packet.
1738                                 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
1739                             SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1740                         }
1741
1742                 if(first){
1743                         if(!priv->rx_skb_complete){
1744                                 /* seems that HW sometimes fails to reiceve and
1745                                    doesn't provide the last descriptor */
1746                                 dev_kfree_skb_any(priv->rx_skb);
1747                                 priv->stats.rxnolast++;
1748                         }
1749                         /* support for prism header has been originally added by Christian */
1750                         if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1751
1752                         }else{
1753                                 priv->rx_skb = dev_alloc_skb(len+2);
1754                                 if( !priv->rx_skb) goto drop;
1755                         }
1756
1757                         priv->rx_skb_complete=0;
1758                         priv->rx_skb->dev=dev;
1759                 }else{
1760                         /* if we are here we should  have already RXed
1761                         * the first frame.
1762                         * If we get here and the skb is not allocated then
1763                         * we have just throw out garbage (skb not allocated)
1764                         * and we are still rxing garbage....
1765                         */
1766                         if(!priv->rx_skb_complete){
1767
1768                                 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
1769
1770                                 if(!tmp_skb) goto drop;
1771
1772                                 tmp_skb->dev=dev;
1773
1774                                 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
1775                                         priv->rx_skb->data,
1776                                         priv->rx_skb->len);
1777
1778                                 dev_kfree_skb_any(priv->rx_skb);
1779
1780                                 priv->rx_skb=tmp_skb;
1781                         }
1782                 }
1783
1784                 if(!priv->rx_skb_complete) {
1785                         if(padding) {
1786                                 memcpy(skb_put(priv->rx_skb,len),
1787                                         (((unsigned char *)priv->rxbuffer->buf) + 2),len);
1788                         } else {
1789                                 memcpy(skb_put(priv->rx_skb,len),
1790                                         priv->rxbuffer->buf,len);
1791                         }
1792                 }
1793
1794                 if(last && !priv->rx_skb_complete){
1795                         if(priv->rx_skb->len > 4)
1796                                 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
1797                         if(!ieee80211_rtl_rx(priv->ieee80211,
1798                                          priv->rx_skb, &stats))
1799                                 dev_kfree_skb_any(priv->rx_skb);
1800                         priv->rx_skb_complete=1;
1801                 }
1802
1803                 pci_dma_sync_single_for_device(priv->pdev,
1804                                     priv->rxbuffer->dma,
1805                                     priv->rxbuffersize * \
1806                                     sizeof(u8),
1807                                     PCI_DMA_FROMDEVICE);
1808
1809 drop: // this is used when we have not enough mem
1810                 /* restore the descriptor */
1811                 *(priv->rxringtail+2)=priv->rxbuffer->dma;
1812                 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
1813                 *(priv->rxringtail)=
1814                         *(priv->rxringtail) | priv->rxbuffersize;
1815
1816                 *(priv->rxringtail)=
1817                         *(priv->rxringtail) | (1<<31);
1818
1819                 priv->rxringtail+=rx_desc_size;
1820                 if(priv->rxringtail >=
1821                    (priv->rxring)+(priv->rxringcount )*rx_desc_size)
1822                         priv->rxringtail=priv->rxring;
1823
1824                 priv->rxbuffer=(priv->rxbuffer->next);
1825         }
1826 }
1827
1828
1829 void rtl8180_dma_kick(struct net_device *dev, int priority)
1830 {
1831         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1832
1833         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1834         write_nic_byte(dev, TX_DMA_POLLING,
1835                         (1 << (priority + 1)) | priv->dma_poll_mask);
1836         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1837
1838         force_pci_posting(dev);
1839 }
1840
1841 void rtl8180_data_hard_stop(struct net_device *dev)
1842 {
1843         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1844
1845         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1846         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1847         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1848         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1849 }
1850
1851 void rtl8180_data_hard_resume(struct net_device *dev)
1852 {
1853         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1854
1855         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1856         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1857         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1858         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1859 }
1860
1861 /* this function TX data frames when the ieee80211 stack requires this.
1862  * It checks also if we need to stop the ieee tx queue, eventually do it
1863  */
1864 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
1865 rate)
1866 {
1867         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1868         int mode;
1869         struct ieee80211_hdr_3addr  *h = (struct ieee80211_hdr_3addr  *) skb->data;
1870         short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
1871         unsigned long flags;
1872         int priority;
1873
1874         mode = priv->ieee80211->iw_mode;
1875
1876         rate = ieeerate2rtlrate(rate);
1877         /*
1878         * This function doesn't require lock because we make
1879         * sure it's called with the tx_lock already acquired.
1880         * this come from the kernel's hard_xmit callback (through
1881         * the ieee stack, or from the try_wake_queue (again through
1882         * the ieee stack.
1883         */
1884         priority = AC2Q(skb->priority);
1885         spin_lock_irqsave(&priv->tx_lock,flags);
1886
1887         if(priv->ieee80211->bHwRadioOff)
1888         {
1889                 spin_unlock_irqrestore(&priv->tx_lock,flags);
1890
1891                 return;
1892         }
1893
1894         if (!check_nic_enought_desc(dev, priority)){
1895                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1896                         get_curr_tx_free_desc(dev, priority));
1897                 ieee80211_rtl_stop_queue(priv->ieee80211);
1898         }
1899         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
1900         if (!check_nic_enought_desc(dev, priority))
1901                 ieee80211_rtl_stop_queue(priv->ieee80211);
1902
1903         spin_unlock_irqrestore(&priv->tx_lock,flags);
1904 }
1905
1906 /* This is a rough attempt to TX a frame
1907  * This is called by the ieee 80211 stack to TX management frames.
1908  * If the ring is full packet are dropped (for data frame the queue
1909  * is stopped before this can happen). For this reason it is better
1910  * if the descriptors are larger than the largest management frame
1911  * we intend to TX: i'm unsure what the HW does if it will not found
1912  * the last fragment of a frame because it has been dropped...
1913  * Since queues for Management and Data frames are different we
1914  * might use a different lock than tx_lock (for example mgmt_tx_lock)
1915  */
1916 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
1917 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1918 {
1919         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1920         unsigned long flags;
1921         int priority;
1922
1923         priority = MANAGE_PRIORITY;
1924
1925         spin_lock_irqsave(&priv->tx_lock,flags);
1926
1927         if (priv->ieee80211->bHwRadioOff) {
1928                 spin_unlock_irqrestore(&priv->tx_lock,flags);
1929                 dev_kfree_skb_any(skb);
1930                 return NETDEV_TX_OK;
1931         }
1932
1933         rtl8180_tx(dev, skb->data, skb->len, priority,
1934                 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
1935
1936         priv->ieee80211->stats.tx_bytes+=skb->len;
1937         priv->ieee80211->stats.tx_packets++;
1938         spin_unlock_irqrestore(&priv->tx_lock,flags);
1939
1940         dev_kfree_skb_any(skb);
1941         return NETDEV_TX_OK;
1942 }
1943
1944 // longpre 144+48 shortpre 72+24
1945 u16 rtl8180_len2duration(u32 len, short rate,short* ext)
1946 {
1947         u16 duration;
1948         u16 drift;
1949         *ext=0;
1950
1951         switch(rate){
1952         case 0://1mbps
1953                 *ext=0;
1954                 duration = ((len+4)<<4) /0x2;
1955                 drift = ((len+4)<<4) % 0x2;
1956                 if(drift ==0 ) break;
1957                 duration++;
1958                 break;
1959         case 1://2mbps
1960                 *ext=0;
1961                 duration = ((len+4)<<4) /0x4;
1962                 drift = ((len+4)<<4) % 0x4;
1963                 if(drift ==0 ) break;
1964                 duration++;
1965                 break;
1966         case 2: //5.5mbps
1967                 *ext=0;
1968                 duration = ((len+4)<<4) /0xb;
1969                 drift = ((len+4)<<4) % 0xb;
1970                 if(drift ==0 )
1971                         break;
1972                 duration++;
1973                 break;
1974         default:
1975         case 3://11mbps
1976                 *ext=0;
1977                 duration = ((len+4)<<4) /0x16;
1978                 drift = ((len+4)<<4) % 0x16;
1979                 if(drift ==0 )
1980                         break;
1981                 duration++;
1982                 if(drift > 6)
1983                         break;
1984                 *ext=1;
1985                 break;
1986         }
1987
1988         return duration;
1989 }
1990
1991 void rtl8180_prepare_beacon(struct net_device *dev)
1992 {
1993         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1994         struct sk_buff *skb;
1995
1996         u16 word  = read_nic_word(dev, BcnItv);
1997         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
1998         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
1999         write_nic_word(dev, BcnItv, word);
2000
2001         skb = ieee80211_get_beacon(priv->ieee80211);
2002         if(skb){
2003                 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
2004                         0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
2005                 dev_kfree_skb_any(skb);
2006         }
2007 }
2008
2009 /* This function do the real dirty work: it enqueues a TX command
2010  * descriptor in the ring buffer, copyes the frame in a TX buffer
2011  * and kicks the NIC to ensure it does the DMA transfer.
2012  */
2013 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2014                  short morefrag, short descfrag, int rate)
2015 {
2016         struct r8180_priv *priv = ieee80211_priv(dev);
2017         u32 *tail,*temp_tail;
2018         u32 *begin;
2019         u32 *buf;
2020         int i;
2021         int remain;
2022         int buflen;
2023         int count;
2024         u16 duration;
2025         short ext;
2026         struct buffer* buflist;
2027         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
2028         u8 dest[ETH_ALEN];
2029         u8                      bUseShortPreamble = 0;
2030         u8                      bCTSEnable = 0;
2031         u8                      bRTSEnable = 0;
2032         u16                     Duration = 0;
2033         u16                     RtsDur = 0;
2034         u16                     ThisFrameTime = 0;
2035         u16                     TxDescDuration = 0;
2036         u8                      ownbit_flag = false;
2037
2038         switch(priority) {
2039         case MANAGE_PRIORITY:
2040                 tail=priv->txmapringtail;
2041                 begin=priv->txmapring;
2042                 buflist = priv->txmapbufstail;
2043                 count = priv->txringcount;
2044                 break;
2045         case BK_PRIORITY:
2046                 tail=priv->txbkpringtail;
2047                 begin=priv->txbkpring;
2048                 buflist = priv->txbkpbufstail;
2049                 count = priv->txringcount;
2050                 break;
2051         case BE_PRIORITY:
2052                 tail=priv->txbepringtail;
2053                 begin=priv->txbepring;
2054                 buflist = priv->txbepbufstail;
2055                 count = priv->txringcount;
2056                 break;
2057         case VI_PRIORITY:
2058                 tail=priv->txvipringtail;
2059                 begin=priv->txvipring;
2060                 buflist = priv->txvipbufstail;
2061                 count = priv->txringcount;
2062                 break;
2063         case VO_PRIORITY:
2064                 tail=priv->txvopringtail;
2065                 begin=priv->txvopring;
2066                 buflist = priv->txvopbufstail;
2067                 count = priv->txringcount;
2068                 break;
2069         case HI_PRIORITY:
2070                 tail=priv->txhpringtail;
2071                 begin=priv->txhpring;
2072                 buflist = priv->txhpbufstail;
2073                 count = priv->txringcount;
2074                 break;
2075         case BEACON_PRIORITY:
2076                 tail=priv->txbeaconringtail;
2077                 begin=priv->txbeaconring;
2078                 buflist = priv->txbeaconbufstail;
2079                 count = priv->txbeaconcount;
2080                 break;
2081         default:
2082                 return -1;
2083                 break;
2084         }
2085
2086                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
2087                 if (is_multicast_ether_addr(dest) ||
2088                                 is_broadcast_ether_addr(dest))
2089                 {
2090                         Duration = 0;
2091                         RtsDur = 0;
2092                         bRTSEnable = 0;
2093                         bCTSEnable = 0;
2094
2095                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2096                         TxDescDuration = ThisFrameTime;
2097                 } else {// Unicast packet
2098                         u16 AckTime;
2099
2100                         //YJ,add,080828,for Keep alive
2101                         priv->NumTxUnicast++;
2102
2103                         /* Figure out ACK rate according to BSS basic rate
2104                          * and Tx rate. */
2105                         AckTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
2106
2107                         if ( ((len + sCrcLng) > priv->rts) && priv->rts )
2108                         { // RTS/CTS.
2109                                 u16 RtsTime, CtsTime;
2110                                 //u16 CtsRate;
2111                                 bRTSEnable = 1;
2112                                 bCTSEnable = 0;
2113
2114                                 // Rate and time required for RTS.
2115                                 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
2116                                 // Rate and time required for CTS.
2117                                 CtsTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
2118
2119                                 // Figure out time required to transmit this frame.
2120                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2121                                                 rtl8180_rate2rate(rate),
2122                                                 0,
2123                                                 bUseShortPreamble);
2124
2125                                 // RTS-CTS-ThisFrame-ACK.
2126                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2127
2128                                 TxDescDuration = RtsTime + RtsDur;
2129                         }
2130                         else {// Normal case.
2131                                 bCTSEnable = 0;
2132                                 bRTSEnable = 0;
2133                                 RtsDur = 0;
2134
2135                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2136                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
2137                         }
2138
2139                         if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
2140                                 // ThisFrame-ACK.
2141                                 Duration = aSifsTime + AckTime;
2142                         } else { // One or more fragments remained.
2143                                 u16 NextFragTime;
2144                                 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
2145                                                 rtl8180_rate2rate(rate),
2146                                                 0,
2147                                                 bUseShortPreamble );
2148
2149                                 //ThisFrag-ACk-NextFrag-ACK.
2150                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2151                         }
2152
2153                 } // End of Unicast packet
2154
2155                 frag_hdr->duration_id = Duration;
2156
2157         buflen=priv->txbuffsize;
2158         remain=len;
2159         temp_tail = tail;
2160
2161         while(remain!=0){
2162                 mb();
2163                 if(!buflist){
2164                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2165                         return -1;
2166                 }
2167                 buf=buflist->buf;
2168
2169                 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
2170                         DMESGW("No more TX desc, returning %x of %x",
2171                                remain, len);
2172                         priv->stats.txrdu++;
2173                         return remain;
2174                 }
2175
2176                 *tail= 0; // zeroes header
2177                 *(tail+1) = 0;
2178                 *(tail+3) = 0;
2179                 *(tail+5) = 0;
2180                 *(tail+6) = 0;
2181                 *(tail+7) = 0;
2182
2183                 /*FIXME: this should be triggered by HW encryption parameters.*/
2184                 *tail |= (1<<15); /* no encrypt */
2185
2186                 if(remain==len && !descfrag) {
2187                         ownbit_flag = false;
2188                         *tail = *tail| (1<<29) ; //fist segment of the packet
2189                         *tail = *tail |(len);
2190                 } else {
2191                         ownbit_flag = true;
2192                 }
2193
2194                 for(i=0;i<buflen&& remain >0;i++,remain--){
2195                         ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
2196                         if(remain == 4 && i+4 >= buflen) break;
2197                         /* ensure the last desc has at least 4 bytes payload */
2198
2199                 }
2200                 txbuf = txbuf + i;
2201                 *(tail+3)=*(tail+3) &~ 0xfff;
2202                 *(tail+3)=*(tail+3) | i; // buffer lenght
2203                 // Use short preamble or not
2204                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2205                         if (priv->plcp_preamble_mode==1 && rate!=0)     //  short mode now, not long!
2206                         ;//     *tail |= (1<<16);                               // enable short preamble mode.
2207
2208                 if(bCTSEnable) {
2209                         *tail |= (1<<18);
2210                 }
2211
2212                 if(bRTSEnable) //rts enable
2213                 {
2214                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
2215                         *tail |= (1<<23);//rts enable
2216                         *(tail+1) |=(RtsDur&0xffff);//RTS Duration
2217                 }
2218                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
2219 //              *(tail+3) |= (0xe6<<16);
2220                 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
2221
2222                 *tail = *tail | ((rate&0xf) << 24);
2223
2224                 /* hw_plcp_len is not used for rtl8180 chip */
2225                 /* FIXME */
2226                 if (!priv->hw_plcp_len) {
2227                         duration = rtl8180_len2duration(len, rate, &ext);
2228                         *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2229                         if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
2230                 }
2231
2232                 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
2233                 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
2234
2235                *(tail+5) = *(tail+5)|(2<<27);
2236                 *(tail+7) = *(tail+7)|(1<<4);
2237
2238                 wmb();
2239                 if(ownbit_flag)
2240                 {
2241                         *tail = *tail | (1<<31); // descriptor ready to be txed
2242                 }
2243
2244                 if((tail - begin)/8 == count-1)
2245                         tail=begin;
2246                 else
2247                         tail=tail+8;
2248
2249                 buflist=buflist->next;
2250
2251                 mb();
2252
2253                 switch(priority) {
2254                         case MANAGE_PRIORITY:
2255                                 priv->txmapringtail=tail;
2256                                 priv->txmapbufstail=buflist;
2257                                 break;
2258                         case BK_PRIORITY:
2259                                 priv->txbkpringtail=tail;
2260                                 priv->txbkpbufstail=buflist;
2261                                 break;
2262                         case BE_PRIORITY:
2263                                 priv->txbepringtail=tail;
2264                                 priv->txbepbufstail=buflist;
2265                                 break;
2266                         case VI_PRIORITY:
2267                                 priv->txvipringtail=tail;
2268                                 priv->txvipbufstail=buflist;
2269                                 break;
2270                         case VO_PRIORITY:
2271                                 priv->txvopringtail=tail;
2272                                 priv->txvopbufstail=buflist;
2273                                 break;
2274                         case HI_PRIORITY:
2275                                 priv->txhpringtail=tail;
2276                                 priv->txhpbufstail = buflist;
2277                                 break;
2278                         case BEACON_PRIORITY:
2279                                 /* the HW seems to be happy with the 1st
2280                                  * descriptor filled and the 2nd empty...
2281                                  * So always update descriptor 1 and never
2282                                  * touch 2nd
2283                                  */
2284                                 break;
2285                 }
2286         }
2287         *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
2288         rtl8180_dma_kick(dev,priority);
2289
2290         return 0;
2291 }
2292
2293 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
2294
2295 void rtl8180_link_change(struct net_device *dev)
2296 {
2297         struct r8180_priv *priv = ieee80211_priv(dev);
2298         u16 beacon_interval;
2299         struct ieee80211_network *net = &priv->ieee80211->current_network;
2300
2301         rtl8180_update_msr(dev);
2302
2303         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2304
2305         write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
2306         write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
2307
2308         beacon_interval  = read_nic_dword(dev,BEACON_INTERVAL);
2309         beacon_interval &= ~ BEACON_INTERVAL_MASK;
2310         beacon_interval |= net->beacon_interval;
2311         write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
2312
2313         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2314
2315         rtl8180_set_chan(dev, priv->chan);
2316 }
2317
2318 void rtl8180_rq_tx_ack(struct net_device *dev){
2319
2320         struct r8180_priv *priv = ieee80211_priv(dev);
2321
2322         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
2323         priv->ack_tx_to_ieee = 1;
2324 }
2325
2326 short rtl8180_is_tx_queue_empty(struct net_device *dev){
2327
2328         struct r8180_priv *priv = ieee80211_priv(dev);
2329         u32* d;
2330
2331         for (d = priv->txmapring;
2332                 d < priv->txmapring + priv->txringcount;d+=8)
2333                         if(*d & (1<<31)) return 0;
2334
2335         for (d = priv->txbkpring;
2336                 d < priv->txbkpring + priv->txringcount;d+=8)
2337                         if(*d & (1<<31)) return 0;
2338
2339         for (d = priv->txbepring;
2340                 d < priv->txbepring + priv->txringcount;d+=8)
2341                         if(*d & (1<<31)) return 0;
2342
2343         for (d = priv->txvipring;
2344                 d < priv->txvipring + priv->txringcount;d+=8)
2345                         if(*d & (1<<31)) return 0;
2346
2347         for (d = priv->txvopring;
2348                 d < priv->txvopring + priv->txringcount;d+=8)
2349                         if(*d & (1<<31)) return 0;
2350
2351         for (d = priv->txhpring;
2352                 d < priv->txhpring + priv->txringcount;d+=8)
2353                         if(*d & (1<<31)) return 0;
2354         return 1;
2355 }
2356 /* FIXME FIXME 5msecs is random */
2357 #define HW_WAKE_DELAY 5
2358
2359 void rtl8180_hw_wakeup(struct net_device *dev)
2360 {
2361         unsigned long flags;
2362         struct r8180_priv *priv = ieee80211_priv(dev);
2363
2364         spin_lock_irqsave(&priv->ps_lock,flags);
2365         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
2366         if (priv->rf_wakeup)
2367                 priv->rf_wakeup(dev);
2368         spin_unlock_irqrestore(&priv->ps_lock,flags);
2369 }
2370
2371 void rtl8180_hw_sleep_down(struct net_device *dev)
2372 {
2373         unsigned long flags;
2374         struct r8180_priv *priv = ieee80211_priv(dev);
2375
2376         spin_lock_irqsave(&priv->ps_lock,flags);
2377         if(priv->rf_sleep)
2378                 priv->rf_sleep(dev);
2379         spin_unlock_irqrestore(&priv->ps_lock,flags);
2380 }
2381
2382 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2383 {
2384         struct r8180_priv *priv = ieee80211_priv(dev);
2385         u32 rb = jiffies;
2386         unsigned long flags;
2387
2388         spin_lock_irqsave(&priv->ps_lock,flags);
2389
2390         /* Writing HW register with 0 equals to disable
2391          * the timer, that is not really what we want
2392          */
2393         tl -= MSECS(4+16+7);
2394
2395         /* If the interval in witch we are requested to sleep is too
2396          * short then give up and remain awake
2397          */
2398         if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2399                 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2400                 spin_unlock_irqrestore(&priv->ps_lock,flags);
2401                 printk("too short to sleep\n");
2402                 return;
2403         }
2404
2405         {
2406                 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
2407
2408                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2409
2410                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
2411         }
2412         /* if we suspect the TimerInt is gone beyond tl
2413          * while setting it, then give up
2414          */
2415
2416         if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
2417                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2418                 spin_unlock_irqrestore(&priv->ps_lock,flags);
2419                 return;
2420         }
2421
2422         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2423         spin_unlock_irqrestore(&priv->ps_lock,flags);
2424 }
2425
2426 void rtl8180_wmm_param_update(struct work_struct * work)
2427 {
2428         struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
2429         struct net_device *dev = ieee->dev;
2430         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2431         u8 mode = ieee->current_network.mode;
2432         AC_CODING       eACI;
2433         AC_PARAM        AcParam;
2434         PAC_PARAM       pAcParam;
2435         u8 i;
2436
2437         if(!ieee->current_network.QoS_Enable){
2438                 //legacy ac_xx_param update
2439                 AcParam.longData = 0;
2440                 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
2441                 AcParam.f.AciAifsn.f.ACM = 0;
2442                 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
2443                 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
2444                 AcParam.f.TXOPLimit = 0;
2445                 for(eACI = 0; eACI < AC_MAX; eACI++){
2446                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2447                         {
2448                                 u8              u1bAIFS;
2449                                 u32             u4bAcParam;
2450                                 pAcParam = (PAC_PARAM)(&AcParam);
2451                                 // Retrive paramters to udpate.
2452                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
2453                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2454                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2455                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2456                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2457                                 switch(eACI){
2458                                         case AC1_BK:
2459                                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2460                                                 break;
2461                                         case AC0_BE:
2462                                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2463                                                 break;
2464                                         case AC2_VI:
2465                                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2466                                                 break;
2467                                         case AC3_VO:
2468                                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2469                                                 break;
2470                                         default:
2471                                                 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
2472                                                 break;
2473                                 }
2474                         }
2475                 }
2476                 return;
2477         }
2478
2479         for(i = 0; i < AC_MAX; i++){
2480                 //AcParam.longData = 0;
2481                 pAcParam = (AC_PARAM * )ac_param;
2482                 {
2483                         AC_CODING       eACI;
2484                         u8              u1bAIFS;
2485                         u32             u4bAcParam;
2486
2487                         // Retrive paramters to udpate.
2488                         eACI = pAcParam->f.AciAifsn.f.ACI;
2489                         //Mode G/A: slotTimeTimer = 9; Mode B: 20
2490                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
2491                         u4bAcParam = (  (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)  |
2492                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
2493                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
2494                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2495
2496                         switch(eACI){
2497                                 case AC1_BK:
2498                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2499                                         break;
2500                                 case AC0_BE:
2501                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2502                                         break;
2503                                 case AC2_VI:
2504                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2505                                         break;
2506                                 case AC3_VO:
2507                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2508                                         break;
2509                                 default:
2510                                         printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
2511                                         break;
2512                         }
2513                 }
2514                 ac_param += (sizeof(AC_PARAM));
2515         }
2516 }
2517
2518 void rtl8180_tx_irq_wq(struct work_struct *work);
2519 void rtl8180_restart_wq(struct work_struct *work);
2520 //void rtl8180_rq_tx_ack(struct work_struct *work);
2521 void rtl8180_watch_dog_wq(struct work_struct *work);
2522 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2523 void rtl8180_hw_sleep_wq(struct work_struct *work);
2524 void rtl8180_sw_antenna_wq(struct work_struct *work);
2525 void rtl8180_watch_dog(struct net_device *dev);
2526
2527 void watch_dog_adaptive(unsigned long data)
2528 {
2529         struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
2530
2531         if (!priv->up) {
2532                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2533                 return;
2534         }
2535
2536         // Tx High Power Mechanism.
2537         if(CheckHighPower((struct net_device *)data))
2538                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2539
2540         // Tx Power Tracking on 87SE.
2541         if (CheckTxPwrTracking((struct net_device *)data))
2542                 TxPwrTracking87SE((struct net_device *)data);
2543
2544         // Perform DIG immediately.
2545         if(CheckDig((struct net_device *)data) == true)
2546                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2547         rtl8180_watch_dog((struct net_device *)data);
2548
2549         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2550
2551         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2552         add_timer(&priv->watch_dog_timer);
2553 }
2554
2555 static CHANNEL_LIST ChannelPlan[] = {
2556         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},                 //FCC
2557         {{1,2,3,4,5,6,7,8,9,10,11},11},                                                 //IC
2558         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //ETSI
2559         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},    //Spain. Change to ETSI.
2560         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //France. Change to ETSI.
2561         {{14,36,40,44,48,52,56,60,64},9},                                               //MKK
2562         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
2563         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //Israel.
2564         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},                       // For 11a , TELEC
2565         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
2566         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
2567 };
2568
2569 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2570 {
2571         int i;
2572
2573         //lzm add 080826
2574         ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
2575         ieee->IbssStartChnl=0;
2576
2577         switch (channel_plan)
2578         {
2579                 case COUNTRY_CODE_FCC:
2580                 case COUNTRY_CODE_IC:
2581                 case COUNTRY_CODE_ETSI:
2582                 case COUNTRY_CODE_SPAIN:
2583                 case COUNTRY_CODE_FRANCE:
2584                 case COUNTRY_CODE_MKK:
2585                 case COUNTRY_CODE_MKK1:
2586                 case COUNTRY_CODE_ISRAEL:
2587                 case COUNTRY_CODE_TELEC:
2588                 {
2589                         Dot11d_Init(ieee);
2590                         ieee->bGlobalDomain = false;
2591                         if (ChannelPlan[channel_plan].Len != 0){
2592                                 // Clear old channel map
2593                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2594                                 // Set new channel map
2595                                 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
2596                                 {
2597                                         if(ChannelPlan[channel_plan].Channel[i] <= 14)
2598                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2599                                 }
2600                         }
2601                         break;
2602                 }
2603                 case COUNTRY_CODE_GLOBAL_DOMAIN:
2604                 {
2605                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
2606                         Dot11d_Reset(ieee);
2607                         ieee->bGlobalDomain = true;
2608                         break;
2609                 }
2610                 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
2611                 {
2612                 ieee->MinPassiveChnlNum=12;
2613                 ieee->IbssStartChnl= 10;
2614                 break;
2615                 }
2616                 default:
2617                 {
2618                         Dot11d_Init(ieee);
2619                         ieee->bGlobalDomain = false;
2620                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2621                         for (i=1;i<=14;i++)
2622                         {
2623                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2624                         }
2625                         break;
2626                 }
2627         }
2628 }
2629
2630 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2631
2632 //YJ,add,080828
2633 static void rtl8180_statistics_init(struct Stats *pstats)
2634 {
2635         memset(pstats, 0, sizeof(struct Stats));
2636 }
2637
2638 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2639 {
2640         memset(plink_detect, 0, sizeof(link_detect_t));
2641         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2642 }
2643 //YJ,add,080828,end
2644
2645 short rtl8180_init(struct net_device *dev)
2646 {
2647         struct r8180_priv *priv = ieee80211_priv(dev);
2648         u16 word;
2649         u16 version;
2650         u32 usValue;
2651         u16 tmpu16;
2652         int i, j;
2653
2654         priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
2655         if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
2656                 printk("rtl8180_init:Error channel plan! Set to default.\n");
2657                 priv->channel_plan = 0;
2658         }
2659
2660         DMESG("Channel plan is %d\n",priv->channel_plan);
2661         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2662
2663         //FIXME: these constants are placed in a bad pleace.
2664         priv->txbuffsize = 2048;//1024;
2665         priv->txringcount = 32;//32;
2666         priv->rxbuffersize = 2048;//1024;
2667         priv->rxringcount = 64;//32;
2668         priv->txbeaconcount = 2;
2669         priv->rx_skb_complete = 1;
2670
2671         priv->RegThreeWireMode = HW_THREE_WIRE_SI;
2672
2673         priv->RFChangeInProgress = false;
2674         priv->SetRFPowerStateInProgress = false;
2675         priv->RFProgType = 0;
2676         priv->bInHctTest = false;
2677
2678         priv->irq_enabled=0;
2679
2680         rtl8180_statistics_init(&priv->stats);
2681         rtl8180_link_detect_init(&priv->link_detect);
2682
2683         priv->ack_tx_to_ieee = 0;
2684         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2685         priv->ieee80211->iw_mode = IW_MODE_INFRA;
2686         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
2687                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2688                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2689         priv->ieee80211->active_scan = 1;
2690         priv->ieee80211->rate = 110; //11 mbps
2691         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2692         priv->ieee80211->host_encrypt = 1;
2693         priv->ieee80211->host_decrypt = 1;
2694         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2695         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2696         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2697         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2698
2699         priv->hw_wep = hwwep;
2700         priv->prism_hdr=0;
2701         priv->dev=dev;
2702         priv->retry_rts = DEFAULT_RETRY_RTS;
2703         priv->retry_data = DEFAULT_RETRY_DATA;
2704         priv->RFChangeInProgress = false;
2705         priv->SetRFPowerStateInProgress = false;
2706         priv->RFProgType = 0;
2707         priv->bInHctTest = false;
2708         priv->bInactivePs = true;//false;
2709         priv->ieee80211->bInactivePs = priv->bInactivePs;
2710         priv->bSwRfProcessing = false;
2711         priv->eRFPowerState = eRfOff;
2712         priv->RfOffReason = 0;
2713         priv->LedStrategy = SW_LED_MODE0;
2714         priv->TxPollingTimes = 0;//lzm add 080826
2715         priv->bLeisurePs = true;
2716         priv->dot11PowerSaveMode = eActive;
2717         priv->AdMinCheckPeriod = 5;
2718         priv->AdMaxCheckPeriod = 10;
2719         priv->AdMaxRxSsThreshold = 30;//60->30
2720         priv->AdRxSsThreshold = 20;//50->20
2721         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2722         priv->AdTickCount = 0;
2723         priv->AdRxSignalStrength = -1;
2724         priv->RegSwAntennaDiversityMechanism = 0;
2725         priv->RegDefaultAntenna = 0;
2726         priv->SignalStrength = 0;
2727         priv->AdRxOkCnt = 0;
2728         priv->CurrAntennaIndex = 0;
2729         priv->AdRxSsBeforeSwitched = 0;
2730         init_timer(&priv->SwAntennaDiversityTimer);
2731         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2732         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2733         priv->bDigMechanism = 1;
2734         priv->InitialGain = 6;
2735         priv->bXtalCalibration = false;
2736         priv->XtalCal_Xin = 0;
2737         priv->XtalCal_Xout = 0;
2738         priv->bTxPowerTrack = false;
2739         priv->ThermalMeter = 0;
2740         priv->FalseAlarmRegValue = 0;
2741         priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
2742         priv->DIG_NumberFallbackVote = 0;
2743         priv->DIG_NumberUpgradeVote = 0;
2744         priv->LastSignalStrengthInPercent = 0;
2745         priv->Stats_SignalStrength = 0;
2746         priv->LastRxPktAntenna = 0;
2747         priv->SignalQuality = 0; // in 0-100 index.
2748         priv->Stats_SignalQuality = 0;
2749         priv->RecvSignalPower = 0; // in dBm.
2750         priv->Stats_RecvSignalPower = 0;
2751         priv->AdMainAntennaRxOkCnt = 0;
2752         priv->AdAuxAntennaRxOkCnt = 0;
2753         priv->bHWAdSwitched = false;
2754         priv->bRegHighPowerMechanism = true;
2755         priv->RegHiPwrUpperTh = 77;
2756         priv->RegHiPwrLowerTh = 75;
2757         priv->RegRSSIHiPwrUpperTh = 70;
2758         priv->RegRSSIHiPwrLowerTh = 20;
2759         priv->bCurCCKPkt = false;
2760         priv->UndecoratedSmoothedSS = -1;
2761         priv->bToUpdateTxPwr = false;
2762         priv->CurCCKRSSI = 0;
2763         priv->RxPower = 0;
2764         priv->RSSI = 0;
2765         priv->NumTxOkTotal = 0;
2766         priv->NumTxUnicast = 0;
2767         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2768         priv->PowerProfile = POWER_PROFILE_AC;
2769         priv->CurrRetryCnt = 0;
2770         priv->LastRetryCnt = 0;
2771         priv->LastTxokCnt = 0;
2772         priv->LastRxokCnt = 0;
2773         priv->LastRetryRate = 0;
2774         priv->bTryuping = 0;
2775         priv->CurrTxRate = 0;
2776         priv->CurrRetryRate = 0;
2777         priv->TryupingCount = 0;
2778         priv->TryupingCountNoData = 0;
2779         priv->TryDownCountLowData = 0;
2780         priv->LastTxOKBytes = 0;
2781         priv->LastFailTxRate = 0;
2782         priv->LastFailTxRateSS = 0;
2783         priv->FailTxRateCount = 0;
2784         priv->LastTxThroughput = 0;
2785         priv->NumTxOkBytesTotal = 0;
2786         priv->ForcedDataRate = 0;
2787         priv->RegBModeGainStage = 1;
2788
2789         priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2790         spin_lock_init(&priv->irq_lock);
2791         spin_lock_init(&priv->irq_th_lock);
2792         spin_lock_init(&priv->tx_lock);
2793         spin_lock_init(&priv->ps_lock);
2794         spin_lock_init(&priv->rf_ps_lock);
2795         sema_init(&priv->wx_sem, 1);
2796         sema_init(&priv->rf_state, 1);
2797         INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2798         INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq);
2799         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2800                           (void *)rtl8180_hw_wakeup_wq);
2801         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2802                           (void *)rtl8180_hw_sleep_wq);
2803         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2804                   (void *)rtl8180_wmm_param_update);
2805         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2806                           (void *)rtl8180_rate_adapter);
2807         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2808                          (void *)rtl8180_hw_dig_wq);
2809         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2810                          (void *)rtl8180_tx_pw_wq);
2811         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2812                          (void *) GPIOChangeRFWorkItemCallBack);
2813         tasklet_init(&priv->irq_rx_tasklet,
2814                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2815                      (unsigned long)priv);
2816
2817         init_timer(&priv->watch_dog_timer);
2818         priv->watch_dog_timer.data = (unsigned long)dev;
2819         priv->watch_dog_timer.function = watch_dog_adaptive;
2820
2821         init_timer(&priv->rateadapter_timer);
2822         priv->rateadapter_timer.data = (unsigned long)dev;
2823         priv->rateadapter_timer.function = timer_rate_adaptive;
2824         priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2825         priv->bEnhanceTxPwr = false;
2826
2827         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2828         priv->ieee80211->set_chan = rtl8180_set_chan;
2829         priv->ieee80211->link_change = rtl8180_link_change;
2830         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2831         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2832         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2833
2834         priv->ieee80211->init_wmmparam_flag = 0;
2835
2836         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2837         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2838         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2839
2840         priv->MWIEnable = 0;
2841
2842         priv->ShortRetryLimit = 7;
2843         priv->LongRetryLimit = 7;
2844         priv->EarlyRxThreshold = 7;
2845
2846         priv->CSMethod = (0x01 << 29);
2847
2848         priv->TransmitConfig =  TCR_DurProcMode_OFFSET |
2849                                 (7<<TCR_MXDMA_OFFSET) |
2850                                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2851                                 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |
2852                                 (0 ? TCR_SAT : 0);
2853
2854         priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
2855                                 RCR_AB | RCR_AM | RCR_APM |
2856                                 (7<<RCR_MXDMA_OFFSET) |
2857                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2858                                 (priv->EarlyRxThreshold == 7 ?
2859                                          RCR_ONLYERLPKT : 0);
2860
2861         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2862                                   IMR_THPDER | IMR_THPDOK |
2863                                   IMR_TVODER | IMR_TVODOK |
2864                                   IMR_TVIDER | IMR_TVIDOK |
2865                                   IMR_TBEDER | IMR_TBEDOK |
2866                                   IMR_TBKDER | IMR_TBKDOK |
2867                                   IMR_RDU |
2868                                   IMR_RER | IMR_ROK |
2869                                   IMR_RQoSOK;
2870
2871         priv->InitialGain = 6;
2872
2873         DMESG("MAC controller is a RTL8187SE b/g");
2874         priv->phy_ver = 2;
2875
2876         priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2877         priv->ieee80211->short_slot = 1;
2878
2879         // just for sync 85
2880         priv->enable_gpio0 = 0;
2881
2882         usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
2883         DMESG("usValue is 0x%x\n",usValue);
2884         //3Read AntennaDiversity
2885
2886         // SW Antenna Diversity.
2887         if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE)
2888                 priv->EEPROMSwAntennaDiversity = false;
2889         else
2890                 priv->EEPROMSwAntennaDiversity = true;
2891
2892         // Default Antenna to use.
2893         if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1)
2894                 priv->EEPROMDefaultAntenna1 = false;
2895         else
2896                 priv->EEPROMDefaultAntenna1 = true;
2897
2898         if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
2899                 /* 0: default from EEPROM. */
2900                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2901         else
2902                 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2903                 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
2904
2905         if (priv->RegDefaultAntenna == 0)
2906                 /* 0: default from EEPROM. */
2907                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2908         else
2909                 /* 1: main, 2: aux. */
2910                 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
2911
2912         /* rtl8185 can calc plcp len in HW.*/
2913         priv->hw_plcp_len = 1;
2914
2915         priv->plcp_preamble_mode = 2;
2916         /*the eeprom type is stored in RCR register bit #6 */
2917         if (RCR_9356SEL & read_nic_dword(dev, RCR))
2918                 priv->epromtype=EPROM_93c56;
2919         else
2920                 priv->epromtype=EPROM_93c46;
2921
2922         dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
2923         dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
2924         dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
2925         dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
2926         dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
2927         dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
2928
2929         for(i=1,j=0; i<14; i+=2,j++){
2930                 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
2931                 priv->chtxpwr[i]=word & 0xff;
2932                 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
2933         }
2934         for (i = 1, j = 0; i < 14; i += 2, j++) {
2935                 word = eprom_read(dev, EPROM_TXPW_OFDM_CH1_2 + j);
2936                 priv->chtxpwr_ofdm[i] = word & 0xff;
2937                 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2938         }
2939
2940         /* 3Read crystal calibtration and thermal meter indication on 87SE. */
2941
2942         tmpu16 = eprom_read(dev, EEPROM_RSV >> 1);
2943         /* Crystal calibration for Xin and Xout resp. */
2944         priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2945         priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2946         if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2947                 priv->bXtalCalibration = true;
2948
2949         /* Thermal meter reference indication. */
2950         priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2951         if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2952                 priv->bTxPowerTrack = true;
2953
2954         word = eprom_read(dev,EPROM_TXPW_BASE);
2955         priv->cck_txpwr_base = word & 0xf;
2956         priv->ofdm_txpwr_base = (word>>4) & 0xf;
2957
2958         version = eprom_read(dev,EPROM_VERSION);
2959         DMESG("EEPROM version %x",version);
2960         priv->rcr_csense = 3;
2961
2962         priv->cs_treshold = (eprom_read(dev, ENERGY_TRESHOLD) & 0xff00) >> 8;
2963
2964         priv->rf_chip = 0xff & eprom_read(dev, RFCHIPID);
2965
2966         priv->rf_chip = RF_ZEBRA4;
2967         priv->rf_sleep = rtl8225z4_rf_sleep;
2968         priv->rf_wakeup = rtl8225z4_rf_wakeup;
2969         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2970
2971         priv->rf_close = rtl8225z2_rf_close;
2972         priv->rf_init = rtl8225z2_rf_init;
2973         priv->rf_set_chan = rtl8225z2_rf_set_chan;
2974         priv->rf_set_sens = NULL;
2975
2976         if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2977                 return -ENOMEM;
2978
2979         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2980                                   TX_MANAGEPRIORITY_RING_ADDR))
2981                 return -ENOMEM;
2982
2983         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2984                                  TX_BKPRIORITY_RING_ADDR))
2985                 return -ENOMEM;
2986
2987         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2988                                  TX_BEPRIORITY_RING_ADDR))
2989                 return -ENOMEM;
2990
2991         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2992                                   TX_VIPRIORITY_RING_ADDR))
2993                 return -ENOMEM;
2994
2995         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2996                                   TX_VOPRIORITY_RING_ADDR))
2997                 return -ENOMEM;
2998
2999         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3000                                   TX_HIGHPRIORITY_RING_ADDR))
3001                 return -ENOMEM;
3002
3003         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
3004                                   TX_BEACON_RING_ADDR))
3005                 return -ENOMEM;
3006
3007         if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
3008                 DMESGE("Error allocating IRQ %d",dev->irq);
3009                 return -1;
3010         }else{
3011                 priv->irq=dev->irq;
3012                 DMESG("IRQ %d",dev->irq);
3013         }
3014
3015         return 0;
3016 }
3017
3018 void rtl8180_no_hw_wep(struct net_device *dev)
3019 {
3020 }
3021
3022 void rtl8180_set_hw_wep(struct net_device *dev)
3023 {
3024         struct r8180_priv *priv = ieee80211_priv(dev);
3025         u8 pgreg;
3026         u8 security;
3027         u32 key0_word4;
3028
3029         pgreg=read_nic_byte(dev, PGSELECT);
3030         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
3031
3032         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
3033         key0_word4 &= ~ 0xff;
3034         key0_word4 |= priv->key0[3]& 0xff;
3035         write_nic_dword(dev,KEY0,(priv->key0[0]));
3036         write_nic_dword(dev,KEY0+4,(priv->key0[1]));
3037         write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
3038         write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
3039
3040         security  = read_nic_byte(dev,SECURITY);
3041         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
3042         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
3043         security &= ~ SECURITY_ENCRYP_MASK;
3044         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
3045
3046         write_nic_byte(dev, SECURITY, security);
3047
3048         DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
3049               read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
3050               read_nic_dword(dev,KEY0));
3051 }
3052
3053
3054 void rtl8185_rf_pins_enable(struct net_device *dev)
3055 {
3056 //      u16 tmp;
3057 //      tmp = read_nic_word(dev, RFPinsEnable);
3058         write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
3059 }
3060
3061 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
3062 {
3063         u8 conf3;
3064
3065         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3066
3067         conf3 = read_nic_byte(dev, CONFIG3);
3068         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3069         write_nic_dword(dev, ANAPARAM2, a);
3070
3071         conf3 = read_nic_byte(dev, CONFIG3);
3072         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3073         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3074 }
3075
3076 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
3077 {
3078         u8 conf3;
3079
3080         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3081
3082         conf3 = read_nic_byte(dev, CONFIG3);
3083         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3084         write_nic_dword(dev, ANAPARAM, a);
3085
3086         conf3 = read_nic_byte(dev, CONFIG3);
3087         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3088         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3089 }
3090
3091 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
3092 {
3093         write_nic_byte(dev, TX_ANTENNA, ant);
3094         force_pci_posting(dev);
3095         mdelay(1);
3096 }
3097
3098 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
3099 {
3100         u32 phyw;
3101
3102         adr |= 0x80;
3103
3104         phyw= ((data<<8) | adr);
3105
3106         // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
3107         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
3108         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
3109         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
3110         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
3111
3112         /* this is ok to fail when we write AGC table. check for AGC table might be
3113          * done by masking with 0x7f instead of 0xff
3114          */
3115         //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
3116 }
3117
3118 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
3119 {
3120         data = data & 0xff;
3121         rtl8185_write_phy(dev, adr, data);
3122 }
3123
3124 void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
3125 {
3126         data = data & 0xff;
3127         rtl8185_write_phy(dev, adr, data | 0x10000);
3128 }
3129
3130 /* 70*3 = 210 ms
3131  * I hope this is enougth
3132  */
3133 #define MAX_PHY 70
3134 void write_phy(struct net_device *dev, u8 adr, u8 data)
3135 {
3136         u32 phy;
3137         int i;
3138
3139         phy = 0xff0000;
3140         phy |= adr;
3141         phy |= 0x80; /* this should enable writing */
3142         phy |= (data<<8);
3143
3144         //PHY_ADR, PHY_R and PHY_W  are contig and treated as one dword
3145         write_nic_dword(dev,PHY_ADR, phy);
3146
3147         phy= 0xffff00;
3148         phy |= adr;
3149
3150         write_nic_dword(dev,PHY_ADR, phy);
3151         for(i=0;i<MAX_PHY;i++){
3152                 phy=read_nic_dword(dev,PHY_ADR);
3153                 phy= phy & 0xff0000;
3154                 phy= phy >> 16;
3155                 if(phy == data){ //SUCCESS!
3156                         force_pci_posting(dev);
3157                         mdelay(3); //random value
3158                         return;
3159                 }else{
3160                         force_pci_posting(dev);
3161                         mdelay(3); //random value
3162                 }
3163         }
3164         DMESGW ("Phy writing %x %x failed!", adr,data);
3165 }
3166
3167 void rtl8185_set_rate(struct net_device *dev)
3168 {
3169         int i;
3170         u16 word;
3171         int basic_rate,min_rr_rate,max_rr_rate;
3172
3173         basic_rate = ieeerate2rtlrate(240);
3174         min_rr_rate = ieeerate2rtlrate(60);
3175         max_rr_rate = ieeerate2rtlrate(240);
3176
3177         write_nic_byte(dev, RESP_RATE,
3178                         max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
3179
3180         word  = read_nic_word(dev, BRSR);
3181         word &= ~BRSR_MBR_8185;
3182
3183         for(i=0;i<=basic_rate;i++)
3184                 word |= (1<<i);
3185
3186         write_nic_word(dev, BRSR, word);
3187 }
3188
3189 void rtl8180_adapter_start(struct net_device *dev)
3190 {
3191         struct r8180_priv *priv = ieee80211_priv(dev);
3192
3193         rtl8180_rtx_disable(dev);
3194         rtl8180_reset(dev);
3195
3196         /* enable beacon timeout, beacon TX ok and err
3197          * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3198          * RX ok and ERR, and GP timer */
3199         priv->irq_mask = 0x6fcf;
3200
3201         priv->dma_poll_mask = 0;
3202
3203         rtl8180_beacon_tx_disable(dev);
3204
3205         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3206         write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
3207         write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
3208         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3209
3210         rtl8180_update_msr(dev);
3211
3212         /* These might be unnecessary since we do in rx_enable / tx_enable */
3213         fix_rx_fifo(dev);
3214         fix_tx_fifo(dev);
3215
3216         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3217
3218         /*
3219            The following is very strange. seems to be that 1 means test mode,
3220            but we need to acknolwledges the nic when a packet is ready
3221            although we set it to 0
3222         */
3223
3224         write_nic_byte(dev,
3225                        CONFIG2, read_nic_byte(dev,CONFIG2) &~\
3226                        (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
3227         //^the nic isn't in test mode
3228         write_nic_byte(dev,
3229                        CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
3230
3231         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
3232
3233         write_nic_dword(dev,INT_TIMEOUT,0);
3234
3235         write_nic_byte(dev, WPA_CONFIG, 0);
3236
3237         rtl8180_no_hw_wep(dev);
3238
3239         rtl8185_set_rate(dev);
3240         write_nic_byte(dev, RATE_FALLBACK, 0x81);
3241
3242         write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
3243
3244         /*FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */
3245         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3246         write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3)
3247                        | (1 << CONFIG3_CLKRUN_SHIFT));
3248         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3249
3250         priv->rf_init(dev);
3251
3252         if(priv->rf_set_sens != NULL)
3253                 priv->rf_set_sens(dev,priv->sens);
3254         rtl8180_irq_enable(dev);
3255
3256         netif_start_queue(dev);
3257 }
3258
3259 /* this configures registers for beacon tx and enables it via
3260  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
3261  * be used to stop beacon transmission
3262  */
3263 void rtl8180_start_tx_beacon(struct net_device *dev)
3264 {
3265         u16 word;
3266
3267         DMESG("Enabling beacon TX");
3268         rtl8180_prepare_beacon(dev);
3269         rtl8180_irq_disable(dev);
3270         rtl8180_beacon_tx_enable(dev);
3271
3272         word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
3273         write_nic_word(dev, AtimWnd,word);// word |=
3274
3275         word  = read_nic_word(dev, BintrItv);
3276         word &= ~BintrItv_BintrItv;
3277         word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
3278                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
3279         // FIXME: check if correct ^^ worked with 0x3e8;
3280         */
3281         write_nic_word(dev, BintrItv, word);
3282
3283         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3284
3285         rtl8185b_irq_enable(dev);
3286 }
3287
3288 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
3289 {
3290         struct r8180_priv *priv = ieee80211_priv(dev);
3291
3292         return &priv->ieee80211->stats;
3293 }
3294 //
3295 // Change current and default preamble mode.
3296 //
3297 bool
3298 MgntActSet_802_11_PowerSaveMode(
3299         struct r8180_priv *priv,
3300         RT_PS_MODE              rtPsMode
3301 )
3302 {
3303         // Currently, we do not change power save mode on IBSS mode.
3304         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3305                 return false;
3306
3307         priv->ieee80211->ps = rtPsMode;
3308
3309         return true;
3310 }
3311
3312 void LeisurePSEnter(struct r8180_priv *priv)
3313 {
3314         if (priv->bLeisurePs) {
3315                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3316                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
3317         }
3318 }
3319
3320 void LeisurePSLeave(struct r8180_priv *priv)
3321 {
3322         if (priv->bLeisurePs) {
3323                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3324                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
3325         }
3326 }
3327
3328 void rtl8180_hw_wakeup_wq (struct work_struct *work)
3329 {
3330         struct delayed_work *dwork = to_delayed_work(work);
3331         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3332         struct net_device *dev = ieee->dev;
3333
3334         rtl8180_hw_wakeup(dev);
3335 }
3336
3337 void rtl8180_hw_sleep_wq (struct work_struct *work)
3338 {
3339         struct delayed_work *dwork = to_delayed_work(work);
3340         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3341         struct net_device *dev = ieee->dev;
3342
3343         rtl8180_hw_sleep_down(dev);
3344 }
3345
3346 static void MgntLinkKeepAlive(struct r8180_priv *priv )
3347 {
3348         if (priv->keepAliveLevel == 0)
3349                 return;
3350
3351         if(priv->ieee80211->state == IEEE80211_LINKED)
3352         {
3353                 //
3354                 // Keep-Alive.
3355                 //
3356
3357                 if ( (priv->keepAliveLevel== 2) ||
3358                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
3359                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
3360                         )
3361                 {
3362                         priv->link_detect.IdleCount++;
3363
3364                         //
3365                         // Send a Keep-Alive packet packet to AP if we had been idle for a while.
3366                         //
3367                         if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
3368                         {
3369                                 priv->link_detect.IdleCount = 0;
3370                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
3371                         }
3372                 }
3373                 else
3374                 {
3375                         priv->link_detect.IdleCount = 0;
3376                 }
3377                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
3378                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
3379         }
3380 }
3381
3382 static u8 read_acadapter_file(char *filename);
3383
3384 void rtl8180_watch_dog(struct net_device *dev)
3385 {
3386         struct r8180_priv *priv = ieee80211_priv(dev);
3387         bool bEnterPS = false;
3388         bool bBusyTraffic = false;
3389         u32 TotalRxNum = 0;
3390         u16 SlotIndex = 0;
3391         u16 i = 0;
3392         if(priv->ieee80211->actscanning == false){
3393                 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
3394                         IPSEnter(dev);
3395                 }
3396         }
3397         //YJ,add,080828,for link state check
3398         if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
3399                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
3400                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
3401                 for( i=0; i<priv->link_detect.SlotNum; i++ )
3402                         TotalRxNum+= priv->link_detect.RxFrameNum[i];
3403
3404                 if(TotalRxNum == 0){
3405                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
3406                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
3407                 }
3408         }
3409
3410         //YJ,add,080828,for KeepAlive
3411         MgntLinkKeepAlive(priv);
3412
3413         //YJ,add,080828,for LPS
3414         if (priv->PowerProfile == POWER_PROFILE_BATTERY)
3415                 priv->bLeisurePs = true;
3416         else if (priv->PowerProfile == POWER_PROFILE_AC) {
3417                 LeisurePSLeave(priv);
3418                 priv->bLeisurePs= false;
3419         }
3420
3421         if(priv->ieee80211->state == IEEE80211_LINKED){
3422                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
3423                 if(     priv->link_detect.NumRxOkInPeriod> 666 ||
3424                         priv->link_detect.NumTxOkInPeriod> 666 ) {
3425                         bBusyTraffic = true;
3426                 }
3427                 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
3428                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
3429                         bEnterPS= false;
3430                 } else
3431                         bEnterPS= true;
3432
3433                 if (bEnterPS)
3434                         LeisurePSEnter(priv);
3435                 else
3436                         LeisurePSLeave(priv);
3437         } else
3438                 LeisurePSLeave(priv);
3439         priv->link_detect.bBusyTraffic = bBusyTraffic;
3440         priv->link_detect.NumRxOkInPeriod = 0;
3441         priv->link_detect.NumTxOkInPeriod = 0;
3442         priv->ieee80211->NumRxDataInPeriod = 0;
3443         priv->ieee80211->NumRxBcnInPeriod = 0;
3444 }
3445
3446 int _rtl8180_up(struct net_device *dev)
3447 {
3448         struct r8180_priv *priv = ieee80211_priv(dev);
3449
3450         priv->up=1;
3451
3452         DMESG("Bringing up iface");
3453         rtl8185b_adapter_start(dev);
3454         rtl8185b_rx_enable(dev);
3455         rtl8185b_tx_enable(dev);
3456         if(priv->bInactivePs){
3457                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3458                         IPSLeave(dev);
3459         }
3460        timer_rate_adaptive((unsigned long)dev);
3461         watch_dog_adaptive((unsigned long)dev);
3462         if(priv->bSwAntennaDiverity)
3463                         SwAntennaDiversityTimerCallback(dev);
3464         ieee80211_softmac_start_protocol(priv->ieee80211);
3465         return 0;
3466 }
3467
3468 int rtl8180_open(struct net_device *dev)
3469 {
3470         struct r8180_priv *priv = ieee80211_priv(dev);
3471         int ret;
3472
3473         down(&priv->wx_sem);
3474         ret = rtl8180_up(dev);
3475         up(&priv->wx_sem);
3476         return ret;
3477 }
3478
3479 int rtl8180_up(struct net_device *dev)
3480 {
3481         struct r8180_priv *priv = ieee80211_priv(dev);
3482
3483         if (priv->up == 1) return -1;
3484
3485         return _rtl8180_up(dev);
3486 }
3487
3488 int rtl8180_close(struct net_device *dev)
3489 {
3490         struct r8180_priv *priv = ieee80211_priv(dev);
3491         int ret;
3492
3493         down(&priv->wx_sem);
3494         ret = rtl8180_down(dev);
3495         up(&priv->wx_sem);
3496
3497         return ret;
3498 }
3499
3500 int rtl8180_down(struct net_device *dev)
3501 {
3502         struct r8180_priv *priv = ieee80211_priv(dev);
3503
3504         if (priv->up == 0)
3505                 return -1;
3506
3507         priv->up=0;
3508
3509         ieee80211_softmac_stop_protocol(priv->ieee80211);
3510         /* FIXME */
3511         if (!netif_queue_stopped(dev))
3512                 netif_stop_queue(dev);
3513         rtl8180_rtx_disable(dev);
3514         rtl8180_irq_disable(dev);
3515         del_timer_sync(&priv->watch_dog_timer);
3516         del_timer_sync(&priv->rateadapter_timer);
3517         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3518         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3519         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3520         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3521         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3522         del_timer_sync(&priv->SwAntennaDiversityTimer);
3523         SetZebraRFPowerState8185(dev,eRfOff);
3524         memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
3525         priv->ieee80211->state = IEEE80211_NOLINK;
3526         return 0;
3527 }
3528
3529 void rtl8180_restart_wq(struct work_struct *work)
3530 {
3531         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3532         struct net_device *dev = priv->dev;
3533
3534         down(&priv->wx_sem);
3535
3536         rtl8180_commit(dev);
3537
3538         up(&priv->wx_sem);
3539 }
3540
3541 void rtl8180_restart(struct net_device *dev)
3542 {
3543         struct r8180_priv *priv = ieee80211_priv(dev);
3544
3545         schedule_work(&priv->reset_wq);
3546 }
3547
3548 void rtl8180_commit(struct net_device *dev)
3549 {
3550         struct r8180_priv *priv = ieee80211_priv(dev);
3551
3552         if (priv->up == 0)
3553                 return ;
3554
3555         del_timer_sync(&priv->watch_dog_timer);
3556         del_timer_sync(&priv->rateadapter_timer);
3557         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3558         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3559         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3560         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3561         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3562         del_timer_sync(&priv->SwAntennaDiversityTimer);
3563         ieee80211_softmac_stop_protocol(priv->ieee80211);
3564         rtl8180_irq_disable(dev);
3565         rtl8180_rtx_disable(dev);
3566         _rtl8180_up(dev);
3567 }
3568
3569 static void r8180_set_multicast(struct net_device *dev)
3570 {
3571         struct r8180_priv *priv = ieee80211_priv(dev);
3572         short promisc;
3573
3574         promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3575
3576         if (promisc != priv->promisc)
3577                 rtl8180_restart(dev);
3578
3579         priv->promisc = promisc;
3580 }
3581
3582 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3583 {
3584         struct r8180_priv *priv = ieee80211_priv(dev);
3585         struct sockaddr *addr = mac;
3586
3587         down(&priv->wx_sem);
3588
3589         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3590
3591         if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
3592                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3593
3594         if (priv->up) {
3595                 rtl8180_down(dev);
3596                 rtl8180_up(dev);
3597         }
3598
3599         up(&priv->wx_sem);
3600
3601         return 0;
3602 }
3603
3604 /* based on ipw2200 driver */
3605 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3606 {
3607         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3608         struct iwreq *wrq = (struct iwreq *) rq;
3609         int ret=-1;
3610
3611         switch (cmd) {
3612         case RTL_IOCTL_WPA_SUPPLICANT:
3613                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3614                 return ret;
3615         default:
3616                 return -EOPNOTSUPP;
3617         }
3618
3619         return -EOPNOTSUPP;
3620 }
3621
3622 static const struct net_device_ops rtl8180_netdev_ops = {
3623         .ndo_open               = rtl8180_open,
3624         .ndo_stop               = rtl8180_close,
3625         .ndo_get_stats          = rtl8180_stats,
3626         .ndo_tx_timeout         = rtl8180_restart,
3627         .ndo_do_ioctl           = rtl8180_ioctl,
3628         .ndo_set_multicast_list = r8180_set_multicast,
3629         .ndo_set_mac_address    = r8180_set_mac_adr,
3630         .ndo_validate_addr      = eth_validate_addr,
3631         .ndo_change_mtu         = eth_change_mtu,
3632         .ndo_start_xmit         = ieee80211_rtl_xmit,
3633 };
3634
3635 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3636                                        const struct pci_device_id *id)
3637 {
3638         unsigned long ioaddr = 0;
3639         struct net_device *dev = NULL;
3640         struct r8180_priv *priv= NULL;
3641         u8 unit = 0;
3642
3643         unsigned long pmem_start, pmem_len, pmem_flags;
3644
3645         DMESG("Configuring chip resources");
3646
3647         if( pci_enable_device (pdev) ){
3648                 DMESG("Failed to enable PCI device");
3649                 return -EIO;
3650         }
3651
3652         pci_set_master(pdev);
3653         pci_set_dma_mask(pdev, 0xffffff00ULL);
3654         pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
3655         dev = alloc_ieee80211(sizeof(struct r8180_priv));
3656         if (!dev)
3657                 return -ENOMEM;
3658         priv = ieee80211_priv(dev);
3659         priv->ieee80211 = netdev_priv(dev);
3660
3661         pci_set_drvdata(pdev, dev);
3662         SET_NETDEV_DEV(dev, &pdev->dev);
3663
3664         priv = ieee80211_priv(dev);
3665         priv->pdev = pdev;
3666
3667         pmem_start = pci_resource_start(pdev, 1);
3668         pmem_len = pci_resource_len(pdev, 1);
3669         pmem_flags = pci_resource_flags (pdev, 1);
3670
3671         if (!(pmem_flags & IORESOURCE_MEM)) {
3672                 DMESG("region #1 not a MMIO resource, aborting");
3673                 goto fail;
3674         }
3675
3676         if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3677                 DMESG("request_mem_region failed!");
3678                 goto fail;
3679         }
3680
3681         ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
3682         if( ioaddr == (unsigned long)NULL ){
3683                 DMESG("ioremap failed!");
3684                 goto fail1;
3685         }
3686
3687         dev->mem_start = ioaddr; // shared mem start
3688         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
3689
3690         pci_read_config_byte(pdev, 0x05, &unit);
3691         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3692
3693         dev->irq = pdev->irq;
3694         priv->irq = 0;
3695
3696         dev->netdev_ops = &rtl8180_netdev_ops;
3697         dev->wireless_handlers = &r8180_wx_handlers_def;
3698
3699         dev->type=ARPHRD_ETHER;
3700         dev->watchdog_timeo = HZ*3;
3701
3702         if (dev_alloc_name(dev, ifname) < 0){
3703                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3704                 ifname = "wlan%d";
3705                 dev_alloc_name(dev, ifname);
3706         }
3707
3708         if(rtl8180_init(dev)!=0){
3709                 DMESG("Initialization failed");
3710                 goto fail1;
3711         }
3712
3713         netif_carrier_off(dev);
3714
3715         register_netdev(dev);
3716
3717         rtl8180_proc_init_one(dev);
3718
3719         DMESG("Driver probe completed\n");
3720         return 0;
3721 fail1:
3722         if( dev->mem_start != (unsigned long)NULL ){
3723                 iounmap( (void *)dev->mem_start );
3724                 release_mem_region( pci_resource_start(pdev, 1),
3725                                     pci_resource_len(pdev, 1) );
3726         }
3727 fail:
3728         if(dev){
3729                 if (priv->irq) {
3730                         free_irq(dev->irq, dev);
3731                         dev->irq=0;
3732                 }
3733                 free_ieee80211(dev);
3734         }
3735
3736         pci_disable_device(pdev);
3737
3738         DMESG("wlan driver load failed\n");
3739         pci_set_drvdata(pdev, NULL);
3740         return -ENODEV;
3741 }
3742
3743 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
3744 {
3745         struct r8180_priv *priv;
3746         struct net_device *dev = pci_get_drvdata(pdev);
3747
3748         if (dev) {
3749                 unregister_netdev(dev);
3750
3751                 priv = ieee80211_priv(dev);
3752
3753                 rtl8180_proc_remove_one(dev);
3754                 rtl8180_down(dev);
3755                 priv->rf_close(dev);
3756                 rtl8180_reset(dev);
3757                 mdelay(10);
3758
3759                 if(priv->irq){
3760                         DMESG("Freeing irq %d",dev->irq);
3761                         free_irq(dev->irq, dev);
3762                         priv->irq=0;
3763                 }
3764
3765                 free_rx_desc_ring(dev);
3766                 free_tx_desc_rings(dev);
3767
3768                 if( dev->mem_start != (unsigned long)NULL ){
3769                         iounmap( (void *)dev->mem_start );
3770                         release_mem_region( pci_resource_start(pdev, 1),
3771                                             pci_resource_len(pdev, 1) );
3772                 }
3773
3774                 free_ieee80211(dev);
3775         }
3776         pci_disable_device(pdev);
3777
3778         DMESG("wlan driver removed\n");
3779 }
3780
3781 /* fun with the built-in ieee80211 stack... */
3782 extern int ieee80211_crypto_init(void);
3783 extern void ieee80211_crypto_deinit(void);
3784 extern int ieee80211_crypto_tkip_init(void);
3785 extern void ieee80211_crypto_tkip_exit(void);
3786 extern int ieee80211_crypto_ccmp_init(void);
3787 extern void ieee80211_crypto_ccmp_exit(void);
3788 extern int ieee80211_crypto_wep_init(void);
3789 extern void ieee80211_crypto_wep_exit(void);
3790
3791 static int __init rtl8180_pci_module_init(void)
3792 {
3793         int ret;
3794
3795         ret = ieee80211_crypto_init();
3796         if (ret) {
3797                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
3798                 return ret;
3799         }
3800         ret = ieee80211_crypto_tkip_init();
3801         if (ret) {
3802                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
3803                 return ret;
3804         }
3805         ret = ieee80211_crypto_ccmp_init();
3806         if (ret) {
3807                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
3808                 return ret;
3809         }
3810         ret = ieee80211_crypto_wep_init();
3811         if (ret) {
3812                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
3813                 return ret;
3814         }
3815
3816         printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3817         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
3818         DMESG("Initializing module");
3819         DMESG("Wireless extensions version %d", WIRELESS_EXT);
3820         rtl8180_proc_module_init();
3821
3822       if (pci_register_driver(&rtl8180_pci_driver)) {
3823                 DMESG("No device found");
3824                 return -ENODEV;
3825         }
3826         return 0;
3827 }
3828
3829 static void __exit rtl8180_pci_module_exit(void)
3830 {
3831         pci_unregister_driver (&rtl8180_pci_driver);
3832         rtl8180_proc_module_remove();
3833         ieee80211_crypto_tkip_exit();
3834         ieee80211_crypto_ccmp_exit();
3835         ieee80211_crypto_wep_exit();
3836         ieee80211_crypto_deinit();
3837         DMESG("Exiting");
3838 }
3839
3840 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3841 {
3842         unsigned long flags;
3843         short enough_desc;
3844         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3845
3846         spin_lock_irqsave(&priv->tx_lock,flags);
3847         enough_desc = check_nic_enought_desc(dev,pri);
3848         spin_unlock_irqrestore(&priv->tx_lock,flags);
3849
3850         if(enough_desc)
3851                 ieee80211_rtl_wake_queue(priv->ieee80211);
3852 }
3853
3854 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
3855 {
3856         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3857         u32 *tail; //tail virtual addr
3858         u32 *head; //head virtual addr
3859         u32 *begin;//start of ring virtual addr
3860         u32 *nicv; //nic pointer virtual addr
3861         u32 nic; //nic pointer physical addr
3862         u32 nicbegin;// start of ring physical addr
3863         unsigned long flag;
3864         /* physical addr are ok on 32 bits since we set DMA mask*/
3865         int offs;
3866         int j,i;
3867         int hd;
3868         if (error) priv->stats.txretry++; //tony 20060601
3869         spin_lock_irqsave(&priv->tx_lock,flag);
3870         switch(pri) {
3871         case MANAGE_PRIORITY:
3872                 tail = priv->txmapringtail;
3873                 begin = priv->txmapring;
3874                 head = priv->txmapringhead;
3875                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
3876                 nicbegin = priv->txmapringdma;
3877                 break;
3878         case BK_PRIORITY:
3879                 tail = priv->txbkpringtail;
3880                 begin = priv->txbkpring;
3881                 head = priv->txbkpringhead;
3882                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
3883                 nicbegin = priv->txbkpringdma;
3884                 break;
3885         case BE_PRIORITY:
3886                 tail = priv->txbepringtail;
3887                 begin = priv->txbepring;
3888                 head = priv->txbepringhead;
3889                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
3890                 nicbegin = priv->txbepringdma;
3891                 break;
3892         case VI_PRIORITY:
3893                 tail = priv->txvipringtail;
3894                 begin = priv->txvipring;
3895                 head = priv->txvipringhead;
3896                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
3897                 nicbegin = priv->txvipringdma;
3898                 break;
3899         case VO_PRIORITY:
3900                 tail = priv->txvopringtail;
3901                 begin = priv->txvopring;
3902                 head = priv->txvopringhead;
3903                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
3904                 nicbegin = priv->txvopringdma;
3905                 break;
3906         case HI_PRIORITY:
3907                 tail = priv->txhpringtail;
3908                 begin = priv->txhpring;
3909                 head = priv->txhpringhead;
3910                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
3911                 nicbegin = priv->txhpringdma;
3912                 break;
3913
3914         default:
3915                 spin_unlock_irqrestore(&priv->tx_lock,flag);
3916                 return ;
3917         }
3918
3919         nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
3920         if((head <= tail && (nicv > tail || nicv < head)) ||
3921                 (head > tail && (nicv > tail && nicv < head))){
3922                         DMESGW("nic has lost pointer");
3923                         spin_unlock_irqrestore(&priv->tx_lock,flag);
3924                         rtl8180_restart(dev);
3925                         return;
3926                 }
3927
3928         /* we check all the descriptors between the head and the nic,
3929          * but not the currently pointed by the nic (the next to be txed)
3930          * and the previous of the pointed (might be in process ??)
3931         */
3932         offs = (nic - nicbegin);
3933         offs = offs / 8 /4;
3934         hd = (head - begin) /8;
3935
3936         if(offs >= hd)
3937                 j = offs - hd;
3938         else
3939                 j = offs + (priv->txringcount -1 -hd);
3940
3941         j-=2;
3942         if(j<0) j=0;
3943
3944         for(i=0;i<j;i++)
3945         {
3946                 if((*head) & (1<<31))
3947                         break;
3948                 if(((*head)&(0x10000000)) != 0){
3949                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3950                         if (!error)
3951                                 priv->NumTxOkTotal++;
3952                 }
3953
3954                 if (!error)
3955                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3956
3957                 *head = *head &~ (1<<31);
3958
3959                 if((head - begin)/8 == priv->txringcount-1)
3960                         head=begin;
3961                 else
3962                         head+=8;
3963         }
3964
3965         /* the head has been moved to the last certainly TXed
3966          * (or at least processed by the nic) packet.
3967          * The driver take forcefully owning of all these packets
3968          * If the packet previous of the nic pointer has been
3969          * processed this doesn't matter: it will be checked
3970          * here at the next round. Anyway if no more packet are
3971          * TXed no memory leak occour at all.
3972          */
3973
3974         switch(pri) {
3975         case MANAGE_PRIORITY:
3976                 priv->txmapringhead = head;
3977
3978                 if(priv->ack_tx_to_ieee){
3979                         if(rtl8180_is_tx_queue_empty(dev)){
3980                                 priv->ack_tx_to_ieee = 0;
3981                                 ieee80211_ps_tx_ack(priv->ieee80211,!error);
3982                         }
3983                 }
3984                 break;
3985         case BK_PRIORITY:
3986                 priv->txbkpringhead = head;
3987                 break;
3988         case BE_PRIORITY:
3989                 priv->txbepringhead = head;
3990                 break;
3991         case VI_PRIORITY:
3992                 priv->txvipringhead = head;
3993                 break;
3994         case VO_PRIORITY:
3995                 priv->txvopringhead = head;
3996                 break;
3997         case HI_PRIORITY:
3998                 priv->txhpringhead = head;
3999                 break;
4000         }
4001
4002         spin_unlock_irqrestore(&priv->tx_lock,flag);
4003 }
4004
4005 void rtl8180_tx_irq_wq(struct work_struct *work)
4006 {
4007         struct delayed_work *dwork = to_delayed_work(work);
4008         struct ieee80211_device * ieee = (struct ieee80211_device*)
4009                                                container_of(dwork, struct ieee80211_device, watch_dog_wq);
4010         struct net_device *dev = ieee->dev;
4011
4012         rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
4013 }
4014 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
4015 {
4016         struct net_device *dev = (struct net_device *) netdev;
4017         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4018         unsigned long flags;
4019         u32 inta;
4020
4021         /* We should return IRQ_NONE, but for now let me keep this */
4022         if(priv->irq_enabled == 0) return IRQ_HANDLED;
4023
4024         spin_lock_irqsave(&priv->irq_th_lock,flags);
4025
4026         //ISR: 4bytes
4027         inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
4028         write_nic_dword(dev,ISR,inta); // reset int situation
4029
4030         priv->stats.shints++;
4031
4032         if(!inta){
4033                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
4034                 return IRQ_HANDLED;
4035         /*
4036            most probably we can safely return IRQ_NONE,
4037            but for now is better to avoid problems
4038         */
4039         }
4040
4041         if (inta == 0xffff) {
4042                 /* HW disappared */
4043                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4044                 return IRQ_HANDLED;
4045         }
4046
4047         priv->stats.ints++;
4048
4049         if(!netif_running(dev)) {
4050                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
4051                 return IRQ_HANDLED;
4052         }
4053
4054         if (inta & ISR_TimeOut)
4055                 write_nic_dword(dev, TimerInt, 0);
4056
4057         if (inta & ISR_TBDOK)
4058                 priv->stats.txbeacon++;
4059
4060         if (inta & ISR_TBDER)
4061                 priv->stats.txbeaconerr++;
4062
4063         if (inta & IMR_TMGDOK)
4064                 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
4065
4066         if(inta & ISR_THPDER){
4067                 priv->stats.txhperr++;
4068                 rtl8180_tx_isr(dev,HI_PRIORITY,1);
4069                 priv->ieee80211->stats.tx_errors++;
4070         }
4071
4072         if(inta & ISR_THPDOK){ //High priority tx ok
4073                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4074                 priv->stats.txhpokint++;
4075                 rtl8180_tx_isr(dev,HI_PRIORITY,0);
4076         }
4077
4078         if(inta & ISR_RER) {
4079                 priv->stats.rxerr++;
4080         }
4081         if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
4082                 priv->stats.txbkperr++;
4083                 priv->ieee80211->stats.tx_errors++;
4084                 rtl8180_tx_isr(dev,BK_PRIORITY,1);
4085                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4086         }
4087
4088         if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
4089                 priv->stats.txbeperr++;
4090                 priv->ieee80211->stats.tx_errors++;
4091                 rtl8180_tx_isr(dev,BE_PRIORITY,1);
4092                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4093         }
4094         if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
4095                 priv->stats.txnperr++;
4096                 priv->ieee80211->stats.tx_errors++;
4097                 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
4098                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
4099         }
4100
4101         if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
4102                 priv->stats.txlperr++;
4103                 priv->ieee80211->stats.tx_errors++;
4104                 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
4105                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4106         }
4107
4108         if(inta & ISR_ROK){
4109                 priv->stats.rxint++;
4110                 tasklet_schedule(&priv->irq_rx_tasklet);
4111         }
4112
4113         if(inta & ISR_RQoSOK ){
4114                 priv->stats.rxint++;
4115                 tasklet_schedule(&priv->irq_rx_tasklet);
4116         }
4117         if(inta & ISR_BcnInt) {
4118                 rtl8180_prepare_beacon(dev);
4119         }
4120
4121         if(inta & ISR_RDU){
4122                 DMESGW("No RX descriptor available");
4123                 priv->stats.rxrdu++;
4124                 tasklet_schedule(&priv->irq_rx_tasklet);
4125         }
4126
4127         if(inta & ISR_RXFOVW){
4128                 priv->stats.rxoverflow++;
4129                 tasklet_schedule(&priv->irq_rx_tasklet);
4130         }
4131
4132         if (inta & ISR_TXFOVW)
4133                 priv->stats.txoverflow++;
4134
4135         if(inta & ISR_TNPDOK){ //Normal priority tx ok
4136                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4137                 priv->stats.txnpokint++;
4138                 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
4139         }
4140
4141         if(inta & ISR_TLPDOK){ //Low priority tx ok
4142                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4143                 priv->stats.txlpokint++;
4144                 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
4145                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4146         }
4147
4148         if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
4149                 priv->stats.txbkpokint++;
4150                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4151                 rtl8180_tx_isr(dev,BK_PRIORITY,0);
4152                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4153         }
4154
4155         if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
4156                 priv->stats.txbeperr++;
4157                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4158                 rtl8180_tx_isr(dev,BE_PRIORITY,0);
4159                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4160         }
4161         force_pci_posting(dev);
4162         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
4163
4164         return IRQ_HANDLED;
4165 }
4166
4167 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
4168 {
4169         rtl8180_rx(priv->dev);
4170 }
4171
4172 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4173 {
4174         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
4175         struct net_device *dev = ieee->dev;
4176         struct r8180_priv *priv = ieee80211_priv(dev);
4177         u8 btPSR;
4178         u8 btConfig0;
4179         RT_RF_POWER_STATE       eRfPowerStateToSet;
4180         bool    bActuallySet=false;
4181
4182         char *argv[3];
4183         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
4184         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4185         static int readf_count = 0;
4186
4187         if(readf_count % 10 == 0)
4188                 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4189
4190         readf_count = (readf_count+1)%0xffff;
4191         /* We should turn off LED before polling FF51[4]. */
4192
4193         /* Turn off LED. */
4194         btPSR = read_nic_byte(dev, PSR);
4195         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
4196
4197         /* It need to delay 4us suggested by Jong, 2008-01-16 */
4198         udelay(4);
4199
4200         /* HW radio On/Off according to the value of FF51[4](config0) */
4201         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
4202
4203         /* Turn on LED. */
4204         write_nic_byte(dev, PSR, btPSR | BIT3);
4205
4206         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
4207
4208         if ((priv->ieee80211->bHwRadioOff == true) &&
4209            (eRfPowerStateToSet == eRfOn)) {
4210                 priv->ieee80211->bHwRadioOff = false;
4211                 bActuallySet = true;
4212         } else if ((priv->ieee80211->bHwRadioOff == false) &&
4213                   (eRfPowerStateToSet == eRfOff)) {
4214                 priv->ieee80211->bHwRadioOff = true;
4215                 bActuallySet = true;
4216         }
4217
4218         if (bActuallySet) {
4219                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
4220
4221                 /* To update the UI status for Power status changed */
4222                 if (priv->ieee80211->bHwRadioOff == true)
4223                         argv[1] = "RFOFF";
4224                 else
4225                         argv[1] = "RFON";
4226                 argv[0] = RadioPowerPath;
4227                 argv[2] = NULL;
4228
4229                 call_usermodehelper(RadioPowerPath, argv, envp, 1);
4230         }
4231 }
4232
4233 static u8 read_acadapter_file(char *filename)
4234 {
4235         return 0;
4236 }
4237
4238 module_init(rtl8180_pci_module_init);
4239 module_exit(rtl8180_pci_module_exit);