3 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
5 * Copyright © 2005 Agere Systems Inc.
9 *------------------------------------------------------------------------------
11 * et131x_initpci.c - Routines and data used to register the driver with the
12 * PCI (and PCI Express) subsystem, as well as basic driver
15 *------------------------------------------------------------------------------
19 * This software is provided subject to the following terms and conditions,
20 * which you should read carefully before using the software. Using this
21 * software indicates your acceptance of these terms and conditions. If you do
22 * not agree with these terms and conditions, do not use the software.
24 * Copyright © 2005 Agere Systems Inc.
25 * All rights reserved.
27 * Redistribution and use in source or binary forms, with or without
28 * modifications, are permitted provided that the following conditions are met:
30 * . Redistributions of source code must retain the above copyright notice, this
31 * list of conditions and the following Disclaimer as comments in the code as
32 * well as in the documentation and/or other materials provided with the
35 * . Redistributions in binary form must reproduce the above copyright notice,
36 * this list of conditions and the following Disclaimer in the documentation
37 * and/or other materials provided with the distribution.
39 * . Neither the name of Agere Systems Inc. nor the names of the contributors
40 * may be used to endorse or promote products derived from this software
41 * without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
46 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
47 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
48 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
49 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
50 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
52 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
53 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
55 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
60 #include "et131x_version.h"
61 #include "et131x_defs.h"
63 #include <linux/pci.h>
64 #include <linux/init.h>
65 #include <linux/module.h>
66 #include <linux/types.h>
67 #include <linux/kernel.h>
69 #include <linux/sched.h>
70 #include <linux/ptrace.h>
71 #include <linux/slab.h>
72 #include <linux/ctype.h>
73 #include <linux/string.h>
74 #include <linux/timer.h>
75 #include <linux/interrupt.h>
77 #include <linux/delay.h>
79 #include <linux/bitops.h>
80 #include <asm/system.h>
82 #include <linux/netdevice.h>
83 #include <linux/etherdevice.h>
84 #include <linux/skbuff.h>
85 #include <linux/if_arp.h>
86 #include <linux/ioport.h>
87 #include <linux/random.h>
89 #include "et1310_phy.h"
90 #include "et1310_pm.h"
91 #include "et1310_jagcore.h"
93 #include "et131x_adapter.h"
94 #include "et131x_netdev.h"
95 #include "et131x_config.h"
96 #include "et131x_isr.h"
98 #include "et1310_address_map.h"
99 #include "et1310_tx.h"
100 #include "et1310_rx.h"
101 #include "et1310_mac.h"
102 #include "et1310_eeprom.h"
105 /* Defines for Parameter Default/Min/Max vaules */
106 #define PARM_SPEED_DUPLEX_MIN 0
107 #define PARM_SPEED_DUPLEX_MAX 5
109 /* Module parameter for manual speed setting
110 * Set Link speed and dublex manually (0-5) [0]
111 * 1 : 10Mb Half-Duplex
112 * 2 : 10Mb Full-Duplex
113 * 3 : 100Mb Half-Duplex
114 * 4 : 100Mb Full-Duplex
115 * 5 : 1000Mb Full-Duplex
116 * 0 : Auto Speed Auto Duplex // default
118 static u32 et131x_speed_set;
119 module_param(et131x_speed_set, uint, 0);
120 MODULE_PARM_DESC(et131x_speed_set,
121 "Set Link speed and dublex manually (0-5) [0] \n 1 : 10Mb Half-Duplex \n 2 : 10Mb Full-Duplex \n 3 : 100Mb Half-Duplex \n 4 : 100Mb Full-Duplex \n 5 : 1000Mb Full-Duplex \n 0 : Auto Speed Auto Dublex");
124 * et131x_hwaddr_init - set up the MAC Address on the ET1310
125 * @adapter: pointer to our private adapter structure
127 void et131x_hwaddr_init(struct et131x_adapter *adapter)
129 /* If have our default mac from init and no mac address from
130 * EEPROM then we need to generate the last octet and set it on the
133 if (adapter->PermanentAddress[0] == 0x00 &&
134 adapter->PermanentAddress[1] == 0x00 &&
135 adapter->PermanentAddress[2] == 0x00 &&
136 adapter->PermanentAddress[3] == 0x00 &&
137 adapter->PermanentAddress[4] == 0x00 &&
138 adapter->PermanentAddress[5] == 0x00) {
140 * We need to randomly generate the last octet so we
141 * decrease our chances of setting the mac address to
142 * same as another one of our cards in the system
144 get_random_bytes(&adapter->CurrentAddress[5], 1);
146 * We have the default value in the register we are
147 * working with so we need to copy the current
148 * address into the permanent address
150 memcpy(adapter->PermanentAddress,
151 adapter->CurrentAddress, ETH_ALEN);
153 /* We do not have an override address, so set the
154 * current address to the permanent address and add
157 memcpy(adapter->CurrentAddress,
158 adapter->PermanentAddress, ETH_ALEN);
164 * et131x_pci_init - initial PCI setup
165 * @adapter: pointer to our private adapter structure
166 * @pdev: our PCI device
168 * Perform the initial setup of PCI registers and if possible initialise
169 * the MAC address. At this point the I/O registers have yet to be mapped
172 static int et131x_pci_init(struct et131x_adapter *adapter,
173 struct pci_dev *pdev)
179 if (et131x_init_eeprom(adapter) < 0)
182 /* Let's set up the PORT LOGIC Register. First we need to know what
183 * the max_payload_size is
185 if (pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &max_payload)) {
187 "Could not read PCI config space for Max Payload Size\n");
191 /* Program the Ack/Nak latency and replay timers */
192 max_payload &= 0x07; /* Only the lower 3 bits are valid */
194 if (max_payload < 2) {
195 static const u16 AckNak[2] = { 0x76, 0xD0 };
196 static const u16 Replay[2] = { 0x1E0, 0x2ED };
198 if (pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
199 AckNak[max_payload])) {
201 "Could not write PCI config space for ACK/NAK\n");
204 if (pci_write_config_word(pdev, ET1310_PCI_REPLAY,
205 Replay[max_payload])) {
207 "Could not write PCI config space for Replay Timer\n");
212 /* l0s and l1 latency timers. We are using default values.
213 * Representing 001 for L0s and 010 for L1
215 if (pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11)) {
217 "Could not write PCI config space for Latency Timers\n");
221 /* Change the max read size to 2k */
222 if (pci_read_config_byte(pdev, 0x51, &read_size_reg)) {
224 "Could not read PCI config space for Max read size\n");
228 read_size_reg &= 0x8f;
229 read_size_reg |= 0x40;
231 if (pci_write_config_byte(pdev, 0x51, read_size_reg)) {
233 "Could not write PCI config space for Max read size\n");
237 /* Get MAC address from config space if an eeprom exists, otherwise
238 * the MAC address there will not be valid
240 if (!adapter->has_eeprom) {
241 et131x_hwaddr_init(adapter);
245 for (i = 0; i < ETH_ALEN; i++) {
246 if (pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i,
247 adapter->PermanentAddress + i)) {
248 dev_err(&pdev->dev, "Could not read PCI config space for MAC address\n");
252 memcpy(adapter->CurrentAddress, adapter->PermanentAddress, ETH_ALEN);
257 * et131x_error_timer_handler
258 * @data: timer-specific variable; here a pointer to our adapter structure
260 * The routine called when the error timer expires, to track the number of
263 void et131x_error_timer_handler(unsigned long data)
265 struct et131x_adapter *etdev = (struct et131x_adapter *) data;
268 pm_csr = readl(&etdev->regs->global.pm_csr);
270 if ((pm_csr & ET_PM_PHY_SW_COMA) == 0)
271 UpdateMacStatHostCounters(etdev);
273 dev_err(&etdev->pdev->dev,
274 "No interrupts, in PHY coma, pm_csr = 0x%x\n", pm_csr);
276 if (!etdev->Bmsr.bits.link_status &&
277 etdev->RegistryPhyComa &&
278 etdev->PoMgmt.TransPhyComaModeOnBoot < 11) {
279 etdev->PoMgmt.TransPhyComaModeOnBoot++;
282 if (etdev->PoMgmt.TransPhyComaModeOnBoot == 10) {
283 if (!etdev->Bmsr.bits.link_status
284 && etdev->RegistryPhyComa) {
285 if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
286 /* NOTE - This was originally a 'sync with
287 * interrupt'. How to do that under Linux?
289 et131x_enable_interrupts(etdev);
290 EnablePhyComa(etdev);
295 /* This is a periodic timer, so reschedule */
296 mod_timer(&etdev->ErrorTimer, jiffies +
297 TX_ERROR_PERIOD * HZ / 1000);
301 * et131x_link_detection_handler
303 * Timer function for link up at driver load time
305 void et131x_link_detection_handler(unsigned long data)
307 struct et131x_adapter *etdev = (struct et131x_adapter *) data;
310 if (etdev->MediaState == 0) {
311 spin_lock_irqsave(&etdev->Lock, flags);
313 etdev->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
314 etdev->Flags &= ~fMP_ADAPTER_LINK_DETECTION;
316 spin_unlock_irqrestore(&etdev->Lock, flags);
318 netif_carrier_off(etdev->netdev);
323 * et131x_configure_global_regs - configure JAGCore global regs
324 * @etdev: pointer to our adapter structure
326 * Used to configure the global registers on the JAGCore
328 void ConfigGlobalRegs(struct et131x_adapter *etdev)
330 struct global_regs __iomem *regs = &etdev->regs->global;
332 writel(0, ®s->rxq_start_addr);
333 writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr);
335 if (etdev->RegistryJumboPacket < 2048) {
336 /* Tx / RxDMA and Tx/Rx MAC interfaces have a 1k word
337 * block of RAM that the driver can split between Tx
338 * and Rx as it desires. Our default is to split it
341 writel(PARM_RX_MEM_END_DEF, ®s->rxq_end_addr);
342 writel(PARM_RX_MEM_END_DEF + 1, ®s->txq_start_addr);
343 } else if (etdev->RegistryJumboPacket < 8192) {
344 /* For jumbo packets > 2k but < 8k, split 50-50. */
345 writel(INTERNAL_MEM_RX_OFFSET, ®s->rxq_end_addr);
346 writel(INTERNAL_MEM_RX_OFFSET + 1, ®s->txq_start_addr);
348 /* 9216 is the only packet size greater than 8k that
349 * is available. The Tx buffer has to be big enough
350 * for one whole packet on the Tx side. We'll make
351 * the Tx 9408, and give the rest to Rx
353 writel(0x01b3, ®s->rxq_end_addr);
354 writel(0x01b4, ®s->txq_start_addr);
357 /* Initialize the loopback register. Disable all loopbacks. */
358 writel(0, ®s->loopback);
361 writel(0, ®s->msi_config);
363 /* By default, disable the watchdog timer. It will be enabled when
364 * a packet is queued.
366 writel(0, ®s->watchdog_timer);
371 * et131x_adapter_setup - Set the adapter up as per cassini+ documentation
372 * @adapter: pointer to our private adapter structure
374 * Returns 0 on success, errno on failure (as defined in errno.h)
376 int et131x_adapter_setup(struct et131x_adapter *etdev)
380 /* Configure the JAGCore */
381 ConfigGlobalRegs(etdev);
383 ConfigMACRegs1(etdev);
385 /* Configure the MMC registers */
386 /* All we need to do is initialize the Memory Control Register */
387 writel(ET_MMC_ENABLE, &etdev->regs->mmc.mmc_ctrl);
389 ConfigRxMacRegs(etdev);
390 ConfigTxMacRegs(etdev);
392 ConfigRxDmaRegs(etdev);
393 ConfigTxDmaRegs(etdev);
395 ConfigMacStatRegs(etdev);
397 /* Move the following code to Timer function?? */
398 status = et131x_xcvr_find(etdev);
401 dev_warn(&etdev->pdev->dev, "Could not find the xcvr\n");
403 /* Prepare the TRUEPHY library. */
404 ET1310_PhyInit(etdev);
406 /* Reset the phy now so changes take place */
407 ET1310_PhyReset(etdev);
410 ET1310_PhyPowerDown(etdev, 1);
413 * We need to turn off 1000 base half dulplex, the mac does not
414 * support it. For the 10/100 part, turn off all gig advertisement
416 if (etdev->pdev->device != ET131X_PCI_DEVICE_ID_FAST)
417 ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
419 ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
422 ET1310_PhyPowerDown(etdev, 0);
424 et131x_setphy_normal(etdev);
429 * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
430 * @adapter: pointer to our private adapter structure
432 void et131x_soft_reset(struct et131x_adapter *adapter)
434 /* Disable MAC Core */
435 writel(0xc00f0000, &adapter->regs->mac.cfg1);
437 /* Set everything to a reset value */
438 writel(0x7F, &adapter->regs->global.sw_reset);
439 writel(0x000f0000, &adapter->regs->mac.cfg1);
440 writel(0x00000000, &adapter->regs->mac.cfg1);
444 * et131x_align_allocated_memory - Align allocated memory on a given boundary
445 * @adapter: pointer to our adapter structure
446 * @phys_addr: pointer to Physical address
447 * @offset: pointer to the offset variable
448 * @mask: correct mask
450 void et131x_align_allocated_memory(struct et131x_adapter *adapter,
452 uint64_t *offset, uint64_t mask)
458 new_addr = *phys_addr & ~mask;
460 if (new_addr != *phys_addr) {
461 /* Move to next aligned block */
462 new_addr += mask + 1;
463 /* Return offset for adjusting virt addr */
464 *offset = new_addr - *phys_addr;
465 /* Return new physical address */
466 *phys_addr = new_addr;
471 * et131x_adapter_memory_alloc
472 * @adapter: pointer to our private adapter structure
474 * Returns 0 on success, errno on failure (as defined in errno.h).
476 * Allocate all the memory blocks for send, receive and others.
478 int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
482 /* Allocate memory for the Tx Ring */
483 status = et131x_tx_dma_memory_alloc(adapter);
485 dev_err(&adapter->pdev->dev,
486 "et131x_tx_dma_memory_alloc FAILED\n");
489 /* Receive buffer memory allocation */
490 status = et131x_rx_dma_memory_alloc(adapter);
492 dev_err(&adapter->pdev->dev,
493 "et131x_rx_dma_memory_alloc FAILED\n");
494 et131x_tx_dma_memory_free(adapter);
498 /* Init receive data structures */
499 status = et131x_init_recv(adapter);
501 dev_err(&adapter->pdev->dev,
502 "et131x_init_recv FAILED\n");
503 et131x_tx_dma_memory_free(adapter);
504 et131x_rx_dma_memory_free(adapter);
510 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
511 * @adapter: pointer to our private adapter structure
513 void et131x_adapter_memory_free(struct et131x_adapter *adapter)
515 /* Free DMA memory */
516 et131x_tx_dma_memory_free(adapter);
517 et131x_rx_dma_memory_free(adapter);
523 * et131x_adapter_init
524 * @etdev: pointer to the private adapter struct
525 * @pdev: pointer to the PCI device
527 * Initialize the data structures for the et131x_adapter object and link
528 * them together with the platform provided device structures.
532 static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
533 struct pci_dev *pdev)
535 static const u8 default_mac[] = { 0x00, 0x05, 0x3d, 0x00, 0x02, 0x00 };
536 static const u8 duplex[] = { 0, 1, 2, 1, 2, 2 };
537 static const u16 speed[] = { 0, 10, 10, 100, 100, 1000 };
539 struct et131x_adapter *etdev;
541 /* Setup the fundamental net_device and private adapter structure elements */
542 SET_NETDEV_DEV(netdev, &pdev->dev);
544 /* Allocate private adapter struct and copy in relevant information */
545 etdev = netdev_priv(netdev);
546 etdev->pdev = pci_dev_get(pdev);
547 etdev->netdev = netdev;
549 /* Do the same for the netdev struct */
550 netdev->irq = pdev->irq;
551 netdev->base_addr = pci_resource_start(pdev, 0);
553 /* Initialize spinlocks here */
554 spin_lock_init(&etdev->Lock);
555 spin_lock_init(&etdev->TCBSendQLock);
556 spin_lock_init(&etdev->TCBReadyQLock);
557 spin_lock_init(&etdev->SendHWLock);
558 spin_lock_init(&etdev->RcvLock);
559 spin_lock_init(&etdev->RcvPendLock);
560 spin_lock_init(&etdev->FbrLock);
561 spin_lock_init(&etdev->PHYLock);
563 /* Parse configuration parameters into the private adapter struct */
564 if (et131x_speed_set)
565 dev_info(&etdev->pdev->dev,
566 "Speed set manually to : %d \n", et131x_speed_set);
568 etdev->SpeedDuplex = et131x_speed_set;
569 etdev->RegistryJumboPacket = 1514; /* 1514-9216 */
571 /* Set the MAC address to a default */
572 memcpy(etdev->CurrentAddress, default_mac, ETH_ALEN);
574 /* Decode SpeedDuplex
576 * Set up as if we are auto negotiating always and then change if we
579 * If we are the 10/100 device, and gigabit is somehow requested then
580 * knock it down to 100 full.
582 if (etdev->pdev->device == ET131X_PCI_DEVICE_ID_FAST &&
583 etdev->SpeedDuplex == 5)
584 etdev->SpeedDuplex = 4;
586 etdev->AiForceSpeed = speed[etdev->SpeedDuplex];
587 etdev->AiForceDpx = duplex[etdev->SpeedDuplex]; /* Auto FDX */
593 * et131x_pci_setup - Perform device initialization
594 * @pdev: a pointer to the device's pci_dev structure
595 * @ent: this device's entry in the pci_device_id table
597 * Returns 0 on success, errno on failure (as defined in errno.h)
599 * Registered in the pci_driver structure, this function is called when the
600 * PCI subsystem finds a new PCI device which matches the information
601 * contained in the pci_device_id table. This routine is the equivalent to
602 * a device insertion routine.
605 static int __devinit et131x_pci_setup(struct pci_dev *pdev,
606 const struct pci_device_id *ent)
611 struct net_device *netdev;
612 struct et131x_adapter *adapter;
614 /* Enable the device via the PCI subsystem */
615 if (pci_enable_device(pdev) != 0) {
617 "pci_enable_device() failed\n");
621 /* Perform some basic PCI checks */
622 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
624 "Can't find PCI device's base address\n");
628 if (pci_request_regions(pdev, DRIVER_NAME)) {
630 "Can't get PCI resources\n");
634 /* Enable PCI bus mastering */
635 pci_set_master(pdev);
637 /* Query PCI for Power Mgmt Capabilities
639 * NOTE: Now reading PowerMgmt in another location; is this still
642 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
645 "Cannot find Power Management capabilities\n");
647 goto err_release_res;
650 /* Check the DMA addressing support of this device */
651 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
652 pci_using_dac = true;
654 result = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
657 "Unable to obtain 64 bit DMA for consistent allocations\n");
658 goto err_release_res;
660 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
661 pci_using_dac = false;
664 "No usable DMA addressing method\n");
666 goto err_release_res;
669 /* Allocate netdev and private adapter structs */
670 netdev = et131x_device_alloc();
671 if (netdev == NULL) {
672 dev_err(&pdev->dev, "Couldn't alloc netdev struct\n");
674 goto err_release_res;
676 adapter = et131x_adapter_init(netdev, pdev);
677 /* Initialise the PCI setup for the device */
678 et131x_pci_init(adapter, pdev);
680 /* Map the bus-relative registers to system virtual memory */
681 adapter->regs = pci_ioremap_bar(pdev, 0);
682 if (adapter->regs == NULL) {
683 dev_err(&pdev->dev, "Cannot map device registers\n");
688 /* If Phy COMA mode was enabled when we went down, disable it here. */
689 writel(ET_PMCSR_INIT, &adapter->regs->global.pm_csr);
691 /* Issue a global reset to the et1310 */
692 et131x_soft_reset(adapter);
694 /* Disable all interrupts (paranoid) */
695 et131x_disable_interrupts(adapter);
697 /* Allocate DMA memory */
698 result = et131x_adapter_memory_alloc(adapter);
700 dev_err(&pdev->dev, "Could not alloc adapater memory (DMA)\n");
704 /* Init send data structures */
705 et131x_init_send(adapter);
708 * Set up the task structure for the ISR's deferred handler
710 INIT_WORK(&adapter->task, et131x_isr_handler);
712 /* Copy address into the net_device struct */
713 memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN);
715 /* Setup et1310 as per the documentation */
716 et131x_adapter_setup(adapter);
718 /* Create a timer to count errors received by the NIC */
719 init_timer(&adapter->ErrorTimer);
721 adapter->ErrorTimer.expires = jiffies + TX_ERROR_PERIOD * HZ / 1000;
722 adapter->ErrorTimer.function = et131x_error_timer_handler;
723 adapter->ErrorTimer.data = (unsigned long)adapter;
725 /* Initialize link state */
726 et131x_link_detection_handler((unsigned long)adapter);
728 /* Intialize variable for counting how long we do not have
730 adapter->PoMgmt.TransPhyComaModeOnBoot = 0;
732 /* We can enable interrupts now
734 * NOTE - Because registration of interrupt handler is done in the
735 * device's open(), defer enabling device interrupts to that
739 /* Register the net_device struct with the Linux network layer */
740 result = register_netdev(netdev);
742 dev_err(&pdev->dev, "register_netdev() failed\n");
746 /* Register the net_device struct with the PCI subsystem. Save a copy
747 * of the PCI config space for this device now that the device has
748 * been initialized, just in case it needs to be quickly restored.
750 pci_set_drvdata(pdev, netdev);
751 pci_save_state(adapter->pdev);
755 et131x_adapter_memory_free(adapter);
757 iounmap(adapter->regs);
762 pci_release_regions(pdev);
764 pci_disable_device(pdev);
770 * @pdev: a pointer to the device's pci_dev structure
772 * Registered in the pci_driver structure, this function is called when the
773 * PCI subsystem detects that a PCI device which matches the information
774 * contained in the pci_device_id table has been removed.
777 static void __devexit et131x_pci_remove(struct pci_dev *pdev)
779 struct net_device *netdev;
780 struct et131x_adapter *adapter;
782 /* Retrieve the net_device pointer from the pci_dev struct, as well
783 * as the private adapter struct
785 netdev = (struct net_device *) pci_get_drvdata(pdev);
786 adapter = netdev_priv(netdev);
788 /* Perform device cleanup */
789 unregister_netdev(netdev);
790 et131x_adapter_memory_free(adapter);
791 iounmap(adapter->regs);
792 pci_dev_put(adapter->pdev);
794 pci_release_regions(pdev);
795 pci_disable_device(pdev);
798 static struct pci_device_id et131x_pci_table[] __devinitdata = {
799 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_GIG, PCI_ANY_ID,
800 PCI_ANY_ID, 0, 0, 0UL},
801 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_FAST, PCI_ANY_ID,
802 PCI_ANY_ID, 0, 0, 0UL},
806 MODULE_DEVICE_TABLE(pci, et131x_pci_table);
808 static struct pci_driver et131x_driver = {
810 .id_table = et131x_pci_table,
811 .probe = et131x_pci_setup,
812 .remove = __devexit_p(et131x_pci_remove),
813 .suspend = NULL, /* et131x_pci_suspend */
814 .resume = NULL, /* et131x_pci_resume */
819 * et131x_init_module - The "main" entry point called on driver initialization
821 * Returns 0 on success, errno on failure (as defined in errno.h)
823 static int __init et131x_init_module(void)
825 if (et131x_speed_set < PARM_SPEED_DUPLEX_MIN ||
826 et131x_speed_set > PARM_SPEED_DUPLEX_MAX) {
827 printk(KERN_WARNING "et131x: invalid speed setting ignored.\n");
828 et131x_speed_set = 0;
830 return pci_register_driver(&et131x_driver);
834 * et131x_cleanup_module - The entry point called on driver cleanup
836 static void __exit et131x_cleanup_module(void)
838 pci_unregister_driver(&et131x_driver);
841 module_init(et131x_init_module);
842 module_exit(et131x_cleanup_module);
844 /* Modinfo parameters (filled out using defines from et131x_version.h) */
845 MODULE_AUTHOR(DRIVER_AUTHOR);
846 MODULE_DESCRIPTION(DRIVER_INFO);
847 MODULE_LICENSE(DRIVER_LICENSE);