2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
51 #include <linux/dmaengine.h>
52 #include <linux/scatterlist.h>
53 #include <linux/slab.h>
56 #include <asm/sh_bios.h>
66 struct uart_port port;
71 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
72 unsigned int irqs[SCIx_NR_IRQS];
74 /* Port enable callback */
75 void (*enable)(struct uart_port *port);
77 /* Port disable callback */
78 void (*disable)(struct uart_port *port);
81 struct timer_list break_timer;
89 struct list_head node;
90 struct dma_chan *chan_tx;
91 struct dma_chan *chan_rx;
92 #ifdef CONFIG_SERIAL_SH_SCI_DMA
93 struct device *dma_dev;
94 unsigned int slave_tx;
95 unsigned int slave_rx;
96 struct dma_async_tx_descriptor *desc_tx;
97 struct dma_async_tx_descriptor *desc_rx[2];
98 dma_cookie_t cookie_tx;
99 dma_cookie_t cookie_rx[2];
100 dma_cookie_t active_rx;
101 struct scatterlist sg_tx;
102 unsigned int sg_len_tx;
103 struct scatterlist sg_rx[2];
105 struct sh_dmae_slave param_tx;
106 struct sh_dmae_slave param_rx;
107 struct work_struct work_tx;
108 struct work_struct work_rx;
109 struct timer_list rx_timer;
110 unsigned int rx_timeout;
116 struct list_head ports;
117 struct notifier_block clk_nb;
120 /* Function prototypes */
121 static void sci_stop_tx(struct uart_port *port);
123 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
125 static struct sci_port sci_ports[SCI_NPORTS];
126 static struct uart_driver sci_uart_driver;
128 static inline struct sci_port *
129 to_sci_port(struct uart_port *uart)
131 return container_of(uart, struct sci_port, port);
134 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
136 #ifdef CONFIG_CONSOLE_POLL
137 static inline void handle_error(struct uart_port *port)
139 /* Clear error flags */
140 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
143 static int sci_poll_get_char(struct uart_port *port)
145 unsigned short status;
149 status = sci_in(port, SCxSR);
150 if (status & SCxSR_ERRORS(port)) {
157 if (!(status & SCxSR_RDxF(port)))
160 c = sci_in(port, SCxRDR);
164 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
170 static void sci_poll_put_char(struct uart_port *port, unsigned char c)
172 unsigned short status;
175 status = sci_in(port, SCxSR);
176 } while (!(status & SCxSR_TDxE(port)));
178 sci_out(port, SCxTDR, c);
179 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
181 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
183 #if defined(__H8300H__) || defined(__H8300S__)
184 static void sci_init_pins(struct uart_port *port, unsigned int cflag)
186 int ch = (port->mapbase - SMR0) >> 3;
189 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
190 h8300_sci_pins[ch].rx,
192 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
193 h8300_sci_pins[ch].tx,
197 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
199 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
200 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
202 if (port->mapbase == 0xA4400000) {
203 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
204 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
205 } else if (port->mapbase == 0xA4410000)
206 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
208 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
209 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
213 if (cflag & CRTSCTS) {
215 if (port->mapbase == 0xa4430000) { /* SCIF0 */
216 /* Clear PTCR bit 9-2; enable all scif pins but sck */
217 data = __raw_readw(PORT_PTCR);
218 __raw_writew((data & 0xfc03), PORT_PTCR);
219 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
220 /* Clear PVCR bit 9-2 */
221 data = __raw_readw(PORT_PVCR);
222 __raw_writew((data & 0xfc03), PORT_PVCR);
225 if (port->mapbase == 0xa4430000) { /* SCIF0 */
226 /* Clear PTCR bit 5-2; enable only tx and rx */
227 data = __raw_readw(PORT_PTCR);
228 __raw_writew((data & 0xffc3), PORT_PTCR);
229 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
230 /* Clear PVCR bit 5-2 */
231 data = __raw_readw(PORT_PVCR);
232 __raw_writew((data & 0xffc3), PORT_PVCR);
236 #elif defined(CONFIG_CPU_SH3)
237 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
238 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
242 /* We need to set SCPCR to enable RTS/CTS */
243 data = __raw_readw(SCPCR);
244 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
245 __raw_writew(data & 0x0fcf, SCPCR);
247 if (!(cflag & CRTSCTS)) {
248 /* We need to set SCPCR to enable RTS/CTS */
249 data = __raw_readw(SCPCR);
250 /* Clear out SCP7MD1,0, SCP4MD1,0,
251 Set SCP6MD1,0 = {01} (output) */
252 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
254 data = __raw_readb(SCPDR);
255 /* Set /RTS2 (bit6) = 0 */
256 __raw_writeb(data & 0xbf, SCPDR);
259 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
260 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
264 if (port->mapbase == 0xffe00000) {
265 data = __raw_readw(PSCR);
267 if (!(cflag & CRTSCTS))
270 __raw_writew(data, PSCR);
273 #elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
274 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
275 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
276 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
277 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
278 defined(CONFIG_CPU_SUBTYPE_SHX3)
279 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
281 if (!(cflag & CRTSCTS))
282 __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
284 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
285 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
287 if (!(cflag & CRTSCTS))
288 __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
291 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
297 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
298 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
299 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
300 defined(CONFIG_CPU_SUBTYPE_SH7786)
301 static int scif_txfill(struct uart_port *port)
303 return sci_in(port, SCTFDR) & 0xff;
306 static int scif_txroom(struct uart_port *port)
308 return SCIF_TXROOM_MAX - scif_txfill(port);
311 static int scif_rxfill(struct uart_port *port)
313 return sci_in(port, SCRFDR) & 0xff;
315 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
316 static int scif_txfill(struct uart_port *port)
318 if (port->mapbase == 0xffe00000 ||
319 port->mapbase == 0xffe08000)
321 return sci_in(port, SCTFDR) & 0xff;
324 return sci_in(port, SCFDR) >> 8;
327 static int scif_txroom(struct uart_port *port)
329 if (port->mapbase == 0xffe00000 ||
330 port->mapbase == 0xffe08000)
332 return SCIF_TXROOM_MAX - scif_txfill(port);
335 return SCIF2_TXROOM_MAX - scif_txfill(port);
338 static int scif_rxfill(struct uart_port *port)
340 if ((port->mapbase == 0xffe00000) ||
341 (port->mapbase == 0xffe08000)) {
343 return sci_in(port, SCRFDR) & 0xff;
346 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
349 #elif defined(CONFIG_ARCH_SH7372)
350 static int scif_txfill(struct uart_port *port)
352 if (port->type == PORT_SCIFA)
353 return sci_in(port, SCFDR) >> 8;
355 return sci_in(port, SCTFDR);
358 static int scif_txroom(struct uart_port *port)
360 return port->fifosize - scif_txfill(port);
363 static int scif_rxfill(struct uart_port *port)
365 if (port->type == PORT_SCIFA)
366 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
368 return sci_in(port, SCRFDR);
371 static int scif_txfill(struct uart_port *port)
373 return sci_in(port, SCFDR) >> 8;
376 static int scif_txroom(struct uart_port *port)
378 return SCIF_TXROOM_MAX - scif_txfill(port);
381 static int scif_rxfill(struct uart_port *port)
383 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
387 static int sci_txfill(struct uart_port *port)
389 return !(sci_in(port, SCxSR) & SCI_TDRE);
392 static int sci_txroom(struct uart_port *port)
394 return !sci_txfill(port);
397 static int sci_rxfill(struct uart_port *port)
399 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
402 /* ********************************************************************** *
403 * the interrupt related routines *
404 * ********************************************************************** */
406 static void sci_transmit_chars(struct uart_port *port)
408 struct circ_buf *xmit = &port->state->xmit;
409 unsigned int stopped = uart_tx_stopped(port);
410 unsigned short status;
414 status = sci_in(port, SCxSR);
415 if (!(status & SCxSR_TDxE(port))) {
416 ctrl = sci_in(port, SCSCR);
417 if (uart_circ_empty(xmit))
418 ctrl &= ~SCI_CTRL_FLAGS_TIE;
420 ctrl |= SCI_CTRL_FLAGS_TIE;
421 sci_out(port, SCSCR, ctrl);
425 if (port->type == PORT_SCI)
426 count = sci_txroom(port);
428 count = scif_txroom(port);
436 } else if (!uart_circ_empty(xmit) && !stopped) {
437 c = xmit->buf[xmit->tail];
438 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
443 sci_out(port, SCxTDR, c);
446 } while (--count > 0);
448 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
450 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
451 uart_write_wakeup(port);
452 if (uart_circ_empty(xmit)) {
455 ctrl = sci_in(port, SCSCR);
457 if (port->type != PORT_SCI) {
458 sci_in(port, SCxSR); /* Dummy read */
459 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
462 ctrl |= SCI_CTRL_FLAGS_TIE;
463 sci_out(port, SCSCR, ctrl);
467 /* On SH3, SCIF may read end-of-break as a space->mark char */
468 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
470 static inline void sci_receive_chars(struct uart_port *port)
472 struct sci_port *sci_port = to_sci_port(port);
473 struct tty_struct *tty = port->state->port.tty;
474 int i, count, copied = 0;
475 unsigned short status;
478 status = sci_in(port, SCxSR);
479 if (!(status & SCxSR_RDxF(port)))
483 if (port->type == PORT_SCI)
484 count = sci_rxfill(port);
486 count = scif_rxfill(port);
488 /* Don't copy more bytes than there is room for in the buffer */
489 count = tty_buffer_request_room(tty, count);
491 /* If for any reason we can't copy more data, we're done! */
495 if (port->type == PORT_SCI) {
496 char c = sci_in(port, SCxRDR);
497 if (uart_handle_sysrq_char(port, c) ||
498 sci_port->break_flag)
501 tty_insert_flip_char(tty, c, TTY_NORMAL);
503 for (i = 0; i < count; i++) {
504 char c = sci_in(port, SCxRDR);
505 status = sci_in(port, SCxSR);
506 #if defined(CONFIG_CPU_SH3)
507 /* Skip "chars" during break */
508 if (sci_port->break_flag) {
510 (status & SCxSR_FER(port))) {
515 /* Nonzero => end-of-break */
516 dev_dbg(port->dev, "debounce<%02x>\n", c);
517 sci_port->break_flag = 0;
524 #endif /* CONFIG_CPU_SH3 */
525 if (uart_handle_sysrq_char(port, c)) {
530 /* Store data and status */
531 if (status & SCxSR_FER(port)) {
533 dev_notice(port->dev, "frame error\n");
534 } else if (status & SCxSR_PER(port)) {
536 dev_notice(port->dev, "parity error\n");
540 tty_insert_flip_char(tty, c, flag);
544 sci_in(port, SCxSR); /* dummy read */
545 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
548 port->icount.rx += count;
552 /* Tell the rest of the system the news. New characters! */
553 tty_flip_buffer_push(tty);
555 sci_in(port, SCxSR); /* dummy read */
556 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
560 #define SCI_BREAK_JIFFIES (HZ/20)
561 /* The sci generates interrupts during the break,
562 * 1 per millisecond or so during the break period, for 9600 baud.
563 * So dont bother disabling interrupts.
564 * But dont want more than 1 break event.
565 * Use a kernel timer to periodically poll the rx line until
566 * the break is finished.
568 static void sci_schedule_break_timer(struct sci_port *port)
570 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
571 add_timer(&port->break_timer);
573 /* Ensure that two consecutive samples find the break over. */
574 static void sci_break_timer(unsigned long data)
576 struct sci_port *port = (struct sci_port *)data;
578 if (sci_rxd_in(&port->port) == 0) {
579 port->break_flag = 1;
580 sci_schedule_break_timer(port);
581 } else if (port->break_flag == 1) {
583 port->break_flag = 2;
584 sci_schedule_break_timer(port);
586 port->break_flag = 0;
589 static inline int sci_handle_errors(struct uart_port *port)
592 unsigned short status = sci_in(port, SCxSR);
593 struct tty_struct *tty = port->state->port.tty;
595 if (status & SCxSR_ORER(port)) {
597 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
600 dev_notice(port->dev, "overrun error");
603 if (status & SCxSR_FER(port)) {
604 if (sci_rxd_in(port) == 0) {
605 /* Notify of BREAK */
606 struct sci_port *sci_port = to_sci_port(port);
608 if (!sci_port->break_flag) {
609 sci_port->break_flag = 1;
610 sci_schedule_break_timer(sci_port);
612 /* Do sysrq handling. */
613 if (uart_handle_break(port))
616 dev_dbg(port->dev, "BREAK detected\n");
618 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
624 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
627 dev_notice(port->dev, "frame error\n");
631 if (status & SCxSR_PER(port)) {
633 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
636 dev_notice(port->dev, "parity error");
640 tty_flip_buffer_push(tty);
645 static inline int sci_handle_fifo_overrun(struct uart_port *port)
647 struct tty_struct *tty = port->state->port.tty;
650 if (port->type != PORT_SCIF)
653 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
654 sci_out(port, SCLSR, 0);
656 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
657 tty_flip_buffer_push(tty);
659 dev_notice(port->dev, "overrun error\n");
666 static inline int sci_handle_breaks(struct uart_port *port)
669 unsigned short status = sci_in(port, SCxSR);
670 struct tty_struct *tty = port->state->port.tty;
671 struct sci_port *s = to_sci_port(port);
673 if (uart_handle_break(port))
676 if (!s->break_flag && status & SCxSR_BRK(port)) {
677 #if defined(CONFIG_CPU_SH3)
681 /* Notify of BREAK */
682 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
685 dev_dbg(port->dev, "BREAK detected\n");
689 tty_flip_buffer_push(tty);
691 copied += sci_handle_fifo_overrun(port);
696 static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
698 #ifdef CONFIG_SERIAL_SH_SCI_DMA
699 struct uart_port *port = ptr;
700 struct sci_port *s = to_sci_port(port);
703 u16 scr = sci_in(port, SCSCR);
704 u16 ssr = sci_in(port, SCxSR);
706 /* Disable future Rx interrupts */
707 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
708 disable_irq_nosync(irq);
711 scr &= ~SCI_CTRL_FLAGS_RIE;
713 sci_out(port, SCSCR, scr);
714 /* Clear current interrupt */
715 sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
716 dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n",
717 jiffies, s->rx_timeout);
718 mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
724 /* I think sci_receive_chars has to be called irrespective
725 * of whether the I_IXOFF is set, otherwise, how is the interrupt
728 sci_receive_chars(ptr);
733 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
735 struct uart_port *port = ptr;
738 spin_lock_irqsave(&port->lock, flags);
739 sci_transmit_chars(port);
740 spin_unlock_irqrestore(&port->lock, flags);
745 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
747 struct uart_port *port = ptr;
750 if (port->type == PORT_SCI) {
751 if (sci_handle_errors(port)) {
752 /* discard character in rx buffer */
754 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
757 sci_handle_fifo_overrun(port);
758 sci_rx_interrupt(irq, ptr);
761 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
763 /* Kick the transmission */
764 sci_tx_interrupt(irq, ptr);
769 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
771 struct uart_port *port = ptr;
774 sci_handle_breaks(port);
775 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
780 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
782 unsigned short ssr_status, scr_status, err_enabled;
783 struct uart_port *port = ptr;
784 struct sci_port *s = to_sci_port(port);
785 irqreturn_t ret = IRQ_NONE;
787 ssr_status = sci_in(port, SCxSR);
788 scr_status = sci_in(port, SCSCR);
789 err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE);
792 if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE) &&
794 ret = sci_tx_interrupt(irq, ptr);
796 * Rx Interrupt: if we're using DMA, the DMA controller clears RDF /
799 if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) &&
800 (scr_status & SCI_CTRL_FLAGS_RIE))
801 ret = sci_rx_interrupt(irq, ptr);
802 /* Error Interrupt */
803 if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled)
804 ret = sci_er_interrupt(irq, ptr);
805 /* Break Interrupt */
806 if ((ssr_status & SCxSR_BRK(port)) && err_enabled)
807 ret = sci_br_interrupt(irq, ptr);
813 * Here we define a transistion notifier so that we can update all of our
814 * ports' baud rate when the peripheral clock changes.
816 static int sci_notifier(struct notifier_block *self,
817 unsigned long phase, void *p)
819 struct sh_sci_priv *priv = container_of(self,
820 struct sh_sci_priv, clk_nb);
821 struct sci_port *sci_port;
824 if ((phase == CPUFREQ_POSTCHANGE) ||
825 (phase == CPUFREQ_RESUMECHANGE)) {
826 spin_lock_irqsave(&priv->lock, flags);
827 list_for_each_entry(sci_port, &priv->ports, node)
828 sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
829 spin_unlock_irqrestore(&priv->lock, flags);
835 static void sci_clk_enable(struct uart_port *port)
837 struct sci_port *sci_port = to_sci_port(port);
839 clk_enable(sci_port->iclk);
840 sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
841 clk_enable(sci_port->fclk);
844 static void sci_clk_disable(struct uart_port *port)
846 struct sci_port *sci_port = to_sci_port(port);
848 clk_disable(sci_port->fclk);
849 clk_disable(sci_port->iclk);
852 static int sci_request_irq(struct sci_port *port)
855 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
856 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
859 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
860 "SCI Transmit Data Empty", "SCI Break" };
862 if (port->irqs[0] == port->irqs[1]) {
863 if (unlikely(!port->irqs[0]))
866 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
867 IRQF_DISABLED, "sci", port)) {
868 dev_err(port->port.dev, "Can't allocate IRQ\n");
872 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
873 if (unlikely(!port->irqs[i]))
876 if (request_irq(port->irqs[i], handlers[i],
877 IRQF_DISABLED, desc[i], port)) {
878 dev_err(port->port.dev, "Can't allocate IRQ\n");
887 static void sci_free_irq(struct sci_port *port)
891 if (port->irqs[0] == port->irqs[1])
892 free_irq(port->irqs[0], port);
894 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
898 free_irq(port->irqs[i], port);
903 static unsigned int sci_tx_empty(struct uart_port *port)
905 unsigned short status = sci_in(port, SCxSR);
906 unsigned short in_tx_fifo = scif_txfill(port);
908 return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
911 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
913 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
914 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
915 /* If you have signals for DTR and DCD, please implement here. */
918 static unsigned int sci_get_mctrl(struct uart_port *port)
920 /* This routine is used for getting signals of: DTR, DCD, DSR, RI,
923 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
926 #ifdef CONFIG_SERIAL_SH_SCI_DMA
927 static void sci_dma_tx_complete(void *arg)
929 struct sci_port *s = arg;
930 struct uart_port *port = &s->port;
931 struct circ_buf *xmit = &port->state->xmit;
934 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
936 spin_lock_irqsave(&port->lock, flags);
938 xmit->tail += sg_dma_len(&s->sg_tx);
939 xmit->tail &= UART_XMIT_SIZE - 1;
941 port->icount.tx += sg_dma_len(&s->sg_tx);
943 async_tx_ack(s->desc_tx);
944 s->cookie_tx = -EINVAL;
947 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
948 uart_write_wakeup(port);
950 if (!uart_circ_empty(xmit)) {
951 schedule_work(&s->work_tx);
952 } else if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
953 u16 ctrl = sci_in(port, SCSCR);
954 sci_out(port, SCSCR, ctrl & ~SCI_CTRL_FLAGS_TIE);
957 spin_unlock_irqrestore(&port->lock, flags);
960 /* Locking: called with port lock held */
961 static int sci_dma_rx_push(struct sci_port *s, struct tty_struct *tty,
964 struct uart_port *port = &s->port;
967 room = tty_buffer_request_room(tty, count);
969 if (s->active_rx == s->cookie_rx[0]) {
971 } else if (s->active_rx == s->cookie_rx[1]) {
974 dev_err(port->dev, "cookie %d not found!\n", s->active_rx);
979 dev_warn(port->dev, "Rx overrun: dropping %u bytes\n",
984 for (i = 0; i < room; i++)
985 tty_insert_flip_char(tty, ((u8 *)sg_virt(&s->sg_rx[active]))[i],
988 port->icount.rx += room;
993 static void sci_dma_rx_complete(void *arg)
995 struct sci_port *s = arg;
996 struct uart_port *port = &s->port;
997 struct tty_struct *tty = port->state->port.tty;
1001 dev_dbg(port->dev, "%s(%d) active #%d\n", __func__, port->line, s->active_rx);
1003 spin_lock_irqsave(&port->lock, flags);
1005 count = sci_dma_rx_push(s, tty, s->buf_len_rx);
1007 mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
1009 spin_unlock_irqrestore(&port->lock, flags);
1012 tty_flip_buffer_push(tty);
1014 schedule_work(&s->work_rx);
1017 static void sci_start_rx(struct uart_port *port);
1018 static void sci_start_tx(struct uart_port *port);
1020 static void sci_rx_dma_release(struct sci_port *s, bool enable_pio)
1022 struct dma_chan *chan = s->chan_rx;
1023 struct uart_port *port = &s->port;
1026 s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL;
1027 dma_release_channel(chan);
1028 dma_free_coherent(port->dev, s->buf_len_rx * 2,
1029 sg_virt(&s->sg_rx[0]), sg_dma_address(&s->sg_rx[0]));
1034 static void sci_tx_dma_release(struct sci_port *s, bool enable_pio)
1036 struct dma_chan *chan = s->chan_tx;
1037 struct uart_port *port = &s->port;
1040 s->cookie_tx = -EINVAL;
1041 dma_release_channel(chan);
1046 static void sci_submit_rx(struct sci_port *s)
1048 struct dma_chan *chan = s->chan_rx;
1051 for (i = 0; i < 2; i++) {
1052 struct scatterlist *sg = &s->sg_rx[i];
1053 struct dma_async_tx_descriptor *desc;
1055 desc = chan->device->device_prep_slave_sg(chan,
1056 sg, 1, DMA_FROM_DEVICE, DMA_PREP_INTERRUPT);
1059 s->desc_rx[i] = desc;
1060 desc->callback = sci_dma_rx_complete;
1061 desc->callback_param = s;
1062 s->cookie_rx[i] = desc->tx_submit(desc);
1065 if (!desc || s->cookie_rx[i] < 0) {
1067 async_tx_ack(s->desc_rx[0]);
1068 s->cookie_rx[0] = -EINVAL;
1072 s->cookie_rx[i] = -EINVAL;
1074 dev_warn(s->port.dev,
1075 "failed to re-start DMA, using PIO\n");
1076 sci_rx_dma_release(s, true);
1079 dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__,
1080 s->cookie_rx[i], i);
1083 s->active_rx = s->cookie_rx[0];
1085 dma_async_issue_pending(chan);
1088 static void work_fn_rx(struct work_struct *work)
1090 struct sci_port *s = container_of(work, struct sci_port, work_rx);
1091 struct uart_port *port = &s->port;
1092 struct dma_async_tx_descriptor *desc;
1095 if (s->active_rx == s->cookie_rx[0]) {
1097 } else if (s->active_rx == s->cookie_rx[1]) {
1100 dev_err(port->dev, "cookie %d not found!\n", s->active_rx);
1103 desc = s->desc_rx[new];
1105 if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) !=
1107 /* Handle incomplete DMA receive */
1108 struct tty_struct *tty = port->state->port.tty;
1109 struct dma_chan *chan = s->chan_rx;
1110 struct sh_desc *sh_desc = container_of(desc, struct sh_desc,
1112 unsigned long flags;
1115 chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
1116 dev_dbg(port->dev, "Read %u bytes with cookie %d\n",
1117 sh_desc->partial, sh_desc->cookie);
1119 spin_lock_irqsave(&port->lock, flags);
1120 count = sci_dma_rx_push(s, tty, sh_desc->partial);
1121 spin_unlock_irqrestore(&port->lock, flags);
1124 tty_flip_buffer_push(tty);
1131 s->cookie_rx[new] = desc->tx_submit(desc);
1132 if (s->cookie_rx[new] < 0) {
1133 dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n");
1134 sci_rx_dma_release(s, true);
1138 s->active_rx = s->cookie_rx[!new];
1140 dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n", __func__,
1141 s->cookie_rx[new], new, s->active_rx);
1144 static void work_fn_tx(struct work_struct *work)
1146 struct sci_port *s = container_of(work, struct sci_port, work_tx);
1147 struct dma_async_tx_descriptor *desc;
1148 struct dma_chan *chan = s->chan_tx;
1149 struct uart_port *port = &s->port;
1150 struct circ_buf *xmit = &port->state->xmit;
1151 struct scatterlist *sg = &s->sg_tx;
1155 * Port xmit buffer is already mapped, and it is one page... Just adjust
1156 * offsets and lengths. Since it is a circular buffer, we have to
1157 * transmit till the end, and then the rest. Take the port lock to get a
1158 * consistent xmit buffer state.
1160 spin_lock_irq(&port->lock);
1161 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
1162 sg_dma_address(sg) = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) +
1164 sg_dma_len(sg) = min((int)CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE),
1165 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE));
1166 spin_unlock_irq(&port->lock);
1168 BUG_ON(!sg_dma_len(sg));
1170 desc = chan->device->device_prep_slave_sg(chan,
1171 sg, s->sg_len_tx, DMA_TO_DEVICE,
1172 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1175 sci_tx_dma_release(s, true);
1179 dma_sync_sg_for_device(port->dev, sg, 1, DMA_TO_DEVICE);
1181 spin_lock_irq(&port->lock);
1183 desc->callback = sci_dma_tx_complete;
1184 desc->callback_param = s;
1185 spin_unlock_irq(&port->lock);
1186 s->cookie_tx = desc->tx_submit(desc);
1187 if (s->cookie_tx < 0) {
1188 dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n");
1190 sci_tx_dma_release(s, true);
1194 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", __func__,
1195 xmit->buf, xmit->tail, xmit->head, s->cookie_tx);
1197 dma_async_issue_pending(chan);
1201 static void sci_start_tx(struct uart_port *port)
1203 struct sci_port *s = to_sci_port(port);
1204 unsigned short ctrl;
1206 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1207 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1208 u16 new, scr = sci_in(port, SCSCR);
1212 new = scr & ~0x8000;
1214 sci_out(port, SCSCR, new);
1216 if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
1218 schedule_work(&s->work_tx);
1220 if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1221 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
1222 ctrl = sci_in(port, SCSCR);
1223 sci_out(port, SCSCR, ctrl | SCI_CTRL_FLAGS_TIE);
1227 static void sci_stop_tx(struct uart_port *port)
1229 unsigned short ctrl;
1231 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
1232 ctrl = sci_in(port, SCSCR);
1233 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1235 ctrl &= ~SCI_CTRL_FLAGS_TIE;
1236 sci_out(port, SCSCR, ctrl);
1239 static void sci_start_rx(struct uart_port *port)
1241 unsigned short ctrl = SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
1243 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
1244 ctrl |= sci_in(port, SCSCR);
1245 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1247 sci_out(port, SCSCR, ctrl);
1250 static void sci_stop_rx(struct uart_port *port)
1252 unsigned short ctrl;
1254 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
1255 ctrl = sci_in(port, SCSCR);
1256 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1258 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
1259 sci_out(port, SCSCR, ctrl);
1262 static void sci_enable_ms(struct uart_port *port)
1264 /* Nothing here yet .. */
1267 static void sci_break_ctl(struct uart_port *port, int break_state)
1269 /* Nothing here yet .. */
1272 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1273 static bool filter(struct dma_chan *chan, void *slave)
1275 struct sh_dmae_slave *param = slave;
1277 dev_dbg(chan->device->dev, "%s: slave ID %d\n", __func__,
1280 if (param->dma_dev == chan->device->dev) {
1281 chan->private = param;
1288 static void rx_timer_fn(unsigned long arg)
1290 struct sci_port *s = (struct sci_port *)arg;
1291 struct uart_port *port = &s->port;
1292 u16 scr = sci_in(port, SCSCR);
1294 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1296 enable_irq(s->irqs[1]);
1298 sci_out(port, SCSCR, scr | SCI_CTRL_FLAGS_RIE);
1299 dev_dbg(port->dev, "DMA Rx timed out\n");
1300 schedule_work(&s->work_rx);
1303 static void sci_request_dma(struct uart_port *port)
1305 struct sci_port *s = to_sci_port(port);
1306 struct sh_dmae_slave *param;
1307 struct dma_chan *chan;
1308 dma_cap_mask_t mask;
1311 dev_dbg(port->dev, "%s: port %d DMA %p\n", __func__,
1312 port->line, s->dma_dev);
1318 dma_cap_set(DMA_SLAVE, mask);
1320 param = &s->param_tx;
1322 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_TX */
1323 param->slave_id = s->slave_tx;
1324 param->dma_dev = s->dma_dev;
1326 s->cookie_tx = -EINVAL;
1327 chan = dma_request_channel(mask, filter, param);
1328 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan);
1331 sg_init_table(&s->sg_tx, 1);
1332 /* UART circular tx buffer is an aligned page. */
1333 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
1334 sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf),
1335 UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK);
1336 nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE);
1338 sci_tx_dma_release(s, false);
1340 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
1341 sg_dma_len(&s->sg_tx),
1342 port->state->xmit.buf, sg_dma_address(&s->sg_tx));
1344 s->sg_len_tx = nent;
1346 INIT_WORK(&s->work_tx, work_fn_tx);
1349 param = &s->param_rx;
1351 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_RX */
1352 param->slave_id = s->slave_rx;
1353 param->dma_dev = s->dma_dev;
1355 chan = dma_request_channel(mask, filter, param);
1356 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan);
1364 s->buf_len_rx = 2 * max(16, (int)port->fifosize);
1365 buf[0] = dma_alloc_coherent(port->dev, s->buf_len_rx * 2,
1366 &dma[0], GFP_KERNEL);
1370 "failed to allocate dma buffer, using PIO\n");
1371 sci_rx_dma_release(s, true);
1375 buf[1] = buf[0] + s->buf_len_rx;
1376 dma[1] = dma[0] + s->buf_len_rx;
1378 for (i = 0; i < 2; i++) {
1379 struct scatterlist *sg = &s->sg_rx[i];
1381 sg_init_table(sg, 1);
1382 sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
1383 (int)buf[i] & ~PAGE_MASK);
1384 sg_dma_address(sg) = dma[i];
1387 INIT_WORK(&s->work_rx, work_fn_rx);
1388 setup_timer(&s->rx_timer, rx_timer_fn, (unsigned long)s);
1394 static void sci_free_dma(struct uart_port *port)
1396 struct sci_port *s = to_sci_port(port);
1402 sci_tx_dma_release(s, false);
1404 sci_rx_dma_release(s, false);
1408 static int sci_startup(struct uart_port *port)
1410 struct sci_port *s = to_sci_port(port);
1412 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
1418 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1419 sci_request_dma(port);
1427 static void sci_shutdown(struct uart_port *port)
1429 struct sci_port *s = to_sci_port(port);
1431 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
1435 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1444 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1445 struct ktermios *old)
1447 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1448 struct sci_port *s = to_sci_port(port);
1450 unsigned int status, baud, smr_val, max_baud;
1455 * earlyprintk comes here early on with port->uartclk set to zero.
1456 * the clock framework is not up and running at this point so here
1457 * we assume that 115200 is the maximum baud rate. please note that
1458 * the baud rate is not programmed during earlyprintk - it is assumed
1459 * that the previous boot loader has enabled required clocks and
1460 * setup the baud rate generator hardware for us already.
1462 max_baud = port->uartclk ? port->uartclk / 16 : 115200;
1464 baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
1465 if (likely(baud && port->uartclk))
1466 t = SCBRR_VALUE(baud, port->uartclk);
1469 status = sci_in(port, SCxSR);
1470 } while (!(status & SCxSR_TEND(port)));
1472 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1474 if (port->type != PORT_SCI)
1475 sci_out(port, SCFCR, scfcr | SCFCR_RFRST | SCFCR_TFRST);
1477 smr_val = sci_in(port, SCSMR) & 3;
1478 if ((termios->c_cflag & CSIZE) == CS7)
1480 if (termios->c_cflag & PARENB)
1482 if (termios->c_cflag & PARODD)
1484 if (termios->c_cflag & CSTOPB)
1487 uart_update_timeout(port, termios->c_cflag, baud);
1489 sci_out(port, SCSMR, smr_val);
1491 dev_dbg(port->dev, "%s: SMR %x, t %x, SCSCR %x\n", __func__, smr_val, t,
1496 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1499 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1501 sci_out(port, SCBRR, t);
1502 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1505 sci_init_pins(port, termios->c_cflag);
1506 sci_out(port, SCFCR, scfcr | ((termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0));
1508 sci_out(port, SCSCR, SCSCR_INIT(port));
1510 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1512 * Calculate delay for 1.5 DMA buffers: see
1513 * drivers/serial/serial_core.c::uart_update_timeout(). With 10 bits
1514 * (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above function
1515 * calculates 1 jiffie for the data plus 5 jiffies for the "slop(e)."
1516 * Then below we calculate 3 jiffies (12ms) for 1.5 DMA buffers (3 FIFO
1517 * sizes), but it has been found out experimentally, that this is not
1518 * enough: the driver too often needlessly runs on a DMA timeout. 20ms
1519 * as a minimum seem to work perfectly.
1522 s->rx_timeout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 /
1525 "DMA Rx t-out %ums, tty t-out %u jiffies\n",
1526 s->rx_timeout * 1000 / HZ, port->timeout);
1527 if (s->rx_timeout < msecs_to_jiffies(20))
1528 s->rx_timeout = msecs_to_jiffies(20);
1532 if ((termios->c_cflag & CREAD) != 0)
1536 static const char *sci_type(struct uart_port *port)
1538 switch (port->type) {
1554 static void sci_release_port(struct uart_port *port)
1556 /* Nothing here yet .. */
1559 static int sci_request_port(struct uart_port *port)
1561 /* Nothing here yet .. */
1565 static void sci_config_port(struct uart_port *port, int flags)
1567 struct sci_port *s = to_sci_port(port);
1569 port->type = s->type;
1574 if (port->flags & UPF_IOREMAP) {
1575 port->membase = ioremap_nocache(port->mapbase, 0x40);
1577 if (IS_ERR(port->membase))
1578 dev_err(port->dev, "can't remap port#%d\n", port->line);
1581 * For the simple (and majority of) cases where we don't
1582 * need to do any remapping, just cast the cookie
1585 port->membase = (void __iomem *)port->mapbase;
1589 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1591 struct sci_port *s = to_sci_port(port);
1593 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1595 if (ser->baud_base < 2400)
1596 /* No paper tape reader for Mitch.. */
1602 static struct uart_ops sci_uart_ops = {
1603 .tx_empty = sci_tx_empty,
1604 .set_mctrl = sci_set_mctrl,
1605 .get_mctrl = sci_get_mctrl,
1606 .start_tx = sci_start_tx,
1607 .stop_tx = sci_stop_tx,
1608 .stop_rx = sci_stop_rx,
1609 .enable_ms = sci_enable_ms,
1610 .break_ctl = sci_break_ctl,
1611 .startup = sci_startup,
1612 .shutdown = sci_shutdown,
1613 .set_termios = sci_set_termios,
1615 .release_port = sci_release_port,
1616 .request_port = sci_request_port,
1617 .config_port = sci_config_port,
1618 .verify_port = sci_verify_port,
1619 #ifdef CONFIG_CONSOLE_POLL
1620 .poll_get_char = sci_poll_get_char,
1621 .poll_put_char = sci_poll_put_char,
1625 static int __devinit sci_init_single(struct platform_device *dev,
1626 struct sci_port *sci_port,
1628 struct plat_sci_port *p)
1630 struct uart_port *port = &sci_port->port;
1632 port->ops = &sci_uart_ops;
1633 port->iotype = UPIO_MEM;
1638 port->fifosize = 256;
1641 port->fifosize = 64;
1644 port->fifosize = 16;
1652 sci_port->iclk = clk_get(&dev->dev, "sci_ick");
1653 if (IS_ERR(sci_port->iclk)) {
1654 sci_port->iclk = clk_get(&dev->dev, "peripheral_clk");
1655 if (IS_ERR(sci_port->iclk)) {
1656 dev_err(&dev->dev, "can't get iclk\n");
1657 return PTR_ERR(sci_port->iclk);
1662 * The function clock is optional, ignore it if we can't
1665 sci_port->fclk = clk_get(&dev->dev, "sci_fck");
1666 if (IS_ERR(sci_port->fclk))
1667 sci_port->fclk = NULL;
1669 sci_port->enable = sci_clk_enable;
1670 sci_port->disable = sci_clk_disable;
1671 port->dev = &dev->dev;
1674 sci_port->break_timer.data = (unsigned long)sci_port;
1675 sci_port->break_timer.function = sci_break_timer;
1676 init_timer(&sci_port->break_timer);
1678 port->mapbase = p->mapbase;
1679 port->membase = p->membase;
1681 port->irq = p->irqs[SCIx_TXI_IRQ];
1682 port->flags = p->flags;
1683 sci_port->type = port->type = p->type;
1685 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1686 sci_port->dma_dev = p->dma_dev;
1687 sci_port->slave_tx = p->dma_slave_tx;
1688 sci_port->slave_rx = p->dma_slave_rx;
1690 dev_dbg(port->dev, "%s: DMA device %p, tx %d, rx %d\n", __func__,
1691 p->dma_dev, p->dma_slave_tx, p->dma_slave_rx);
1694 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1698 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1699 static struct tty_driver *serial_console_device(struct console *co, int *index)
1701 struct uart_driver *p = &sci_uart_driver;
1703 return p->tty_driver;
1706 static void serial_console_putchar(struct uart_port *port, int ch)
1708 sci_poll_put_char(port, ch);
1712 * Print a string to the serial port trying not to disturb
1713 * any possible real use of the port...
1715 static void serial_console_write(struct console *co, const char *s,
1718 struct uart_port *port = co->data;
1719 struct sci_port *sci_port = to_sci_port(port);
1720 unsigned short bits;
1722 if (sci_port->enable)
1723 sci_port->enable(port);
1725 uart_console_write(port, s, count, serial_console_putchar);
1727 /* wait until fifo is empty and last bit has been transmitted */
1728 bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
1729 while ((sci_in(port, SCxSR) & bits) != bits)
1732 if (sci_port->disable)
1733 sci_port->disable(port);
1736 static int __devinit serial_console_setup(struct console *co, char *options)
1738 struct sci_port *sci_port;
1739 struct uart_port *port;
1747 * Check whether an invalid uart number has been specified, and
1748 * if so, search for the first available port that does have
1751 if (co->index >= SCI_NPORTS)
1756 sci_port = to_sci_port(port);
1758 sci_port = &sci_ports[co->index];
1759 port = &sci_port->port;
1764 * Also need to check port->type, we don't actually have any
1765 * UPIO_PORT ports, but uart_report_port() handily misreports
1766 * it anyways if we don't have a port available by the time this is
1772 sci_config_port(port, 0);
1774 if (sci_port->enable)
1775 sci_port->enable(port);
1778 uart_parse_options(options, &baud, &parity, &bits, &flow);
1780 ret = uart_set_options(port, co, baud, parity, bits, flow);
1781 #if defined(__H8300H__) || defined(__H8300S__)
1782 /* disable rx interrupt */
1786 /* TODO: disable clock */
1790 static struct console serial_console = {
1792 .device = serial_console_device,
1793 .write = serial_console_write,
1794 .setup = serial_console_setup,
1795 .flags = CON_PRINTBUFFER,
1799 static int __init sci_console_init(void)
1801 register_console(&serial_console);
1804 console_initcall(sci_console_init);
1806 static struct sci_port early_serial_port;
1807 static struct console early_serial_console = {
1808 .name = "early_ttySC",
1809 .write = serial_console_write,
1810 .flags = CON_PRINTBUFFER,
1812 static char early_serial_buf[32];
1814 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1816 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1817 #define SCI_CONSOLE (&serial_console)
1819 #define SCI_CONSOLE 0
1822 static char banner[] __initdata =
1823 KERN_INFO "SuperH SCI(F) driver initialized\n";
1825 static struct uart_driver sci_uart_driver = {
1826 .owner = THIS_MODULE,
1827 .driver_name = "sci",
1828 .dev_name = "ttySC",
1830 .minor = SCI_MINOR_START,
1832 .cons = SCI_CONSOLE,
1836 static int sci_remove(struct platform_device *dev)
1838 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1840 unsigned long flags;
1842 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1844 spin_lock_irqsave(&priv->lock, flags);
1845 list_for_each_entry(p, &priv->ports, node) {
1846 uart_remove_one_port(&sci_uart_driver, &p->port);
1850 spin_unlock_irqrestore(&priv->lock, flags);
1856 static int __devinit sci_probe_single(struct platform_device *dev,
1858 struct plat_sci_port *p,
1859 struct sci_port *sciport)
1861 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1862 unsigned long flags;
1866 if (unlikely(index >= SCI_NPORTS)) {
1867 dev_notice(&dev->dev, "Attempting to register port "
1868 "%d when only %d are available.\n",
1869 index+1, SCI_NPORTS);
1870 dev_notice(&dev->dev, "Consider bumping "
1871 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1875 ret = sci_init_single(dev, sciport, index, p);
1879 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1883 INIT_LIST_HEAD(&sciport->node);
1885 spin_lock_irqsave(&priv->lock, flags);
1886 list_add(&sciport->node, &priv->ports);
1887 spin_unlock_irqrestore(&priv->lock, flags);
1893 * Register a set of serial devices attached to a platform device. The
1894 * list is terminated with a zero flags entry, which means we expect
1895 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1896 * remapping (such as sh64) should also set UPF_IOREMAP.
1898 static int __devinit sci_probe(struct platform_device *dev)
1900 struct plat_sci_port *p = dev->dev.platform_data;
1901 struct sh_sci_priv *priv;
1902 int i, ret = -EINVAL;
1904 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1905 if (is_early_platform_device(dev)) {
1908 early_serial_console.index = dev->id;
1909 early_serial_console.data = &early_serial_port.port;
1910 sci_init_single(NULL, &early_serial_port, dev->id, p);
1911 serial_console_setup(&early_serial_console, early_serial_buf);
1912 if (!strstr(early_serial_buf, "keep"))
1913 early_serial_console.flags |= CON_BOOT;
1914 register_console(&early_serial_console);
1919 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1923 INIT_LIST_HEAD(&priv->ports);
1924 spin_lock_init(&priv->lock);
1925 platform_set_drvdata(dev, priv);
1927 priv->clk_nb.notifier_call = sci_notifier;
1928 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1930 if (dev->id != -1) {
1931 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
1935 for (i = 0; p && p->flags != 0; p++, i++) {
1936 ret = sci_probe_single(dev, i, p, &sci_ports[i]);
1942 #ifdef CONFIG_SH_STANDARD_BIOS
1943 sh_bios_gdb_detach();
1953 static int sci_suspend(struct device *dev)
1955 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1957 unsigned long flags;
1959 spin_lock_irqsave(&priv->lock, flags);
1960 list_for_each_entry(p, &priv->ports, node)
1961 uart_suspend_port(&sci_uart_driver, &p->port);
1962 spin_unlock_irqrestore(&priv->lock, flags);
1967 static int sci_resume(struct device *dev)
1969 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1971 unsigned long flags;
1973 spin_lock_irqsave(&priv->lock, flags);
1974 list_for_each_entry(p, &priv->ports, node)
1975 uart_resume_port(&sci_uart_driver, &p->port);
1976 spin_unlock_irqrestore(&priv->lock, flags);
1981 static const struct dev_pm_ops sci_dev_pm_ops = {
1982 .suspend = sci_suspend,
1983 .resume = sci_resume,
1986 static struct platform_driver sci_driver = {
1988 .remove = sci_remove,
1991 .owner = THIS_MODULE,
1992 .pm = &sci_dev_pm_ops,
1996 static int __init sci_init(void)
2002 ret = uart_register_driver(&sci_uart_driver);
2003 if (likely(ret == 0)) {
2004 ret = platform_driver_register(&sci_driver);
2006 uart_unregister_driver(&sci_uart_driver);
2012 static void __exit sci_exit(void)
2014 platform_driver_unregister(&sci_driver);
2015 uart_unregister_driver(&sci_uart_driver);
2018 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
2019 early_platform_init_buffer("earlyprintk", &sci_driver,
2020 early_serial_buf, ARRAY_SIZE(early_serial_buf));
2022 module_init(sci_init);
2023 module_exit(sci_exit);
2025 MODULE_LICENSE("GPL");
2026 MODULE_ALIAS("platform:sh-sci");