drivers/serial/bfin_5xx.c

   1 /*
   2  * Blackfin On-Chip Serial Driver
   3  *
   4  * Copyright 2006-2008 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12 #define SUPPORT_SYSRQ
  13 #endif
  14
  15 #include <linux/module.h>
  16 #include <linux/ioport.h>
  17 #include <linux/init.h>
  18 #include <linux/console.h>
  19 #include <linux/sysrq.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/tty.h>
  22 #include <linux/tty_flip.h>
  23 #include <linux/serial_core.h>
  24
  25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  26         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  27 #include <linux/kgdb.h>
  28 #include <asm/irq_regs.h>
  29 #endif
  30
  31 #include <asm/gpio.h>
  32 #include <mach/bfin_serial_5xx.h>
  33
  34 #ifdef CONFIG_SERIAL_BFIN_DMA
  35 #include <linux/dma-mapping.h>
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/cacheflush.h>
  39 #endif
  40
  41 #ifdef CONFIG_SERIAL_BFIN_MODULE
  42 # undef CONFIG_EARLY_PRINTK
  43 #endif
  44
  45 #ifdef CONFIG_SERIAL_BFIN_MODULE
  46 # undef CONFIG_EARLY_PRINTK
  47 #endif
  48
  49 /* UART name and device definitions */
  50 #define BFIN_SERIAL_NAME        "ttyBF"
  51 #define BFIN_SERIAL_MAJOR       204
  52 #define BFIN_SERIAL_MINOR       64
  53
  54 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
  55 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
  56
  57 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  58         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  59
  60 # ifndef CONFIG_SERIAL_BFIN_PIO
  61 #  error KGDB only support UART in PIO mode.
  62 # endif
  63
  64 static int kgdboc_port_line;
  65 static int kgdboc_break_enabled;
  66 #endif
  67 /*
  68  * Setup for console. Argument comes from the menuconfig
  69  */
  70 #define DMA_RX_XCOUNT           512
  71 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  72
  73 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  74
  75 #ifdef CONFIG_SERIAL_BFIN_DMA
  76 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  77 #else
  78 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  79 #endif
  80
  81 static void bfin_serial_reset_irda(struct uart_port *port);
  82
  83 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  84         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  85 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  86 {
  87         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  88         if (uart->cts_pin < 0)
  89                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  90
  91         /* CTS PIN is negative assertive. */
  92         if (UART_GET_CTS(uart))
  93                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  94         else
  95                 return TIOCM_DSR | TIOCM_CAR;
  96 }
  97
  98 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  99 {
 100         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 101         if (uart->rts_pin < 0)
 102                 return;
 103
 104         /* RTS PIN is negative assertive. */
 105         if (mctrl & TIOCM_RTS)
 106                 UART_ENABLE_RTS(uart);
 107         else
 108                 UART_DISABLE_RTS(uart);
 109 }
 110
 111 /*
 112  * Handle any change of modem status signal.
 113  */
 114 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 115 {
 116         struct bfin_serial_port *uart = dev_id;
 117         unsigned int status;
 118
 119         status = bfin_serial_get_mctrl(&uart->port);
 120         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 121 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 122         uart->scts = 1;
 123         UART_CLEAR_SCTS(uart);
 124         UART_CLEAR_IER(uart, EDSSI);
 125 #endif
 126
 127         return IRQ_HANDLED;
 128 }
 129 #else
 130 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 131 {
 132         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 133 }
 134
 135 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 136 {
 137 }
 138 #endif
 139
 140 /*
 141  * interrupts are disabled on entry
 142  */
 143 static void bfin_serial_stop_tx(struct uart_port *port)
 144 {
 145         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 146 #ifdef CONFIG_SERIAL_BFIN_DMA
 147         struct circ_buf *xmit = &uart->port.state->xmit;
 148 #endif
 149
 150         while (!(UART_GET_LSR(uart) & TEMT))
 151                 cpu_relax();
 152
 153 #ifdef CONFIG_SERIAL_BFIN_DMA
 154         disable_dma(uart->tx_dma_channel);
 155         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 156         uart->port.icount.tx += uart->tx_count;
 157         uart->tx_count = 0;
 158         uart->tx_done = 1;
 159 #else
 160 #ifdef CONFIG_BF54x
 161         /* Clear TFI bit */
 162         UART_PUT_LSR(uart, TFI);
 163 #endif
 164         UART_CLEAR_IER(uart, ETBEI);
 165 #endif
 166 }
 167
 168 /*
 169  * port is locked and interrupts are disabled
 170  */
 171 static void bfin_serial_start_tx(struct uart_port *port)
 172 {
 173         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 174         struct tty_struct *tty = uart->port.state->port.tty;
 175
 176 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 177         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 178                 uart->scts = 0;
 179                 uart_handle_cts_change(&uart->port, uart->scts);
 180         }
 181 #endif
 182
 183         /*
 184          * To avoid losting RX interrupt, we reset IR function
 185          * before sending data.
 186          */
 187         if (tty->termios->c_line == N_IRDA)
 188                 bfin_serial_reset_irda(port);
 189
 190 #ifdef CONFIG_SERIAL_BFIN_DMA
 191         if (uart->tx_done)
 192                 bfin_serial_dma_tx_chars(uart);
 193 #else
 194         UART_SET_IER(uart, ETBEI);
 195         bfin_serial_tx_chars(uart);
 196 #endif
 197 }
 198
 199 /*
 200  * Interrupts are enabled
 201  */
 202 static void bfin_serial_stop_rx(struct uart_port *port)
 203 {
 204         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 205
 206         UART_CLEAR_IER(uart, ERBFI);
 207 }
 208
 209 /*
 210  * Set the modem control timer to fire immediately.
 211  */
 212 static void bfin_serial_enable_ms(struct uart_port *port)
 213 {
 214 }
 215
 216
 217 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 218 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 219 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 220 #else
 221 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
 222 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
 223 #endif
 224
 225 #ifdef CONFIG_SERIAL_BFIN_PIO
 226 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 227 {
 228         struct tty_struct *tty = NULL;
 229         unsigned int status, ch, flg;
 230         static struct timeval anomaly_start = { .tv_sec = 0 };
 231
 232         status = UART_GET_LSR(uart);
 233         UART_CLEAR_LSR(uart);
 234
 235         ch = UART_GET_CHAR(uart);
 236         uart->port.icount.rx++;
 237
 238 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 239         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 240         if (kgdb_connected && kgdboc_port_line == uart->port.line)
 241                 if (ch == 0x3) {/* Ctrl + C */
 242                         kgdb_breakpoint();
 243                         return;
 244                 }
 245
 246         if (!uart->port.state || !uart->port.state->port.tty)
 247                 return;
 248 #endif
 249         tty = uart->port.state->port.tty;
 250
 251         if (ANOMALY_05000363) {
 252                 /* The BF533 (and BF561) family of processors have a nice anomaly
 253                  * where they continuously generate characters for a "single" break.
 254                  * We have to basically ignore this flood until the "next" valid
 255                  * character comes across.  Due to the nature of the flood, it is
 256                  * not possible to reliably catch bytes that are sent too quickly
 257                  * after this break.  So application code talking to the Blackfin
 258                  * which sends a break signal must allow at least 1.5 character
 259                  * times after the end of the break for things to stabilize.  This
 260                  * timeout was picked as it must absolutely be larger than 1
 261                  * character time +/- some percent.  So 1.5 sounds good.  All other
 262                  * Blackfin families operate properly.  Woo.
 263                  */
 264                 if (anomaly_start.tv_sec) {
 265                         struct timeval curr;
 266                         suseconds_t usecs;
 267
 268                         if ((~ch & (~ch + 1)) & 0xff)
 269                                 goto known_good_char;
 270
 271                         do_gettimeofday(&curr);
 272                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
 273                                 goto known_good_char;
 274
 275                         usecs = 0;
 276                         if (curr.tv_sec != anomaly_start.tv_sec)
 277                                 usecs += USEC_PER_SEC;
 278                         usecs += curr.tv_usec - anomaly_start.tv_usec;
 279
 280                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 281                                 goto known_good_char;
 282
 283                         if (ch)
 284                                 anomaly_start.tv_sec = 0;
 285                         else
 286                                 anomaly_start = curr;
 287
 288                         return;
 289
 290  known_good_char:
 291                         status &= ~BI;
 292                         anomaly_start.tv_sec = 0;
 293                 }
 294         }
 295
 296         if (status & BI) {
 297                 if (ANOMALY_05000363)
 298                         if (bfin_revid() < 5)
 299                                 do_gettimeofday(&anomaly_start);
 300                 uart->port.icount.brk++;
 301                 if (uart_handle_break(&uart->port))
 302                         goto ignore_char;
 303                 status &= ~(PE | FE);
 304         }
 305         if (status & PE)
 306                 uart->port.icount.parity++;
 307         if (status & OE)
 308                 uart->port.icount.overrun++;
 309         if (status & FE)
 310                 uart->port.icount.frame++;
 311
 312         status &= uart->port.read_status_mask;
 313
 314         if (status & BI)
 315                 flg = TTY_BREAK;
 316         else if (status & PE)
 317                 flg = TTY_PARITY;
 318         else if (status & FE)
 319                 flg = TTY_FRAME;
 320         else
 321                 flg = TTY_NORMAL;
 322
 323         if (uart_handle_sysrq_char(&uart->port, ch))
 324                 goto ignore_char;
 325
 326         uart_insert_char(&uart->port, status, OE, ch, flg);
 327
 328  ignore_char:
 329         tty_flip_buffer_push(tty);
 330 }
 331
 332 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 333 {
 334         struct circ_buf *xmit = &uart->port.state->xmit;
 335
 336         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 337 #ifdef CONFIG_BF54x
 338                 /* Clear TFI bit */
 339                 UART_PUT_LSR(uart, TFI);
 340 #endif
 341                 /* Anomaly notes:
 342                  *  05000215 -  we always clear ETBEI within last UART TX
 343                  *              interrupt to end a string. It is always set
 344                  *              when start a new tx.
 345                  */
 346                 UART_CLEAR_IER(uart, ETBEI);
 347                 return;
 348         }
 349
 350         if (uart->port.x_char) {
 351                 UART_PUT_CHAR(uart, uart->port.x_char);
 352                 uart->port.icount.tx++;
 353                 uart->port.x_char = 0;
 354         }
 355
 356         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 357                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 358                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 359                 uart->port.icount.tx++;
 360                 SSYNC();
 361         }
 362
 363         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 364                 uart_write_wakeup(&uart->port);
 365 }
 366
 367 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 368 {
 369         struct bfin_serial_port *uart = dev_id;
 370
 371         spin_lock(&uart->port.lock);
 372         while (UART_GET_LSR(uart) & DR)
 373                 bfin_serial_rx_chars(uart);
 374         spin_unlock(&uart->port.lock);
 375
 376         return IRQ_HANDLED;
 377 }
 378
 379 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 380 {
 381         struct bfin_serial_port *uart = dev_id;
 382
 383 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 384         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 385                 uart->scts = 0;
 386                 uart_handle_cts_change(&uart->port, uart->scts);
 387         }
 388 #endif
 389         spin_lock(&uart->port.lock);
 390         if (UART_GET_LSR(uart) & THRE)
 391                 bfin_serial_tx_chars(uart);
 392         spin_unlock(&uart->port.lock);
 393
 394         return IRQ_HANDLED;
 395 }
 396 #endif
 397
 398 #ifdef CONFIG_SERIAL_BFIN_DMA
 399 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 400 {
 401         struct circ_buf *xmit = &uart->port.state->xmit;
 402
 403         uart->tx_done = 0;
 404
 405         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 406                 uart->tx_count = 0;
 407                 uart->tx_done = 1;
 408                 return;
 409         }
 410
 411         if (uart->port.x_char) {
 412                 UART_PUT_CHAR(uart, uart->port.x_char);
 413                 uart->port.icount.tx++;
 414                 uart->port.x_char = 0;
 415         }
 416
 417         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 418         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 419                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 420         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 421                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 422         set_dma_config(uart->tx_dma_channel,
 423                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 424                         INTR_ON_BUF,
 425                         DIMENSION_LINEAR,
 426                         DATA_SIZE_8,
 427                         DMA_SYNC_RESTART));
 428         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 429         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 430         set_dma_x_modify(uart->tx_dma_channel, 1);
 431         SSYNC();
 432         enable_dma(uart->tx_dma_channel);
 433
 434         UART_SET_IER(uart, ETBEI);
 435 }
 436
 437 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 438 {
 439         struct tty_struct *tty = uart->port.state->port.tty;
 440         int i, flg, status;
 441
 442         status = UART_GET_LSR(uart);
 443         UART_CLEAR_LSR(uart);
 444
 445         uart->port.icount.rx +=
 446                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 447                 UART_XMIT_SIZE);
 448
 449         if (status & BI) {
 450                 uart->port.icount.brk++;
 451                 if (uart_handle_break(&uart->port))
 452                         goto dma_ignore_char;
 453                 status &= ~(PE | FE);
 454         }
 455         if (status & PE)
 456                 uart->port.icount.parity++;
 457         if (status & OE)
 458                 uart->port.icount.overrun++;
 459         if (status & FE)
 460                 uart->port.icount.frame++;
 461
 462         status &= uart->port.read_status_mask;
 463
 464         if (status & BI)
 465                 flg = TTY_BREAK;
 466         else if (status & PE)
 467                 flg = TTY_PARITY;
 468         else if (status & FE)
 469                 flg = TTY_FRAME;
 470         else
 471                 flg = TTY_NORMAL;
 472
 473         for (i = uart->rx_dma_buf.tail; ; i++) {
 474                 if (i >= UART_XMIT_SIZE)
 475                         i = 0;
 476                 if (i == uart->rx_dma_buf.head)
 477                         break;
 478                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 479                         uart_insert_char(&uart->port, status, OE,
 480                                 uart->rx_dma_buf.buf[i], flg);
 481         }
 482
 483  dma_ignore_char:
 484         tty_flip_buffer_push(tty);
 485 }
 486
 487 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 488 {
 489         int x_pos, pos;
 490
 491         dma_disable_irq(uart->rx_dma_channel);
 492         spin_lock_bh(&uart->port.lock);
 493
 494         /* 2D DMA RX buffer ring is used. Because curr_y_count and
 495          * curr_x_count can't be read as an atomic operation,
 496          * curr_y_count should be read before curr_x_count. When
 497          * curr_x_count is read, curr_y_count may already indicate
 498          * next buffer line. But, the position calculated here is
 499          * still indicate the old line. The wrong position data may
 500          * be smaller than current buffer tail, which cause garbages
 501          * are received if it is not prohibit.
 502          */
 503         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 504         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 505         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 506         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 507                 uart->rx_dma_nrows = 0;
 508         x_pos = DMA_RX_XCOUNT - x_pos;
 509         if (x_pos == DMA_RX_XCOUNT)
 510                 x_pos = 0;
 511
 512         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 513         /* Ignore receiving data if new position is in the same line of
 514          * current buffer tail and small.
 515          */
 516         if (pos > uart->rx_dma_buf.tail ||
 517                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 518                 uart->rx_dma_buf.head = pos;
 519                 bfin_serial_dma_rx_chars(uart);
 520                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 521         }
 522
 523         spin_unlock_bh(&uart->port.lock);
 524         dma_enable_irq(uart->rx_dma_channel);
 525
 526         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 527 }
 528
 529 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 530 {
 531         struct bfin_serial_port *uart = dev_id;
 532         struct circ_buf *xmit = &uart->port.state->xmit;
 533
 534 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 535         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
 536                 uart->scts = 0;
 537                 uart_handle_cts_change(&uart->port, uart->scts);
 538         }
 539 #endif
 540
 541         spin_lock(&uart->port.lock);
 542         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 543                 disable_dma(uart->tx_dma_channel);
 544                 clear_dma_irqstat(uart->tx_dma_channel);
 545                 /* Anomaly notes:
 546                  *  05000215 -  we always clear ETBEI within last UART TX
 547                  *              interrupt to end a string. It is always set
 548                  *              when start a new tx.
 549                  */
 550                 UART_CLEAR_IER(uart, ETBEI);
 551                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 552                 uart->port.icount.tx += uart->tx_count;
 553
 554                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 555                         uart_write_wakeup(&uart->port);
 556
 557                 bfin_serial_dma_tx_chars(uart);
 558         }
 559
 560         spin_unlock(&uart->port.lock);
 561         return IRQ_HANDLED;
 562 }
 563
 564 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 565 {
 566         struct bfin_serial_port *uart = dev_id;
 567         unsigned short irqstat;
 568         int x_pos, pos;
 569
 570         spin_lock(&uart->port.lock);
 571         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 572         clear_dma_irqstat(uart->rx_dma_channel);
 573
 574         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 575         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 576         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 577         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 578                 uart->rx_dma_nrows = 0;
 579
 580         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 581         if (pos > uart->rx_dma_buf.tail ||
 582                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 583                 uart->rx_dma_buf.head = pos;
 584                 bfin_serial_dma_rx_chars(uart);
 585                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 586         }
 587
 588         spin_unlock(&uart->port.lock);
 589
 590         return IRQ_HANDLED;
 591 }
 592 #endif
 593
 594 /*
 595  * Return TIOCSER_TEMT when transmitter is not busy.
 596  */
 597 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 598 {
 599         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 600         unsigned short lsr;
 601
 602         lsr = UART_GET_LSR(uart);
 603         if (lsr & TEMT)
 604                 return TIOCSER_TEMT;
 605         else
 606                 return 0;
 607 }
 608
 609 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 610 {
 611         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 612         u16 lcr = UART_GET_LCR(uart);
 613         if (break_state)
 614                 lcr |= SB;
 615         else
 616                 lcr &= ~SB;
 617         UART_PUT_LCR(uart, lcr);
 618         SSYNC();
 619 }
 620
 621 static int bfin_serial_startup(struct uart_port *port)
 622 {
 623         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 624
 625 #ifdef CONFIG_SERIAL_BFIN_DMA
 626         dma_addr_t dma_handle;
 627
 628         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 629                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 630                 return -EBUSY;
 631         }
 632
 633         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 634                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 635                 free_dma(uart->rx_dma_channel);
 636                 return -EBUSY;
 637         }
 638
 639         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 640         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 641
 642         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 643         uart->rx_dma_buf.head = 0;
 644         uart->rx_dma_buf.tail = 0;
 645         uart->rx_dma_nrows = 0;
 646
 647         set_dma_config(uart->rx_dma_channel,
 648                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 649                                 INTR_ON_ROW, DIMENSION_2D,
 650                                 DATA_SIZE_8,
 651                                 DMA_SYNC_RESTART));
 652         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 653         set_dma_x_modify(uart->rx_dma_channel, 1);
 654         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 655         set_dma_y_modify(uart->rx_dma_channel, 1);
 656         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 657         enable_dma(uart->rx_dma_channel);
 658
 659         uart->rx_dma_timer.data = (unsigned long)(uart);
 660         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 661         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 662         add_timer(&(uart->rx_dma_timer));
 663 #else
 664 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 665         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 666         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 667                 kgdboc_break_enabled = 0;
 668         else {
 669 # endif
 670         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
 671              "BFIN_UART_RX", uart)) {
 672                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 673                 return -EBUSY;
 674         }
 675
 676         if (request_irq
 677             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
 678              "BFIN_UART_TX", uart)) {
 679                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 680                 free_irq(uart->port.irq, uart);
 681                 return -EBUSY;
 682         }
 683
 684 # ifdef CONFIG_BF54x
 685         {
 686                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 687
 688                 switch (uart->port.irq) {
 689                 case IRQ_UART3_RX:
 690                         uart_dma_ch_rx = CH_UART3_RX;
 691                         uart_dma_ch_tx = CH_UART3_TX;
 692                         break;
 693                 case IRQ_UART2_RX:
 694                         uart_dma_ch_rx = CH_UART2_RX;
 695                         uart_dma_ch_tx = CH_UART2_TX;
 696                         break;
 697                 default:
 698                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
 699                         break;
 700                 };
 701
 702                 if (uart_dma_ch_rx &&
 703                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 704                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 705                         free_irq(uart->port.irq, uart);
 706                         free_irq(uart->port.irq + 1, uart);
 707                         return -EBUSY;
 708                 }
 709                 if (uart_dma_ch_tx &&
 710                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 711                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 712                         free_dma(uart_dma_ch_rx);
 713                         free_irq(uart->port.irq, uart);
 714                         free_irq(uart->port.irq + 1, uart);
 715                         return -EBUSY;
 716                 }
 717         }
 718 # endif
 719 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 720         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 721         }
 722 # endif
 723 #endif
 724
 725 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 726         if (uart->cts_pin >= 0) {
 727                 if (request_irq(gpio_to_irq(uart->cts_pin),
 728                         bfin_serial_mctrl_cts_int,
 729                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 730                         IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
 731                         uart->cts_pin = -1;
 732                         pr_info("Unable to attach BlackFin UART CTS interrupt.\
 733                                  So, disable it.\n");
 734                 }
 735         }
 736         if (uart->rts_pin >= 0) {
 737                 gpio_request(uart->rts_pin, DRIVER_NAME);
 738                 gpio_direction_output(uart->rts_pin, 0);
 739         }
 740 #endif
 741 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 742         if (request_irq(uart->status_irq,
 743                 bfin_serial_mctrl_cts_int,
 744                 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
 745                 pr_info("Unable to attach BlackFin UART Modem \
 746                         Status interrupt.\n");
 747         }
 748
 749         /* CTS RTS PINs are negative assertive. */
 750         UART_PUT_MCR(uart, ACTS);
 751         UART_SET_IER(uart, EDSSI);
 752 #endif
 753
 754         UART_SET_IER(uart, ERBFI);
 755         return 0;
 756 }
 757
 758 static void bfin_serial_shutdown(struct uart_port *port)
 759 {
 760         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 761
 762 #ifdef CONFIG_SERIAL_BFIN_DMA
 763         disable_dma(uart->tx_dma_channel);
 764         free_dma(uart->tx_dma_channel);
 765         disable_dma(uart->rx_dma_channel);
 766         free_dma(uart->rx_dma_channel);
 767         del_timer(&(uart->rx_dma_timer));
 768         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 769 #else
 770 #ifdef CONFIG_BF54x
 771         switch (uart->port.irq) {
 772         case IRQ_UART3_RX:
 773                 free_dma(CH_UART3_RX);
 774                 free_dma(CH_UART3_TX);
 775                 break;
 776         case IRQ_UART2_RX:
 777                 free_dma(CH_UART2_RX);
 778                 free_dma(CH_UART2_TX);
 779                 break;
 780         default:
 781                 break;
 782         };
 783 #endif
 784         free_irq(uart->port.irq, uart);
 785         free_irq(uart->port.irq+1, uart);
 786 #endif
 787
 788 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 789         if (uart->cts_pin >= 0)
 790                 free_irq(gpio_to_irq(uart->cts_pin), uart);
 791         if (uart->rts_pin >= 0)
 792                 gpio_free(uart->rts_pin);
 793 #endif
 794 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 795         if (UART_GET_IER(uart) && EDSSI)
 796                 free_irq(uart->status_irq, uart);
 797 #endif
 798 }
 799
 800 static void
 801 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 802                    struct ktermios *old)
 803 {
 804         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 805         unsigned long flags;
 806         unsigned int baud, quot;
 807         unsigned short val, ier, lcr = 0;
 808
 809         switch (termios->c_cflag & CSIZE) {
 810         case CS8:
 811                 lcr = WLS(8);
 812                 break;
 813         case CS7:
 814                 lcr = WLS(7);
 815                 break;
 816         case CS6:
 817                 lcr = WLS(6);
 818                 break;
 819         case CS5:
 820                 lcr = WLS(5);
 821                 break;
 822         default:
 823                 printk(KERN_ERR "%s: word lengh not supported\n",
 824                         __func__);
 825         }
 826
 827         /* Anomaly notes:
 828          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
 829          */
 830         if (termios->c_cflag & CSTOPB) {
 831                 if (ANOMALY_05000231)
 832                         printk(KERN_WARNING "STOP bits other than 1 is not "
 833                                 "supported in case of anomaly 05000231.\n");
 834                 else
 835                         lcr |= STB;
 836         }
 837         if (termios->c_cflag & PARENB)
 838                 lcr |= PEN;
 839         if (!(termios->c_cflag & PARODD))
 840                 lcr |= EPS;
 841         if (termios->c_cflag & CMSPAR)
 842                 lcr |= STP;
 843
 844         port->read_status_mask = OE;
 845         if (termios->c_iflag & INPCK)
 846                 port->read_status_mask |= (FE | PE);
 847         if (termios->c_iflag & (BRKINT | PARMRK))
 848                 port->read_status_mask |= BI;
 849
 850         /*
 851          * Characters to ignore
 852          */
 853         port->ignore_status_mask = 0;
 854         if (termios->c_iflag & IGNPAR)
 855                 port->ignore_status_mask |= FE | PE;
 856         if (termios->c_iflag & IGNBRK) {
 857                 port->ignore_status_mask |= BI;
 858                 /*
 859                  * If we're ignoring parity and break indicators,
 860                  * ignore overruns too (for real raw support).
 861                  */
 862                 if (termios->c_iflag & IGNPAR)
 863                         port->ignore_status_mask |= OE;
 864         }
 865
 866         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 867         quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
 868         spin_lock_irqsave(&uart->port.lock, flags);
 869
 870         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 871
 872         /* Disable UART */
 873         ier = UART_GET_IER(uart);
 874         UART_DISABLE_INTS(uart);
 875
 876         /* Set DLAB in LCR to Access DLL and DLH */
 877         UART_SET_DLAB(uart);
 878
 879         UART_PUT_DLL(uart, quot & 0xFF);
 880         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 881         SSYNC();
 882
 883         /* Clear DLAB in LCR to Access THR RBR IER */
 884         UART_CLEAR_DLAB(uart);
 885
 886         UART_PUT_LCR(uart, lcr);
 887
 888         /* Enable UART */
 889         UART_ENABLE_INTS(uart, ier);
 890
 891         val = UART_GET_GCTL(uart);
 892         val |= UCEN;
 893         UART_PUT_GCTL(uart, val);
 894
 895         /* Port speed changed, update the per-port timeout. */
 896         uart_update_timeout(port, termios->c_cflag, baud);
 897
 898         spin_unlock_irqrestore(&uart->port.lock, flags);
 899 }
 900
 901 static const char *bfin_serial_type(struct uart_port *port)
 902 {
 903         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 904
 905         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 906 }
 907
 908 /*
 909  * Release the memory region(s) being used by 'port'.
 910  */
 911 static void bfin_serial_release_port(struct uart_port *port)
 912 {
 913 }
 914
 915 /*
 916  * Request the memory region(s) being used by 'port'.
 917  */
 918 static int bfin_serial_request_port(struct uart_port *port)
 919 {
 920         return 0;
 921 }
 922
 923 /*
 924  * Configure/autoconfigure the port.
 925  */
 926 static void bfin_serial_config_port(struct uart_port *port, int flags)
 927 {
 928         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 929
 930         if (flags & UART_CONFIG_TYPE &&
 931             bfin_serial_request_port(&uart->port) == 0)
 932                 uart->port.type = PORT_BFIN;
 933 }
 934
 935 /*
 936  * Verify the new serial_struct (for TIOCSSERIAL).
 937  * The only change we allow are to the flags and type, and
 938  * even then only between PORT_BFIN and PORT_UNKNOWN
 939  */
 940 static int
 941 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 942 {
 943         return 0;
 944 }
 945
 946 /*
 947  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 948  * In other cases, disable IrDA function.
 949  */
 950 static void bfin_serial_set_ldisc(struct uart_port *port)
 951 {
 952         int line = port->line;
 953         unsigned short val;
 954
 955         if (line >= port->state->port.tty->driver->num)
 956                 return;
 957
 958         switch (port->state->port.tty->termios->c_line) {
 959         case N_IRDA:
 960                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 961                 val |= (IREN | RPOLC);
 962                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 963                 break;
 964         default:
 965                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 966                 val &= ~(IREN | RPOLC);
 967                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 968         }
 969 }
 970
 971 static void bfin_serial_reset_irda(struct uart_port *port)
 972 {
 973         int line = port->line;
 974         unsigned short val;
 975
 976         val = UART_GET_GCTL(&bfin_serial_ports[line]);
 977         val &= ~(IREN | RPOLC);
 978         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 979         SSYNC();
 980         val |= (IREN | RPOLC);
 981         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 982         SSYNC();
 983 }
 984
 985 #ifdef CONFIG_CONSOLE_POLL
 986 /* Anomaly notes:
 987  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 988  *              losing other bits of UART_LSR is not a problem here.
 989  */
 990 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
 991 {
 992         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 993
 994         while (!(UART_GET_LSR(uart) & THRE))
 995                 cpu_relax();
 996
 997         UART_CLEAR_DLAB(uart);
 998         UART_PUT_CHAR(uart, (unsigned char)chr);
 999 }
1000
1001 static int bfin_serial_poll_get_char(struct uart_port *port)
1002 {
1003         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1004         unsigned char chr;
1005
1006         while (!(UART_GET_LSR(uart) & DR))
1007                 cpu_relax();
1008
1009         UART_CLEAR_DLAB(uart);
1010         chr = UART_GET_CHAR(uart);
1011
1012         return chr;
1013 }
1014 #endif
1015
1016 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1017         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1018 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1019 {
1020         if (kgdboc_break_enabled) {
1021                 kgdboc_break_enabled = 0;
1022                 bfin_serial_shutdown(port);
1023         }
1024 }
1025
1026 static int bfin_kgdboc_port_startup(struct uart_port *port)
1027 {
1028         kgdboc_port_line = port->line;
1029         kgdboc_break_enabled = !bfin_serial_startup(port);
1030         return 0;
1031 }
1032 #endif
1033
1034 static struct uart_ops bfin_serial_pops = {
1035         .tx_empty       = bfin_serial_tx_empty,
1036         .set_mctrl      = bfin_serial_set_mctrl,
1037         .get_mctrl      = bfin_serial_get_mctrl,
1038         .stop_tx        = bfin_serial_stop_tx,
1039         .start_tx       = bfin_serial_start_tx,
1040         .stop_rx        = bfin_serial_stop_rx,
1041         .enable_ms      = bfin_serial_enable_ms,
1042         .break_ctl      = bfin_serial_break_ctl,
1043         .startup        = bfin_serial_startup,
1044         .shutdown       = bfin_serial_shutdown,
1045         .set_termios    = bfin_serial_set_termios,
1046         .set_ldisc      = bfin_serial_set_ldisc,
1047         .type           = bfin_serial_type,
1048         .release_port   = bfin_serial_release_port,
1049         .request_port   = bfin_serial_request_port,
1050         .config_port    = bfin_serial_config_port,
1051         .verify_port    = bfin_serial_verify_port,
1052 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1053         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1054         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1055         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1056 #endif
1057 #ifdef CONFIG_CONSOLE_POLL
1058         .poll_put_char  = bfin_serial_poll_put_char,
1059         .poll_get_char  = bfin_serial_poll_get_char,
1060 #endif
1061 };
1062
1063 static void __init bfin_serial_hw_init(void)
1064 {
1065 #ifdef CONFIG_SERIAL_BFIN_UART0
1066         peripheral_request(P_UART0_TX, DRIVER_NAME);
1067         peripheral_request(P_UART0_RX, DRIVER_NAME);
1068 #endif
1069
1070 #ifdef CONFIG_SERIAL_BFIN_UART1
1071         peripheral_request(P_UART1_TX, DRIVER_NAME);
1072         peripheral_request(P_UART1_RX, DRIVER_NAME);
1073
1074 # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
1075         peripheral_request(P_UART1_RTS, DRIVER_NAME);
1076         peripheral_request(P_UART1_CTS, DRIVER_NAME);
1077 # endif
1078 #endif
1079
1080 #ifdef CONFIG_SERIAL_BFIN_UART2
1081         peripheral_request(P_UART2_TX, DRIVER_NAME);
1082         peripheral_request(P_UART2_RX, DRIVER_NAME);
1083 #endif
1084
1085 #ifdef CONFIG_SERIAL_BFIN_UART3
1086         peripheral_request(P_UART3_TX, DRIVER_NAME);
1087         peripheral_request(P_UART3_RX, DRIVER_NAME);
1088
1089 # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
1090         peripheral_request(P_UART3_RTS, DRIVER_NAME);
1091         peripheral_request(P_UART3_CTS, DRIVER_NAME);
1092 # endif
1093 #endif
1094 }
1095
1096 static void __init bfin_serial_init_ports(void)
1097 {
1098         static int first = 1;
1099         int i;
1100
1101         if (!first)
1102                 return;
1103         first = 0;
1104
1105         bfin_serial_hw_init();
1106
1107         for (i = 0; i < nr_active_ports; i++) {
1108                 spin_lock_init(&bfin_serial_ports[i].port.lock);
1109                 bfin_serial_ports[i].port.uartclk   = get_sclk();
1110                 bfin_serial_ports[i].port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1111                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
1112                 bfin_serial_ports[i].port.line      = i;
1113                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
1114                 bfin_serial_ports[i].port.membase   =
1115                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
1116                 bfin_serial_ports[i].port.mapbase   =
1117                         bfin_serial_resource[i].uart_base_addr;
1118                 bfin_serial_ports[i].port.irq       =
1119                         bfin_serial_resource[i].uart_irq;
1120                 bfin_serial_ports[i].status_irq     =
1121                         bfin_serial_resource[i].uart_status_irq;
1122                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
1123 #ifdef CONFIG_SERIAL_BFIN_DMA
1124                 bfin_serial_ports[i].tx_done        = 1;
1125                 bfin_serial_ports[i].tx_count       = 0;
1126                 bfin_serial_ports[i].tx_dma_channel =
1127                         bfin_serial_resource[i].uart_tx_dma_channel;
1128                 bfin_serial_ports[i].rx_dma_channel =
1129                         bfin_serial_resource[i].uart_rx_dma_channel;
1130                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
1131 #endif
1132 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1133         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1134                 bfin_serial_ports[i].cts_pin        =
1135                         bfin_serial_resource[i].uart_cts_pin;
1136                 bfin_serial_ports[i].rts_pin        =
1137                         bfin_serial_resource[i].uart_rts_pin;
1138 #endif
1139         }
1140 }
1141
1142 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1143 /*
1144  * If the port was already initialised (eg, by a boot loader),
1145  * try to determine the current setup.
1146  */
1147 static void __init
1148 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1149                            int *parity, int *bits)
1150 {
1151         unsigned short status;
1152
1153         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1154         if (status == (ERBFI | ETBEI)) {
1155                 /* ok, the port was enabled */
1156                 u16 lcr, dlh, dll;
1157
1158                 lcr = UART_GET_LCR(uart);
1159
1160                 *parity = 'n';
1161                 if (lcr & PEN) {
1162                         if (lcr & EPS)
1163                                 *parity = 'e';
1164                         else
1165                                 *parity = 'o';
1166                 }
1167                 switch (lcr & 0x03) {
1168                         case 0: *bits = 5; break;
1169                         case 1: *bits = 6; break;
1170                         case 2: *bits = 7; break;
1171                         case 3: *bits = 8; break;
1172                 }
1173                 /* Set DLAB in LCR to Access DLL and DLH */
1174                 UART_SET_DLAB(uart);
1175
1176                 dll = UART_GET_DLL(uart);
1177                 dlh = UART_GET_DLH(uart);
1178
1179                 /* Clear DLAB in LCR to Access THR RBR IER */
1180                 UART_CLEAR_DLAB(uart);
1181
1182                 *baud = get_sclk() / (16*(dll | dlh << 8));
1183         }
1184         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1185 }
1186
1187 static struct uart_driver bfin_serial_reg;
1188
1189 static int __init
1190 bfin_serial_console_setup(struct console *co, char *options)
1191 {
1192         struct bfin_serial_port *uart;
1193         int baud = 57600;
1194         int bits = 8;
1195         int parity = 'n';
1196 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1197         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1198         int flow = 'r';
1199 # else
1200         int flow = 'n';
1201 # endif
1202
1203         /*
1204          * Check whether an invalid uart number has been specified, and
1205          * if so, search for the first available port that does have
1206          * console support.
1207          */
1208         if (co->index == -1 || co->index >= nr_active_ports)
1209                 co->index = 0;
1210         uart = &bfin_serial_ports[co->index];
1211
1212         if (options)
1213                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1214         else
1215                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1216
1217         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1218 }
1219 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1220                                  defined (CONFIG_EARLY_PRINTK) */
1221
1222 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1223 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1224 {
1225         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1226         while (!(UART_GET_LSR(uart) & THRE))
1227                 barrier();
1228         UART_PUT_CHAR(uart, ch);
1229         SSYNC();
1230 }
1231
1232 /*
1233  * Interrupts are disabled on entering
1234  */
1235 static void
1236 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1237 {
1238         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1239         unsigned long flags;
1240
1241         spin_lock_irqsave(&uart->port.lock, flags);
1242         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1243         spin_unlock_irqrestore(&uart->port.lock, flags);
1244
1245 }
1246
1247 static struct console bfin_serial_console = {
1248         .name           = BFIN_SERIAL_NAME,
1249         .write          = bfin_serial_console_write,
1250         .device         = uart_console_device,
1251         .setup          = bfin_serial_console_setup,
1252         .flags          = CON_PRINTBUFFER,
1253         .index          = -1,
1254         .data           = &bfin_serial_reg,
1255 };
1256
1257 static int __init bfin_serial_rs_console_init(void)
1258 {
1259         bfin_serial_init_ports();
1260         register_console(&bfin_serial_console);
1261
1262         return 0;
1263 }
1264 console_initcall(bfin_serial_rs_console_init);
1265
1266 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1267 #else
1268 #define BFIN_SERIAL_CONSOLE     NULL
1269 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1270
1271
1272 #ifdef CONFIG_EARLY_PRINTK
1273 static __init void early_serial_putc(struct uart_port *port, int ch)
1274 {
1275         unsigned timeout = 0xffff;
1276         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1277
1278         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1279                 cpu_relax();
1280         UART_PUT_CHAR(uart, ch);
1281 }
1282
1283 static __init void early_serial_write(struct console *con, const char *s,
1284                                         unsigned int n)
1285 {
1286         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1287         unsigned int i;
1288
1289         for (i = 0; i < n; i++, s++) {
1290                 if (*s == '\n')
1291                         early_serial_putc(&uart->port, '\r');
1292                 early_serial_putc(&uart->port, *s);
1293         }
1294 }
1295
1296 /*
1297  * This should have a .setup or .early_setup in it, but then things get called
1298  * without the command line options, and the baud rate gets messed up - so
1299  * don't let the common infrastructure play with things. (see calls to setup
1300  * & earlysetup in ./kernel/printk.c:register_console()
1301  */
1302 static struct __initdata console bfin_early_serial_console = {
1303         .name = "early_BFuart",
1304         .write = early_serial_write,
1305         .device = uart_console_device,
1306         .flags = CON_PRINTBUFFER,
1307         .index = -1,
1308         .data  = &bfin_serial_reg,
1309 };
1310
1311 struct console __init *bfin_earlyserial_init(unsigned int port,
1312                                                 unsigned int cflag)
1313 {
1314         struct bfin_serial_port *uart;
1315         struct ktermios t;
1316
1317         if (port == -1 || port >= nr_active_ports)
1318                 port = 0;
1319         bfin_serial_init_ports();
1320         bfin_early_serial_console.index = port;
1321         uart = &bfin_serial_ports[port];
1322         t.c_cflag = cflag;
1323         t.c_iflag = 0;
1324         t.c_oflag = 0;
1325         t.c_lflag = ICANON;
1326         t.c_line = port;
1327         bfin_serial_set_termios(&uart->port, &t, &t);
1328         return &bfin_early_serial_console;
1329 }
1330
1331 #endif /* CONFIG_EARLY_PRINTK */
1332
1333 static struct uart_driver bfin_serial_reg = {
1334         .owner                  = THIS_MODULE,
1335         .driver_name            = "bfin-uart",
1336         .dev_name               = BFIN_SERIAL_NAME,
1337         .major                  = BFIN_SERIAL_MAJOR,
1338         .minor                  = BFIN_SERIAL_MINOR,
1339         .nr                     = BFIN_UART_NR_PORTS,
1340         .cons                   = BFIN_SERIAL_CONSOLE,
1341 };
1342
1343 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1344 {
1345         int i;
1346
1347         for (i = 0; i < nr_active_ports; i++) {
1348                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1349                         continue;
1350                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1351         }
1352
1353         return 0;
1354 }
1355
1356 static int bfin_serial_resume(struct platform_device *dev)
1357 {
1358         int i;
1359
1360         for (i = 0; i < nr_active_ports; i++) {
1361                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1362                         continue;
1363                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1364         }
1365
1366         return 0;
1367 }
1368
1369 static int bfin_serial_probe(struct platform_device *dev)
1370 {
1371         struct resource *res = dev->resource;
1372         int i;
1373
1374         for (i = 0; i < dev->num_resources; i++, res++)
1375                 if (res->flags & IORESOURCE_MEM)
1376                         break;
1377
1378         if (i < dev->num_resources) {
1379                 for (i = 0; i < nr_active_ports; i++, res++) {
1380                         if (bfin_serial_ports[i].port.mapbase != res->start)
1381                                 continue;
1382                         bfin_serial_ports[i].port.dev = &dev->dev;
1383                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1384                 }
1385         }
1386
1387         return 0;
1388 }
1389
1390 static int bfin_serial_remove(struct platform_device *dev)
1391 {
1392         int i;
1393
1394         for (i = 0; i < nr_active_ports; i++) {
1395                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1396                         continue;
1397                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1398                 bfin_serial_ports[i].port.dev = NULL;
1399 #if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1400                 gpio_free(bfin_serial_ports[i].cts_pin);
1401                 gpio_free(bfin_serial_ports[i].rts_pin);
1402 #endif
1403         }
1404
1405         return 0;
1406 }
1407
1408 static struct platform_driver bfin_serial_driver = {
1409         .probe          = bfin_serial_probe,
1410         .remove         = bfin_serial_remove,
1411         .suspend        = bfin_serial_suspend,
1412         .resume         = bfin_serial_resume,
1413         .driver         = {
1414                 .name   = "bfin-uart",
1415                 .owner  = THIS_MODULE,
1416         },
1417 };
1418
1419 static int __init bfin_serial_init(void)
1420 {
1421         int ret;
1422
1423         pr_info("Serial: Blackfin serial driver\n");
1424
1425         bfin_serial_init_ports();
1426
1427         ret = uart_register_driver(&bfin_serial_reg);
1428         if (ret == 0) {
1429                 ret = platform_driver_register(&bfin_serial_driver);
1430                 if (ret) {
1431                         pr_debug("uart register failed\n");
1432                         uart_unregister_driver(&bfin_serial_reg);
1433                 }
1434         }
1435         return ret;
1436 }
1437
1438 static void __exit bfin_serial_exit(void)
1439 {
1440         platform_driver_unregister(&bfin_serial_driver);
1441         uart_unregister_driver(&bfin_serial_reg);
1442 }
1443
1444
1445 module_init(bfin_serial_init);
1446 module_exit(bfin_serial_exit);
1447
1448 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1449 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1450 MODULE_LICENSE("GPL");
1451 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1452 MODULE_ALIAS("platform:bfin-uart");