drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/sched.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "iwl-fh.h"
  43 #include "iwl-3945-fh.h"
  44 #include "iwl-commands.h"
  45 #include "iwl-sta.h"
  46 #include "iwl-3945.h"
  47 #include "iwl-eeprom.h"
  48 #include "iwl-core.h"
  49 #include "iwl-helpers.h"
  50 #include "iwl-led.h"
  51 #include "iwl-3945-led.h"
  52 #include "iwl-3945-debugfs.h"
  53
  54 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  55         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  56                                     IWL_RATE_##r##M_IEEE,   \
  57                                     IWL_RATE_##ip##M_INDEX, \
  58                                     IWL_RATE_##in##M_INDEX, \
  59                                     IWL_RATE_##rp##M_INDEX, \
  60                                     IWL_RATE_##rn##M_INDEX, \
  61                                     IWL_RATE_##pp##M_INDEX, \
  62                                     IWL_RATE_##np##M_INDEX, \
  63                                     IWL_RATE_##r##M_INDEX_TABLE, \
  64                                     IWL_RATE_##ip##M_INDEX_TABLE }
  65
  66 /*
  67  * Parameter order:
  68  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  69  *
  70  * If there isn't a valid next or previous rate then INV is used which
  71  * maps to IWL_RATE_INVALID
  72  *
  73  */
  74 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT_3945] = {
  75         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  76         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  77         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  78         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  79         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  80         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  81         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  82         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  83         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  84         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  85         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  86         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  87 };
  88
  89 /* 1 = enable the iwl3945_disable_events() function */
  90 #define IWL_EVT_DISABLE (0)
  91 #define IWL_EVT_DISABLE_SIZE (1532/32)
  92
  93 /**
  94  * iwl3945_disable_events - Disable selected events in uCode event log
  95  *
  96  * Disable an event by writing "1"s into "disable"
  97  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  98  *   Default values of 0 enable uCode events to be logged.
  99  * Use for only special debugging.  This function is just a placeholder as-is,
 100  *   you'll need to provide the special bits! ...
 101  *   ... and set IWL_EVT_DISABLE to 1. */
 102 void iwl3945_disable_events(struct iwl_priv *priv)
 103 {
 104         int i;
 105         u32 base;               /* SRAM address of event log header */
 106         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 107         u32 array_size;         /* # of u32 entries in array */
 108         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 109                 0x00000000,     /*   31 -    0  Event id numbers */
 110                 0x00000000,     /*   63 -   32 */
 111                 0x00000000,     /*   95 -   64 */
 112                 0x00000000,     /*  127 -   96 */
 113                 0x00000000,     /*  159 -  128 */
 114                 0x00000000,     /*  191 -  160 */
 115                 0x00000000,     /*  223 -  192 */
 116                 0x00000000,     /*  255 -  224 */
 117                 0x00000000,     /*  287 -  256 */
 118                 0x00000000,     /*  319 -  288 */
 119                 0x00000000,     /*  351 -  320 */
 120                 0x00000000,     /*  383 -  352 */
 121                 0x00000000,     /*  415 -  384 */
 122                 0x00000000,     /*  447 -  416 */
 123                 0x00000000,     /*  479 -  448 */
 124                 0x00000000,     /*  511 -  480 */
 125                 0x00000000,     /*  543 -  512 */
 126                 0x00000000,     /*  575 -  544 */
 127                 0x00000000,     /*  607 -  576 */
 128                 0x00000000,     /*  639 -  608 */
 129                 0x00000000,     /*  671 -  640 */
 130                 0x00000000,     /*  703 -  672 */
 131                 0x00000000,     /*  735 -  704 */
 132                 0x00000000,     /*  767 -  736 */
 133                 0x00000000,     /*  799 -  768 */
 134                 0x00000000,     /*  831 -  800 */
 135                 0x00000000,     /*  863 -  832 */
 136                 0x00000000,     /*  895 -  864 */
 137                 0x00000000,     /*  927 -  896 */
 138                 0x00000000,     /*  959 -  928 */
 139                 0x00000000,     /*  991 -  960 */
 140                 0x00000000,     /* 1023 -  992 */
 141                 0x00000000,     /* 1055 - 1024 */
 142                 0x00000000,     /* 1087 - 1056 */
 143                 0x00000000,     /* 1119 - 1088 */
 144                 0x00000000,     /* 1151 - 1120 */
 145                 0x00000000,     /* 1183 - 1152 */
 146                 0x00000000,     /* 1215 - 1184 */
 147                 0x00000000,     /* 1247 - 1216 */
 148                 0x00000000,     /* 1279 - 1248 */
 149                 0x00000000,     /* 1311 - 1280 */
 150                 0x00000000,     /* 1343 - 1312 */
 151                 0x00000000,     /* 1375 - 1344 */
 152                 0x00000000,     /* 1407 - 1376 */
 153                 0x00000000,     /* 1439 - 1408 */
 154                 0x00000000,     /* 1471 - 1440 */
 155                 0x00000000,     /* 1503 - 1472 */
 156         };
 157
 158         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 159         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 160                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
 161                 return;
 162         }
 163
 164         disable_ptr = iwl_read_targ_mem(priv, base + (4 * sizeof(u32)));
 165         array_size = iwl_read_targ_mem(priv, base + (5 * sizeof(u32)));
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO(priv, "Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 171                         iwl_write_targ_mem(priv,
 172                                            disable_ptr + (i * sizeof(u32)),
 173                                            evt_disable[i]);
 174
 175         } else {
 176                 IWL_DEBUG_INFO(priv, "Selected uCode log events may be disabled\n");
 177                 IWL_DEBUG_INFO(priv, "  by writing \"1\"s into disable bitmap\n");
 178                 IWL_DEBUG_INFO(priv, "  in SRAM at 0x%x, size %d u32s\n",
 179                                disable_ptr, array_size);
 180         }
 181
 182 }
 183
 184 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 185 {
 186         int idx;
 187
 188         for (idx = 0; idx < IWL_RATE_COUNT_3945; idx++)
 189                 if (iwl3945_rates[idx].plcp == plcp)
 190                         return idx;
 191         return -1;
 192 }
 193
 194 #ifdef CONFIG_IWLWIFI_DEBUG
 195 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
 196
 197 static const char *iwl3945_get_tx_fail_reason(u32 status)
 198 {
 199         switch (status & TX_STATUS_MSK) {
 200         case TX_3945_STATUS_SUCCESS:
 201                 return "SUCCESS";
 202                 TX_STATUS_ENTRY(SHORT_LIMIT);
 203                 TX_STATUS_ENTRY(LONG_LIMIT);
 204                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 205                 TX_STATUS_ENTRY(MGMNT_ABORT);
 206                 TX_STATUS_ENTRY(NEXT_FRAG);
 207                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 208                 TX_STATUS_ENTRY(DEST_PS);
 209                 TX_STATUS_ENTRY(ABORTED);
 210                 TX_STATUS_ENTRY(BT_RETRY);
 211                 TX_STATUS_ENTRY(STA_INVALID);
 212                 TX_STATUS_ENTRY(FRAG_DROPPED);
 213                 TX_STATUS_ENTRY(TID_DISABLE);
 214                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 215                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 216                 TX_STATUS_ENTRY(TX_LOCKED);
 217                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 218         }
 219
 220         return "UNKNOWN";
 221 }
 222 #else
 223 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 224 {
 225         return "";
 226 }
 227 #endif
 228
 229 /*
 230  * get ieee prev rate from rate scale table.
 231  * for A and B mode we need to overright prev
 232  * value
 233  */
 234 int iwl3945_rs_next_rate(struct iwl_priv *priv, int rate)
 235 {
 236         int next_rate = iwl3945_get_prev_ieee_rate(rate);
 237
 238         switch (priv->band) {
 239         case IEEE80211_BAND_5GHZ:
 240                 if (rate == IWL_RATE_12M_INDEX)
 241                         next_rate = IWL_RATE_9M_INDEX;
 242                 else if (rate == IWL_RATE_6M_INDEX)
 243                         next_rate = IWL_RATE_6M_INDEX;
 244                 break;
 245         case IEEE80211_BAND_2GHZ:
 246                 if (!(priv->_3945.sta_supp_rates & IWL_OFDM_RATES_MASK) &&
 247                     iwl_is_associated(priv)) {
 248                         if (rate == IWL_RATE_11M_INDEX)
 249                                 next_rate = IWL_RATE_5M_INDEX;
 250                 }
 251                 break;
 252
 253         default:
 254                 break;
 255         }
 256
 257         return next_rate;
 258 }
 259
 260
 261 /**
 262  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 263  *
 264  * When FW advances 'R' index, all entries between old and new 'R' index
 265  * need to be reclaimed. As result, some free space forms. If there is
 266  * enough free space (> low mark), wake the stack that feeds us.
 267  */
 268 static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv,
 269                                      int txq_id, int index)
 270 {
 271         struct iwl_tx_queue *txq = &priv->txq[txq_id];
 272         struct iwl_queue *q = &txq->q;
 273         struct iwl_tx_info *tx_info;
 274
 275         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 276
 277         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 278                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 279
 280                 tx_info = &txq->txb[txq->q.read_ptr];
 281                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 282                 tx_info->skb[0] = NULL;
 283                 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
 284         }
 285
 286         if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 287                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 288                         priv->mac80211_registered)
 289                 iwl_wake_queue(priv, txq_id);
 290 }
 291
 292 /**
 293  * iwl3945_rx_reply_tx - Handle Tx response
 294  */
 295 static void iwl3945_rx_reply_tx(struct iwl_priv *priv,
 296                                 struct iwl_rx_mem_buffer *rxb)
 297 {
 298         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 299         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 300         int txq_id = SEQ_TO_QUEUE(sequence);
 301         int index = SEQ_TO_INDEX(sequence);
 302         struct iwl_tx_queue *txq = &priv->txq[txq_id];
 303         struct ieee80211_tx_info *info;
 304         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 305         u32  status = le32_to_cpu(tx_resp->status);
 306         int rate_idx;
 307         int fail;
 308
 309         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
 310                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
 311                           "is out of range [0-%d] %d %d\n", txq_id,
 312                           index, txq->q.n_bd, txq->q.write_ptr,
 313                           txq->q.read_ptr);
 314                 return;
 315         }
 316
 317         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 318         ieee80211_tx_info_clear_status(info);
 319
 320         /* Fill the MRR chain with some info about on-chip retransmissions */
 321         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 322         if (info->band == IEEE80211_BAND_5GHZ)
 323                 rate_idx -= IWL_FIRST_OFDM_RATE;
 324
 325         fail = tx_resp->failure_frame;
 326
 327         info->status.rates[0].idx = rate_idx;
 328         info->status.rates[0].count = fail + 1; /* add final attempt */
 329
 330         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 331         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 332                                 IEEE80211_TX_STAT_ACK : 0;
 333
 334         IWL_DEBUG_TX(priv, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 335                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 336                         tx_resp->rate, tx_resp->failure_frame);
 337
 338         IWL_DEBUG_TX_REPLY(priv, "Tx queue reclaim %d\n", index);
 339         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 340
 341         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 342                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
 343 }
 344
 345
 346
 347 /*****************************************************************************
 348  *
 349  * Intel PRO/Wireless 3945ABG/BG Network Connection
 350  *
 351  *  RX handler implementations
 352  *
 353  *****************************************************************************/
 354 #ifdef CONFIG_IWLWIFI_DEBUG
 355 /*
 356  *  based on the assumption of all statistics counter are in DWORD
 357  *  FIXME: This function is for debugging, do not deal with
 358  *  the case of counters roll-over.
 359  */
 360 static void iwl3945_accumulative_statistics(struct iwl_priv *priv,
 361                                             __le32 *stats)
 362 {
 363         int i;
 364         __le32 *prev_stats;
 365         u32 *accum_stats;
 366         u32 *delta, *max_delta;
 367
 368         prev_stats = (__le32 *)&priv->_3945.statistics;
 369         accum_stats = (u32 *)&priv->_3945.accum_statistics;
 370         delta = (u32 *)&priv->_3945.delta_statistics;
 371         max_delta = (u32 *)&priv->_3945.max_delta;
 372
 373         for (i = sizeof(__le32); i < sizeof(struct iwl3945_notif_statistics);
 374              i += sizeof(__le32), stats++, prev_stats++, delta++,
 375              max_delta++, accum_stats++) {
 376                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
 377                         *delta = (le32_to_cpu(*stats) -
 378                                 le32_to_cpu(*prev_stats));
 379                         *accum_stats += *delta;
 380                         if (*delta > *max_delta)
 381                                 *max_delta = *delta;
 382                 }
 383         }
 384
 385         /* reset accumulative statistics for "no-counter" type statistics */
 386         priv->_3945.accum_statistics.general.temperature =
 387                 priv->_3945.statistics.general.temperature;
 388         priv->_3945.accum_statistics.general.ttl_timestamp =
 389                 priv->_3945.statistics.general.ttl_timestamp;
 390 }
 391 #endif
 392
 393 /**
 394  * iwl3945_good_plcp_health - checks for plcp error.
 395  *
 396  * When the plcp error is exceeding the thresholds, reset the radio
 397  * to improve the throughput.
 398  */
 399 static bool iwl3945_good_plcp_health(struct iwl_priv *priv,
 400                                 struct iwl_rx_packet *pkt)
 401 {
 402         bool rc = true;
 403         struct iwl3945_notif_statistics current_stat;
 404         int combined_plcp_delta;
 405         unsigned int plcp_msec;
 406         unsigned long plcp_received_jiffies;
 407
 408         memcpy(&current_stat, pkt->u.raw, sizeof(struct
 409                         iwl3945_notif_statistics));
 410         /*
 411          * check for plcp_err and trigger radio reset if it exceeds
 412          * the plcp error threshold plcp_delta.
 413          */
 414         plcp_received_jiffies = jiffies;
 415         plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
 416                                         (long) priv->plcp_jiffies);
 417         priv->plcp_jiffies = plcp_received_jiffies;
 418         /*
 419          * check to make sure plcp_msec is not 0 to prevent division
 420          * by zero.
 421          */
 422         if (plcp_msec) {
 423                 combined_plcp_delta =
 424                         (le32_to_cpu(current_stat.rx.ofdm.plcp_err) -
 425                         le32_to_cpu(priv->_3945.statistics.rx.ofdm.plcp_err));
 426
 427                 if ((combined_plcp_delta > 0) &&
 428                         ((combined_plcp_delta * 100) / plcp_msec) >
 429                         priv->cfg->plcp_delta_threshold) {
 430                         /*
 431                          * if plcp_err exceed the threshold, the following
 432                          * data is printed in csv format:
 433                          *    Text: plcp_err exceeded %d,
 434                          *    Received ofdm.plcp_err,
 435                          *    Current ofdm.plcp_err,
 436                          *    combined_plcp_delta,
 437                          *    plcp_msec
 438                          */
 439                         IWL_DEBUG_RADIO(priv, "plcp_err exceeded %u, "
 440                                 "%u, %d, %u mSecs\n",
 441                                 priv->cfg->plcp_delta_threshold,
 442                                 le32_to_cpu(current_stat.rx.ofdm.plcp_err),
 443                                 combined_plcp_delta, plcp_msec);
 444                         /*
 445                          * Reset the RF radio due to the high plcp
 446                          * error rate
 447                          */
 448                         rc = false;
 449                 }
 450         }
 451         return rc;
 452 }
 453
 454 void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
 455                 struct iwl_rx_mem_buffer *rxb)
 456 {
 457         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 458
 459         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
 460                      (int)sizeof(struct iwl3945_notif_statistics),
 461                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 462 #ifdef CONFIG_IWLWIFI_DEBUG
 463         iwl3945_accumulative_statistics(priv, (__le32 *)&pkt->u.raw);
 464 #endif
 465         iwl_recover_from_statistics(priv, pkt);
 466
 467         memcpy(&priv->_3945.statistics, pkt->u.raw, sizeof(priv->_3945.statistics));
 468 }
 469
 470 void iwl3945_reply_statistics(struct iwl_priv *priv,
 471                               struct iwl_rx_mem_buffer *rxb)
 472 {
 473         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 474         __le32 *flag = (__le32 *)&pkt->u.raw;
 475
 476         if (le32_to_cpu(*flag) & UCODE_STATISTICS_CLEAR_MSK) {
 477 #ifdef CONFIG_IWLWIFI_DEBUG
 478                 memset(&priv->_3945.accum_statistics, 0,
 479                         sizeof(struct iwl3945_notif_statistics));
 480                 memset(&priv->_3945.delta_statistics, 0,
 481                         sizeof(struct iwl3945_notif_statistics));
 482                 memset(&priv->_3945.max_delta, 0,
 483                         sizeof(struct iwl3945_notif_statistics));
 484 #endif
 485                 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
 486         }
 487         iwl3945_hw_rx_statistics(priv, rxb);
 488 }
 489
 490
 491 /******************************************************************************
 492  *
 493  * Misc. internal state and helper functions
 494  *
 495  ******************************************************************************/
 496 #ifdef CONFIG_IWLWIFI_DEBUG
 497
 498 /**
 499  * iwl3945_report_frame - dump frame to syslog during debug sessions
 500  *
 501  * You may hack this function to show different aspects of received frames,
 502  * including selective frame dumps.
 503  * group100 parameter selects whether to show 1 out of 100 good frames.
 504  */
 505 static void _iwl3945_dbg_report_frame(struct iwl_priv *priv,
 506                       struct iwl_rx_packet *pkt,
 507                       struct ieee80211_hdr *header, int group100)
 508 {
 509         u32 to_us;
 510         u32 print_summary = 0;
 511         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 512         u32 hundred = 0;
 513         u32 dataframe = 0;
 514         __le16 fc;
 515         u16 seq_ctl;
 516         u16 channel;
 517         u16 phy_flags;
 518         u16 length;
 519         u16 status;
 520         u16 bcn_tmr;
 521         u32 tsf_low;
 522         u64 tsf;
 523         u8 rssi;
 524         u8 agc;
 525         u16 sig_avg;
 526         u16 noise_diff;
 527         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 528         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 529         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 530         u8 *data = IWL_RX_DATA(pkt);
 531
 532         /* MAC header */
 533         fc = header->frame_control;
 534         seq_ctl = le16_to_cpu(header->seq_ctrl);
 535
 536         /* metadata */
 537         channel = le16_to_cpu(rx_hdr->channel);
 538         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 539         length = le16_to_cpu(rx_hdr->len);
 540
 541         /* end-of-frame status and timestamp */
 542         status = le32_to_cpu(rx_end->status);
 543         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 544         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 545         tsf = le64_to_cpu(rx_end->timestamp);
 546
 547         /* signal statistics */
 548         rssi = rx_stats->rssi;
 549         agc = rx_stats->agc;
 550         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 551         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 552
 553         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 554
 555         /* if data frame is to us and all is good,
 556          *   (optionally) print summary for only 1 out of every 100 */
 557         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 558             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 559                 dataframe = 1;
 560                 if (!group100)
 561                         print_summary = 1;      /* print each frame */
 562                 else if (priv->framecnt_to_us < 100) {
 563                         priv->framecnt_to_us++;
 564                         print_summary = 0;
 565                 } else {
 566                         priv->framecnt_to_us = 0;
 567                         print_summary = 1;
 568                         hundred = 1;
 569                 }
 570         } else {
 571                 /* print summary for all other frames */
 572                 print_summary = 1;
 573         }
 574
 575         if (print_summary) {
 576                 char *title;
 577                 int rate;
 578
 579                 if (hundred)
 580                         title = "100Frames";
 581                 else if (ieee80211_has_retry(fc))
 582                         title = "Retry";
 583                 else if (ieee80211_is_assoc_resp(fc))
 584                         title = "AscRsp";
 585                 else if (ieee80211_is_reassoc_resp(fc))
 586                         title = "RasRsp";
 587                 else if (ieee80211_is_probe_resp(fc)) {
 588                         title = "PrbRsp";
 589                         print_dump = 1; /* dump frame contents */
 590                 } else if (ieee80211_is_beacon(fc)) {
 591                         title = "Beacon";
 592                         print_dump = 1; /* dump frame contents */
 593                 } else if (ieee80211_is_atim(fc))
 594                         title = "ATIM";
 595                 else if (ieee80211_is_auth(fc))
 596                         title = "Auth";
 597                 else if (ieee80211_is_deauth(fc))
 598                         title = "DeAuth";
 599                 else if (ieee80211_is_disassoc(fc))
 600                         title = "DisAssoc";
 601                 else
 602                         title = "Frame";
 603
 604                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 605                 if (rate == -1)
 606                         rate = 0;
 607                 else
 608                         rate = iwl3945_rates[rate].ieee / 2;
 609
 610                 /* print frame summary.
 611                  * MAC addresses show just the last byte (for brevity),
 612                  *    but you can hack it to show more, if you'd like to. */
 613                 if (dataframe)
 614                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
 615                                      "len=%u, rssi=%d, chnl=%d, rate=%d,\n",
 616                                      title, le16_to_cpu(fc), header->addr1[5],
 617                                      length, rssi, channel, rate);
 618                 else {
 619                         /* src/dst addresses assume managed mode */
 620                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, "
 621                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 622                                      "phy=0x%02x, chnl=%d\n",
 623                                      title, le16_to_cpu(fc), header->addr1[5],
 624                                      header->addr3[5], rssi,
 625                                      tsf_low - priv->scan_start_tsf,
 626                                      phy_flags, channel);
 627                 }
 628         }
 629         if (print_dump)
 630                 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
 631 }
 632
 633 static void iwl3945_dbg_report_frame(struct iwl_priv *priv,
 634                       struct iwl_rx_packet *pkt,
 635                       struct ieee80211_hdr *header, int group100)
 636 {
 637         if (iwl_get_debug_level(priv) & IWL_DL_RX)
 638                 _iwl3945_dbg_report_frame(priv, pkt, header, group100);
 639 }
 640
 641 #else
 642 static inline void iwl3945_dbg_report_frame(struct iwl_priv *priv,
 643                       struct iwl_rx_packet *pkt,
 644                       struct ieee80211_hdr *header, int group100)
 645 {
 646 }
 647 #endif
 648
 649 /* This is necessary only for a number of statistics, see the caller. */
 650 static int iwl3945_is_network_packet(struct iwl_priv *priv,
 651                 struct ieee80211_hdr *header)
 652 {
 653         /* Filter incoming packets to determine if they are targeted toward
 654          * this network, discarding packets coming from ourselves */
 655         switch (priv->iw_mode) {
 656         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 657                 /* packets to our IBSS update information */
 658                 return !compare_ether_addr(header->addr3, priv->bssid);
 659         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 660                 /* packets to our IBSS update information */
 661                 return !compare_ether_addr(header->addr2, priv->bssid);
 662         default:
 663                 return 1;
 664         }
 665 }
 666
 667 static void iwl3945_pass_packet_to_mac80211(struct iwl_priv *priv,
 668                                    struct iwl_rx_mem_buffer *rxb,
 669                                    struct ieee80211_rx_status *stats)
 670 {
 671         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 672         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 673         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 674         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 675         u16 len = le16_to_cpu(rx_hdr->len);
 676         struct sk_buff *skb;
 677         __le16 fc = hdr->frame_control;
 678
 679         /* We received data from the HW, so stop the watchdog */
 680         if (unlikely(len + IWL39_RX_FRAME_SIZE >
 681                      PAGE_SIZE << priv->hw_params.rx_page_order)) {
 682                 IWL_DEBUG_DROP(priv, "Corruption detected!\n");
 683                 return;
 684         }
 685
 686         /* We only process data packets if the interface is open */
 687         if (unlikely(!priv->is_open)) {
 688                 IWL_DEBUG_DROP_LIMIT(priv,
 689                         "Dropping packet while interface is not open.\n");
 690                 return;
 691         }
 692
 693         skb = dev_alloc_skb(128);
 694         if (!skb) {
 695                 IWL_ERR(priv, "dev_alloc_skb failed\n");
 696                 return;
 697         }
 698
 699         if (!iwl3945_mod_params.sw_crypto)
 700                 iwl_set_decrypted_flag(priv,
 701                                        (struct ieee80211_hdr *)rxb_addr(rxb),
 702                                        le32_to_cpu(rx_end->status), stats);
 703
 704         skb_add_rx_frag(skb, 0, rxb->page,
 705                         (void *)rx_hdr->payload - (void *)pkt, len);
 706
 707         iwl_update_stats(priv, false, fc, len);
 708         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 709
 710         ieee80211_rx(priv->hw, skb);
 711         priv->alloc_rxb_page--;
 712         rxb->page = NULL;
 713 }
 714
 715 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 716
 717 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
 718                                 struct iwl_rx_mem_buffer *rxb)
 719 {
 720         struct ieee80211_hdr *header;
 721         struct ieee80211_rx_status rx_status;
 722         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 723         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 724         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 725         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 726         u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg);
 727         u16 rx_stats_noise_diff __maybe_unused = le16_to_cpu(rx_stats->noise_diff);
 728         u8 network_packet;
 729
 730         rx_status.flag = 0;
 731         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 732         rx_status.freq =
 733                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 734         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 735                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 736
 737         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 738         if (rx_status.band == IEEE80211_BAND_5GHZ)
 739                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 740
 741         rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) &
 742                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 743
 744         /* set the preamble flag if appropriate */
 745         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 746                 rx_status.flag |= RX_FLAG_SHORTPRE;
 747
 748         if ((unlikely(rx_stats->phy_count > 20))) {
 749                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
 750                                 rx_stats->phy_count);
 751                 return;
 752         }
 753
 754         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 755             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 756                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 757                 return;
 758         }
 759
 760
 761
 762         /* Convert 3945's rssi indicator to dBm */
 763         rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET;
 764
 765         IWL_DEBUG_STATS(priv, "Rssi %d sig_avg %d noise_diff %d\n",
 766                         rx_status.signal, rx_stats_sig_avg,
 767                         rx_stats_noise_diff);
 768
 769         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 770
 771         network_packet = iwl3945_is_network_packet(priv, header);
 772
 773         IWL_DEBUG_STATS_LIMIT(priv, "[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
 774                               network_packet ? '*' : ' ',
 775                               le16_to_cpu(rx_hdr->channel),
 776                               rx_status.signal, rx_status.signal,
 777                               rx_status.rate_idx);
 778
 779         /* Set "1" to report good data frames in groups of 100 */
 780         iwl3945_dbg_report_frame(priv, pkt, header, 1);
 781         iwl_dbg_log_rx_data_frame(priv, le16_to_cpu(rx_hdr->len), header);
 782
 783         if (network_packet) {
 784                 priv->_3945.last_beacon_time =
 785                         le32_to_cpu(rx_end->beacon_timestamp);
 786                 priv->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
 787                 priv->_3945.last_rx_rssi = rx_status.signal;
 788         }
 789
 790         iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 791 }
 792
 793 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 794                                      struct iwl_tx_queue *txq,
 795                                      dma_addr_t addr, u16 len, u8 reset, u8 pad)
 796 {
 797         int count;
 798         struct iwl_queue *q;
 799         struct iwl3945_tfd *tfd, *tfd_tmp;
 800
 801         q = &txq->q;
 802         tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
 803         tfd = &tfd_tmp[q->write_ptr];
 804
 805         if (reset)
 806                 memset(tfd, 0, sizeof(*tfd));
 807
 808         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 809
 810         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 811                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 812                           NUM_TFD_CHUNKS);
 813                 return -EINVAL;
 814         }
 815
 816         tfd->tbs[count].addr = cpu_to_le32(addr);
 817         tfd->tbs[count].len = cpu_to_le32(len);
 818
 819         count++;
 820
 821         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 822                                          TFD_CTL_PAD_SET(pad));
 823
 824         return 0;
 825 }
 826
 827 /**
 828  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 829  *
 830  * Does NOT advance any indexes
 831  */
 832 void iwl3945_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 833 {
 834         struct iwl3945_tfd *tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
 835         int index = txq->q.read_ptr;
 836         struct iwl3945_tfd *tfd = &tfd_tmp[index];
 837         struct pci_dev *dev = priv->pci_dev;
 838         int i;
 839         int counter;
 840
 841         /* sanity check */
 842         counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 843         if (counter > NUM_TFD_CHUNKS) {
 844                 IWL_ERR(priv, "Too many chunks: %i\n", counter);
 845                 /* @todo issue fatal error, it is quite serious situation */
 846                 return;
 847         }
 848
 849         /* Unmap tx_cmd */
 850         if (counter)
 851                 pci_unmap_single(dev,
 852                                 pci_unmap_addr(&txq->meta[index], mapping),
 853                                 pci_unmap_len(&txq->meta[index], len),
 854                                 PCI_DMA_TODEVICE);
 855
 856         /* unmap chunks if any */
 857
 858         for (i = 1; i < counter; i++) {
 859                 pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
 860                          le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE);
 861                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 862                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 863                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 864                                 /* Can be called from interrupt context */
 865                                 dev_kfree_skb_any(skb);
 866                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 867                         }
 868                 }
 869         }
 870         return ;
 871 }
 872
 873 /**
 874  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 875  *
 876 */
 877 void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
 878                                   struct iwl_device_cmd *cmd,
 879                                   struct ieee80211_tx_info *info,
 880                                   struct ieee80211_hdr *hdr,
 881                                   int sta_id, int tx_id)
 882 {
 883         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 884         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT_3945);
 885         u16 rate_mask;
 886         int rate;
 887         u8 rts_retry_limit;
 888         u8 data_retry_limit;
 889         __le32 tx_flags;
 890         __le16 fc = hdr->frame_control;
 891         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
 892
 893         rate = iwl3945_rates[rate_index].plcp;
 894         tx_flags = tx_cmd->tx_flags;
 895
 896         /* We need to figure out how to get the sta->supp_rates while
 897          * in this running context */
 898         rate_mask = IWL_RATES_MASK;
 899
 900
 901         /* Set retry limit on DATA packets and Probe Responses*/
 902         if (ieee80211_is_probe_resp(fc))
 903                 data_retry_limit = 3;
 904         else
 905                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 906         tx_cmd->data_retry_limit = data_retry_limit;
 907
 908         if (tx_id >= IWL_CMD_QUEUE_NUM)
 909                 rts_retry_limit = 3;
 910         else
 911                 rts_retry_limit = 7;
 912
 913         if (data_retry_limit < rts_retry_limit)
 914                 rts_retry_limit = data_retry_limit;
 915         tx_cmd->rts_retry_limit = rts_retry_limit;
 916
 917         if (ieee80211_is_mgmt(fc)) {
 918                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
 919                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
 920                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
 921                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
 922                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
 923                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 924                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 925                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 926                         }
 927                         break;
 928                 default:
 929                         break;
 930                 }
 931         }
 932
 933         tx_cmd->rate = rate;
 934         tx_cmd->tx_flags = tx_flags;
 935
 936         /* OFDM */
 937         tx_cmd->supp_rates[0] =
 938            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 939
 940         /* CCK */
 941         tx_cmd->supp_rates[1] = (rate_mask & 0xF);
 942
 943         IWL_DEBUG_RATE(priv, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 944                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 945                        tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
 946                        tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
 947 }
 948
 949 static u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id,
 950                            u16 tx_rate, u8 flags)
 951 {
 952         unsigned long flags_spin;
 953         struct iwl_station_entry *station;
 954
 955         if (sta_id == IWL_INVALID_STATION)
 956                 return IWL_INVALID_STATION;
 957
 958         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 959         station = &priv->stations[sta_id];
 960
 961         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 962         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 963         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 964
 965         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 966
 967         iwl_send_add_sta(priv, &station->sta, flags);
 968         IWL_DEBUG_RATE(priv, "SCALE sync station %d to rate %d\n",
 969                         sta_id, tx_rate);
 970         return sta_id;
 971 }
 972
 973 static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 974 {
 975         if (src == IWL_PWR_SRC_VAUX) {
 976                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
 977                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 978                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 979                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 980
 981                         iwl_poll_bit(priv, CSR_GPIO_IN,
 982                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 983                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 984                 }
 985         } else {
 986                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 987                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 988                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 989
 990                 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 991                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 992         }
 993
 994         return 0;
 995 }
 996
 997 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 998 {
 999         iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr);
1000         iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
1001         iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
1002         iwl_write_direct32(priv, FH39_RCSR_CONFIG(0),
1003                 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1004                 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1005                 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1006                 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1007                 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1008                 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1009                 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1010                 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1011
1012         /* fake read to flush all prev I/O */
1013         iwl_read_direct32(priv, FH39_RSSR_CTRL);
1014
1015         return 0;
1016 }
1017
1018 static int iwl3945_tx_reset(struct iwl_priv *priv)
1019 {
1020
1021         /* bypass mode */
1022         iwl_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1023
1024         /* RA 0 is active */
1025         iwl_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1026
1027         /* all 6 fifo are active */
1028         iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1029
1030         iwl_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1031         iwl_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1032         iwl_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1033         iwl_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1034
1035         iwl_write_direct32(priv, FH39_TSSR_CBB_BASE,
1036                              priv->_3945.shared_phys);
1037
1038         iwl_write_direct32(priv, FH39_TSSR_MSG_CONFIG,
1039                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1040                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1041                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1042                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1043                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1044                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1045                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1046
1047
1048         return 0;
1049 }
1050
1051 /**
1052  * iwl3945_txq_ctx_reset - Reset TX queue context
1053  *
1054  * Destroys all DMA structures and initialize them again
1055  */
1056 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
1057 {
1058         int rc;
1059         int txq_id, slots_num;
1060
1061         iwl3945_hw_txq_ctx_free(priv);
1062
1063         /* allocate tx queue structure */
1064         rc = iwl_alloc_txq_mem(priv);
1065         if (rc)
1066                 return rc;
1067
1068         /* Tx CMD queue */
1069         rc = iwl3945_tx_reset(priv);
1070         if (rc)
1071                 goto error;
1072
1073         /* Tx queue(s) */
1074         for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
1075                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1076                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1077                 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1078                                        txq_id);
1079                 if (rc) {
1080                         IWL_ERR(priv, "Tx %d queue init failed\n", txq_id);
1081                         goto error;
1082                 }
1083         }
1084
1085         return rc;
1086
1087  error:
1088         iwl3945_hw_txq_ctx_free(priv);
1089         return rc;
1090 }
1091
1092
1093 /*
1094  * Start up 3945's basic functionality after it has been reset
1095  * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1096  * NOTE:  This does not load uCode nor start the embedded processor
1097  */
1098 static int iwl3945_apm_init(struct iwl_priv *priv)
1099 {
1100         int ret = iwl_apm_init(priv);
1101
1102         /* Clear APMG (NIC's internal power management) interrupts */
1103         iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1104         iwl_write_prph(priv, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
1105
1106         /* Reset radio chip */
1107         iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1108         udelay(5);
1109         iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1110
1111         return ret;
1112 }
1113
1114 static void iwl3945_nic_config(struct iwl_priv *priv)
1115 {
1116         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1117         unsigned long flags;
1118         u8 rev_id = 0;
1119
1120         spin_lock_irqsave(&priv->lock, flags);
1121
1122         /* Determine HW type */
1123         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1124
1125         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
1126
1127         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1128                 IWL_DEBUG_INFO(priv, "RTP type\n");
1129         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1130                 IWL_DEBUG_INFO(priv, "3945 RADIO-MB type\n");
1131                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1132                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1133         } else {
1134                 IWL_DEBUG_INFO(priv, "3945 RADIO-MM type\n");
1135                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1136                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1137         }
1138
1139         if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
1140                 IWL_DEBUG_INFO(priv, "SKU OP mode is mrc\n");
1141                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1142                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1143         } else
1144                 IWL_DEBUG_INFO(priv, "SKU OP mode is basic\n");
1145
1146         if ((eeprom->board_revision & 0xF0) == 0xD0) {
1147                 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
1148                                eeprom->board_revision);
1149                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1150                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1151         } else {
1152                 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
1153                                eeprom->board_revision);
1154                 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1155                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1156         }
1157
1158         if (eeprom->almgor_m_version <= 1) {
1159                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1160                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1161                 IWL_DEBUG_INFO(priv, "Card M type A version is 0x%X\n",
1162                                eeprom->almgor_m_version);
1163         } else {
1164                 IWL_DEBUG_INFO(priv, "Card M type B version is 0x%X\n",
1165                                eeprom->almgor_m_version);
1166                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1167                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1168         }
1169         spin_unlock_irqrestore(&priv->lock, flags);
1170
1171         if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1172                 IWL_DEBUG_RF_KILL(priv, "SW RF KILL supported in EEPROM.\n");
1173
1174         if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1175                 IWL_DEBUG_RF_KILL(priv, "HW RF KILL supported in EEPROM.\n");
1176 }
1177
1178 int iwl3945_hw_nic_init(struct iwl_priv *priv)
1179 {
1180         int rc;
1181         unsigned long flags;
1182         struct iwl_rx_queue *rxq = &priv->rxq;
1183
1184         spin_lock_irqsave(&priv->lock, flags);
1185         priv->cfg->ops->lib->apm_ops.init(priv);
1186         spin_unlock_irqrestore(&priv->lock, flags);
1187
1188         rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
1189         if (rc)
1190                 return rc;
1191
1192         priv->cfg->ops->lib->apm_ops.config(priv);
1193
1194         /* Allocate the RX queue, or reset if it is already allocated */
1195         if (!rxq->bd) {
1196                 rc = iwl_rx_queue_alloc(priv);
1197                 if (rc) {
1198                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
1199                         return -ENOMEM;
1200                 }
1201         } else
1202                 iwl3945_rx_queue_reset(priv, rxq);
1203
1204         iwl3945_rx_replenish(priv);
1205
1206         iwl3945_rx_init(priv, rxq);
1207
1208
1209         /* Look at using this instead:
1210         rxq->need_update = 1;
1211         iwl_rx_queue_update_write_ptr(priv, rxq);
1212         */
1213
1214         iwl_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
1215
1216         rc = iwl3945_txq_ctx_reset(priv);
1217         if (rc)
1218                 return rc;
1219
1220         set_bit(STATUS_INIT, &priv->status);
1221
1222         return 0;
1223 }
1224
1225 /**
1226  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1227  *
1228  * Destroy all TX DMA queues and structures
1229  */
1230 void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv)
1231 {
1232         int txq_id;
1233
1234         /* Tx queues */
1235         if (priv->txq)
1236                 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num;
1237                      txq_id++)
1238                         if (txq_id == IWL_CMD_QUEUE_NUM)
1239                                 iwl_cmd_queue_free(priv);
1240                         else
1241                                 iwl_tx_queue_free(priv, txq_id);
1242
1243         /* free tx queue structure */
1244         iwl_free_txq_mem(priv);
1245 }
1246
1247 void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1248 {
1249         int txq_id;
1250
1251         /* stop SCD */
1252         iwl_write_prph(priv, ALM_SCD_MODE_REG, 0);
1253         iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0);
1254
1255         /* reset TFD queues */
1256         for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
1257                 iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
1258                 iwl_poll_direct_bit(priv, FH39_TSSR_TX_STATUS,
1259                                 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1260                                 1000);
1261         }
1262
1263         iwl3945_hw_txq_ctx_free(priv);
1264 }
1265
1266 /**
1267  * iwl3945_hw_reg_adjust_power_by_temp
1268  * return index delta into power gain settings table
1269 */
1270 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1271 {
1272         return (new_reading - old_reading) * (-11) / 100;
1273 }
1274
1275 /**
1276  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1277  */
1278 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1279 {
1280         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1281 }
1282
1283 int iwl3945_hw_get_temperature(struct iwl_priv *priv)
1284 {
1285         return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1286 }
1287
1288 /**
1289  * iwl3945_hw_reg_txpower_get_temperature
1290  * get the current temperature by reading from NIC
1291 */
1292 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1293 {
1294         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1295         int temperature;
1296
1297         temperature = iwl3945_hw_get_temperature(priv);
1298
1299         /* driver's okay range is -260 to +25.
1300          *   human readable okay range is 0 to +285 */
1301         IWL_DEBUG_INFO(priv, "Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1302
1303         /* handle insane temp reading */
1304         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1305                 IWL_ERR(priv, "Error bad temperature value  %d\n", temperature);
1306
1307                 /* if really really hot(?),
1308                  *   substitute the 3rd band/group's temp measured at factory */
1309                 if (priv->last_temperature > 100)
1310                         temperature = eeprom->groups[2].temperature;
1311                 else /* else use most recent "sane" value from driver */
1312                         temperature = priv->last_temperature;
1313         }
1314
1315         return temperature;     /* raw, not "human readable" */
1316 }
1317
1318 /* Adjust Txpower only if temperature variance is greater than threshold.
1319  *
1320  * Both are lower than older versions' 9 degrees */
1321 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1322
1323 /**
1324  * is_temp_calib_needed - determines if new calibration is needed
1325  *
1326  * records new temperature in tx_mgr->temperature.
1327  * replaces tx_mgr->last_temperature *only* if calib needed
1328  *    (assumes caller will actually do the calibration!). */
1329 static int is_temp_calib_needed(struct iwl_priv *priv)
1330 {
1331         int temp_diff;
1332
1333         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1334         temp_diff = priv->temperature - priv->last_temperature;
1335
1336         /* get absolute value */
1337         if (temp_diff < 0) {
1338                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d,\n", temp_diff);
1339                 temp_diff = -temp_diff;
1340         } else if (temp_diff == 0)
1341                 IWL_DEBUG_POWER(priv, "Same temp,\n");
1342         else
1343                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d,\n", temp_diff);
1344
1345         /* if we don't need calibration, *don't* update last_temperature */
1346         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1347                 IWL_DEBUG_POWER(priv, "Timed thermal calib not needed\n");
1348                 return 0;
1349         }
1350
1351         IWL_DEBUG_POWER(priv, "Timed thermal calib needed\n");
1352
1353         /* assume that caller will actually do calib ...
1354          *   update the "last temperature" value */
1355         priv->last_temperature = priv->temperature;
1356         return 1;
1357 }
1358
1359 #define IWL_MAX_GAIN_ENTRIES 78
1360 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1361 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1362
1363 /* radio and DSP power table, each step is 1/2 dB.
1364  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1365 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1366         {
1367          {251, 127},            /* 2.4 GHz, highest power */
1368          {251, 127},
1369          {251, 127},
1370          {251, 127},
1371          {251, 125},
1372          {251, 110},
1373          {251, 105},
1374          {251, 98},
1375          {187, 125},
1376          {187, 115},
1377          {187, 108},
1378          {187, 99},
1379          {243, 119},
1380          {243, 111},
1381          {243, 105},
1382          {243, 97},
1383          {243, 92},
1384          {211, 106},
1385          {211, 100},
1386          {179, 120},
1387          {179, 113},
1388          {179, 107},
1389          {147, 125},
1390          {147, 119},
1391          {147, 112},
1392          {147, 106},
1393          {147, 101},
1394          {147, 97},
1395          {147, 91},
1396          {115, 107},
1397          {235, 121},
1398          {235, 115},
1399          {235, 109},
1400          {203, 127},
1401          {203, 121},
1402          {203, 115},
1403          {203, 108},
1404          {203, 102},
1405          {203, 96},
1406          {203, 92},
1407          {171, 110},
1408          {171, 104},
1409          {171, 98},
1410          {139, 116},
1411          {227, 125},
1412          {227, 119},
1413          {227, 113},
1414          {227, 107},
1415          {227, 101},
1416          {227, 96},
1417          {195, 113},
1418          {195, 106},
1419          {195, 102},
1420          {195, 95},
1421          {163, 113},
1422          {163, 106},
1423          {163, 102},
1424          {163, 95},
1425          {131, 113},
1426          {131, 106},
1427          {131, 102},
1428          {131, 95},
1429          {99, 113},
1430          {99, 106},
1431          {99, 102},
1432          {99, 95},
1433          {67, 113},
1434          {67, 106},
1435          {67, 102},
1436          {67, 95},
1437          {35, 113},
1438          {35, 106},
1439          {35, 102},
1440          {35, 95},
1441          {3, 113},
1442          {3, 106},
1443          {3, 102},
1444          {3, 95} },             /* 2.4 GHz, lowest power */
1445         {
1446          {251, 127},            /* 5.x GHz, highest power */
1447          {251, 120},
1448          {251, 114},
1449          {219, 119},
1450          {219, 101},
1451          {187, 113},
1452          {187, 102},
1453          {155, 114},
1454          {155, 103},
1455          {123, 117},
1456          {123, 107},
1457          {123, 99},
1458          {123, 92},
1459          {91, 108},
1460          {59, 125},
1461          {59, 118},
1462          {59, 109},
1463          {59, 102},
1464          {59, 96},
1465          {59, 90},
1466          {27, 104},
1467          {27, 98},
1468          {27, 92},
1469          {115, 118},
1470          {115, 111},
1471          {115, 104},
1472          {83, 126},
1473          {83, 121},
1474          {83, 113},
1475          {83, 105},
1476          {83, 99},
1477          {51, 118},
1478          {51, 111},
1479          {51, 104},
1480          {51, 98},
1481          {19, 116},
1482          {19, 109},
1483          {19, 102},
1484          {19, 98},
1485          {19, 93},
1486          {171, 113},
1487          {171, 107},
1488          {171, 99},
1489          {139, 120},
1490          {139, 113},
1491          {139, 107},
1492          {139, 99},
1493          {107, 120},
1494          {107, 113},
1495          {107, 107},
1496          {107, 99},
1497          {75, 120},
1498          {75, 113},
1499          {75, 107},
1500          {75, 99},
1501          {43, 120},
1502          {43, 113},
1503          {43, 107},
1504          {43, 99},
1505          {11, 120},
1506          {11, 113},
1507          {11, 107},
1508          {11, 99},
1509          {131, 107},
1510          {131, 99},
1511          {99, 120},
1512          {99, 113},
1513          {99, 107},
1514          {99, 99},
1515          {67, 120},
1516          {67, 113},
1517          {67, 107},
1518          {67, 99},
1519          {35, 120},
1520          {35, 113},
1521          {35, 107},
1522          {35, 99},
1523          {3, 120} }             /* 5.x GHz, lowest power */
1524 };
1525
1526 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1527 {
1528         if (index < 0)
1529                 return 0;
1530         if (index >= IWL_MAX_GAIN_ENTRIES)
1531                 return IWL_MAX_GAIN_ENTRIES - 1;
1532         return (u8) index;
1533 }
1534
1535 /* Kick off thermal recalibration check every 60 seconds */
1536 #define REG_RECALIB_PERIOD (60)
1537
1538 /**
1539  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1540  *
1541  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1542  * or 6 Mbit (OFDM) rates.
1543  */
1544 static void iwl3945_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1545                                s32 rate_index, const s8 *clip_pwrs,
1546                                struct iwl_channel_info *ch_info,
1547                                int band_index)
1548 {
1549         struct iwl3945_scan_power_info *scan_power_info;
1550         s8 power;
1551         u8 power_index;
1552
1553         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1554
1555         /* use this channel group's 6Mbit clipping/saturation pwr,
1556          *   but cap at regulatory scan power restriction (set during init
1557          *   based on eeprom channel data) for this channel.  */
1558         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1559
1560         /* further limit to user's max power preference.
1561          * FIXME:  Other spectrum management power limitations do not
1562          *   seem to apply?? */
1563         power = min(power, priv->tx_power_user_lmt);
1564         scan_power_info->requested_power = power;
1565
1566         /* find difference between new scan *power* and current "normal"
1567          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1568          *   current "normal" temperature-compensated Tx power *index* for
1569          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1570          *   *index*. */
1571         power_index = ch_info->power_info[rate_index].power_table_index
1572             - (power - ch_info->power_info
1573                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1574
1575         /* store reference index that we use when adjusting *all* scan
1576          *   powers.  So we can accommodate user (all channel) or spectrum
1577          *   management (single channel) power changes "between" temperature
1578          *   feedback compensation procedures.
1579          * don't force fit this reference index into gain table; it may be a
1580          *   negative number.  This will help avoid errors when we're at
1581          *   the lower bounds (highest gains, for warmest temperatures)
1582          *   of the table. */
1583
1584         /* don't exceed table bounds for "real" setting */
1585         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1586
1587         scan_power_info->power_table_index = power_index;
1588         scan_power_info->tpc.tx_gain =
1589             power_gain_table[band_index][power_index].tx_gain;
1590         scan_power_info->tpc.dsp_atten =
1591             power_gain_table[band_index][power_index].dsp_atten;
1592 }
1593
1594 /**
1595  * iwl3945_send_tx_power - fill in Tx Power command with gain settings
1596  *
1597  * Configures power settings for all rates for the current channel,
1598  * using values from channel info struct, and send to NIC
1599  */
1600 static int iwl3945_send_tx_power(struct iwl_priv *priv)
1601 {
1602         int rate_idx, i;
1603         const struct iwl_channel_info *ch_info = NULL;
1604         struct iwl3945_txpowertable_cmd txpower = {
1605                 .channel = priv->active_rxon.channel,
1606         };
1607
1608         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1609         ch_info = iwl_get_channel_info(priv,
1610                                        priv->band,
1611                                        le16_to_cpu(priv->active_rxon.channel));
1612         if (!ch_info) {
1613                 IWL_ERR(priv,
1614                         "Failed to get channel info for channel %d [%d]\n",
1615                         le16_to_cpu(priv->active_rxon.channel), priv->band);
1616                 return -EINVAL;
1617         }
1618
1619         if (!is_channel_valid(ch_info)) {
1620                 IWL_DEBUG_POWER(priv, "Not calling TX_PWR_TABLE_CMD on "
1621                                 "non-Tx channel.\n");
1622                 return 0;
1623         }
1624
1625         /* fill cmd with power settings for all rates for current channel */
1626         /* Fill OFDM rate */
1627         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1628              rate_idx <= IWL39_LAST_OFDM_RATE; rate_idx++, i++) {
1629
1630                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1631                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1632
1633                 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1634                                 le16_to_cpu(txpower.channel),
1635                                 txpower.band,
1636                                 txpower.power[i].tpc.tx_gain,
1637                                 txpower.power[i].tpc.dsp_atten,
1638                                 txpower.power[i].rate);
1639         }
1640         /* Fill CCK rates */
1641         for (rate_idx = IWL_FIRST_CCK_RATE;
1642              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1643                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1644                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1645
1646                 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1647                                 le16_to_cpu(txpower.channel),
1648                                 txpower.band,
1649                                 txpower.power[i].tpc.tx_gain,
1650                                 txpower.power[i].tpc.dsp_atten,
1651                                 txpower.power[i].rate);
1652         }
1653
1654         return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1655                                 sizeof(struct iwl3945_txpowertable_cmd),
1656                                 &txpower);
1657
1658 }
1659
1660 /**
1661  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1662  * @ch_info: Channel to update.  Uses power_info.requested_power.
1663  *
1664  * Replace requested_power and base_power_index ch_info fields for
1665  * one channel.
1666  *
1667  * Called if user or spectrum management changes power preferences.
1668  * Takes into account h/w and modulation limitations (clip power).
1669  *
1670  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1671  *
1672  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1673  *       properly fill out the scan powers, and actual h/w gain settings,
1674  *       and send changes to NIC
1675  */
1676 static int iwl3945_hw_reg_set_new_power(struct iwl_priv *priv,
1677                              struct iwl_channel_info *ch_info)
1678 {
1679         struct iwl3945_channel_power_info *power_info;
1680         int power_changed = 0;
1681         int i;
1682         const s8 *clip_pwrs;
1683         int power;
1684
1685         /* Get this chnlgrp's rate-to-max/clip-powers table */
1686         clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
1687
1688         /* Get this channel's rate-to-current-power settings table */
1689         power_info = ch_info->power_info;
1690
1691         /* update OFDM Txpower settings */
1692         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1693              i++, ++power_info) {
1694                 int delta_idx;
1695
1696                 /* limit new power to be no more than h/w capability */
1697                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1698                 if (power == power_info->requested_power)
1699                         continue;
1700
1701                 /* find difference between old and new requested powers,
1702                  *    update base (non-temp-compensated) power index */
1703                 delta_idx = (power - power_info->requested_power) * 2;
1704                 power_info->base_power_index -= delta_idx;
1705
1706                 /* save new requested power value */
1707                 power_info->requested_power = power;
1708
1709                 power_changed = 1;
1710         }
1711
1712         /* update CCK Txpower settings, based on OFDM 12M setting ...
1713          *    ... all CCK power settings for a given channel are the *same*. */
1714         if (power_changed) {
1715                 power =
1716                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1717                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1718
1719                 /* do all CCK rates' iwl3945_channel_power_info structures */
1720                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1721                         power_info->requested_power = power;
1722                         power_info->base_power_index =
1723                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1724                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1725                         ++power_info;
1726                 }
1727         }
1728
1729         return 0;
1730 }
1731
1732 /**
1733  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1734  *
1735  * NOTE: Returned power limit may be less (but not more) than requested,
1736  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1737  *       (no consideration for h/w clipping limitations).
1738  */
1739 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1740 {
1741         s8 max_power;
1742
1743 #if 0
1744         /* if we're using TGd limits, use lower of TGd or EEPROM */
1745         if (ch_info->tgd_data.max_power != 0)
1746                 max_power = min(ch_info->tgd_data.max_power,
1747                                 ch_info->eeprom.max_power_avg);
1748
1749         /* else just use EEPROM limits */
1750         else
1751 #endif
1752                 max_power = ch_info->eeprom.max_power_avg;
1753
1754         return min(max_power, ch_info->max_power_avg);
1755 }
1756
1757 /**
1758  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1759  *
1760  * Compensate txpower settings of *all* channels for temperature.
1761  * This only accounts for the difference between current temperature
1762  *   and the factory calibration temperatures, and bases the new settings
1763  *   on the channel's base_power_index.
1764  *
1765  * If RxOn is "associated", this sends the new Txpower to NIC!
1766  */
1767 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1768 {
1769         struct iwl_channel_info *ch_info = NULL;
1770         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1771         int delta_index;
1772         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1773         u8 a_band;
1774         u8 rate_index;
1775         u8 scan_tbl_index;
1776         u8 i;
1777         int ref_temp;
1778         int temperature = priv->temperature;
1779
1780         if (priv->disable_tx_power_cal ||
1781             test_bit(STATUS_SCANNING, &priv->status)) {
1782                 /* do not perform tx power calibration */
1783                 return 0;
1784         }
1785         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1786         for (i = 0; i < priv->channel_count; i++) {
1787                 ch_info = &priv->channel_info[i];
1788                 a_band = is_channel_a_band(ch_info);
1789
1790                 /* Get this chnlgrp's factory calibration temperature */
1791                 ref_temp = (s16)eeprom->groups[ch_info->group_index].
1792                     temperature;
1793
1794                 /* get power index adjustment based on current and factory
1795                  * temps */
1796                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1797                                                               ref_temp);
1798
1799                 /* set tx power value for all rates, OFDM and CCK */
1800                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1801                      rate_index++) {
1802                         int power_idx =
1803                             ch_info->power_info[rate_index].base_power_index;
1804
1805                         /* temperature compensate */
1806                         power_idx += delta_index;
1807
1808                         /* stay within table range */
1809                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1810                         ch_info->power_info[rate_index].
1811                             power_table_index = (u8) power_idx;
1812                         ch_info->power_info[rate_index].tpc =
1813                             power_gain_table[a_band][power_idx];
1814                 }
1815
1816                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1817                 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
1818
1819                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1820                 for (scan_tbl_index = 0;
1821                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1822                         s32 actual_index = (scan_tbl_index == 0) ?
1823                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1824                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1825                                            actual_index, clip_pwrs,
1826                                            ch_info, a_band);
1827                 }
1828         }
1829
1830         /* send Txpower command for current channel to ucode */
1831         return priv->cfg->ops->lib->send_tx_power(priv);
1832 }
1833
1834 int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1835 {
1836         struct iwl_channel_info *ch_info;
1837         s8 max_power;
1838         u8 a_band;
1839         u8 i;
1840
1841         if (priv->tx_power_user_lmt == power) {
1842                 IWL_DEBUG_POWER(priv, "Requested Tx power same as current "
1843                                 "limit: %ddBm.\n", power);
1844                 return 0;
1845         }
1846
1847         IWL_DEBUG_POWER(priv, "Setting upper limit clamp to %ddBm.\n", power);
1848         priv->tx_power_user_lmt = power;
1849
1850         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1851
1852         for (i = 0; i < priv->channel_count; i++) {
1853                 ch_info = &priv->channel_info[i];
1854                 a_band = is_channel_a_band(ch_info);
1855
1856                 /* find minimum power of all user and regulatory constraints
1857                  *    (does not consider h/w clipping limitations) */
1858                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1859                 max_power = min(power, max_power);
1860                 if (max_power != ch_info->curr_txpow) {
1861                         ch_info->curr_txpow = max_power;
1862
1863                         /* this considers the h/w clipping limitations */
1864                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1865                 }
1866         }
1867
1868         /* update txpower settings for all channels,
1869          *   send to NIC if associated. */
1870         is_temp_calib_needed(priv);
1871         iwl3945_hw_reg_comp_txpower_temp(priv);
1872
1873         return 0;
1874 }
1875
1876 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
1877 {
1878         int rc = 0;
1879         struct iwl_rx_packet *pkt;
1880         struct iwl3945_rxon_assoc_cmd rxon_assoc;
1881         struct iwl_host_cmd cmd = {
1882                 .id = REPLY_RXON_ASSOC,
1883                 .len = sizeof(rxon_assoc),
1884                 .flags = CMD_WANT_SKB,
1885                 .data = &rxon_assoc,
1886         };
1887         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1888         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1889
1890         if ((rxon1->flags == rxon2->flags) &&
1891             (rxon1->filter_flags == rxon2->filter_flags) &&
1892             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1893             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1894                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1895                 return 0;
1896         }
1897
1898         rxon_assoc.flags = priv->staging_rxon.flags;
1899         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1900         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1901         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1902         rxon_assoc.reserved = 0;
1903
1904         rc = iwl_send_cmd_sync(priv, &cmd);
1905         if (rc)
1906                 return rc;
1907
1908         pkt = (struct iwl_rx_packet *)cmd.reply_page;
1909         if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
1910                 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
1911                 rc = -EIO;
1912         }
1913
1914         iwl_free_pages(priv, cmd.reply_page);
1915
1916         return rc;
1917 }
1918
1919 /**
1920  * iwl3945_commit_rxon - commit staging_rxon to hardware
1921  *
1922  * The RXON command in staging_rxon is committed to the hardware and
1923  * the active_rxon structure is updated with the new data.  This
1924  * function correctly transitions out of the RXON_ASSOC_MSK state if
1925  * a HW tune is required based on the RXON structure changes.
1926  */
1927 static int iwl3945_commit_rxon(struct iwl_priv *priv)
1928 {
1929         /* cast away the const for active_rxon in this function */
1930         struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1931         struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
1932         int rc = 0;
1933         bool new_assoc =
1934                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
1935
1936         if (!iwl_is_alive(priv))
1937                 return -1;
1938
1939         /* always get timestamp with Rx frame */
1940         staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1941
1942         /* select antenna */
1943         staging_rxon->flags &=
1944             ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1945         staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
1946
1947         rc = iwl_check_rxon_cmd(priv);
1948         if (rc) {
1949                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
1950                 return -EINVAL;
1951         }
1952
1953         /* If we don't need to send a full RXON, we can use
1954          * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1955          * and other flags for the current radio configuration. */
1956         if (!iwl_full_rxon_required(priv)) {
1957                 rc = iwl_send_rxon_assoc(priv);
1958                 if (rc) {
1959                         IWL_ERR(priv, "Error setting RXON_ASSOC "
1960                                   "configuration (%d).\n", rc);
1961                         return rc;
1962                 }
1963
1964                 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1965
1966                 return 0;
1967         }
1968
1969         /* If we are currently associated and the new config requires
1970          * an RXON_ASSOC and the new config wants the associated mask enabled,
1971          * we must clear the associated from the active configuration
1972          * before we apply the new config */
1973         if (iwl_is_associated(priv) && new_assoc) {
1974                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
1975                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1976
1977                 /*
1978                  * reserved4 and 5 could have been filled by the iwlcore code.
1979                  * Let's clear them before pushing to the 3945.
1980                  */
1981                 active_rxon->reserved4 = 0;
1982                 active_rxon->reserved5 = 0;
1983                 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
1984                                       sizeof(struct iwl3945_rxon_cmd),
1985                                       &priv->active_rxon);
1986
1987                 /* If the mask clearing failed then we set
1988                  * active_rxon back to what it was previously */
1989                 if (rc) {
1990                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1991                         IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
1992                                   "configuration (%d).\n", rc);
1993                         return rc;
1994                 }
1995                 iwl_clear_ucode_stations(priv);
1996                 iwl_restore_stations(priv);
1997         }
1998
1999         IWL_DEBUG_INFO(priv, "Sending RXON\n"
2000                        "* with%s RXON_FILTER_ASSOC_MSK\n"
2001                        "* channel = %d\n"
2002                        "* bssid = %pM\n",
2003                        (new_assoc ? "" : "out"),
2004                        le16_to_cpu(staging_rxon->channel),
2005                        staging_rxon->bssid_addr);
2006
2007         /*
2008          * reserved4 and 5 could have been filled by the iwlcore code.
2009          * Let's clear them before pushing to the 3945.
2010          */
2011         staging_rxon->reserved4 = 0;
2012         staging_rxon->reserved5 = 0;
2013
2014         iwl_set_rxon_hwcrypto(priv, !iwl3945_mod_params.sw_crypto);
2015
2016         /* Apply the new configuration */
2017         rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
2018                               sizeof(struct iwl3945_rxon_cmd),
2019                               staging_rxon);
2020         if (rc) {
2021                 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
2022                 return rc;
2023         }
2024
2025         memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
2026
2027         if (!new_assoc) {
2028                 iwl_clear_ucode_stations(priv);
2029                 iwl_restore_stations(priv);
2030         }
2031
2032         /* If we issue a new RXON command which required a tune then we must
2033          * send a new TXPOWER command or we won't be able to Tx any frames */
2034         rc = priv->cfg->ops->lib->send_tx_power(priv);
2035         if (rc) {
2036                 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
2037                 return rc;
2038         }
2039
2040         /* Init the hardware's rate fallback order based on the band */
2041         rc = iwl3945_init_hw_rate_table(priv);
2042         if (rc) {
2043                 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
2044                 return -EIO;
2045         }
2046
2047         return 0;
2048 }
2049
2050 /**
2051  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
2052  *
2053  * -- reset periodic timer
2054  * -- see if temp has changed enough to warrant re-calibration ... if so:
2055  *     -- correct coeffs for temp (can reset temp timer)
2056  *     -- save this temp as "last",
2057  *     -- send new set of gain settings to NIC
2058  * NOTE:  This should continue working, even when we're not associated,
2059  *   so we can keep our internal table of scan powers current. */
2060 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
2061 {
2062         /* This will kick in the "brute force"
2063          * iwl3945_hw_reg_comp_txpower_temp() below */
2064         if (!is_temp_calib_needed(priv))
2065                 goto reschedule;
2066
2067         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2068          * This is based *only* on current temperature,
2069          * ignoring any previous power measurements */
2070         iwl3945_hw_reg_comp_txpower_temp(priv);
2071
2072  reschedule:
2073         queue_delayed_work(priv->workqueue,
2074                            &priv->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ);
2075 }
2076
2077 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2078 {
2079         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2080                                              _3945.thermal_periodic.work);
2081
2082         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2083                 return;
2084
2085         mutex_lock(&priv->mutex);
2086         iwl3945_reg_txpower_periodic(priv);
2087         mutex_unlock(&priv->mutex);
2088 }
2089
2090 /**
2091  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2092  *                                 for the channel.
2093  *
2094  * This function is used when initializing channel-info structs.
2095  *
2096  * NOTE: These channel groups do *NOT* match the bands above!
2097  *       These channel groups are based on factory-tested channels;
2098  *       on A-band, EEPROM's "group frequency" entries represent the top
2099  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2100  */
2101 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
2102                                        const struct iwl_channel_info *ch_info)
2103 {
2104         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2105         struct iwl3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
2106         u8 group;
2107         u16 group_index = 0;    /* based on factory calib frequencies */
2108         u8 grp_channel;
2109
2110         /* Find the group index for the channel ... don't use index 1(?) */
2111         if (is_channel_a_band(ch_info)) {
2112                 for (group = 1; group < 5; group++) {
2113                         grp_channel = ch_grp[group].group_channel;
2114                         if (ch_info->channel <= grp_channel) {
2115                                 group_index = group;
2116                                 break;
2117                         }
2118                 }
2119                 /* group 4 has a few channels *above* its factory cal freq */
2120                 if (group == 5)
2121                         group_index = 4;
2122         } else
2123                 group_index = 0;        /* 2.4 GHz, group 0 */
2124
2125         IWL_DEBUG_POWER(priv, "Chnl %d mapped to grp %d\n", ch_info->channel,
2126                         group_index);
2127         return group_index;
2128 }
2129
2130 /**
2131  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2132  *
2133  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2134  *   into radio/DSP gain settings table for requested power.
2135  */
2136 static int iwl3945_hw_reg_get_matched_power_index(struct iwl_priv *priv,
2137                                        s8 requested_power,
2138                                        s32 setting_index, s32 *new_index)
2139 {
2140         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2141         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2142         s32 index0, index1;
2143         s32 power = 2 * requested_power;
2144         s32 i;
2145         const struct iwl3945_eeprom_txpower_sample *samples;
2146         s32 gains0, gains1;
2147         s32 res;
2148         s32 denominator;
2149
2150         chnl_grp = &eeprom->groups[setting_index];
2151         samples = chnl_grp->samples;
2152         for (i = 0; i < 5; i++) {
2153                 if (power == samples[i].power) {
2154                         *new_index = samples[i].gain_index;
2155                         return 0;
2156                 }
2157         }
2158
2159         if (power > samples[1].power) {
2160                 index0 = 0;
2161                 index1 = 1;
2162         } else if (power > samples[2].power) {
2163                 index0 = 1;
2164                 index1 = 2;
2165         } else if (power > samples[3].power) {
2166                 index0 = 2;
2167                 index1 = 3;
2168         } else {
2169                 index0 = 3;
2170                 index1 = 4;
2171         }
2172
2173         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2174         if (denominator == 0)
2175                 return -EINVAL;
2176         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2177         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2178         res = gains0 + (gains1 - gains0) *
2179             ((s32) power - (s32) samples[index0].power) / denominator +
2180             (1 << 18);
2181         *new_index = res >> 19;
2182         return 0;
2183 }
2184
2185 static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv *priv)
2186 {
2187         u32 i;
2188         s32 rate_index;
2189         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2190         const struct iwl3945_eeprom_txpower_group *group;
2191
2192         IWL_DEBUG_POWER(priv, "Initializing factory calib info from EEPROM\n");
2193
2194         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2195                 s8 *clip_pwrs;  /* table of power levels for each rate */
2196                 s8 satur_pwr;   /* saturation power for each chnl group */
2197                 group = &eeprom->groups[i];
2198
2199                 /* sanity check on factory saturation power value */
2200                 if (group->saturation_power < 40) {
2201                         IWL_WARN(priv, "Error: saturation power is %d, "
2202                                     "less than minimum expected 40\n",
2203                                     group->saturation_power);
2204                         return;
2205                 }
2206
2207                 /*
2208                  * Derive requested power levels for each rate, based on
2209                  *   hardware capabilities (saturation power for band).
2210                  * Basic value is 3dB down from saturation, with further
2211                  *   power reductions for highest 3 data rates.  These
2212                  *   backoffs provide headroom for high rate modulation
2213                  *   power peaks, without too much distortion (clipping).
2214                  */
2215                 /* we'll fill in this array with h/w max power levels */
2216                 clip_pwrs = (s8 *) priv->_3945.clip_groups[i].clip_powers;
2217
2218                 /* divide factory saturation power by 2 to find -3dB level */
2219                 satur_pwr = (s8) (group->saturation_power >> 1);
2220
2221                 /* fill in channel group's nominal powers for each rate */
2222                 for (rate_index = 0;
2223                      rate_index < IWL_RATE_COUNT_3945; rate_index++, clip_pwrs++) {
2224                         switch (rate_index) {
2225                         case IWL_RATE_36M_INDEX_TABLE:
2226                                 if (i == 0)     /* B/G */
2227                                         *clip_pwrs = satur_pwr;
2228                                 else    /* A */
2229                                         *clip_pwrs = satur_pwr - 5;
2230                                 break;
2231                         case IWL_RATE_48M_INDEX_TABLE:
2232                                 if (i == 0)
2233                                         *clip_pwrs = satur_pwr - 7;
2234                                 else
2235                                         *clip_pwrs = satur_pwr - 10;
2236                                 break;
2237                         case IWL_RATE_54M_INDEX_TABLE:
2238                                 if (i == 0)
2239                                         *clip_pwrs = satur_pwr - 9;
2240                                 else
2241                                         *clip_pwrs = satur_pwr - 12;
2242                                 break;
2243                         default:
2244                                 *clip_pwrs = satur_pwr;
2245                                 break;
2246                         }
2247                 }
2248         }
2249 }
2250
2251 /**
2252  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2253  *
2254  * Second pass (during init) to set up priv->channel_info
2255  *
2256  * Set up Tx-power settings in our channel info database for each VALID
2257  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2258  * and current temperature.
2259  *
2260  * Since this is based on current temperature (at init time), these values may
2261  * not be valid for very long, but it gives us a starting/default point,
2262  * and allows us to active (i.e. using Tx) scan.
2263  *
2264  * This does *not* write values to NIC, just sets up our internal table.
2265  */
2266 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
2267 {
2268         struct iwl_channel_info *ch_info = NULL;
2269         struct iwl3945_channel_power_info *pwr_info;
2270         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2271         int delta_index;
2272         u8 rate_index;
2273         u8 scan_tbl_index;
2274         const s8 *clip_pwrs;    /* array of power levels for each rate */
2275         u8 gain, dsp_atten;
2276         s8 power;
2277         u8 pwr_index, base_pwr_index, a_band;
2278         u8 i;
2279         int temperature;
2280
2281         /* save temperature reference,
2282          *   so we can determine next time to calibrate */
2283         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2284         priv->last_temperature = temperature;
2285
2286         iwl3945_hw_reg_init_channel_groups(priv);
2287
2288         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2289         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2290              i++, ch_info++) {
2291                 a_band = is_channel_a_band(ch_info);
2292                 if (!is_channel_valid(ch_info))
2293                         continue;
2294
2295                 /* find this channel's channel group (*not* "band") index */
2296                 ch_info->group_index =
2297                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2298
2299                 /* Get this chnlgrp's rate->max/clip-powers table */
2300                 clip_pwrs = priv->_3945.clip_groups[ch_info->group_index].clip_powers;
2301
2302                 /* calculate power index *adjustment* value according to
2303                  *  diff between current temperature and factory temperature */
2304                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2305                                 eeprom->groups[ch_info->group_index].
2306                                 temperature);
2307
2308                 IWL_DEBUG_POWER(priv, "Delta index for channel %d: %d [%d]\n",
2309                                 ch_info->channel, delta_index, temperature +
2310                                 IWL_TEMP_CONVERT);
2311
2312                 /* set tx power value for all OFDM rates */
2313                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2314                      rate_index++) {
2315                         s32 uninitialized_var(power_idx);
2316                         int rc;
2317
2318                         /* use channel group's clip-power table,
2319                          *   but don't exceed channel's max power */
2320                         s8 pwr = min(ch_info->max_power_avg,
2321                                      clip_pwrs[rate_index]);
2322
2323                         pwr_info = &ch_info->power_info[rate_index];
2324
2325                         /* get base (i.e. at factory-measured temperature)
2326                          *    power table index for this rate's power */
2327                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2328                                                          ch_info->group_index,
2329                                                          &power_idx);
2330                         if (rc) {
2331                                 IWL_ERR(priv, "Invalid power index\n");
2332                                 return rc;
2333                         }
2334                         pwr_info->base_power_index = (u8) power_idx;
2335
2336                         /* temperature compensate */
2337                         power_idx += delta_index;
2338
2339                         /* stay within range of gain table */
2340                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2341
2342                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2343                         pwr_info->requested_power = pwr;
2344                         pwr_info->power_table_index = (u8) power_idx;
2345                         pwr_info->tpc.tx_gain =
2346                             power_gain_table[a_band][power_idx].tx_gain;
2347                         pwr_info->tpc.dsp_atten =
2348                             power_gain_table[a_band][power_idx].dsp_atten;
2349                 }
2350
2351                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2352                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2353                 power = pwr_info->requested_power +
2354                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2355                 pwr_index = pwr_info->power_table_index +
2356                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2357                 base_pwr_index = pwr_info->base_power_index +
2358                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2359
2360                 /* stay within table range */
2361                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2362                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2363                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2364
2365                 /* fill each CCK rate's iwl3945_channel_power_info structure
2366                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2367                  * NOTE:  CCK rates start at end of OFDM rates! */
2368                 for (rate_index = 0;
2369                      rate_index < IWL_CCK_RATES; rate_index++) {
2370                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2371                         pwr_info->requested_power = power;
2372                         pwr_info->power_table_index = pwr_index;
2373                         pwr_info->base_power_index = base_pwr_index;
2374                         pwr_info->tpc.tx_gain = gain;
2375                         pwr_info->tpc.dsp_atten = dsp_atten;
2376                 }
2377
2378                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2379                 for (scan_tbl_index = 0;
2380                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2381                         s32 actual_index = (scan_tbl_index == 0) ?
2382                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2383                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2384                                 actual_index, clip_pwrs, ch_info, a_band);
2385                 }
2386         }
2387
2388         return 0;
2389 }
2390
2391 int iwl3945_hw_rxq_stop(struct iwl_priv *priv)
2392 {
2393         int rc;
2394
2395         iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2396         rc = iwl_poll_direct_bit(priv, FH39_RSSR_STATUS,
2397                         FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2398         if (rc < 0)
2399                 IWL_ERR(priv, "Can't stop Rx DMA.\n");
2400
2401         return 0;
2402 }
2403
2404 int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2405 {
2406         int txq_id = txq->q.id;
2407
2408         struct iwl3945_shared *shared_data = priv->_3945.shared_virt;
2409
2410         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2411
2412         iwl_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0);
2413         iwl_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0);
2414
2415         iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id),
2416                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2417                 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2418                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2419                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2420                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2421
2422         /* fake read to flush all prev. writes */
2423         iwl_read32(priv, FH39_TSSR_CBB_BASE);
2424
2425         return 0;
2426 }
2427
2428 /*
2429  * HCMD utils
2430  */
2431 static u16 iwl3945_get_hcmd_size(u8 cmd_id, u16 len)
2432 {
2433         switch (cmd_id) {
2434         case REPLY_RXON:
2435                 return sizeof(struct iwl3945_rxon_cmd);
2436         case POWER_TABLE_CMD:
2437                 return sizeof(struct iwl3945_powertable_cmd);
2438         default:
2439                 return len;
2440         }
2441 }
2442
2443
2444 static u16 iwl3945_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
2445 {
2446         struct iwl3945_addsta_cmd *addsta = (struct iwl3945_addsta_cmd *)data;
2447         addsta->mode = cmd->mode;
2448         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2449         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
2450         addsta->station_flags = cmd->station_flags;
2451         addsta->station_flags_msk = cmd->station_flags_msk;
2452         addsta->tid_disable_tx = cpu_to_le16(0);
2453         addsta->rate_n_flags = cmd->rate_n_flags;
2454         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2455         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2456         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2457
2458         return (u16)sizeof(struct iwl3945_addsta_cmd);
2459 }
2460
2461 static int iwl3945_manage_ibss_station(struct iwl_priv *priv,
2462                                        struct ieee80211_vif *vif, bool add)
2463 {
2464         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2465         int ret;
2466
2467         if (add) {
2468                 ret = iwl_add_local_station(priv, vif->bss_conf.bssid, false,
2469                                             &vif_priv->ibss_bssid_sta_id);
2470                 if (ret)
2471                         return ret;
2472
2473                 iwl3945_sync_sta(priv, vif_priv->ibss_bssid_sta_id,
2474                                  (priv->band == IEEE80211_BAND_5GHZ) ?
2475                                  IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
2476                                  CMD_ASYNC);
2477                 iwl3945_rate_scale_init(priv->hw, vif_priv->ibss_bssid_sta_id);
2478
2479                 return 0;
2480         }
2481
2482         return iwl_remove_station(priv, vif_priv->ibss_bssid_sta_id,
2483                                   vif->bss_conf.bssid);
2484 }
2485
2486 /**
2487  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2488  */
2489 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2490 {
2491         int rc, i, index, prev_index;
2492         struct iwl3945_rate_scaling_cmd rate_cmd = {
2493                 .reserved = {0, 0, 0},
2494         };
2495         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2496
2497         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2498                 index = iwl3945_rates[i].table_rs_index;
2499
2500                 table[index].rate_n_flags =
2501                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2502                 table[index].try_cnt = priv->retry_rate;
2503                 prev_index = iwl3945_get_prev_ieee_rate(i);
2504                 table[index].next_rate_index =
2505                                 iwl3945_rates[prev_index].table_rs_index;
2506         }
2507
2508         switch (priv->band) {
2509         case IEEE80211_BAND_5GHZ:
2510                 IWL_DEBUG_RATE(priv, "Select A mode rate scale\n");
2511                 /* If one of the following CCK rates is used,
2512                  * have it fall back to the 6M OFDM rate */
2513                 for (i = IWL_RATE_1M_INDEX_TABLE;
2514                         i <= IWL_RATE_11M_INDEX_TABLE; i++)
2515                         table[i].next_rate_index =
2516                           iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2517
2518                 /* Don't fall back to CCK rates */
2519                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index =
2520                                                 IWL_RATE_9M_INDEX_TABLE;
2521
2522                 /* Don't drop out of OFDM rates */
2523                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2524                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2525                 break;
2526
2527         case IEEE80211_BAND_2GHZ:
2528                 IWL_DEBUG_RATE(priv, "Select B/G mode rate scale\n");
2529                 /* If an OFDM rate is used, have it fall back to the
2530                  * 1M CCK rates */
2531
2532                 if (!(priv->_3945.sta_supp_rates & IWL_OFDM_RATES_MASK) &&
2533                     iwl_is_associated(priv)) {
2534
2535                         index = IWL_FIRST_CCK_RATE;
2536                         for (i = IWL_RATE_6M_INDEX_TABLE;
2537                              i <= IWL_RATE_54M_INDEX_TABLE; i++)
2538                                 table[i].next_rate_index =
2539                                         iwl3945_rates[index].table_rs_index;
2540
2541                         index = IWL_RATE_11M_INDEX_TABLE;
2542                         /* CCK shouldn't fall back to OFDM... */
2543                         table[index].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2544                 }
2545                 break;
2546
2547         default:
2548                 WARN_ON(1);
2549                 break;
2550         }
2551
2552         /* Update the rate scaling for control frame Tx */
2553         rate_cmd.table_id = 0;
2554         rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2555                               &rate_cmd);
2556         if (rc)
2557                 return rc;
2558
2559         /* Update the rate scaling for data frame Tx */
2560         rate_cmd.table_id = 1;
2561         return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2562                                 &rate_cmd);
2563 }
2564
2565 /* Called when initializing driver */
2566 int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
2567 {
2568         memset((void *)&priv->hw_params, 0,
2569                sizeof(struct iwl_hw_params));
2570
2571         priv->_3945.shared_virt =
2572                 dma_alloc_coherent(&priv->pci_dev->dev,
2573                                    sizeof(struct iwl3945_shared),
2574                                    &priv->_3945.shared_phys, GFP_KERNEL);
2575         if (!priv->_3945.shared_virt) {
2576                 IWL_ERR(priv, "failed to allocate pci memory\n");
2577                 return -ENOMEM;
2578         }
2579
2580         /* Assign number of Usable TX queues */
2581         priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
2582
2583         priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd);
2584         priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_3K);
2585         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2586         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2587         priv->hw_params.max_stations = IWL3945_STATION_COUNT;
2588         priv->hw_params.bcast_sta_id = IWL3945_BROADCAST_ID;
2589
2590         priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2591         priv->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL;
2592
2593         return 0;
2594 }
2595
2596 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv *priv,
2597                           struct iwl3945_frame *frame, u8 rate)
2598 {
2599         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2600         unsigned int frame_size;
2601
2602         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2603         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2604
2605         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
2606         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2607
2608         frame_size = iwl3945_fill_beacon_frame(priv,
2609                                 tx_beacon_cmd->frame,
2610                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2611
2612         BUG_ON(frame_size > MAX_MPDU_SIZE);
2613         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2614
2615         tx_beacon_cmd->tx.rate = rate;
2616         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2617                                       TX_CMD_FLG_TSF_MSK);
2618
2619         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2620         tx_beacon_cmd->tx.supp_rates[0] =
2621                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2622
2623         tx_beacon_cmd->tx.supp_rates[1] =
2624                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2625
2626         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2627 }
2628
2629 void iwl3945_hw_rx_handler_setup(struct iwl_priv *priv)
2630 {
2631         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2632         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2633 }
2634
2635 void iwl3945_hw_setup_deferred_work(struct iwl_priv *priv)
2636 {
2637         INIT_DELAYED_WORK(&priv->_3945.thermal_periodic,
2638                           iwl3945_bg_reg_txpower_periodic);
2639 }
2640
2641 void iwl3945_hw_cancel_deferred_work(struct iwl_priv *priv)
2642 {
2643         cancel_delayed_work(&priv->_3945.thermal_periodic);
2644 }
2645
2646 /* check contents of special bootstrap uCode SRAM */
2647 static int iwl3945_verify_bsm(struct iwl_priv *priv)
2648  {
2649         __le32 *image = priv->ucode_boot.v_addr;
2650         u32 len = priv->ucode_boot.len;
2651         u32 reg;
2652         u32 val;
2653
2654         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
2655
2656         /* verify BSM SRAM contents */
2657         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
2658         for (reg = BSM_SRAM_LOWER_BOUND;
2659              reg < BSM_SRAM_LOWER_BOUND + len;
2660              reg += sizeof(u32), image++) {
2661                 val = iwl_read_prph(priv, reg);
2662                 if (val != le32_to_cpu(*image)) {
2663                         IWL_ERR(priv, "BSM uCode verification failed at "
2664                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2665                                   BSM_SRAM_LOWER_BOUND,
2666                                   reg - BSM_SRAM_LOWER_BOUND, len,
2667                                   val, le32_to_cpu(*image));
2668                         return -EIO;
2669                 }
2670         }
2671
2672         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
2673
2674         return 0;
2675 }
2676
2677
2678 /******************************************************************************
2679  *
2680  * EEPROM related functions
2681  *
2682  ******************************************************************************/
2683
2684 /*
2685  * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2686  * embedded controller) as EEPROM reader; each read is a series of pulses
2687  * to/from the EEPROM chip, not a single event, so even reads could conflict
2688  * if they weren't arbitrated by some ownership mechanism.  Here, the driver
2689  * simply claims ownership, which should be safe when this function is called
2690  * (i.e. before loading uCode!).
2691  */
2692 static int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
2693 {
2694         _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2695         return 0;
2696 }
2697
2698
2699 static void iwl3945_eeprom_release_semaphore(struct iwl_priv *priv)
2700 {
2701         return;
2702 }
2703
2704  /**
2705   * iwl3945_load_bsm - Load bootstrap instructions
2706   *
2707   * BSM operation:
2708   *
2709   * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2710   * in special SRAM that does not power down during RFKILL.  When powering back
2711   * up after power-saving sleeps (or during initial uCode load), the BSM loads
2712   * the bootstrap program into the on-board processor, and starts it.
2713   *
2714   * The bootstrap program loads (via DMA) instructions and data for a new
2715   * program from host DRAM locations indicated by the host driver in the
2716   * BSM_DRAM_* registers.  Once the new program is loaded, it starts
2717   * automatically.
2718   *
2719   * When initializing the NIC, the host driver points the BSM to the
2720   * "initialize" uCode image.  This uCode sets up some internal data, then
2721   * notifies host via "initialize alive" that it is complete.
2722   *
2723   * The host then replaces the BSM_DRAM_* pointer values to point to the
2724   * normal runtime uCode instructions and a backup uCode data cache buffer
2725   * (filled initially with starting data values for the on-board processor),
2726   * then triggers the "initialize" uCode to load and launch the runtime uCode,
2727   * which begins normal operation.
2728   *
2729   * When doing a power-save shutdown, runtime uCode saves data SRAM into
2730   * the backup data cache in DRAM before SRAM is powered down.
2731   *
2732   * When powering back up, the BSM loads the bootstrap program.  This reloads
2733   * the runtime uCode instructions and the backup data cache into SRAM,
2734   * and re-launches the runtime uCode from where it left off.
2735   */
2736 static int iwl3945_load_bsm(struct iwl_priv *priv)
2737 {
2738         __le32 *image = priv->ucode_boot.v_addr;
2739         u32 len = priv->ucode_boot.len;
2740         dma_addr_t pinst;
2741         dma_addr_t pdata;
2742         u32 inst_len;
2743         u32 data_len;
2744         int rc;
2745         int i;
2746         u32 done;
2747         u32 reg_offset;
2748
2749         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
2750
2751         /* make sure bootstrap program is no larger than BSM's SRAM size */
2752         if (len > IWL39_MAX_BSM_SIZE)
2753                 return -EINVAL;
2754
2755         /* Tell bootstrap uCode where to find the "Initialize" uCode
2756         *   in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2757         * NOTE:  iwl3945_initialize_alive_start() will replace these values,
2758         *        after the "initialize" uCode has run, to point to
2759         *        runtime/protocol instructions and backup data cache. */
2760         pinst = priv->ucode_init.p_addr;
2761         pdata = priv->ucode_init_data.p_addr;
2762         inst_len = priv->ucode_init.len;
2763         data_len = priv->ucode_init_data.len;
2764
2765         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2766         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2767         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2768         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2769
2770         /* Fill BSM memory with bootstrap instructions */
2771         for (reg_offset = BSM_SRAM_LOWER_BOUND;
2772              reg_offset < BSM_SRAM_LOWER_BOUND + len;
2773              reg_offset += sizeof(u32), image++)
2774                 _iwl_write_prph(priv, reg_offset,
2775                                           le32_to_cpu(*image));
2776
2777         rc = iwl3945_verify_bsm(priv);
2778         if (rc)
2779                 return rc;
2780
2781         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2782         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
2783         iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
2784                                  IWL39_RTC_INST_LOWER_BOUND);
2785         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2786
2787         /* Load bootstrap code into instruction SRAM now,
2788          *   to prepare to load "initialize" uCode */
2789         iwl_write_prph(priv, BSM_WR_CTRL_REG,
2790                 BSM_WR_CTRL_REG_BIT_START);
2791
2792         /* Wait for load of bootstrap uCode to finish */
2793         for (i = 0; i < 100; i++) {
2794                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
2795                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2796                         break;
2797                 udelay(10);
2798         }
2799         if (i < 100)
2800                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
2801         else {
2802                 IWL_ERR(priv, "BSM write did not complete!\n");
2803                 return -EIO;
2804         }
2805
2806         /* Enable future boot loads whenever power management unit triggers it
2807          *   (e.g. when powering back up after power-save shutdown) */
2808         iwl_write_prph(priv, BSM_WR_CTRL_REG,
2809                 BSM_WR_CTRL_REG_BIT_START_EN);
2810
2811         return 0;
2812 }
2813
2814 static struct iwl_hcmd_ops iwl3945_hcmd = {
2815         .rxon_assoc = iwl3945_send_rxon_assoc,
2816         .commit_rxon = iwl3945_commit_rxon,
2817         .send_bt_config = iwl_send_bt_config,
2818 };
2819
2820 static struct iwl_lib_ops iwl3945_lib = {
2821         .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd,
2822         .txq_free_tfd = iwl3945_hw_txq_free_tfd,
2823         .txq_init = iwl3945_hw_tx_queue_init,
2824         .load_ucode = iwl3945_load_bsm,
2825         .dump_nic_event_log = iwl3945_dump_nic_event_log,
2826         .dump_nic_error_log = iwl3945_dump_nic_error_log,
2827         .apm_ops = {
2828                 .init = iwl3945_apm_init,
2829                 .stop = iwl_apm_stop,
2830                 .config = iwl3945_nic_config,
2831                 .set_pwr_src = iwl3945_set_pwr_src,
2832         },
2833         .eeprom_ops = {
2834                 .regulatory_bands = {
2835                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2836                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2837                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2838                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2839                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2840                         EEPROM_REGULATORY_BAND_NO_HT40,
2841                         EEPROM_REGULATORY_BAND_NO_HT40,
2842                 },
2843                 .verify_signature  = iwlcore_eeprom_verify_signature,
2844                 .acquire_semaphore = iwl3945_eeprom_acquire_semaphore,
2845                 .release_semaphore = iwl3945_eeprom_release_semaphore,
2846                 .query_addr = iwlcore_eeprom_query_addr,
2847         },
2848         .send_tx_power  = iwl3945_send_tx_power,
2849         .is_valid_rtc_data_addr = iwl3945_hw_valid_rtc_data_addr,
2850         .post_associate = iwl3945_post_associate,
2851         .isr = iwl_isr_legacy,
2852         .config_ap = iwl3945_config_ap,
2853         .manage_ibss_station = iwl3945_manage_ibss_station,
2854         .check_plcp_health = iwl3945_good_plcp_health,
2855
2856         .debugfs_ops = {
2857                 .rx_stats_read = iwl3945_ucode_rx_stats_read,
2858                 .tx_stats_read = iwl3945_ucode_tx_stats_read,
2859                 .general_stats_read = iwl3945_ucode_general_stats_read,
2860         },
2861 };
2862
2863 static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
2864         .get_hcmd_size = iwl3945_get_hcmd_size,
2865         .build_addsta_hcmd = iwl3945_build_addsta_hcmd,
2866         .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2867         .request_scan = iwl3945_request_scan,
2868 };
2869
2870 static const struct iwl_ops iwl3945_ops = {
2871         .lib = &iwl3945_lib,
2872         .hcmd = &iwl3945_hcmd,
2873         .utils = &iwl3945_hcmd_utils,
2874         .led = &iwl3945_led_ops,
2875 };
2876
2877 static struct iwl_cfg iwl3945_bg_cfg = {
2878         .name = "3945BG",
2879         .fw_name_pre = IWL3945_FW_PRE,
2880         .ucode_api_max = IWL3945_UCODE_API_MAX,
2881         .ucode_api_min = IWL3945_UCODE_API_MIN,
2882         .sku = IWL_SKU_G,
2883         .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2884         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2885         .ops = &iwl3945_ops,
2886         .num_of_queues = IWL39_NUM_QUEUES,
2887         .mod_params = &iwl3945_mod_params,
2888         .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2889         .set_l0s = false,
2890         .use_bsm = true,
2891         .use_isr_legacy = true,
2892         .ht_greenfield_support = false,
2893         .led_compensation = 64,
2894         .broken_powersave = true,
2895         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
2896         .monitor_recover_period = IWL_MONITORING_PERIOD,
2897         .max_event_log_size = 512,
2898         .tx_power_by_driver = true,
2899 };
2900
2901 static struct iwl_cfg iwl3945_abg_cfg = {
2902         .name = "3945ABG",
2903         .fw_name_pre = IWL3945_FW_PRE,
2904         .ucode_api_max = IWL3945_UCODE_API_MAX,
2905         .ucode_api_min = IWL3945_UCODE_API_MIN,
2906         .sku = IWL_SKU_A|IWL_SKU_G,
2907         .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2908         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2909         .ops = &iwl3945_ops,
2910         .num_of_queues = IWL39_NUM_QUEUES,
2911         .mod_params = &iwl3945_mod_params,
2912         .use_isr_legacy = true,
2913         .ht_greenfield_support = false,
2914         .led_compensation = 64,
2915         .broken_powersave = true,
2916         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
2917         .monitor_recover_period = IWL_MONITORING_PERIOD,
2918         .max_event_log_size = 512,
2919         .tx_power_by_driver = true,
2920 };
2921
2922 DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = {
2923         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2924         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2925         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2926         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2927         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2928         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2929         {0}
2930 };
2931
2932 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);