drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96
  97         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  98         if (++sc->ps_usecount != 1)
  99                 goto unlock;
 100
 101         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 102
 103         /*
 104          * While the hardware is asleep, the cycle counters contain no
 105          * useful data. Better clear them now so that they don't mess up
 106          * survey data results.
 107          */
 108         spin_lock(&common->cc_lock);
 109         ath_hw_cycle_counters_update(common);
 110         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 111         spin_unlock(&common->cc_lock);
 112
 113  unlock:
 114         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 115 }
 116
 117 void ath9k_ps_restore(struct ath_softc *sc)
 118 {
 119         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 120         unsigned long flags;
 121
 122         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 123         if (--sc->ps_usecount != 0)
 124                 goto unlock;
 125
 126         spin_lock(&common->cc_lock);
 127         ath_hw_cycle_counters_update(common);
 128         spin_unlock(&common->cc_lock);
 129
 130         if (sc->ps_idle)
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 132         else if (sc->ps_enabled &&
 133                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 134                               PS_WAIT_FOR_CAB |
 135                               PS_WAIT_FOR_PSPOLL_DATA |
 136                               PS_WAIT_FOR_TX_ACK)))
 137                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 static void ath_start_ani(struct ath_common *common)
 144 {
 145         struct ath_hw *ah = common->ah;
 146         unsigned long timestamp = jiffies_to_msecs(jiffies);
 147         struct ath_softc *sc = (struct ath_softc *) common->priv;
 148
 149         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 150                 return;
 151
 152         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 153                 return;
 154
 155         common->ani.longcal_timer = timestamp;
 156         common->ani.shortcal_timer = timestamp;
 157         common->ani.checkani_timer = timestamp;
 158
 159         mod_timer(&common->ani.timer,
 160                   jiffies +
 161                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 162 }
 163
 164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 165 {
 166         struct ath_hw *ah = sc->sc_ah;
 167         struct ath9k_channel *chan = &ah->channels[channel];
 168         struct survey_info *survey = &sc->survey[channel];
 169
 170         if (chan->noisefloor) {
 171                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 172                 survey->noise = chan->noisefloor;
 173         }
 174 }
 175
 176 static void ath_update_survey_stats(struct ath_softc *sc)
 177 {
 178         struct ath_hw *ah = sc->sc_ah;
 179         struct ath_common *common = ath9k_hw_common(ah);
 180         int pos = ah->curchan - &ah->channels[0];
 181         struct survey_info *survey = &sc->survey[pos];
 182         struct ath_cycle_counters *cc = &common->cc_survey;
 183         unsigned int div = common->clockrate * 1000;
 184
 185         if (!ah->curchan)
 186                 return;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201         memset(cc, 0, sizeof(*cc));
 202
 203         ath_update_survey_nf(sc, pos);
 204 }
 205
 206 /*
 207  * Set/change channels.  If the channel is really being changed, it's done
 208  * by reseting the chip.  To accomplish this we must first cleanup any pending
 209  * DMA, then restart stuff.
 210 */
 211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 212                     struct ath9k_channel *hchan)
 213 {
 214         struct ath_wiphy *aphy = hw->priv;
 215         struct ath_hw *ah = sc->sc_ah;
 216         struct ath_common *common = ath9k_hw_common(ah);
 217         struct ieee80211_conf *conf = &common->hw->conf;
 218         bool fastcc = true, stopped;
 219         struct ieee80211_channel *channel = hw->conf.channel;
 220         struct ath9k_hw_cal_data *caldata = NULL;
 221         int r;
 222
 223         if (sc->sc_flags & SC_OP_INVALID)
 224                 return -EIO;
 225
 226         del_timer_sync(&common->ani.timer);
 227         cancel_work_sync(&sc->paprd_work);
 228         cancel_work_sync(&sc->hw_check_work);
 229         cancel_delayed_work_sync(&sc->tx_complete_work);
 230
 231         ath9k_ps_wakeup(sc);
 232
 233         /*
 234          * This is only performed if the channel settings have
 235          * actually changed.
 236          *
 237          * To switch channels clear any pending DMA operations;
 238          * wait long enough for the RX fifo to drain, reset the
 239          * hardware at the new frequency, and then re-enable
 240          * the relevant bits of the h/w.
 241          */
 242         ath9k_hw_disable_interrupts(ah);
 243         ath_drain_all_txq(sc, false);
 244
 245         spin_lock_bh(&sc->rx.pcu_lock);
 246
 247         stopped = ath_stoprecv(sc);
 248
 249         /* XXX: do not flush receive queue here. We don't want
 250          * to flush data frames already in queue because of
 251          * changing channel. */
 252
 253         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 254                 fastcc = false;
 255
 256         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 257                 caldata = &aphy->caldata;
 258
 259         ath_print(common, ATH_DBG_CONFIG,
 260                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 261                   sc->sc_ah->curchan->channel,
 262                   channel->center_freq, conf_is_ht40(conf),
 263                   fastcc);
 264
 265         spin_lock_bh(&sc->sc_resetlock);
 266
 267         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 268         if (r) {
 269                 ath_print(common, ATH_DBG_FATAL,
 270                           "Unable to reset channel (%u MHz), "
 271                           "reset status %d\n",
 272                           channel->center_freq, r);
 273                 spin_unlock_bh(&sc->sc_resetlock);
 274                 spin_unlock_bh(&sc->rx.pcu_lock);
 275                 goto ps_restore;
 276         }
 277         spin_unlock_bh(&sc->sc_resetlock);
 278
 279         if (ath_startrecv(sc) != 0) {
 280                 ath_print(common, ATH_DBG_FATAL,
 281                           "Unable to restart recv logic\n");
 282                 r = -EIO;
 283                 spin_unlock_bh(&sc->rx.pcu_lock);
 284                 goto ps_restore;
 285         }
 286
 287         spin_unlock_bh(&sc->rx.pcu_lock);
 288
 289         ath_update_txpow(sc);
 290         ath9k_hw_set_interrupts(ah, ah->imask);
 291
 292         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 293                 ath_beacon_config(sc, NULL);
 294                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 295                 ath_start_ani(common);
 296         }
 297
 298  ps_restore:
 299         ath9k_ps_restore(sc);
 300         return r;
 301 }
 302
 303 static void ath_paprd_activate(struct ath_softc *sc)
 304 {
 305         struct ath_hw *ah = sc->sc_ah;
 306         struct ath9k_hw_cal_data *caldata = ah->caldata;
 307         struct ath_common *common = ath9k_hw_common(ah);
 308         int chain;
 309
 310         if (!caldata || !caldata->paprd_done)
 311                 return;
 312
 313         ath9k_ps_wakeup(sc);
 314         ar9003_paprd_enable(ah, false);
 315         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 316                 if (!(common->tx_chainmask & BIT(chain)))
 317                         continue;
 318
 319                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 320         }
 321
 322         ar9003_paprd_enable(ah, true);
 323         ath9k_ps_restore(sc);
 324 }
 325
 326 void ath_paprd_calibrate(struct work_struct *work)
 327 {
 328         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 329         struct ieee80211_hw *hw = sc->hw;
 330         struct ath_hw *ah = sc->sc_ah;
 331         struct ieee80211_hdr *hdr;
 332         struct sk_buff *skb = NULL;
 333         struct ieee80211_tx_info *tx_info;
 334         int band = hw->conf.channel->band;
 335         struct ieee80211_supported_band *sband = &sc->sbands[band];
 336         struct ath_tx_control txctl;
 337         struct ath9k_hw_cal_data *caldata = ah->caldata;
 338         struct ath_common *common = ath9k_hw_common(ah);
 339         int qnum, ftype;
 340         int chain_ok = 0;
 341         int chain;
 342         int len = 1800;
 343         int time_left;
 344         int i;
 345
 346         if (!caldata)
 347                 return;
 348
 349         skb = alloc_skb(len, GFP_KERNEL);
 350         if (!skb)
 351                 return;
 352
 353         tx_info = IEEE80211_SKB_CB(skb);
 354
 355         skb_put(skb, len);
 356         memset(skb->data, 0, len);
 357         hdr = (struct ieee80211_hdr *)skb->data;
 358         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 359         hdr->frame_control = cpu_to_le16(ftype);
 360         hdr->duration_id = cpu_to_le16(10);
 361         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 362         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 363         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 364
 365         memset(&txctl, 0, sizeof(txctl));
 366         qnum = sc->tx.hwq_map[WME_AC_BE];
 367         txctl.txq = &sc->tx.txq[qnum];
 368
 369         ath9k_ps_wakeup(sc);
 370         ar9003_paprd_init_table(ah);
 371         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 372                 if (!(common->tx_chainmask & BIT(chain)))
 373                         continue;
 374
 375                 chain_ok = 0;
 376                 memset(tx_info, 0, sizeof(*tx_info));
 377                 tx_info->band = band;
 378
 379                 for (i = 0; i < 4; i++) {
 380                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 381                         tx_info->control.rates[i].count = 6;
 382                 }
 383
 384                 init_completion(&sc->paprd_complete);
 385                 ar9003_paprd_setup_gain_table(ah, chain);
 386                 txctl.paprd = BIT(chain);
 387                 if (ath_tx_start(hw, skb, &txctl) != 0)
 388                         break;
 389
 390                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 391                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 392                 if (!time_left) {
 393                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 394                                   "Timeout waiting for paprd training on "
 395                                   "TX chain %d\n",
 396                                   chain);
 397                         goto fail_paprd;
 398                 }
 399
 400                 if (!ar9003_paprd_is_done(ah))
 401                         break;
 402
 403                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 404                         break;
 405
 406                 chain_ok = 1;
 407         }
 408         kfree_skb(skb);
 409
 410         if (chain_ok) {
 411                 caldata->paprd_done = true;
 412                 ath_paprd_activate(sc);
 413         }
 414
 415 fail_paprd:
 416         ath9k_ps_restore(sc);
 417 }
 418
 419 /*
 420  *  This routine performs the periodic noise floor calibration function
 421  *  that is used to adjust and optimize the chip performance.  This
 422  *  takes environmental changes (location, temperature) into account.
 423  *  When the task is complete, it reschedules itself depending on the
 424  *  appropriate interval that was calculated.
 425  */
 426 void ath_ani_calibrate(unsigned long data)
 427 {
 428         struct ath_softc *sc = (struct ath_softc *)data;
 429         struct ath_hw *ah = sc->sc_ah;
 430         struct ath_common *common = ath9k_hw_common(ah);
 431         bool longcal = false;
 432         bool shortcal = false;
 433         bool aniflag = false;
 434         unsigned int timestamp = jiffies_to_msecs(jiffies);
 435         u32 cal_interval, short_cal_interval, long_cal_interval;
 436         unsigned long flags;
 437
 438         if (ah->caldata && ah->caldata->nfcal_interference)
 439                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 440         else
 441                 long_cal_interval = ATH_LONG_CALINTERVAL;
 442
 443         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 444                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 445
 446         /* Only calibrate if awake */
 447         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 448                 goto set_timer;
 449
 450         ath9k_ps_wakeup(sc);
 451
 452         /* Long calibration runs independently of short calibration. */
 453         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 454                 longcal = true;
 455                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 456                 common->ani.longcal_timer = timestamp;
 457         }
 458
 459         /* Short calibration applies only while caldone is false */
 460         if (!common->ani.caldone) {
 461                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 462                         shortcal = true;
 463                         ath_print(common, ATH_DBG_ANI,
 464                                   "shortcal @%lu\n", jiffies);
 465                         common->ani.shortcal_timer = timestamp;
 466                         common->ani.resetcal_timer = timestamp;
 467                 }
 468         } else {
 469                 if ((timestamp - common->ani.resetcal_timer) >=
 470                     ATH_RESTART_CALINTERVAL) {
 471                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 472                         if (common->ani.caldone)
 473                                 common->ani.resetcal_timer = timestamp;
 474                 }
 475         }
 476
 477         /* Verify whether we must check ANI */
 478         if ((timestamp - common->ani.checkani_timer) >=
 479              ah->config.ani_poll_interval) {
 480                 aniflag = true;
 481                 common->ani.checkani_timer = timestamp;
 482         }
 483
 484         /* Skip all processing if there's nothing to do. */
 485         if (longcal || shortcal || aniflag) {
 486                 /* Call ANI routine if necessary */
 487                 if (aniflag) {
 488                         spin_lock_irqsave(&common->cc_lock, flags);
 489                         ath9k_hw_ani_monitor(ah, ah->curchan);
 490                         ath_update_survey_stats(sc);
 491                         spin_unlock_irqrestore(&common->cc_lock, flags);
 492                 }
 493
 494                 /* Perform calibration if necessary */
 495                 if (longcal || shortcal) {
 496                         common->ani.caldone =
 497                                 ath9k_hw_calibrate(ah,
 498                                                    ah->curchan,
 499                                                    common->rx_chainmask,
 500                                                    longcal);
 501                 }
 502         }
 503
 504         ath9k_ps_restore(sc);
 505
 506 set_timer:
 507         /*
 508         * Set timer interval based on previous results.
 509         * The interval must be the shortest necessary to satisfy ANI,
 510         * short calibration and long calibration.
 511         */
 512         cal_interval = ATH_LONG_CALINTERVAL;
 513         if (sc->sc_ah->config.enable_ani)
 514                 cal_interval = min(cal_interval,
 515                                    (u32)ah->config.ani_poll_interval);
 516         if (!common->ani.caldone)
 517                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 518
 519         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 520         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 521                 if (!ah->caldata->paprd_done)
 522                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 523                 else
 524                         ath_paprd_activate(sc);
 525         }
 526 }
 527
 528 /*
 529  * Update tx/rx chainmask. For legacy association,
 530  * hard code chainmask to 1x1, for 11n association, use
 531  * the chainmask configuration, for bt coexistence, use
 532  * the chainmask configuration even in legacy mode.
 533  */
 534 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 535 {
 536         struct ath_hw *ah = sc->sc_ah;
 537         struct ath_common *common = ath9k_hw_common(ah);
 538
 539         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 540             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 541                 common->tx_chainmask = ah->caps.tx_chainmask;
 542                 common->rx_chainmask = ah->caps.rx_chainmask;
 543         } else {
 544                 common->tx_chainmask = 1;
 545                 common->rx_chainmask = 1;
 546         }
 547
 548         ath_print(common, ATH_DBG_CONFIG,
 549                   "tx chmask: %d, rx chmask: %d\n",
 550                   common->tx_chainmask,
 551                   common->rx_chainmask);
 552 }
 553
 554 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 555 {
 556         struct ath_node *an;
 557
 558         an = (struct ath_node *)sta->drv_priv;
 559
 560         if (sc->sc_flags & SC_OP_TXAGGR) {
 561                 ath_tx_node_init(sc, an);
 562                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 563                                      sta->ht_cap.ampdu_factor);
 564                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 565         }
 566 }
 567
 568 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 569 {
 570         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 571
 572         if (sc->sc_flags & SC_OP_TXAGGR)
 573                 ath_tx_node_cleanup(sc, an);
 574 }
 575
 576 void ath_hw_check(struct work_struct *work)
 577 {
 578         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 579         int i;
 580
 581         ath9k_ps_wakeup(sc);
 582
 583         for (i = 0; i < 3; i++) {
 584                 if (ath9k_hw_check_alive(sc->sc_ah))
 585                         goto out;
 586
 587                 msleep(1);
 588         }
 589         ath_reset(sc, true);
 590
 591 out:
 592         ath9k_ps_restore(sc);
 593 }
 594
 595 void ath9k_tasklet(unsigned long data)
 596 {
 597         struct ath_softc *sc = (struct ath_softc *)data;
 598         struct ath_hw *ah = sc->sc_ah;
 599         struct ath_common *common = ath9k_hw_common(ah);
 600
 601         u32 status = sc->intrstatus;
 602         u32 rxmask;
 603
 604         ath9k_ps_wakeup(sc);
 605
 606         if (status & ATH9K_INT_FATAL) {
 607                 ath_reset(sc, true);
 608                 ath9k_ps_restore(sc);
 609                 return;
 610         }
 611
 612         if (!ath9k_hw_check_alive(ah))
 613                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 614
 615         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 616                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 617                           ATH9K_INT_RXORN);
 618         else
 619                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 620
 621         if (status & rxmask) {
 622                 spin_lock_bh(&sc->rx.pcu_lock);
 623
 624                 /* Check for high priority Rx first */
 625                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 626                     (status & ATH9K_INT_RXHP))
 627                         ath_rx_tasklet(sc, 0, true);
 628
 629                 ath_rx_tasklet(sc, 0, false);
 630                 spin_unlock_bh(&sc->rx.pcu_lock);
 631         }
 632
 633         if (status & ATH9K_INT_TX) {
 634                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 635                         ath_tx_edma_tasklet(sc);
 636                 else
 637                         ath_tx_tasklet(sc);
 638         }
 639
 640         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 641                 /*
 642                  * TSF sync does not look correct; remain awake to sync with
 643                  * the next Beacon.
 644                  */
 645                 ath_print(common, ATH_DBG_PS,
 646                           "TSFOOR - Sync with next Beacon\n");
 647                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 648         }
 649
 650         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 651                 if (status & ATH9K_INT_GENTIMER)
 652                         ath_gen_timer_isr(sc->sc_ah);
 653
 654         /* re-enable hardware interrupt */
 655         ath9k_hw_enable_interrupts(ah);
 656         ath9k_ps_restore(sc);
 657 }
 658
 659 irqreturn_t ath_isr(int irq, void *dev)
 660 {
 661 #define SCHED_INTR (                            \
 662                 ATH9K_INT_FATAL |               \
 663                 ATH9K_INT_RXORN |               \
 664                 ATH9K_INT_RXEOL |               \
 665                 ATH9K_INT_RX |                  \
 666                 ATH9K_INT_RXLP |                \
 667                 ATH9K_INT_RXHP |                \
 668                 ATH9K_INT_TX |                  \
 669                 ATH9K_INT_BMISS |               \
 670                 ATH9K_INT_CST |                 \
 671                 ATH9K_INT_TSFOOR |              \
 672                 ATH9K_INT_GENTIMER)
 673
 674         struct ath_softc *sc = dev;
 675         struct ath_hw *ah = sc->sc_ah;
 676         struct ath_common *common = ath9k_hw_common(ah);
 677         enum ath9k_int status;
 678         bool sched = false;
 679
 680         /*
 681          * The hardware is not ready/present, don't
 682          * touch anything. Note this can happen early
 683          * on if the IRQ is shared.
 684          */
 685         if (sc->sc_flags & SC_OP_INVALID)
 686                 return IRQ_NONE;
 687
 688
 689         /* shared irq, not for us */
 690
 691         if (!ath9k_hw_intrpend(ah))
 692                 return IRQ_NONE;
 693
 694         /*
 695          * Figure out the reason(s) for the interrupt.  Note
 696          * that the hal returns a pseudo-ISR that may include
 697          * bits we haven't explicitly enabled so we mask the
 698          * value to insure we only process bits we requested.
 699          */
 700         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 701         status &= ah->imask;    /* discard unasked-for bits */
 702
 703         /*
 704          * If there are no status bits set, then this interrupt was not
 705          * for me (should have been caught above).
 706          */
 707         if (!status)
 708                 return IRQ_NONE;
 709
 710         /* Cache the status */
 711         sc->intrstatus = status;
 712
 713         if (status & SCHED_INTR)
 714                 sched = true;
 715
 716         /*
 717          * If a FATAL or RXORN interrupt is received, we have to reset the
 718          * chip immediately.
 719          */
 720         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 721             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 722                 goto chip_reset;
 723
 724         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 725             (status & ATH9K_INT_BB_WATCHDOG)) {
 726
 727                 spin_lock(&common->cc_lock);
 728                 ath_hw_cycle_counters_update(common);
 729                 ar9003_hw_bb_watchdog_dbg_info(ah);
 730                 spin_unlock(&common->cc_lock);
 731
 732                 goto chip_reset;
 733         }
 734
 735         if (status & ATH9K_INT_SWBA)
 736                 tasklet_schedule(&sc->bcon_tasklet);
 737
 738         if (status & ATH9K_INT_TXURN)
 739                 ath9k_hw_updatetxtriglevel(ah, true);
 740
 741         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 742                 if (status & ATH9K_INT_RXEOL) {
 743                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 744                         ath9k_hw_set_interrupts(ah, ah->imask);
 745                 }
 746         }
 747
 748         if (status & ATH9K_INT_MIB) {
 749                 /*
 750                  * Disable interrupts until we service the MIB
 751                  * interrupt; otherwise it will continue to
 752                  * fire.
 753                  */
 754                 ath9k_hw_disable_interrupts(ah);
 755                 /*
 756                  * Let the hal handle the event. We assume
 757                  * it will clear whatever condition caused
 758                  * the interrupt.
 759                  */
 760                 spin_lock(&common->cc_lock);
 761                 ath9k_hw_proc_mib_event(ah);
 762                 spin_unlock(&common->cc_lock);
 763                 ath9k_hw_enable_interrupts(ah);
 764         }
 765
 766         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 767                 if (status & ATH9K_INT_TIM_TIMER) {
 768                         /* Clear RxAbort bit so that we can
 769                          * receive frames */
 770                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 771                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 772                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 773                 }
 774
 775 chip_reset:
 776
 777         ath_debug_stat_interrupt(sc, status);
 778
 779         if (sched) {
 780                 /* turn off every interrupt */
 781                 ath9k_hw_disable_interrupts(ah);
 782                 tasklet_schedule(&sc->intr_tq);
 783         }
 784
 785         return IRQ_HANDLED;
 786
 787 #undef SCHED_INTR
 788 }
 789
 790 static u32 ath_get_extchanmode(struct ath_softc *sc,
 791                                struct ieee80211_channel *chan,
 792                                enum nl80211_channel_type channel_type)
 793 {
 794         u32 chanmode = 0;
 795
 796         switch (chan->band) {
 797         case IEEE80211_BAND_2GHZ:
 798                 switch(channel_type) {
 799                 case NL80211_CHAN_NO_HT:
 800                 case NL80211_CHAN_HT20:
 801                         chanmode = CHANNEL_G_HT20;
 802                         break;
 803                 case NL80211_CHAN_HT40PLUS:
 804                         chanmode = CHANNEL_G_HT40PLUS;
 805                         break;
 806                 case NL80211_CHAN_HT40MINUS:
 807                         chanmode = CHANNEL_G_HT40MINUS;
 808                         break;
 809                 }
 810                 break;
 811         case IEEE80211_BAND_5GHZ:
 812                 switch(channel_type) {
 813                 case NL80211_CHAN_NO_HT:
 814                 case NL80211_CHAN_HT20:
 815                         chanmode = CHANNEL_A_HT20;
 816                         break;
 817                 case NL80211_CHAN_HT40PLUS:
 818                         chanmode = CHANNEL_A_HT40PLUS;
 819                         break;
 820                 case NL80211_CHAN_HT40MINUS:
 821                         chanmode = CHANNEL_A_HT40MINUS;
 822                         break;
 823                 }
 824                 break;
 825         default:
 826                 break;
 827         }
 828
 829         return chanmode;
 830 }
 831
 832 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 833                                  struct ieee80211_hw *hw,
 834                                  struct ieee80211_vif *vif,
 835                                  struct ieee80211_bss_conf *bss_conf)
 836 {
 837         struct ath_wiphy *aphy = hw->priv;
 838         struct ath_hw *ah = sc->sc_ah;
 839         struct ath_common *common = ath9k_hw_common(ah);
 840
 841         if (bss_conf->assoc) {
 842                 ath_print(common, ATH_DBG_CONFIG,
 843                           "Bss Info ASSOC %d, bssid: %pM\n",
 844                            bss_conf->aid, common->curbssid);
 845
 846                 /* New association, store aid */
 847                 common->curaid = bss_conf->aid;
 848                 ath9k_hw_write_associd(ah);
 849
 850                 /*
 851                  * Request a re-configuration of Beacon related timers
 852                  * on the receipt of the first Beacon frame (i.e.,
 853                  * after time sync with the AP).
 854                  */
 855                 sc->ps_flags |= PS_BEACON_SYNC;
 856
 857                 /* Configure the beacon */
 858                 ath_beacon_config(sc, vif);
 859
 860                 /* Reset rssi stats */
 861                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 862                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 863
 864                 sc->sc_flags |= SC_OP_ANI_RUN;
 865                 ath_start_ani(common);
 866         } else {
 867                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 868                 common->curaid = 0;
 869                 /* Stop ANI */
 870                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 871                 del_timer_sync(&common->ani.timer);
 872         }
 873 }
 874
 875 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 876 {
 877         struct ath_hw *ah = sc->sc_ah;
 878         struct ath_common *common = ath9k_hw_common(ah);
 879         struct ieee80211_channel *channel = hw->conf.channel;
 880         int r;
 881
 882         ath9k_ps_wakeup(sc);
 883         ath9k_hw_configpcipowersave(ah, 0, 0);
 884
 885         if (!ah->curchan)
 886                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 887
 888         spin_lock_bh(&sc->rx.pcu_lock);
 889         spin_lock_bh(&sc->sc_resetlock);
 890         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 891         if (r) {
 892                 ath_print(common, ATH_DBG_FATAL,
 893                           "Unable to reset channel (%u MHz), "
 894                           "reset status %d\n",
 895                           channel->center_freq, r);
 896         }
 897         spin_unlock_bh(&sc->sc_resetlock);
 898
 899         ath_update_txpow(sc);
 900         if (ath_startrecv(sc) != 0) {
 901                 ath_print(common, ATH_DBG_FATAL,
 902                           "Unable to restart recv logic\n");
 903                 spin_unlock_bh(&sc->rx.pcu_lock);
 904                 return;
 905         }
 906         spin_unlock_bh(&sc->rx.pcu_lock);
 907
 908         if (sc->sc_flags & SC_OP_BEACONS)
 909                 ath_beacon_config(sc, NULL);    /* restart beacons */
 910
 911         /* Re-Enable  interrupts */
 912         ath9k_hw_set_interrupts(ah, ah->imask);
 913
 914         /* Enable LED */
 915         ath9k_hw_cfg_output(ah, ah->led_pin,
 916                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 917         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 918
 919         ieee80211_wake_queues(hw);
 920         ath9k_ps_restore(sc);
 921 }
 922
 923 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 924 {
 925         struct ath_hw *ah = sc->sc_ah;
 926         struct ieee80211_channel *channel = hw->conf.channel;
 927         int r;
 928
 929         ath9k_ps_wakeup(sc);
 930         ieee80211_stop_queues(hw);
 931
 932         /*
 933          * Keep the LED on when the radio is disabled
 934          * during idle unassociated state.
 935          */
 936         if (!sc->ps_idle) {
 937                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 938                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 939         }
 940
 941         /* Disable interrupts */
 942         ath9k_hw_disable_interrupts(ah);
 943
 944         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 945
 946         spin_lock_bh(&sc->rx.pcu_lock);
 947
 948         ath_stoprecv(sc);               /* turn off frame recv */
 949         ath_flushrecv(sc);              /* flush recv queue */
 950
 951         if (!ah->curchan)
 952                 ah->curchan = ath_get_curchannel(sc, hw);
 953
 954         spin_lock_bh(&sc->sc_resetlock);
 955         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 956         if (r) {
 957                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 958                           "Unable to reset channel (%u MHz), "
 959                           "reset status %d\n",
 960                           channel->center_freq, r);
 961         }
 962         spin_unlock_bh(&sc->sc_resetlock);
 963
 964         ath9k_hw_phy_disable(ah);
 965
 966         spin_unlock_bh(&sc->rx.pcu_lock);
 967
 968         ath9k_hw_configpcipowersave(ah, 1, 1);
 969         ath9k_ps_restore(sc);
 970         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 971 }
 972
 973 int ath_reset(struct ath_softc *sc, bool retry_tx)
 974 {
 975         struct ath_hw *ah = sc->sc_ah;
 976         struct ath_common *common = ath9k_hw_common(ah);
 977         struct ieee80211_hw *hw = sc->hw;
 978         int r;
 979
 980         /* Stop ANI */
 981         del_timer_sync(&common->ani.timer);
 982
 983         ieee80211_stop_queues(hw);
 984
 985         ath9k_hw_disable_interrupts(ah);
 986         ath_drain_all_txq(sc, retry_tx);
 987
 988         spin_lock_bh(&sc->rx.pcu_lock);
 989
 990         ath_stoprecv(sc);
 991         ath_flushrecv(sc);
 992
 993         spin_lock_bh(&sc->sc_resetlock);
 994         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 995         if (r)
 996                 ath_print(common, ATH_DBG_FATAL,
 997                           "Unable to reset hardware; reset status %d\n", r);
 998         spin_unlock_bh(&sc->sc_resetlock);
 999
1000         if (ath_startrecv(sc) != 0)
1001                 ath_print(common, ATH_DBG_FATAL,
1002                           "Unable to start recv logic\n");
1003
1004         spin_unlock_bh(&sc->rx.pcu_lock);
1005
1006         /*
1007          * We may be doing a reset in response to a request
1008          * that changes the channel so update any state that
1009          * might change as a result.
1010          */
1011         ath_update_txpow(sc);
1012
1013         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1014                 ath_beacon_config(sc, NULL);    /* restart beacons */
1015
1016         ath9k_hw_set_interrupts(ah, ah->imask);
1017
1018         if (retry_tx) {
1019                 int i;
1020                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1021                         if (ATH_TXQ_SETUP(sc, i)) {
1022                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1023                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1024                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1025                         }
1026                 }
1027         }
1028
1029         ieee80211_wake_queues(hw);
1030
1031         /* Start ANI */
1032         ath_start_ani(common);
1033
1034         return r;
1035 }
1036
1037 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1038 {
1039         int qnum;
1040
1041         switch (queue) {
1042         case 0:
1043                 qnum = sc->tx.hwq_map[WME_AC_VO];
1044                 break;
1045         case 1:
1046                 qnum = sc->tx.hwq_map[WME_AC_VI];
1047                 break;
1048         case 2:
1049                 qnum = sc->tx.hwq_map[WME_AC_BE];
1050                 break;
1051         case 3:
1052                 qnum = sc->tx.hwq_map[WME_AC_BK];
1053                 break;
1054         default:
1055                 qnum = sc->tx.hwq_map[WME_AC_BE];
1056                 break;
1057         }
1058
1059         return qnum;
1060 }
1061
1062 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1063 {
1064         int qnum;
1065
1066         switch (queue) {
1067         case WME_AC_VO:
1068                 qnum = 0;
1069                 break;
1070         case WME_AC_VI:
1071                 qnum = 1;
1072                 break;
1073         case WME_AC_BE:
1074                 qnum = 2;
1075                 break;
1076         case WME_AC_BK:
1077                 qnum = 3;
1078                 break;
1079         default:
1080                 qnum = -1;
1081                 break;
1082         }
1083
1084         return qnum;
1085 }
1086
1087 /* XXX: Remove me once we don't depend on ath9k_channel for all
1088  * this redundant data */
1089 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1090                            struct ath9k_channel *ichan)
1091 {
1092         struct ieee80211_channel *chan = hw->conf.channel;
1093         struct ieee80211_conf *conf = &hw->conf;
1094
1095         ichan->channel = chan->center_freq;
1096         ichan->chan = chan;
1097
1098         if (chan->band == IEEE80211_BAND_2GHZ) {
1099                 ichan->chanmode = CHANNEL_G;
1100                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1101         } else {
1102                 ichan->chanmode = CHANNEL_A;
1103                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1104         }
1105
1106         if (conf_is_ht(conf))
1107                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1108                                             conf->channel_type);
1109 }
1110
1111 /**********************/
1112 /* mac80211 callbacks */
1113 /**********************/
1114
1115 static int ath9k_start(struct ieee80211_hw *hw)
1116 {
1117         struct ath_wiphy *aphy = hw->priv;
1118         struct ath_softc *sc = aphy->sc;
1119         struct ath_hw *ah = sc->sc_ah;
1120         struct ath_common *common = ath9k_hw_common(ah);
1121         struct ieee80211_channel *curchan = hw->conf.channel;
1122         struct ath9k_channel *init_channel;
1123         int r;
1124
1125         ath_print(common, ATH_DBG_CONFIG,
1126                   "Starting driver with initial channel: %d MHz\n",
1127                   curchan->center_freq);
1128
1129         mutex_lock(&sc->mutex);
1130
1131         if (ath9k_wiphy_started(sc)) {
1132                 if (sc->chan_idx == curchan->hw_value) {
1133                         /*
1134                          * Already on the operational channel, the new wiphy
1135                          * can be marked active.
1136                          */
1137                         aphy->state = ATH_WIPHY_ACTIVE;
1138                         ieee80211_wake_queues(hw);
1139                 } else {
1140                         /*
1141                          * Another wiphy is on another channel, start the new
1142                          * wiphy in paused state.
1143                          */
1144                         aphy->state = ATH_WIPHY_PAUSED;
1145                         ieee80211_stop_queues(hw);
1146                 }
1147                 mutex_unlock(&sc->mutex);
1148                 return 0;
1149         }
1150         aphy->state = ATH_WIPHY_ACTIVE;
1151
1152         /* setup initial channel */
1153
1154         sc->chan_idx = curchan->hw_value;
1155
1156         init_channel = ath_get_curchannel(sc, hw);
1157
1158         /* Reset SERDES registers */
1159         ath9k_hw_configpcipowersave(ah, 0, 0);
1160
1161         /*
1162          * The basic interface to setting the hardware in a good
1163          * state is ``reset''.  On return the hardware is known to
1164          * be powered up and with interrupts disabled.  This must
1165          * be followed by initialization of the appropriate bits
1166          * and then setup of the interrupt mask.
1167          */
1168         spin_lock_bh(&sc->rx.pcu_lock);
1169         spin_lock_bh(&sc->sc_resetlock);
1170         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1171         if (r) {
1172                 ath_print(common, ATH_DBG_FATAL,
1173                           "Unable to reset hardware; reset status %d "
1174                           "(freq %u MHz)\n", r,
1175                           curchan->center_freq);
1176                 spin_unlock_bh(&sc->sc_resetlock);
1177                 spin_unlock_bh(&sc->rx.pcu_lock);
1178                 goto mutex_unlock;
1179         }
1180         spin_unlock_bh(&sc->sc_resetlock);
1181
1182         /*
1183          * This is needed only to setup initial state
1184          * but it's best done after a reset.
1185          */
1186         ath_update_txpow(sc);
1187
1188         /*
1189          * Setup the hardware after reset:
1190          * The receive engine is set going.
1191          * Frame transmit is handled entirely
1192          * in the frame output path; there's nothing to do
1193          * here except setup the interrupt mask.
1194          */
1195         if (ath_startrecv(sc) != 0) {
1196                 ath_print(common, ATH_DBG_FATAL,
1197                           "Unable to start recv logic\n");
1198                 r = -EIO;
1199                 spin_unlock_bh(&sc->rx.pcu_lock);
1200                 goto mutex_unlock;
1201         }
1202         spin_unlock_bh(&sc->rx.pcu_lock);
1203
1204         /* Setup our intr mask. */
1205         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1206                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1207                     ATH9K_INT_GLOBAL;
1208
1209         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1210                 ah->imask |= ATH9K_INT_RXHP |
1211                              ATH9K_INT_RXLP |
1212                              ATH9K_INT_BB_WATCHDOG;
1213         else
1214                 ah->imask |= ATH9K_INT_RX;
1215
1216         ah->imask |= ATH9K_INT_GTT;
1217
1218         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1219                 ah->imask |= ATH9K_INT_CST;
1220
1221         sc->sc_flags &= ~SC_OP_INVALID;
1222
1223         /* Disable BMISS interrupt when we're not associated */
1224         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1225         ath9k_hw_set_interrupts(ah, ah->imask);
1226
1227         ieee80211_wake_queues(hw);
1228
1229         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1230
1231         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1232             !ah->btcoex_hw.enabled) {
1233                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1234                                            AR_STOMP_LOW_WLAN_WGHT);
1235                 ath9k_hw_btcoex_enable(ah);
1236
1237                 if (common->bus_ops->bt_coex_prep)
1238                         common->bus_ops->bt_coex_prep(common);
1239                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1240                         ath9k_btcoex_timer_resume(sc);
1241         }
1242
1243 mutex_unlock:
1244         mutex_unlock(&sc->mutex);
1245
1246         return r;
1247 }
1248
1249 static int ath9k_tx(struct ieee80211_hw *hw,
1250                     struct sk_buff *skb)
1251 {
1252         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1253         struct ath_wiphy *aphy = hw->priv;
1254         struct ath_softc *sc = aphy->sc;
1255         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1256         struct ath_tx_control txctl;
1257         int padpos, padsize;
1258         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1259         int qnum;
1260
1261         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1262                 ath_print(common, ATH_DBG_XMIT,
1263                           "ath9k: %s: TX in unexpected wiphy state "
1264                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1265                 goto exit;
1266         }
1267
1268         if (sc->ps_enabled) {
1269                 /*
1270                  * mac80211 does not set PM field for normal data frames, so we
1271                  * need to update that based on the current PS mode.
1272                  */
1273                 if (ieee80211_is_data(hdr->frame_control) &&
1274                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1275                     !ieee80211_has_pm(hdr->frame_control)) {
1276                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1277                                   "while in PS mode\n");
1278                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1279                 }
1280         }
1281
1282         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1283                 /*
1284                  * We are using PS-Poll and mac80211 can request TX while in
1285                  * power save mode. Need to wake up hardware for the TX to be
1286                  * completed and if needed, also for RX of buffered frames.
1287                  */
1288                 ath9k_ps_wakeup(sc);
1289                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1290                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1291                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1292                         ath_print(common, ATH_DBG_PS,
1293                                   "Sending PS-Poll to pick a buffered frame\n");
1294                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1295                 } else {
1296                         ath_print(common, ATH_DBG_PS,
1297                                   "Wake up to complete TX\n");
1298                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1299                 }
1300                 /*
1301                  * The actual restore operation will happen only after
1302                  * the sc_flags bit is cleared. We are just dropping
1303                  * the ps_usecount here.
1304                  */
1305                 ath9k_ps_restore(sc);
1306         }
1307
1308         memset(&txctl, 0, sizeof(struct ath_tx_control));
1309
1310         /*
1311          * As a temporary workaround, assign seq# here; this will likely need
1312          * to be cleaned up to work better with Beacon transmission and virtual
1313          * BSSes.
1314          */
1315         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1316                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1317                         sc->tx.seq_no += 0x10;
1318                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1319                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1320         }
1321
1322         /* Add the padding after the header if this is not already done */
1323         padpos = ath9k_cmn_padpos(hdr->frame_control);
1324         padsize = padpos & 3;
1325         if (padsize && skb->len>padpos) {
1326                 if (skb_headroom(skb) < padsize)
1327                         return -1;
1328                 skb_push(skb, padsize);
1329                 memmove(skb->data, skb->data + padsize, padpos);
1330         }
1331
1332         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1333         txctl.txq = &sc->tx.txq[qnum];
1334
1335         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1336
1337         if (ath_tx_start(hw, skb, &txctl) != 0) {
1338                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1339                 goto exit;
1340         }
1341
1342         return 0;
1343 exit:
1344         dev_kfree_skb_any(skb);
1345         return 0;
1346 }
1347
1348 static void ath9k_stop(struct ieee80211_hw *hw)
1349 {
1350         struct ath_wiphy *aphy = hw->priv;
1351         struct ath_softc *sc = aphy->sc;
1352         struct ath_hw *ah = sc->sc_ah;
1353         struct ath_common *common = ath9k_hw_common(ah);
1354         int i;
1355
1356         mutex_lock(&sc->mutex);
1357
1358         aphy->state = ATH_WIPHY_INACTIVE;
1359
1360         if (led_blink)
1361                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1362
1363         cancel_delayed_work_sync(&sc->tx_complete_work);
1364         cancel_work_sync(&sc->paprd_work);
1365         cancel_work_sync(&sc->hw_check_work);
1366
1367         for (i = 0; i < sc->num_sec_wiphy; i++) {
1368                 if (sc->sec_wiphy[i])
1369                         break;
1370         }
1371
1372         if (i == sc->num_sec_wiphy) {
1373                 cancel_delayed_work_sync(&sc->wiphy_work);
1374                 cancel_work_sync(&sc->chan_work);
1375         }
1376
1377         if (sc->sc_flags & SC_OP_INVALID) {
1378                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1379                 mutex_unlock(&sc->mutex);
1380                 return;
1381         }
1382
1383         if (ath9k_wiphy_started(sc)) {
1384                 mutex_unlock(&sc->mutex);
1385                 return; /* another wiphy still in use */
1386         }
1387
1388         /* Ensure HW is awake when we try to shut it down. */
1389         ath9k_ps_wakeup(sc);
1390
1391         if (ah->btcoex_hw.enabled) {
1392                 ath9k_hw_btcoex_disable(ah);
1393                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1394                         ath9k_btcoex_timer_pause(sc);
1395         }
1396
1397         /* make sure h/w will not generate any interrupt
1398          * before setting the invalid flag. */
1399         ath9k_hw_disable_interrupts(ah);
1400
1401         spin_lock_bh(&sc->rx.pcu_lock);
1402         if (!(sc->sc_flags & SC_OP_INVALID)) {
1403                 ath_drain_all_txq(sc, false);
1404                 ath_stoprecv(sc);
1405                 ath9k_hw_phy_disable(ah);
1406         } else
1407                 sc->rx.rxlink = NULL;
1408         spin_unlock_bh(&sc->rx.pcu_lock);
1409
1410         /* disable HAL and put h/w to sleep */
1411         ath9k_hw_disable(ah);
1412         ath9k_hw_configpcipowersave(ah, 1, 1);
1413         ath9k_ps_restore(sc);
1414
1415         /* Finally, put the chip in FULL SLEEP mode */
1416         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1417
1418         sc->sc_flags |= SC_OP_INVALID;
1419
1420         mutex_unlock(&sc->mutex);
1421
1422         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1423 }
1424
1425 static int ath9k_add_interface(struct ieee80211_hw *hw,
1426                                struct ieee80211_vif *vif)
1427 {
1428         struct ath_wiphy *aphy = hw->priv;
1429         struct ath_softc *sc = aphy->sc;
1430         struct ath_hw *ah = sc->sc_ah;
1431         struct ath_common *common = ath9k_hw_common(ah);
1432         struct ath_vif *avp = (void *)vif->drv_priv;
1433         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1434         int ret = 0;
1435
1436         mutex_lock(&sc->mutex);
1437
1438         switch (vif->type) {
1439         case NL80211_IFTYPE_STATION:
1440                 ic_opmode = NL80211_IFTYPE_STATION;
1441                 break;
1442         case NL80211_IFTYPE_WDS:
1443                 ic_opmode = NL80211_IFTYPE_WDS;
1444                 break;
1445         case NL80211_IFTYPE_ADHOC:
1446         case NL80211_IFTYPE_AP:
1447         case NL80211_IFTYPE_MESH_POINT:
1448                 if (sc->nbcnvifs >= ATH_BCBUF) {
1449                         ret = -ENOBUFS;
1450                         goto out;
1451                 }
1452                 ic_opmode = vif->type;
1453                 break;
1454         default:
1455                 ath_print(common, ATH_DBG_FATAL,
1456                         "Interface type %d not yet supported\n", vif->type);
1457                 ret = -EOPNOTSUPP;
1458                 goto out;
1459         }
1460
1461         ath_print(common, ATH_DBG_CONFIG,
1462                   "Attach a VIF of type: %d\n", ic_opmode);
1463
1464         /* Set the VIF opmode */
1465         avp->av_opmode = ic_opmode;
1466         avp->av_bslot = -1;
1467
1468         sc->nvifs++;
1469
1470         ath9k_set_bssid_mask(hw, vif);
1471
1472         if (sc->nvifs > 1)
1473                 goto out; /* skip global settings for secondary vif */
1474
1475         if (ic_opmode == NL80211_IFTYPE_AP) {
1476                 ath9k_hw_set_tsfadjust(ah, 1);
1477                 sc->sc_flags |= SC_OP_TSF_RESET;
1478         }
1479
1480         /* Set the device opmode */
1481         ah->opmode = ic_opmode;
1482
1483         /*
1484          * Enable MIB interrupts when there are hardware phy counters.
1485          * Note we only do this (at the moment) for station mode.
1486          */
1487         if ((vif->type == NL80211_IFTYPE_STATION) ||
1488             (vif->type == NL80211_IFTYPE_ADHOC) ||
1489             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1490                 if (ah->config.enable_ani)
1491                         ah->imask |= ATH9K_INT_MIB;
1492                 ah->imask |= ATH9K_INT_TSFOOR;
1493         }
1494
1495         ath9k_hw_set_interrupts(ah, ah->imask);
1496
1497         if (vif->type == NL80211_IFTYPE_AP    ||
1498             vif->type == NL80211_IFTYPE_ADHOC ||
1499             vif->type == NL80211_IFTYPE_MONITOR) {
1500                 sc->sc_flags |= SC_OP_ANI_RUN;
1501                 ath_start_ani(common);
1502         }
1503
1504 out:
1505         mutex_unlock(&sc->mutex);
1506         return ret;
1507 }
1508
1509 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1510                                    struct ieee80211_vif *vif)
1511 {
1512         struct ath_wiphy *aphy = hw->priv;
1513         struct ath_softc *sc = aphy->sc;
1514         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1515         struct ath_vif *avp = (void *)vif->drv_priv;
1516         int i;
1517
1518         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1519
1520         mutex_lock(&sc->mutex);
1521
1522         /* Stop ANI */
1523         sc->sc_flags &= ~SC_OP_ANI_RUN;
1524         del_timer_sync(&common->ani.timer);
1525
1526         /* Reclaim beacon resources */
1527         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1528             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1529             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1530                 ath9k_ps_wakeup(sc);
1531                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1532                 ath9k_ps_restore(sc);
1533         }
1534
1535         ath_beacon_return(sc, avp);
1536         sc->sc_flags &= ~SC_OP_BEACONS;
1537
1538         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1539                 if (sc->beacon.bslot[i] == vif) {
1540                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1541                                "slot\n", __func__);
1542                         sc->beacon.bslot[i] = NULL;
1543                         sc->beacon.bslot_aphy[i] = NULL;
1544                 }
1545         }
1546
1547         sc->nvifs--;
1548
1549         mutex_unlock(&sc->mutex);
1550 }
1551
1552 static void ath9k_enable_ps(struct ath_softc *sc)
1553 {
1554         struct ath_hw *ah = sc->sc_ah;
1555
1556         sc->ps_enabled = true;
1557         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1558                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1559                         ah->imask |= ATH9K_INT_TIM_TIMER;
1560                         ath9k_hw_set_interrupts(ah, ah->imask);
1561                 }
1562                 ath9k_hw_setrxabort(ah, 1);
1563         }
1564 }
1565
1566 static void ath9k_disable_ps(struct ath_softc *sc)
1567 {
1568         struct ath_hw *ah = sc->sc_ah;
1569
1570         sc->ps_enabled = false;
1571         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1572         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1573                 ath9k_hw_setrxabort(ah, 0);
1574                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1575                                   PS_WAIT_FOR_CAB |
1576                                   PS_WAIT_FOR_PSPOLL_DATA |
1577                                   PS_WAIT_FOR_TX_ACK);
1578                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1579                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1580                         ath9k_hw_set_interrupts(ah, ah->imask);
1581                 }
1582         }
1583
1584 }
1585
1586 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1587 {
1588         struct ath_wiphy *aphy = hw->priv;
1589         struct ath_softc *sc = aphy->sc;
1590         struct ath_hw *ah = sc->sc_ah;
1591         struct ath_common *common = ath9k_hw_common(ah);
1592         struct ieee80211_conf *conf = &hw->conf;
1593         bool disable_radio;
1594
1595         mutex_lock(&sc->mutex);
1596
1597         /*
1598          * Leave this as the first check because we need to turn on the
1599          * radio if it was disabled before prior to processing the rest
1600          * of the changes. Likewise we must only disable the radio towards
1601          * the end.
1602          */
1603         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1604                 bool enable_radio;
1605                 bool all_wiphys_idle;
1606                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1607
1608                 spin_lock_bh(&sc->wiphy_lock);
1609                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1610                 ath9k_set_wiphy_idle(aphy, idle);
1611
1612                 enable_radio = (!idle && all_wiphys_idle);
1613
1614                 /*
1615                  * After we unlock here its possible another wiphy
1616                  * can be re-renabled so to account for that we will
1617                  * only disable the radio toward the end of this routine
1618                  * if by then all wiphys are still idle.
1619                  */
1620                 spin_unlock_bh(&sc->wiphy_lock);
1621
1622                 if (enable_radio) {
1623                         sc->ps_idle = false;
1624                         ath_radio_enable(sc, hw);
1625                         ath_print(common, ATH_DBG_CONFIG,
1626                                   "not-idle: enabling radio\n");
1627                 }
1628         }
1629
1630         /*
1631          * We just prepare to enable PS. We have to wait until our AP has
1632          * ACK'd our null data frame to disable RX otherwise we'll ignore
1633          * those ACKs and end up retransmitting the same null data frames.
1634          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1635          */
1636         if (changed & IEEE80211_CONF_CHANGE_PS) {
1637                 unsigned long flags;
1638                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1639                 if (conf->flags & IEEE80211_CONF_PS)
1640                         ath9k_enable_ps(sc);
1641                 else
1642                         ath9k_disable_ps(sc);
1643                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1644         }
1645
1646         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1647                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1648                         ath_print(common, ATH_DBG_CONFIG,
1649                                   "HW opmode set to Monitor mode\n");
1650                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1651                 }
1652         }
1653
1654         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1655                 struct ieee80211_channel *curchan = hw->conf.channel;
1656                 int pos = curchan->hw_value;
1657                 int old_pos = -1;
1658                 unsigned long flags;
1659
1660                 if (ah->curchan)
1661                         old_pos = ah->curchan - &ah->channels[0];
1662
1663                 aphy->chan_idx = pos;
1664                 aphy->chan_is_ht = conf_is_ht(conf);
1665                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1666                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1667                 else
1668                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1669
1670                 if (aphy->state == ATH_WIPHY_SCAN ||
1671                     aphy->state == ATH_WIPHY_ACTIVE)
1672                         ath9k_wiphy_pause_all_forced(sc, aphy);
1673                 else {
1674                         /*
1675                          * Do not change operational channel based on a paused
1676                          * wiphy changes.
1677                          */
1678                         goto skip_chan_change;
1679                 }
1680
1681                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1682                           curchan->center_freq);
1683
1684                 /* XXX: remove me eventualy */
1685                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1686
1687                 ath_update_chainmask(sc, conf_is_ht(conf));
1688
1689                 /* update survey stats for the old channel before switching */
1690                 spin_lock_irqsave(&common->cc_lock, flags);
1691                 ath_update_survey_stats(sc);
1692                 spin_unlock_irqrestore(&common->cc_lock, flags);
1693
1694                 /*
1695                  * If the operating channel changes, change the survey in-use flags
1696                  * along with it.
1697                  * Reset the survey data for the new channel, unless we're switching
1698                  * back to the operating channel from an off-channel operation.
1699                  */
1700                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1701                     sc->cur_survey != &sc->survey[pos]) {
1702
1703                         if (sc->cur_survey)
1704                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1705
1706                         sc->cur_survey = &sc->survey[pos];
1707
1708                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1709                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1710                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1711                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1712                 }
1713
1714                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1715                         ath_print(common, ATH_DBG_FATAL,
1716                                   "Unable to set channel\n");
1717                         mutex_unlock(&sc->mutex);
1718                         return -EINVAL;
1719                 }
1720
1721                 /*
1722                  * The most recent snapshot of channel->noisefloor for the old
1723                  * channel is only available after the hardware reset. Copy it to
1724                  * the survey stats now.
1725                  */
1726                 if (old_pos >= 0)
1727                         ath_update_survey_nf(sc, old_pos);
1728         }
1729
1730 skip_chan_change:
1731         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1732                 sc->config.txpowlimit = 2 * conf->power_level;
1733                 ath_update_txpow(sc);
1734         }
1735
1736         spin_lock_bh(&sc->wiphy_lock);
1737         disable_radio = ath9k_all_wiphys_idle(sc);
1738         spin_unlock_bh(&sc->wiphy_lock);
1739
1740         if (disable_radio) {
1741                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1742                 sc->ps_idle = true;
1743                 ath_radio_disable(sc, hw);
1744         }
1745
1746         mutex_unlock(&sc->mutex);
1747
1748         return 0;
1749 }
1750
1751 #define SUPPORTED_FILTERS                       \
1752         (FIF_PROMISC_IN_BSS |                   \
1753         FIF_ALLMULTI |                          \
1754         FIF_CONTROL |                           \
1755         FIF_PSPOLL |                            \
1756         FIF_OTHER_BSS |                         \
1757         FIF_BCN_PRBRESP_PROMISC |               \
1758         FIF_PROBE_REQ |                         \
1759         FIF_FCSFAIL)
1760
1761 /* FIXME: sc->sc_full_reset ? */
1762 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1763                                    unsigned int changed_flags,
1764                                    unsigned int *total_flags,
1765                                    u64 multicast)
1766 {
1767         struct ath_wiphy *aphy = hw->priv;
1768         struct ath_softc *sc = aphy->sc;
1769         u32 rfilt;
1770
1771         changed_flags &= SUPPORTED_FILTERS;
1772         *total_flags &= SUPPORTED_FILTERS;
1773
1774         sc->rx.rxfilter = *total_flags;
1775         ath9k_ps_wakeup(sc);
1776         rfilt = ath_calcrxfilter(sc);
1777         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1778         ath9k_ps_restore(sc);
1779
1780         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1781                   "Set HW RX filter: 0x%x\n", rfilt);
1782 }
1783
1784 static int ath9k_sta_add(struct ieee80211_hw *hw,
1785                          struct ieee80211_vif *vif,
1786                          struct ieee80211_sta *sta)
1787 {
1788         struct ath_wiphy *aphy = hw->priv;
1789         struct ath_softc *sc = aphy->sc;
1790
1791         ath_node_attach(sc, sta);
1792
1793         return 0;
1794 }
1795
1796 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1797                             struct ieee80211_vif *vif,
1798                             struct ieee80211_sta *sta)
1799 {
1800         struct ath_wiphy *aphy = hw->priv;
1801         struct ath_softc *sc = aphy->sc;
1802
1803         ath_node_detach(sc, sta);
1804
1805         return 0;
1806 }
1807
1808 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1809                          const struct ieee80211_tx_queue_params *params)
1810 {
1811         struct ath_wiphy *aphy = hw->priv;
1812         struct ath_softc *sc = aphy->sc;
1813         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1814         struct ath9k_tx_queue_info qi;
1815         int ret = 0, qnum;
1816
1817         if (queue >= WME_NUM_AC)
1818                 return 0;
1819
1820         mutex_lock(&sc->mutex);
1821
1822         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1823
1824         qi.tqi_aifs = params->aifs;
1825         qi.tqi_cwmin = params->cw_min;
1826         qi.tqi_cwmax = params->cw_max;
1827         qi.tqi_burstTime = params->txop;
1828         qnum = ath_get_hal_qnum(queue, sc);
1829
1830         ath_print(common, ATH_DBG_CONFIG,
1831                   "Configure tx [queue/halq] [%d/%d],  "
1832                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1833                   queue, qnum, params->aifs, params->cw_min,
1834                   params->cw_max, params->txop);
1835
1836         ret = ath_txq_update(sc, qnum, &qi);
1837         if (ret)
1838                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1839
1840         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1841                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1842                         ath_beaconq_config(sc);
1843
1844         mutex_unlock(&sc->mutex);
1845
1846         return ret;
1847 }
1848
1849 static int ath9k_set_key(struct ieee80211_hw *hw,
1850                          enum set_key_cmd cmd,
1851                          struct ieee80211_vif *vif,
1852                          struct ieee80211_sta *sta,
1853                          struct ieee80211_key_conf *key)
1854 {
1855         struct ath_wiphy *aphy = hw->priv;
1856         struct ath_softc *sc = aphy->sc;
1857         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1858         int ret = 0;
1859
1860         if (modparam_nohwcrypt)
1861                 return -ENOSPC;
1862
1863         mutex_lock(&sc->mutex);
1864         ath9k_ps_wakeup(sc);
1865         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1866
1867         switch (cmd) {
1868         case SET_KEY:
1869                 ret = ath_key_config(common, vif, sta, key);
1870                 if (ret >= 0) {
1871                         key->hw_key_idx = ret;
1872                         /* push IV and Michael MIC generation to stack */
1873                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1874                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1875                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1876                         if (sc->sc_ah->sw_mgmt_crypto &&
1877                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1878                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1879                         ret = 0;
1880                 }
1881                 break;
1882         case DISABLE_KEY:
1883                 ath_key_delete(common, key);
1884                 break;
1885         default:
1886                 ret = -EINVAL;
1887         }
1888
1889         ath9k_ps_restore(sc);
1890         mutex_unlock(&sc->mutex);
1891
1892         return ret;
1893 }
1894
1895 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1896                                    struct ieee80211_vif *vif,
1897                                    struct ieee80211_bss_conf *bss_conf,
1898                                    u32 changed)
1899 {
1900         struct ath_wiphy *aphy = hw->priv;
1901         struct ath_softc *sc = aphy->sc;
1902         struct ath_hw *ah = sc->sc_ah;
1903         struct ath_common *common = ath9k_hw_common(ah);
1904         struct ath_vif *avp = (void *)vif->drv_priv;
1905         int slottime;
1906         int error;
1907
1908         mutex_lock(&sc->mutex);
1909
1910         if (changed & BSS_CHANGED_BSSID) {
1911                 /* Set BSSID */
1912                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1913                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1914                 common->curaid = 0;
1915                 ath9k_hw_write_associd(ah);
1916
1917                 /* Set aggregation protection mode parameters */
1918                 sc->config.ath_aggr_prot = 0;
1919
1920                 /* Only legacy IBSS for now */
1921                 if (vif->type == NL80211_IFTYPE_ADHOC)
1922                         ath_update_chainmask(sc, 0);
1923
1924                 ath_print(common, ATH_DBG_CONFIG,
1925                           "BSSID: %pM aid: 0x%x\n",
1926                           common->curbssid, common->curaid);
1927
1928                 /* need to reconfigure the beacon */
1929                 sc->sc_flags &= ~SC_OP_BEACONS ;
1930         }
1931
1932         /* Enable transmission of beacons (AP, IBSS, MESH) */
1933         if ((changed & BSS_CHANGED_BEACON) ||
1934             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1935                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1936                 error = ath_beacon_alloc(aphy, vif);
1937                 if (!error)
1938                         ath_beacon_config(sc, vif);
1939         }
1940
1941         if (changed & BSS_CHANGED_ERP_SLOT) {
1942                 if (bss_conf->use_short_slot)
1943                         slottime = 9;
1944                 else
1945                         slottime = 20;
1946                 if (vif->type == NL80211_IFTYPE_AP) {
1947                         /*
1948                          * Defer update, so that connected stations can adjust
1949                          * their settings at the same time.
1950                          * See beacon.c for more details
1951                          */
1952                         sc->beacon.slottime = slottime;
1953                         sc->beacon.updateslot = UPDATE;
1954                 } else {
1955                         ah->slottime = slottime;
1956                         ath9k_hw_init_global_settings(ah);
1957                 }
1958         }
1959
1960         /* Disable transmission of beacons */
1961         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1962                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1963
1964         if (changed & BSS_CHANGED_BEACON_INT) {
1965                 sc->beacon_interval = bss_conf->beacon_int;
1966                 /*
1967                  * In case of AP mode, the HW TSF has to be reset
1968                  * when the beacon interval changes.
1969                  */
1970                 if (vif->type == NL80211_IFTYPE_AP) {
1971                         sc->sc_flags |= SC_OP_TSF_RESET;
1972                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1973                         error = ath_beacon_alloc(aphy, vif);
1974                         if (!error)
1975                                 ath_beacon_config(sc, vif);
1976                 } else {
1977                         ath_beacon_config(sc, vif);
1978                 }
1979         }
1980
1981         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1982                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1983                           bss_conf->use_short_preamble);
1984                 if (bss_conf->use_short_preamble)
1985                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1986                 else
1987                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1988         }
1989
1990         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1991                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1992                           bss_conf->use_cts_prot);
1993                 if (bss_conf->use_cts_prot &&
1994                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1995                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1996                 else
1997                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1998         }
1999
2000         if (changed & BSS_CHANGED_ASSOC) {
2001                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2002                         bss_conf->assoc);
2003                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
2004         }
2005
2006         mutex_unlock(&sc->mutex);
2007 }
2008
2009 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2010 {
2011         u64 tsf;
2012         struct ath_wiphy *aphy = hw->priv;
2013         struct ath_softc *sc = aphy->sc;
2014
2015         mutex_lock(&sc->mutex);
2016         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2017         mutex_unlock(&sc->mutex);
2018
2019         return tsf;
2020 }
2021
2022 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2023 {
2024         struct ath_wiphy *aphy = hw->priv;
2025         struct ath_softc *sc = aphy->sc;
2026
2027         mutex_lock(&sc->mutex);
2028         ath9k_hw_settsf64(sc->sc_ah, tsf);
2029         mutex_unlock(&sc->mutex);
2030 }
2031
2032 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2033 {
2034         struct ath_wiphy *aphy = hw->priv;
2035         struct ath_softc *sc = aphy->sc;
2036
2037         mutex_lock(&sc->mutex);
2038
2039         ath9k_ps_wakeup(sc);
2040         ath9k_hw_reset_tsf(sc->sc_ah);
2041         ath9k_ps_restore(sc);
2042
2043         mutex_unlock(&sc->mutex);
2044 }
2045
2046 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2047                               struct ieee80211_vif *vif,
2048                               enum ieee80211_ampdu_mlme_action action,
2049                               struct ieee80211_sta *sta,
2050                               u16 tid, u16 *ssn)
2051 {
2052         struct ath_wiphy *aphy = hw->priv;
2053         struct ath_softc *sc = aphy->sc;
2054         int ret = 0;
2055
2056         local_bh_disable();
2057
2058         switch (action) {
2059         case IEEE80211_AMPDU_RX_START:
2060                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2061                         ret = -ENOTSUPP;
2062                 break;
2063         case IEEE80211_AMPDU_RX_STOP:
2064                 break;
2065         case IEEE80211_AMPDU_TX_START:
2066                 ath9k_ps_wakeup(sc);
2067                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2068                 if (!ret)
2069                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2070                 ath9k_ps_restore(sc);
2071                 break;
2072         case IEEE80211_AMPDU_TX_STOP:
2073                 ath9k_ps_wakeup(sc);
2074                 ath_tx_aggr_stop(sc, sta, tid);
2075                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2076                 ath9k_ps_restore(sc);
2077                 break;
2078         case IEEE80211_AMPDU_TX_OPERATIONAL:
2079                 ath9k_ps_wakeup(sc);
2080                 ath_tx_aggr_resume(sc, sta, tid);
2081                 ath9k_ps_restore(sc);
2082                 break;
2083         default:
2084                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2085                           "Unknown AMPDU action\n");
2086         }
2087
2088         local_bh_enable();
2089
2090         return ret;
2091 }
2092
2093 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2094                              struct survey_info *survey)
2095 {
2096         struct ath_wiphy *aphy = hw->priv;
2097         struct ath_softc *sc = aphy->sc;
2098         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2099         struct ieee80211_supported_band *sband;
2100         struct ieee80211_channel *chan;
2101         unsigned long flags;
2102         int pos;
2103
2104         spin_lock_irqsave(&common->cc_lock, flags);
2105         if (idx == 0)
2106                 ath_update_survey_stats(sc);
2107
2108         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2109         if (sband && idx >= sband->n_channels) {
2110                 idx -= sband->n_channels;
2111                 sband = NULL;
2112         }
2113
2114         if (!sband)
2115                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2116
2117         if (!sband || idx >= sband->n_channels) {
2118                 spin_unlock_irqrestore(&common->cc_lock, flags);
2119                 return -ENOENT;
2120         }
2121
2122         chan = &sband->channels[idx];
2123         pos = chan->hw_value;
2124         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2125         survey->channel = chan;
2126         spin_unlock_irqrestore(&common->cc_lock, flags);
2127
2128         return 0;
2129 }
2130
2131 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2132 {
2133         struct ath_wiphy *aphy = hw->priv;
2134         struct ath_softc *sc = aphy->sc;
2135
2136         mutex_lock(&sc->mutex);
2137         if (ath9k_wiphy_scanning(sc)) {
2138                 /*
2139                  * There is a race here in mac80211 but fixing it requires
2140                  * we revisit how we handle the scan complete callback.
2141                  * After mac80211 fixes we will not have configured hardware
2142                  * to the home channel nor would we have configured the RX
2143                  * filter yet.
2144                  */
2145                 mutex_unlock(&sc->mutex);
2146                 return;
2147         }
2148
2149         aphy->state = ATH_WIPHY_SCAN;
2150         ath9k_wiphy_pause_all_forced(sc, aphy);
2151         mutex_unlock(&sc->mutex);
2152 }
2153
2154 /*
2155  * XXX: this requires a revisit after the driver
2156  * scan_complete gets moved to another place/removed in mac80211.
2157  */
2158 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2159 {
2160         struct ath_wiphy *aphy = hw->priv;
2161         struct ath_softc *sc = aphy->sc;
2162
2163         mutex_lock(&sc->mutex);
2164         aphy->state = ATH_WIPHY_ACTIVE;
2165         mutex_unlock(&sc->mutex);
2166 }
2167
2168 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2169 {
2170         struct ath_wiphy *aphy = hw->priv;
2171         struct ath_softc *sc = aphy->sc;
2172         struct ath_hw *ah = sc->sc_ah;
2173
2174         mutex_lock(&sc->mutex);
2175         ah->coverage_class = coverage_class;
2176         ath9k_hw_init_global_settings(ah);
2177         mutex_unlock(&sc->mutex);
2178 }
2179
2180 struct ieee80211_ops ath9k_ops = {
2181         .tx                 = ath9k_tx,
2182         .start              = ath9k_start,
2183         .stop               = ath9k_stop,
2184         .add_interface      = ath9k_add_interface,
2185         .remove_interface   = ath9k_remove_interface,
2186         .config             = ath9k_config,
2187         .configure_filter   = ath9k_configure_filter,
2188         .sta_add            = ath9k_sta_add,
2189         .sta_remove         = ath9k_sta_remove,
2190         .conf_tx            = ath9k_conf_tx,
2191         .bss_info_changed   = ath9k_bss_info_changed,
2192         .set_key            = ath9k_set_key,
2193         .get_tsf            = ath9k_get_tsf,
2194         .set_tsf            = ath9k_set_tsf,
2195         .reset_tsf          = ath9k_reset_tsf,
2196         .ampdu_action       = ath9k_ampdu_action,
2197         .get_survey         = ath9k_get_survey,
2198         .sw_scan_start      = ath9k_sw_scan_start,
2199         .sw_scan_complete   = ath9k_sw_scan_complete,
2200         .rfkill_poll        = ath9k_rfkill_poll_state,
2201         .set_coverage_class = ath9k_set_coverage_class,
2202 };