1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux.
3 Copyright 2000,2001 The Linux Kernel Team
4 Written/copyright 1994-2001 by Donald Becker.
6 This software may be used and distributed according to the terms
7 of the GNU General Public License, incorporated herein by reference.
9 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
10 for more information on this driver.
12 Please submit bugs to http://bugzilla.kernel.org/ .
16 #define DRV_NAME "tulip"
17 #ifdef CONFIG_TULIP_NAPI
18 #define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */
20 #define DRV_VERSION "1.1.15"
22 #define DRV_RELDATE "Feb 27, 2007"
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/etherdevice.h>
31 #include <linux/delay.h>
32 #include <linux/mii.h>
33 #include <linux/ethtool.h>
34 #include <linux/crc32.h>
35 #include <asm/unaligned.h>
36 #include <asm/uaccess.h>
42 static char version[] __devinitdata =
43 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
45 /* A few user-configurable values. */
47 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
48 static unsigned int max_interrupt_work = 25;
51 /* Used to pass the full-duplex flag, etc. */
52 static int full_duplex[MAX_UNITS];
53 static int options[MAX_UNITS];
54 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
56 /* The possible media types that can be set in options[] are: */
57 const char * const medianame[32] = {
58 "10baseT", "10base2", "AUI", "100baseTx",
59 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
60 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
61 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
62 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
63 "","","","", "","","","", "","","","Transceiver reset",
66 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
67 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) || \
68 defined(CONFIG_SPARC) || defined(__ia64__) || \
69 defined(__sh__) || defined(__mips__)
70 static int rx_copybreak = 1518;
72 static int rx_copybreak = 100;
76 Set the bus performance register.
77 Typical: Set 16 longword cache alignment, no burst limit.
78 Cache alignment bits 15:14 Burst length 13:8
79 0000 No alignment 0x00000000 unlimited 0800 8 longwords
80 4000 8 longwords 0100 1 longword 1000 16 longwords
81 8000 16 longwords 0200 2 longwords 2000 32 longwords
82 C000 32 longwords 0400 4 longwords
83 Warning: many older 486 systems are broken and require setting 0x00A04800
84 8 longword cache alignment, 8 longword burst.
85 ToDo: Non-Intel setting could be better.
88 #if defined(__alpha__) || defined(__ia64__)
89 static int csr0 = 0x01A00000 | 0xE000;
90 #elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
91 static int csr0 = 0x01A00000 | 0x8000;
92 #elif defined(CONFIG_SPARC) || defined(__hppa__)
93 /* The UltraSparc PCI controllers will disconnect at every 64-byte
94 * crossing anyways so it makes no sense to tell Tulip to burst
97 static int csr0 = 0x01A00000 | 0x9000;
98 #elif defined(__arm__) || defined(__sh__)
99 static int csr0 = 0x01A00000 | 0x4800;
100 #elif defined(__mips__)
101 static int csr0 = 0x00200000 | 0x4000;
103 #warning Processor architecture undefined!
104 static int csr0 = 0x00A00000 | 0x4800;
107 /* Operational parameters that usually are not changed. */
108 /* Time in jiffies before concluding the transmitter is hung. */
109 #define TX_TIMEOUT (4*HZ)
112 MODULE_AUTHOR("The Linux Kernel Team");
113 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
114 MODULE_LICENSE("GPL");
115 MODULE_VERSION(DRV_VERSION);
116 module_param(tulip_debug, int, 0);
117 module_param(max_interrupt_work, int, 0);
118 module_param(rx_copybreak, int, 0);
119 module_param(csr0, int, 0);
120 module_param_array(options, int, NULL, 0);
121 module_param_array(full_duplex, int, NULL, 0);
123 #define PFX DRV_NAME ": "
126 int tulip_debug = TULIP_DEBUG;
131 static void tulip_timer(unsigned long data)
133 struct net_device *dev = (struct net_device *)data;
134 struct tulip_private *tp = netdev_priv(dev);
136 if (netif_running(dev))
137 schedule_work(&tp->media_work);
141 * This table use during operation for capabilities and media timer.
143 * It is indexed via the values in 'enum chips'
146 struct tulip_chip_table tulip_tbl[] = {
147 { }, /* placeholder for array, slot unused currently */
148 { }, /* placeholder for array, slot unused currently */
151 { "Digital DS21140 Tulip", 128, 0x0001ebef,
152 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer,
155 /* DC21142, DC21143 */
156 { "Digital DS21142/43 Tulip", 128, 0x0801fbff,
157 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
158 | HAS_INTR_MITIGATION | HAS_PCI_MWI, tulip_timer, t21142_media_task },
161 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
162 HAS_MII | HAS_PNICNWAY, pnic_timer, },
165 { "Macronix 98713 PMAC", 128, 0x0001ebef,
166 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
169 { "Macronix 98715 PMAC", 256, 0x0001ebef,
170 HAS_MEDIA_TABLE, mxic_timer, },
173 { "Macronix 98725 PMAC", 256, 0x0001ebef,
174 HAS_MEDIA_TABLE, mxic_timer, },
177 { "ASIX AX88140", 128, 0x0001fbff,
178 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
179 | IS_ASIX, tulip_timer, tulip_media_task },
182 { "Lite-On PNIC-II", 256, 0x0801fbff,
183 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer, },
186 { "ADMtek Comet", 256, 0x0001abef,
187 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer, },
190 { "Compex 9881 PMAC", 128, 0x0001ebef,
191 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer, },
194 { "Intel DS21145 Tulip", 128, 0x0801fbff,
195 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
196 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
199 #ifdef CONFIG_TULIP_DM910X
200 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
201 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
202 tulip_timer, tulip_media_task },
208 { "Conexant LANfinity", 256, 0x0001ebef,
209 HAS_MII | HAS_ACPI, tulip_timer, tulip_media_task },
214 static DEFINE_PCI_DEVICE_TABLE(tulip_pci_tbl) = {
215 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
216 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
217 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
218 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
219 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
220 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
221 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
222 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
223 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
230 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
232 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
233 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
234 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
235 #ifdef CONFIG_TULIP_DM910X
236 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
237 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
239 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
240 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
241 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
242 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
243 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
244 { 0x1186, 0x1591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
245 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
246 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
247 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
248 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
249 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
250 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
251 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
252 { 0x1414, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Microsoft MN-120 */
253 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
254 { } /* terminate list */
256 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
259 /* A full-duplex map for media types. */
260 const char tulip_media_cap[32] =
261 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
263 static void tulip_tx_timeout(struct net_device *dev);
264 static void tulip_init_ring(struct net_device *dev);
265 static void tulip_free_ring(struct net_device *dev);
266 static netdev_tx_t tulip_start_xmit(struct sk_buff *skb,
267 struct net_device *dev);
268 static int tulip_open(struct net_device *dev);
269 static int tulip_close(struct net_device *dev);
270 static void tulip_up(struct net_device *dev);
271 static void tulip_down(struct net_device *dev);
272 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
273 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274 static void set_rx_mode(struct net_device *dev);
275 #ifdef CONFIG_NET_POLL_CONTROLLER
276 static void poll_tulip(struct net_device *dev);
279 static void tulip_set_power_state (struct tulip_private *tp,
280 int sleep, int snooze)
282 if (tp->flags & HAS_ACPI) {
284 pci_read_config_dword (tp->pdev, CFDD, &tmp);
285 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
287 newtmp |= CFDD_Sleep;
289 newtmp |= CFDD_Snooze;
291 pci_write_config_dword (tp->pdev, CFDD, newtmp);
297 static void tulip_up(struct net_device *dev)
299 struct tulip_private *tp = netdev_priv(dev);
300 void __iomem *ioaddr = tp->base_addr;
301 int next_tick = 3*HZ;
305 #ifdef CONFIG_TULIP_NAPI
306 napi_enable(&tp->napi);
309 /* Wake the chip from sleep/snooze mode. */
310 tulip_set_power_state (tp, 0, 0);
312 /* On some chip revs we must set the MII/SYM port before the reset!? */
313 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
314 iowrite32(0x00040000, ioaddr + CSR6);
316 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
317 iowrite32(0x00000001, ioaddr + CSR0);
318 pci_read_config_dword(tp->pdev, PCI_COMMAND, ®); /* flush write */
322 Wait the specified 50 PCI cycles after a reset by initializing
323 Tx and Rx queues and the address filter list. */
324 iowrite32(tp->csr0, ioaddr + CSR0);
325 pci_read_config_dword(tp->pdev, PCI_COMMAND, ®); /* flush write */
329 printk(KERN_DEBUG "%s: tulip_up(), irq==%d\n",
330 dev->name, dev->irq);
332 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
333 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
334 tp->cur_rx = tp->cur_tx = 0;
335 tp->dirty_rx = tp->dirty_tx = 0;
337 if (tp->flags & MC_HASH_ONLY) {
338 u32 addr_low = get_unaligned_le32(dev->dev_addr);
339 u32 addr_high = get_unaligned_le16(dev->dev_addr + 4);
340 if (tp->chip_id == AX88140) {
341 iowrite32(0, ioaddr + CSR13);
342 iowrite32(addr_low, ioaddr + CSR14);
343 iowrite32(1, ioaddr + CSR13);
344 iowrite32(addr_high, ioaddr + CSR14);
345 } else if (tp->flags & COMET_MAC_ADDR) {
346 iowrite32(addr_low, ioaddr + 0xA4);
347 iowrite32(addr_high, ioaddr + 0xA8);
348 iowrite32(0, ioaddr + 0xAC);
349 iowrite32(0, ioaddr + 0xB0);
352 /* This is set_rx_mode(), but without starting the transmitter. */
353 u16 *eaddrs = (u16 *)dev->dev_addr;
354 u16 *setup_frm = &tp->setup_frame[15*6];
357 /* 21140 bug: you must add the broadcast address. */
358 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
359 /* Fill the final entry of the table with our physical address. */
360 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
361 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
362 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
364 mapping = pci_map_single(tp->pdev, tp->setup_frame,
365 sizeof(tp->setup_frame),
367 tp->tx_buffers[tp->cur_tx].skb = NULL;
368 tp->tx_buffers[tp->cur_tx].mapping = mapping;
370 /* Put the setup frame on the Tx list. */
371 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
372 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
373 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
378 tp->saved_if_port = dev->if_port;
379 if (dev->if_port == 0)
380 dev->if_port = tp->default_port;
382 /* Allow selecting a default media. */
384 if (tp->mtable == NULL)
387 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
388 (dev->if_port == 12 ? 0 : dev->if_port);
389 for (i = 0; i < tp->mtable->leafcount; i++)
390 if (tp->mtable->mleaf[i].media == looking_for) {
392 "Using user-specified media %s\n",
393 medianame[dev->if_port]);
397 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
398 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
399 for (i = 0; i < tp->mtable->leafcount; i++)
400 if (tp->mtable->mleaf[i].media == looking_for) {
402 "Using EEPROM-set media %s\n",
403 medianame[looking_for]);
407 /* Start sensing first non-full-duplex media. */
408 for (i = tp->mtable->leafcount - 1;
409 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
418 if (tp->chip_id == DC21143 &&
419 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
420 /* We must reset the media CSRs when we force-select MII mode. */
421 iowrite32(0x0000, ioaddr + CSR13);
422 iowrite32(0x0000, ioaddr + CSR14);
423 iowrite32(0x0008, ioaddr + CSR15);
425 tulip_select_media(dev, 1);
426 } else if (tp->chip_id == DC21142) {
428 tulip_select_media(dev, 1);
431 "Using MII transceiver %d, status %04x\n",
433 tulip_mdio_read(dev, tp->phys[0], 1));
434 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
435 tp->csr6 = csr6_mask_hdcap;
437 iowrite32(0x0000, ioaddr + CSR13);
438 iowrite32(0x0000, ioaddr + CSR14);
440 t21142_start_nway(dev);
441 } else if (tp->chip_id == PNIC2) {
442 /* for initial startup advertise 10/100 Full and Half */
443 tp->sym_advertise = 0x01E0;
444 /* enable autonegotiate end interrupt */
445 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
446 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
447 pnic2_start_nway(dev);
448 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
451 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
452 iowrite32(0x0001, ioaddr + CSR15);
453 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
456 /* Start with 10mbps to do autonegotiation. */
457 iowrite32(0x32, ioaddr + CSR12);
458 tp->csr6 = 0x00420000;
459 iowrite32(0x0001B078, ioaddr + 0xB8);
460 iowrite32(0x0201B078, ioaddr + 0xB8);
463 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881) &&
466 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
467 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
468 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
469 /* Provided by BOLO, Macronix - 12/10/1998. */
471 tp->csr6 = 0x01a80200;
472 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
473 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
474 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
475 /* Enable automatic Tx underrun recovery. */
476 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
477 dev->if_port = tp->mii_cnt ? 11 : 0;
478 tp->csr6 = 0x00040000;
479 } else if (tp->chip_id == AX88140) {
480 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
482 tulip_select_media(dev, 1);
484 /* Start the chip's Tx to process setup frame. */
488 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
490 /* Enable interrupts by setting the interrupt mask. */
491 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
492 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
493 tulip_start_rxtx(tp);
494 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
496 if (tulip_debug > 2) {
497 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %08x, CSR5 %08x CSR6 %08x\n",
498 dev->name, ioread32(ioaddr + CSR0),
499 ioread32(ioaddr + CSR5),
500 ioread32(ioaddr + CSR6));
503 /* Set the timer to switch to check for link beat and perhaps switch
504 to an alternate media type. */
505 tp->timer.expires = RUN_AT(next_tick);
506 add_timer(&tp->timer);
507 #ifdef CONFIG_TULIP_NAPI
508 init_timer(&tp->oom_timer);
509 tp->oom_timer.data = (unsigned long)dev;
510 tp->oom_timer.function = oom_timer;
515 tulip_open(struct net_device *dev)
519 tulip_init_ring (dev);
521 retval = request_irq(dev->irq, tulip_interrupt, IRQF_SHARED, dev->name, dev);
527 netif_start_queue (dev);
532 tulip_free_ring (dev);
537 static void tulip_tx_timeout(struct net_device *dev)
539 struct tulip_private *tp = netdev_priv(dev);
540 void __iomem *ioaddr = tp->base_addr;
543 spin_lock_irqsave (&tp->lock, flags);
545 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
546 /* Do nothing -- the media monitor should handle this. */
549 "Transmit timeout using MII device\n");
550 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142 ||
551 tp->chip_id == MX98713 || tp->chip_id == COMPEX9881 ||
552 tp->chip_id == DM910X) {
554 "21140 transmit timed out, status %08x, SIA %08x %08x %08x %08x, resetting...\n",
555 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
556 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14),
557 ioread32(ioaddr + CSR15));
558 tp->timeout_recovery = 1;
559 schedule_work(&tp->media_work);
561 } else if (tp->chip_id == PNIC2) {
563 "PNIC2 transmit timed out, status %08x, CSR6/7 %08x / %08x CSR12 %08x, resetting...\n",
564 (int)ioread32(ioaddr + CSR5),
565 (int)ioread32(ioaddr + CSR6),
566 (int)ioread32(ioaddr + CSR7),
567 (int)ioread32(ioaddr + CSR12));
570 "Transmit timed out, status %08x, CSR12 %08x, resetting...\n",
571 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
575 #if defined(way_too_many_messages)
576 if (tulip_debug > 3) {
578 for (i = 0; i < RX_RING_SIZE; i++) {
579 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
582 "%2d: %08x %08x %08x %08x %02x %02x %02x\n",
584 (unsigned int)tp->rx_ring[i].status,
585 (unsigned int)tp->rx_ring[i].length,
586 (unsigned int)tp->rx_ring[i].buffer1,
587 (unsigned int)tp->rx_ring[i].buffer2,
588 buf[0], buf[1], buf[2]);
589 for (j = 0; buf[j] != 0xee && j < 1600; j++)
591 pr_cont(" %02x", buf[j]);
592 pr_cont(" j=%d\n", j);
594 printk(KERN_DEBUG " Rx ring %08x: ", (int)tp->rx_ring);
595 for (i = 0; i < RX_RING_SIZE; i++)
596 pr_cont(" %08x", (unsigned int)tp->rx_ring[i].status);
597 printk(KERN_DEBUG " Tx ring %08x: ", (int)tp->tx_ring);
598 for (i = 0; i < TX_RING_SIZE; i++)
599 pr_cont(" %08x", (unsigned int)tp->tx_ring[i].status);
604 tulip_tx_timeout_complete(tp, ioaddr);
607 spin_unlock_irqrestore (&tp->lock, flags);
608 dev->trans_start = jiffies;
609 netif_wake_queue (dev);
613 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
614 static void tulip_init_ring(struct net_device *dev)
616 struct tulip_private *tp = netdev_priv(dev);
623 for (i = 0; i < RX_RING_SIZE; i++) {
624 tp->rx_ring[i].status = 0x00000000;
625 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
626 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
627 tp->rx_buffers[i].skb = NULL;
628 tp->rx_buffers[i].mapping = 0;
630 /* Mark the last entry as wrapping the ring. */
631 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
632 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
634 for (i = 0; i < RX_RING_SIZE; i++) {
637 /* Note the receive buffer must be longword aligned.
638 dev_alloc_skb() provides 16 byte alignment. But do *not*
639 use skb_reserve() to align the IP header! */
640 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
641 tp->rx_buffers[i].skb = skb;
644 mapping = pci_map_single(tp->pdev, skb->data,
645 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
646 tp->rx_buffers[i].mapping = mapping;
647 skb->dev = dev; /* Mark as being used by this device. */
648 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
649 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
651 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
653 /* The Tx buffer descriptor is filled in as needed, but we
654 do need to clear the ownership bit. */
655 for (i = 0; i < TX_RING_SIZE; i++) {
656 tp->tx_buffers[i].skb = NULL;
657 tp->tx_buffers[i].mapping = 0;
658 tp->tx_ring[i].status = 0x00000000;
659 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
661 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
665 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
667 struct tulip_private *tp = netdev_priv(dev);
673 spin_lock_irqsave(&tp->lock, flags);
675 /* Calculate the next Tx descriptor entry. */
676 entry = tp->cur_tx % TX_RING_SIZE;
678 tp->tx_buffers[entry].skb = skb;
679 mapping = pci_map_single(tp->pdev, skb->data,
680 skb->len, PCI_DMA_TODEVICE);
681 tp->tx_buffers[entry].mapping = mapping;
682 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
684 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
685 flag = 0x60000000; /* No interrupt */
686 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
687 flag = 0xe0000000; /* Tx-done intr. */
688 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
689 flag = 0x60000000; /* No Tx-done intr. */
690 } else { /* Leave room for set_rx_mode() to fill entries. */
691 flag = 0xe0000000; /* Tx-done intr. */
692 netif_stop_queue(dev);
694 if (entry == TX_RING_SIZE-1)
695 flag = 0xe0000000 | DESC_RING_WRAP;
697 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
698 /* if we were using Transmit Automatic Polling, we would need a
700 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
705 /* Trigger an immediate transmit demand. */
706 iowrite32(0, tp->base_addr + CSR1);
708 spin_unlock_irqrestore(&tp->lock, flags);
710 dev->trans_start = jiffies;
715 static void tulip_clean_tx_ring(struct tulip_private *tp)
717 unsigned int dirty_tx;
719 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
721 int entry = dirty_tx % TX_RING_SIZE;
722 int status = le32_to_cpu(tp->tx_ring[entry].status);
725 tp->stats.tx_errors++; /* It wasn't Txed */
726 tp->tx_ring[entry].status = 0;
729 /* Check for Tx filter setup frames. */
730 if (tp->tx_buffers[entry].skb == NULL) {
731 /* test because dummy frames not mapped */
732 if (tp->tx_buffers[entry].mapping)
733 pci_unmap_single(tp->pdev,
734 tp->tx_buffers[entry].mapping,
735 sizeof(tp->setup_frame),
740 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
741 tp->tx_buffers[entry].skb->len,
744 /* Free the original skb. */
745 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
746 tp->tx_buffers[entry].skb = NULL;
747 tp->tx_buffers[entry].mapping = 0;
751 static void tulip_down (struct net_device *dev)
753 struct tulip_private *tp = netdev_priv(dev);
754 void __iomem *ioaddr = tp->base_addr;
757 cancel_work_sync(&tp->media_work);
759 #ifdef CONFIG_TULIP_NAPI
760 napi_disable(&tp->napi);
763 del_timer_sync (&tp->timer);
764 #ifdef CONFIG_TULIP_NAPI
765 del_timer_sync (&tp->oom_timer);
767 spin_lock_irqsave (&tp->lock, flags);
769 /* Disable interrupts by clearing the interrupt mask. */
770 iowrite32 (0x00000000, ioaddr + CSR7);
772 /* Stop the Tx and Rx processes. */
775 /* prepare receive buffers */
776 tulip_refill_rx(dev);
778 /* release any unconsumed transmit buffers */
779 tulip_clean_tx_ring(tp);
781 if (ioread32 (ioaddr + CSR6) != 0xffffffff)
782 tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff;
784 spin_unlock_irqrestore (&tp->lock, flags);
786 init_timer(&tp->timer);
787 tp->timer.data = (unsigned long)dev;
788 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
790 dev->if_port = tp->saved_if_port;
792 /* Leave the driver in snooze, not sleep, mode. */
793 tulip_set_power_state (tp, 0, 1);
796 static void tulip_free_ring (struct net_device *dev)
798 struct tulip_private *tp = netdev_priv(dev);
801 /* Free all the skbuffs in the Rx queue. */
802 for (i = 0; i < RX_RING_SIZE; i++) {
803 struct sk_buff *skb = tp->rx_buffers[i].skb;
804 dma_addr_t mapping = tp->rx_buffers[i].mapping;
806 tp->rx_buffers[i].skb = NULL;
807 tp->rx_buffers[i].mapping = 0;
809 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
810 tp->rx_ring[i].length = 0;
811 /* An invalid address. */
812 tp->rx_ring[i].buffer1 = cpu_to_le32(0xBADF00D0);
814 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
820 for (i = 0; i < TX_RING_SIZE; i++) {
821 struct sk_buff *skb = tp->tx_buffers[i].skb;
824 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
825 skb->len, PCI_DMA_TODEVICE);
828 tp->tx_buffers[i].skb = NULL;
829 tp->tx_buffers[i].mapping = 0;
833 static int tulip_close (struct net_device *dev)
835 struct tulip_private *tp = netdev_priv(dev);
836 void __iomem *ioaddr = tp->base_addr;
838 netif_stop_queue (dev);
843 dev_printk(KERN_DEBUG, &dev->dev,
844 "Shutting down ethercard, status was %02x\n",
845 ioread32 (ioaddr + CSR5));
847 free_irq (dev->irq, dev);
849 tulip_free_ring (dev);
854 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
856 struct tulip_private *tp = netdev_priv(dev);
857 void __iomem *ioaddr = tp->base_addr;
859 if (netif_running(dev)) {
862 spin_lock_irqsave (&tp->lock, flags);
864 tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
866 spin_unlock_irqrestore(&tp->lock, flags);
873 static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
875 struct tulip_private *np = netdev_priv(dev);
876 strcpy(info->driver, DRV_NAME);
877 strcpy(info->version, DRV_VERSION);
878 strcpy(info->bus_info, pci_name(np->pdev));
881 static const struct ethtool_ops ops = {
882 .get_drvinfo = tulip_get_drvinfo
885 /* Provide ioctl() calls to examine the MII xcvr state. */
886 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
888 struct tulip_private *tp = netdev_priv(dev);
889 void __iomem *ioaddr = tp->base_addr;
890 struct mii_ioctl_data *data = if_mii(rq);
891 const unsigned int phy_idx = 0;
892 int phy = tp->phys[phy_idx] & 0x1f;
893 unsigned int regnum = data->reg_num;
896 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
899 else if (tp->flags & HAS_NWAY)
901 else if (tp->chip_id == COMET)
906 case SIOCGMIIREG: /* Read MII PHY register. */
907 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
908 int csr12 = ioread32 (ioaddr + CSR12);
909 int csr14 = ioread32 (ioaddr + CSR14);
912 if (((csr14<<5) & 0x1000) ||
913 (dev->if_port == 5 && tp->nwayset))
914 data->val_out = 0x1000;
916 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
917 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
922 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
923 ((csr12&0x06) == 6 ? 0 : 4);
924 data->val_out |= 0x6048;
927 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
929 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
930 ((csr14 >> 1) & 0x20) + 1;
931 data->val_out |= ((csr14 >> 9) & 0x03C0);
933 case 5: data->val_out = tp->lpar; break;
934 default: data->val_out = 0; break;
937 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
941 case SIOCSMIIREG: /* Write MII PHY register. */
944 if (data->phy_id == phy) {
945 u16 value = data->val_in;
947 case 0: /* Check for autonegotiation on or reset. */
948 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
949 if (tp->full_duplex_lock)
950 tp->full_duplex = (value & 0x0100) ? 1 : 0;
953 tp->advertising[phy_idx] =
954 tp->mii_advertise = data->val_in;
958 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
959 u16 value = data->val_in;
961 if ((value & 0x1200) == 0x1200) {
962 if (tp->chip_id == PNIC2) {
963 pnic2_start_nway (dev);
965 t21142_start_nway (dev);
968 } else if (regnum == 4)
969 tp->sym_advertise = value;
971 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
982 /* Set or clear the multicast filter for this adaptor.
983 Note that we only use exclusion around actually queueing the
984 new frame, not around filling tp->setup_frame. This is non-deterministic
985 when re-entered but still correct. */
988 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
990 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
992 struct tulip_private *tp = netdev_priv(dev);
994 struct netdev_hw_addr *ha;
998 memset(hash_table, 0, sizeof(hash_table));
999 set_bit_le(255, hash_table); /* Broadcast entry */
1000 /* This should work on big-endian machines as well. */
1001 netdev_for_each_mc_addr(ha, dev) {
1002 int index = ether_crc_le(ETH_ALEN, ha->addr) & 0x1ff;
1004 set_bit_le(index, hash_table);
1006 for (i = 0; i < 32; i++) {
1007 *setup_frm++ = hash_table[i];
1008 *setup_frm++ = hash_table[i];
1010 setup_frm = &tp->setup_frame[13*6];
1012 /* Fill the final entry with our physical address. */
1013 eaddrs = (u16 *)dev->dev_addr;
1014 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1015 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1016 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1019 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
1021 struct tulip_private *tp = netdev_priv(dev);
1022 struct netdev_hw_addr *ha;
1025 /* We have <= 14 addresses so we can use the wonderful
1026 16 address perfect filtering of the Tulip. */
1027 netdev_for_each_mc_addr(ha, dev) {
1028 eaddrs = (u16 *) ha->addr;
1029 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1030 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1031 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1033 /* Fill the unused entries with the broadcast address. */
1034 memset(setup_frm, 0xff, (15 - netdev_mc_count(dev)) * 12);
1035 setup_frm = &tp->setup_frame[15*6];
1037 /* Fill the final entry with our physical address. */
1038 eaddrs = (u16 *)dev->dev_addr;
1039 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1040 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1041 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1045 static void set_rx_mode(struct net_device *dev)
1047 struct tulip_private *tp = netdev_priv(dev);
1048 void __iomem *ioaddr = tp->base_addr;
1051 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1053 tp->csr6 &= ~0x00D5;
1054 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1055 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1056 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1057 } else if ((netdev_mc_count(dev) > 1000) ||
1058 (dev->flags & IFF_ALLMULTI)) {
1059 /* Too many to filter well -- accept all multicasts. */
1060 tp->csr6 |= AcceptAllMulticast;
1061 csr6 |= AcceptAllMulticast;
1062 } else if (tp->flags & MC_HASH_ONLY) {
1063 /* Some work-alikes have only a 64-entry hash filter table. */
1064 /* Should verify correctness on big-endian/__powerpc__ */
1065 struct netdev_hw_addr *ha;
1066 if (netdev_mc_count(dev) > 64) {
1067 /* Arbitrary non-effective limit. */
1068 tp->csr6 |= AcceptAllMulticast;
1069 csr6 |= AcceptAllMulticast;
1071 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1073 netdev_for_each_mc_addr(ha, dev) {
1074 if (tp->flags & COMET_MAC_ADDR)
1075 filterbit = ether_crc_le(ETH_ALEN,
1078 filterbit = ether_crc(ETH_ALEN,
1081 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
1082 if (tulip_debug > 2)
1084 "Added filter for %pM %08x bit %d\n",
1086 ether_crc(ETH_ALEN, ha->addr),
1089 if (mc_filter[0] == tp->mc_filter[0] &&
1090 mc_filter[1] == tp->mc_filter[1])
1092 else if (tp->flags & IS_ASIX) {
1093 iowrite32(2, ioaddr + CSR13);
1094 iowrite32(mc_filter[0], ioaddr + CSR14);
1095 iowrite32(3, ioaddr + CSR13);
1096 iowrite32(mc_filter[1], ioaddr + CSR14);
1097 } else if (tp->flags & COMET_MAC_ADDR) {
1098 iowrite32(mc_filter[0], ioaddr + 0xAC);
1099 iowrite32(mc_filter[1], ioaddr + 0xB0);
1101 tp->mc_filter[0] = mc_filter[0];
1102 tp->mc_filter[1] = mc_filter[1];
1105 unsigned long flags;
1106 u32 tx_flags = 0x08000000 | 192;
1108 /* Note that only the low-address shortword of setup_frame is valid!
1109 The values are doubled for big-endian architectures. */
1110 if (netdev_mc_count(dev) > 14) {
1111 /* Must use a multicast hash table. */
1112 build_setup_frame_hash(tp->setup_frame, dev);
1113 tx_flags = 0x08400000 | 192;
1115 build_setup_frame_perfect(tp->setup_frame, dev);
1118 spin_lock_irqsave(&tp->lock, flags);
1120 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1121 /* Same setup recently queued, we need not add it. */
1126 /* Now add this frame to the Tx list. */
1128 entry = tp->cur_tx++ % TX_RING_SIZE;
1131 /* Avoid a chip errata by prefixing a dummy entry. */
1132 tp->tx_buffers[entry].skb = NULL;
1133 tp->tx_buffers[entry].mapping = 0;
1134 tp->tx_ring[entry].length =
1135 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1136 tp->tx_ring[entry].buffer1 = 0;
1137 /* Must set DescOwned later to avoid race with chip */
1139 entry = tp->cur_tx++ % TX_RING_SIZE;
1143 tp->tx_buffers[entry].skb = NULL;
1144 tp->tx_buffers[entry].mapping =
1145 pci_map_single(tp->pdev, tp->setup_frame,
1146 sizeof(tp->setup_frame),
1148 /* Put the setup frame on the Tx list. */
1149 if (entry == TX_RING_SIZE-1)
1150 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1151 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1152 tp->tx_ring[entry].buffer1 =
1153 cpu_to_le32(tp->tx_buffers[entry].mapping);
1154 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1156 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1157 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1158 netif_stop_queue(dev);
1160 /* Trigger an immediate transmit demand. */
1161 iowrite32(0, ioaddr + CSR1);
1164 spin_unlock_irqrestore(&tp->lock, flags);
1167 iowrite32(csr6, ioaddr + CSR6);
1170 #ifdef CONFIG_TULIP_MWI
1171 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1172 struct net_device *dev)
1174 struct tulip_private *tp = netdev_priv(dev);
1179 if (tulip_debug > 3)
1180 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1182 tp->csr0 = csr0 = 0;
1184 /* if we have any cache line size at all, we can do MRM and MWI */
1187 /* Enable MWI in the standard PCI command bit.
1188 * Check for the case where MWI is desired but not available
1190 pci_try_set_mwi(pdev);
1192 /* read result from hardware (in case bit refused to enable) */
1193 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1194 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1197 /* if cache line size hardwired to zero, no MWI */
1198 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1199 if ((csr0 & MWI) && (cache == 0)) {
1201 pci_clear_mwi(pdev);
1204 /* assign per-cacheline-size cache alignment and
1205 * burst length values
1209 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1212 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1215 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1222 /* if we have a good cache line size, we by now have a good
1223 * csr0, so save it and exit
1228 /* we don't have a good csr0 or cache line size, disable MWI */
1230 pci_clear_mwi(pdev);
1234 /* sane defaults for burst length and cache alignment
1235 * originally from de4x5 driver
1237 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1241 if (tulip_debug > 2)
1242 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1243 pci_name(pdev), cache, csr0);
1248 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1249 * is the DM910X and the on chip ULi devices
1252 static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1254 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1259 static const struct net_device_ops tulip_netdev_ops = {
1260 .ndo_open = tulip_open,
1261 .ndo_start_xmit = tulip_start_xmit,
1262 .ndo_tx_timeout = tulip_tx_timeout,
1263 .ndo_stop = tulip_close,
1264 .ndo_get_stats = tulip_get_stats,
1265 .ndo_do_ioctl = private_ioctl,
1266 .ndo_set_multicast_list = set_rx_mode,
1267 .ndo_change_mtu = eth_change_mtu,
1268 .ndo_set_mac_address = eth_mac_addr,
1269 .ndo_validate_addr = eth_validate_addr,
1270 #ifdef CONFIG_NET_POLL_CONTROLLER
1271 .ndo_poll_controller = poll_tulip,
1275 static int __devinit tulip_init_one (struct pci_dev *pdev,
1276 const struct pci_device_id *ent)
1278 struct tulip_private *tp;
1279 /* See note below on the multiport cards. */
1280 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1281 static struct pci_device_id early_486_chipsets[] = {
1282 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1283 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1286 static int last_irq;
1287 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1290 unsigned char *ee_data;
1291 struct net_device *dev;
1292 void __iomem *ioaddr;
1293 static int board_idx = -1;
1294 int chip_idx = ent->driver_data;
1295 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1296 unsigned int eeprom_missing = 0;
1297 unsigned int force_csr0 = 0;
1300 if (tulip_debug > 0)
1301 printk_once(KERN_INFO "%s", version);
1307 * Lan media wire a tulip chip to a wan interface. Needs a very
1308 * different driver (lmc driver)
1311 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1312 pr_err(PFX "skipping LMC card\n");
1317 * DM910x chips should be handled by the dmfe driver, except
1318 * on-board chips on SPARC systems. Also, early DM9100s need
1319 * software CRC which only the dmfe driver supports.
1322 #ifdef CONFIG_TULIP_DM910X
1323 if (chip_idx == DM910X) {
1324 struct device_node *dp;
1326 if (pdev->vendor == 0x1282 && pdev->device == 0x9100 &&
1327 pdev->revision < 0x30) {
1328 pr_info(PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1332 dp = pci_device_to_OF_node(pdev);
1333 if (!(dp && of_get_property(dp, "local-mac-address", NULL))) {
1334 pr_info(PFX "skipping DM910x expansion card (use dmfe)\n");
1341 * Looks for early PCI chipsets where people report hangs
1342 * without the workarounds being on.
1345 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1346 aligned. Aries might need this too. The Saturn errata are not
1347 pretty reading but thankfully it's an old 486 chipset.
1349 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1353 if (pci_dev_present(early_486_chipsets)) {
1354 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1358 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1359 if (chip_idx == AX88140) {
1360 if ((csr0 & 0x3f00) == 0)
1364 /* PNIC doesn't have MWI/MRL/MRM... */
1365 if (chip_idx == LC82C168)
1366 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1368 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1369 if (tulip_uli_dm_quirk(pdev)) {
1370 csr0 &= ~0x01f100ff;
1371 #if defined(CONFIG_SPARC)
1372 csr0 = (csr0 & ~0xff00) | 0xe000;
1376 * And back to business
1379 i = pci_enable_device(pdev);
1381 pr_err(PFX "Cannot enable tulip board #%d, aborting\n",
1388 /* alloc_etherdev ensures aligned and zeroed private structures */
1389 dev = alloc_etherdev (sizeof (*tp));
1391 pr_err(PFX "ether device alloc failed, aborting\n");
1395 SET_NETDEV_DEV(dev, &pdev->dev);
1396 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1397 pr_err(PFX "%s: I/O region (0x%llx@0x%llx) too small, aborting\n",
1399 (unsigned long long)pci_resource_len (pdev, 0),
1400 (unsigned long long)pci_resource_start (pdev, 0));
1401 goto err_out_free_netdev;
1404 /* grab all resources from both PIO and MMIO regions, as we
1405 * don't want anyone else messing around with our hardware */
1406 if (pci_request_regions (pdev, DRV_NAME))
1407 goto err_out_free_netdev;
1409 ioaddr = pci_iomap(pdev, TULIP_BAR, tulip_tbl[chip_idx].io_size);
1412 goto err_out_free_res;
1415 * initialize private data structure 'tp'
1416 * it is zeroed and aligned in alloc_etherdev
1418 tp = netdev_priv(dev);
1421 tp->rx_ring = pci_alloc_consistent(pdev,
1422 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1423 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1426 goto err_out_mtable;
1427 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1428 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1430 tp->chip_id = chip_idx;
1431 tp->flags = tulip_tbl[chip_idx].flags;
1433 tp->base_addr = ioaddr;
1434 tp->revision = pdev->revision;
1436 spin_lock_init(&tp->lock);
1437 spin_lock_init(&tp->mii_lock);
1438 init_timer(&tp->timer);
1439 tp->timer.data = (unsigned long)dev;
1440 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1442 INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
1444 dev->base_addr = (unsigned long)ioaddr;
1446 #ifdef CONFIG_TULIP_MWI
1447 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1448 tulip_mwi_config (pdev, dev);
1451 /* Stop the chip's Tx and Rx processes. */
1452 tulip_stop_rxtx(tp);
1454 pci_set_master(pdev);
1457 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1458 switch (pdev->subsystem_device) {
1467 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1468 chip_name = "GSC DS21140 Tulip";
1473 /* Clear the missed-packet counter. */
1474 ioread32(ioaddr + CSR8);
1476 /* The station address ROM is read byte serially. The register must
1477 be polled, waiting for the value to be read bit serially from the
1480 ee_data = tp->eeprom;
1481 memset(ee_data, 0, sizeof(tp->eeprom));
1483 if (chip_idx == LC82C168) {
1484 for (i = 0; i < 3; i++) {
1485 int value, boguscnt = 100000;
1486 iowrite32(0x600 | i, ioaddr + 0x98);
1488 value = ioread32(ioaddr + CSR9);
1489 } while (value < 0 && --boguscnt > 0);
1490 put_unaligned_le16(value, ((__le16 *)dev->dev_addr) + i);
1491 sum += value & 0xffff;
1493 } else if (chip_idx == COMET) {
1494 /* No need to read the EEPROM. */
1495 put_unaligned_le32(ioread32(ioaddr + 0xA4), dev->dev_addr);
1496 put_unaligned_le16(ioread32(ioaddr + 0xA8), dev->dev_addr + 4);
1497 for (i = 0; i < 6; i ++)
1498 sum += dev->dev_addr[i];
1500 /* A serial EEPROM interface, we read now and sort it out later. */
1502 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1503 int ee_max_addr = ((1 << ee_addr_size) - 1) * sizeof(u16);
1505 if (ee_max_addr > sizeof(tp->eeprom))
1506 ee_max_addr = sizeof(tp->eeprom);
1508 for (i = 0; i < ee_max_addr ; i += sizeof(u16)) {
1509 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1510 ee_data[i] = data & 0xff;
1511 ee_data[i + 1] = data >> 8;
1514 /* DEC now has a specification (see Notes) but early board makers
1515 just put the address in the first EEPROM locations. */
1516 /* This does memcmp(ee_data, ee_data+16, 8) */
1517 for (i = 0; i < 8; i ++)
1518 if (ee_data[i] != ee_data[16+i])
1520 if (chip_idx == CONEXANT) {
1521 /* Check that the tuple type and length is correct. */
1522 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1524 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1526 sa_offset = 2; /* Grrr, damn Matrox boards. */
1529 #ifdef CONFIG_MIPS_COBALT
1530 if ((pdev->bus->number == 0) &&
1531 ((PCI_SLOT(pdev->devfn) == 7) ||
1532 (PCI_SLOT(pdev->devfn) == 12))) {
1533 /* Cobalt MAC address in first EEPROM locations. */
1535 /* Ensure our media table fixup get's applied */
1536 memcpy(ee_data + 16, ee_data, 8);
1540 /* Check to see if we have a broken srom */
1541 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1542 /* pci_vendor_id and subsystem_id are swapped */
1543 ee_data[0] = ee_data[2];
1544 ee_data[1] = ee_data[3];
1548 /* HSC-PCI boards need to be byte-swaped and shifted
1549 * up 1 word. This shift needs to happen at the end
1550 * of the MAC first because of the 2 byte overlap.
1552 for (i = 4; i >= 0; i -= 2) {
1553 ee_data[17 + i + 3] = ee_data[17 + i];
1554 ee_data[16 + i + 5] = ee_data[16 + i];
1559 for (i = 0; i < 6; i ++) {
1560 dev->dev_addr[i] = ee_data[i + sa_offset];
1561 sum += ee_data[i + sa_offset];
1564 /* Lite-On boards have the address byte-swapped. */
1565 if ((dev->dev_addr[0] == 0xA0 ||
1566 dev->dev_addr[0] == 0xC0 ||
1567 dev->dev_addr[0] == 0x02) &&
1568 dev->dev_addr[1] == 0x00)
1569 for (i = 0; i < 6; i+=2) {
1570 char tmp = dev->dev_addr[i];
1571 dev->dev_addr[i] = dev->dev_addr[i+1];
1572 dev->dev_addr[i+1] = tmp;
1574 /* On the Zynx 315 Etherarray and other multiport boards only the
1575 first Tulip has an EEPROM.
1576 On Sparc systems the mac address is held in the OBP property
1577 "local-mac-address".
1578 The addresses of the subsequent ports are derived from the first.
1579 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1580 that here as well. */
1581 if (sum == 0 || sum == 6*0xff) {
1582 #if defined(CONFIG_SPARC)
1583 struct device_node *dp = pci_device_to_OF_node(pdev);
1584 const unsigned char *addr;
1588 for (i = 0; i < 5; i++)
1589 dev->dev_addr[i] = last_phys_addr[i];
1590 dev->dev_addr[i] = last_phys_addr[i] + 1;
1591 #if defined(CONFIG_SPARC)
1592 addr = of_get_property(dp, "local-mac-address", &len);
1593 if (addr && len == 6)
1594 memcpy(dev->dev_addr, addr, 6);
1596 #if defined(__i386__) || defined(__x86_64__) /* Patch up x86 BIOS bug. */
1602 for (i = 0; i < 6; i++)
1603 last_phys_addr[i] = dev->dev_addr[i];
1607 /* The lower four bits are the media type. */
1608 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1609 if (options[board_idx] & MEDIA_MASK)
1610 tp->default_port = options[board_idx] & MEDIA_MASK;
1611 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1612 tp->full_duplex = 1;
1613 if (mtu[board_idx] > 0)
1614 dev->mtu = mtu[board_idx];
1616 if (dev->mem_start & MEDIA_MASK)
1617 tp->default_port = dev->mem_start & MEDIA_MASK;
1618 if (tp->default_port) {
1619 pr_info(DRV_NAME "%d: Transceiver selection forced to %s\n",
1620 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1622 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1623 tp->full_duplex = 1;
1625 if (tp->full_duplex)
1626 tp->full_duplex_lock = 1;
1628 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1629 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1630 tp->mii_advertise = media2advert[tp->default_port - 9];
1631 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1634 if (tp->flags & HAS_MEDIA_TABLE) {
1635 sprintf(dev->name, DRV_NAME "%d", board_idx); /* hack */
1636 tulip_parse_eeprom(dev);
1637 strcpy(dev->name, "eth%d"); /* un-hack */
1640 if ((tp->flags & ALWAYS_CHECK_MII) ||
1641 (tp->mtable && tp->mtable->has_mii) ||
1642 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1643 if (tp->mtable && tp->mtable->has_mii) {
1644 for (i = 0; i < tp->mtable->leafcount; i++)
1645 if (tp->mtable->mleaf[i].media == 11) {
1647 tp->saved_if_port = dev->if_port;
1648 tulip_select_media(dev, 2);
1649 dev->if_port = tp->saved_if_port;
1654 /* Find the connected MII xcvrs.
1655 Doing this in open() would allow detecting external xcvrs
1656 later, but takes much time. */
1657 tulip_find_mii (dev, board_idx);
1660 /* The Tulip-specific entries in the device structure. */
1661 dev->netdev_ops = &tulip_netdev_ops;
1662 dev->watchdog_timeo = TX_TIMEOUT;
1663 #ifdef CONFIG_TULIP_NAPI
1664 netif_napi_add(dev, &tp->napi, tulip_poll, 16);
1666 SET_ETHTOOL_OPS(dev, &ops);
1668 if (register_netdev(dev))
1669 goto err_out_free_ring;
1671 pci_set_drvdata(pdev, dev);
1674 #ifdef CONFIG_TULIP_MMIO
1675 "%s rev %d at MMIO %#llx,%s %pM, IRQ %d\n",
1677 "%s rev %d at Port %#llx,%s %pM, IRQ %d\n",
1679 chip_name, pdev->revision,
1680 (unsigned long long)pci_resource_start(pdev, TULIP_BAR),
1681 eeprom_missing ? " EEPROM not present," : "",
1682 dev->dev_addr, irq);
1684 if (tp->chip_id == PNIC2)
1685 tp->link_change = pnic2_lnk_change;
1686 else if (tp->flags & HAS_NWAY)
1687 tp->link_change = t21142_lnk_change;
1688 else if (tp->flags & HAS_PNICNWAY)
1689 tp->link_change = pnic_lnk_change;
1691 /* Reset the xcvr interface and turn on heartbeat. */
1697 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1700 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1701 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1702 iowrite32(0x0000, ioaddr + CSR13);
1703 iowrite32(0x0000, ioaddr + CSR14);
1704 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1706 t21142_start_nway(dev);
1709 /* just do a reset for sanity sake */
1710 iowrite32(0x0000, ioaddr + CSR13);
1711 iowrite32(0x0000, ioaddr + CSR14);
1714 if ( ! tp->mii_cnt) {
1717 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1718 iowrite32(0x30, ioaddr + CSR12);
1719 iowrite32(0x0001F078, ioaddr + CSR6);
1720 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1725 iowrite32(0x00000000, ioaddr + CSR6);
1726 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1727 iowrite32(0x00000001, ioaddr + CSR13);
1731 iowrite32(0x01a80000, ioaddr + CSR6);
1732 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1733 iowrite32(0x00001000, ioaddr + CSR12);
1736 /* No initialization necessary. */
1740 /* put the chip in snooze mode until opened */
1741 tulip_set_power_state (tp, 0, 1);
1746 pci_free_consistent (pdev,
1747 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1748 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1749 tp->rx_ring, tp->rx_ring_dma);
1753 pci_iounmap(pdev, ioaddr);
1756 pci_release_regions (pdev);
1758 err_out_free_netdev:
1766 static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)
1768 struct net_device *dev = pci_get_drvdata(pdev);
1773 if (!netif_running(dev))
1778 netif_device_detach(dev);
1779 free_irq(dev->irq, dev);
1782 pci_save_state(pdev);
1783 pci_disable_device(pdev);
1784 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1790 static int tulip_resume(struct pci_dev *pdev)
1792 struct net_device *dev = pci_get_drvdata(pdev);
1798 pci_set_power_state(pdev, PCI_D0);
1799 pci_restore_state(pdev);
1801 if (!netif_running(dev))
1804 if ((retval = pci_enable_device(pdev))) {
1805 pr_err(PFX "pci_enable_device failed in resume\n");
1809 if ((retval = request_irq(dev->irq, tulip_interrupt, IRQF_SHARED, dev->name, dev))) {
1810 pr_err(PFX "request_irq failed in resume\n");
1814 netif_device_attach(dev);
1816 if (netif_running(dev))
1822 #endif /* CONFIG_PM */
1825 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1827 struct net_device *dev = pci_get_drvdata (pdev);
1828 struct tulip_private *tp;
1833 tp = netdev_priv(dev);
1834 unregister_netdev(dev);
1835 pci_free_consistent (pdev,
1836 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1837 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1838 tp->rx_ring, tp->rx_ring_dma);
1840 pci_iounmap(pdev, tp->base_addr);
1842 pci_release_regions (pdev);
1843 pci_set_drvdata (pdev, NULL);
1845 /* pci_power_off (pdev, -1); */
1848 #ifdef CONFIG_NET_POLL_CONTROLLER
1850 * Polling 'interrupt' - used by things like netconsole to send skbs
1851 * without having to re-enable interrupts. It's not called while
1852 * the interrupt routine is executing.
1855 static void poll_tulip (struct net_device *dev)
1857 /* disable_irq here is not very nice, but with the lockless
1858 interrupt handler we have no other choice. */
1859 disable_irq(dev->irq);
1860 tulip_interrupt (dev->irq, dev);
1861 enable_irq(dev->irq);
1865 static struct pci_driver tulip_driver = {
1867 .id_table = tulip_pci_tbl,
1868 .probe = tulip_init_one,
1869 .remove = __devexit_p(tulip_remove_one),
1871 .suspend = tulip_suspend,
1872 .resume = tulip_resume,
1873 #endif /* CONFIG_PM */
1877 static int __init tulip_init (void)
1880 pr_info("%s", version);
1883 /* copy module parms into globals */
1884 tulip_rx_copybreak = rx_copybreak;
1885 tulip_max_interrupt_work = max_interrupt_work;
1887 /* probe for and init boards */
1888 return pci_register_driver(&tulip_driver);
1892 static void __exit tulip_cleanup (void)
1894 pci_unregister_driver (&tulip_driver);
1898 module_init(tulip_init);
1899 module_exit(tulip_cleanup);