drivers/net/tc35815.c

   1 /*
   2  * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
   3  *
   4  * Based on skelton.c by Donald Becker.
   5  *
   6  * This driver is a replacement of older and less maintained version.
   7  * This is a header of the older version:
   8  *      -----<snip>-----
   9  *      Copyright 2001 MontaVista Software Inc.
  10  *      Author: MontaVista Software, Inc.
  11  *              ahennessy@mvista.com
  12  *      Copyright (C) 2000-2001 Toshiba Corporation
  13  *      static const char *version =
  14  *              "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15  *      -----<snip>-----
  16  *
  17  * This file is subject to the terms and conditions of the GNU General Public
  18  * License.  See the file "COPYING" in the main directory of this archive
  19  * for more details.
  20  *
  21  * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22  * All Rights Reserved.
  23  */
  24
  25 #ifdef TC35815_NAPI
  26 #define DRV_VERSION     "1.38-NAPI"
  27 #else
  28 #define DRV_VERSION     "1.38"
  29 #endif
  30 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  31 #define MODNAME                 "tc35815"
  32
  33 #include <linux/module.h>
  34 #include <linux/kernel.h>
  35 #include <linux/types.h>
  36 #include <linux/fcntl.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/ioport.h>
  39 #include <linux/in.h>
  40 #include <linux/if_vlan.h>
  41 #include <linux/slab.h>
  42 #include <linux/string.h>
  43 #include <linux/spinlock.h>
  44 #include <linux/errno.h>
  45 #include <linux/init.h>
  46 #include <linux/netdevice.h>
  47 #include <linux/etherdevice.h>
  48 #include <linux/skbuff.h>
  49 #include <linux/delay.h>
  50 #include <linux/pci.h>
  51 #include <linux/phy.h>
  52 #include <linux/workqueue.h>
  53 #include <linux/platform_device.h>
  54 #include <asm/io.h>
  55 #include <asm/byteorder.h>
  56
  57 /* First, a few definitions that the brave might change. */
  58
  59 #define GATHER_TXINT    /* On-Demand Tx Interrupt */
  60 #define WORKAROUND_LOSTCAR
  61 #define WORKAROUND_100HALF_PROMISC
  62 /* #define TC35815_USE_PACKEDBUFFER */
  63
  64 enum tc35815_chiptype {
  65         TC35815CF = 0,
  66         TC35815_NWU,
  67         TC35815_TX4939,
  68 };
  69
  70 /* indexed by tc35815_chiptype, above */
  71 static const struct {
  72         const char *name;
  73 } chip_info[] __devinitdata = {
  74         { "TOSHIBA TC35815CF 10/100BaseTX" },
  75         { "TOSHIBA TC35815 with Wake on LAN" },
  76         { "TOSHIBA TC35815/TX4939" },
  77 };
  78
  79 static const struct pci_device_id tc35815_pci_tbl[] = {
  80         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  81         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  82         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  83         {0,}
  84 };
  85 MODULE_DEVICE_TABLE(pci, tc35815_pci_tbl);
  86
  87 /* see MODULE_PARM_DESC */
  88 static struct tc35815_options {
  89         int speed;
  90         int duplex;
  91 } options;
  92
  93 /*
  94  * Registers
  95  */
  96 struct tc35815_regs {
  97         __u32 DMA_Ctl;          /* 0x00 */
  98         __u32 TxFrmPtr;
  99         __u32 TxThrsh;
 100         __u32 TxPollCtr;
 101         __u32 BLFrmPtr;
 102         __u32 RxFragSize;
 103         __u32 Int_En;
 104         __u32 FDA_Bas;
 105         __u32 FDA_Lim;          /* 0x20 */
 106         __u32 Int_Src;
 107         __u32 unused0[2];
 108         __u32 PauseCnt;
 109         __u32 RemPauCnt;
 110         __u32 TxCtlFrmStat;
 111         __u32 unused1;
 112         __u32 MAC_Ctl;          /* 0x40 */
 113         __u32 CAM_Ctl;
 114         __u32 Tx_Ctl;
 115         __u32 Tx_Stat;
 116         __u32 Rx_Ctl;
 117         __u32 Rx_Stat;
 118         __u32 MD_Data;
 119         __u32 MD_CA;
 120         __u32 CAM_Adr;          /* 0x60 */
 121         __u32 CAM_Data;
 122         __u32 CAM_Ena;
 123         __u32 PROM_Ctl;
 124         __u32 PROM_Data;
 125         __u32 Algn_Cnt;
 126         __u32 CRC_Cnt;
 127         __u32 Miss_Cnt;
 128 };
 129
 130 /*
 131  * Bit assignments
 132  */
 133 /* DMA_Ctl bit asign ------------------------------------------------------- */
 134 #define DMA_RxAlign            0x00c00000 /* 1:Reception Alignment           */
 135 #define DMA_RxAlign_1          0x00400000
 136 #define DMA_RxAlign_2          0x00800000
 137 #define DMA_RxAlign_3          0x00c00000
 138 #define DMA_M66EnStat          0x00080000 /* 1:66MHz Enable State            */
 139 #define DMA_IntMask            0x00040000 /* 1:Interupt mask                 */
 140 #define DMA_SWIntReq           0x00020000 /* 1:Software Interrupt request    */
 141 #define DMA_TxWakeUp           0x00010000 /* 1:Transmit Wake Up              */
 142 #define DMA_RxBigE             0x00008000 /* 1:Receive Big Endian            */
 143 #define DMA_TxBigE             0x00004000 /* 1:Transmit Big Endian           */
 144 #define DMA_TestMode           0x00002000 /* 1:Test Mode                     */
 145 #define DMA_PowrMgmnt          0x00001000 /* 1:Power Management              */
 146 #define DMA_DmBurst_Mask       0x000001fc /* DMA Burst size                  */
 147
 148 /* RxFragSize bit asign ---------------------------------------------------- */
 149 #define RxFrag_EnPack          0x00008000 /* 1:Enable Packing                */
 150 #define RxFrag_MinFragMask     0x00000ffc /* Minimum Fragment                */
 151
 152 /* MAC_Ctl bit asign ------------------------------------------------------- */
 153 #define MAC_Link10             0x00008000 /* 1:Link Status 10Mbits           */
 154 #define MAC_EnMissRoll         0x00002000 /* 1:Enable Missed Roll            */
 155 #define MAC_MissRoll           0x00000400 /* 1:Missed Roll                   */
 156 #define MAC_Loop10             0x00000080 /* 1:Loop 10 Mbps                  */
 157 #define MAC_Conn_Auto          0x00000000 /*00:Connection mode (Automatic)   */
 158 #define MAC_Conn_10M           0x00000020 /*01:                (10Mbps endec)*/
 159 #define MAC_Conn_Mll           0x00000040 /*10:                (Mll clock)   */
 160 #define MAC_MacLoop            0x00000010 /* 1:MAC Loopback                  */
 161 #define MAC_FullDup            0x00000008 /* 1:Full Duplex 0:Half Duplex     */
 162 #define MAC_Reset              0x00000004 /* 1:Software Reset                */
 163 #define MAC_HaltImm            0x00000002 /* 1:Halt Immediate                */
 164 #define MAC_HaltReq            0x00000001 /* 1:Halt request                  */
 165
 166 /* PROM_Ctl bit asign ------------------------------------------------------ */
 167 #define PROM_Busy              0x00008000 /* 1:Busy (Start Operation)        */
 168 #define PROM_Read              0x00004000 /*10:Read operation                */
 169 #define PROM_Write             0x00002000 /*01:Write operation               */
 170 #define PROM_Erase             0x00006000 /*11:Erase operation               */
 171                                           /*00:Enable or Disable Writting,   */
 172                                           /*      as specified in PROM_Addr. */
 173 #define PROM_Addr_Ena          0x00000030 /*11xxxx:PROM Write enable         */
 174                                           /*00xxxx:           disable        */
 175
 176 /* CAM_Ctl bit asign ------------------------------------------------------- */
 177 #define CAM_CompEn             0x00000010 /* 1:CAM Compare Enable            */
 178 #define CAM_NegCAM             0x00000008 /* 1:Reject packets CAM recognizes,*/
 179                                           /*                    accept other */
 180 #define CAM_BroadAcc           0x00000004 /* 1:Broadcast assept              */
 181 #define CAM_GroupAcc           0x00000002 /* 1:Multicast assept              */
 182 #define CAM_StationAcc         0x00000001 /* 1:unicast accept                */
 183
 184 /* CAM_Ena bit asign ------------------------------------------------------- */
 185 #define CAM_ENTRY_MAX                  21   /* CAM Data entry max count      */
 186 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits)  */
 187 #define CAM_Ena_Bit(index)      (1 << (index))
 188 #define CAM_ENTRY_DESTINATION   0
 189 #define CAM_ENTRY_SOURCE        1
 190 #define CAM_ENTRY_MACCTL        20
 191
 192 /* Tx_Ctl bit asign -------------------------------------------------------- */
 193 #define Tx_En                  0x00000001 /* 1:Transmit enable               */
 194 #define Tx_TxHalt              0x00000002 /* 1:Transmit Halt Request         */
 195 #define Tx_NoPad               0x00000004 /* 1:Suppress Padding              */
 196 #define Tx_NoCRC               0x00000008 /* 1:Suppress Padding              */
 197 #define Tx_FBack               0x00000010 /* 1:Fast Back-off                 */
 198 #define Tx_EnUnder             0x00000100 /* 1:Enable Underrun               */
 199 #define Tx_EnExDefer           0x00000200 /* 1:Enable Excessive Deferral     */
 200 #define Tx_EnLCarr             0x00000400 /* 1:Enable Lost Carrier           */
 201 #define Tx_EnExColl            0x00000800 /* 1:Enable Excessive Collision    */
 202 #define Tx_EnLateColl          0x00001000 /* 1:Enable Late Collision         */
 203 #define Tx_EnTxPar             0x00002000 /* 1:Enable Transmit Parity        */
 204 #define Tx_EnComp              0x00004000 /* 1:Enable Completion             */
 205
 206 /* Tx_Stat bit asign ------------------------------------------------------- */
 207 #define Tx_TxColl_MASK         0x0000000F /* Tx Collision Count              */
 208 #define Tx_ExColl              0x00000010 /* Excessive Collision             */
 209 #define Tx_TXDefer             0x00000020 /* Transmit Defered                */
 210 #define Tx_Paused              0x00000040 /* Transmit Paused                 */
 211 #define Tx_IntTx               0x00000080 /* Interrupt on Tx                 */
 212 #define Tx_Under               0x00000100 /* Underrun                        */
 213 #define Tx_Defer               0x00000200 /* Deferral                        */
 214 #define Tx_NCarr               0x00000400 /* No Carrier                      */
 215 #define Tx_10Stat              0x00000800 /* 10Mbps Status                   */
 216 #define Tx_LateColl            0x00001000 /* Late Collision                  */
 217 #define Tx_TxPar               0x00002000 /* Tx Parity Error                 */
 218 #define Tx_Comp                0x00004000 /* Completion                      */
 219 #define Tx_Halted              0x00008000 /* Tx Halted                       */
 220 #define Tx_SQErr               0x00010000 /* Signal Quality Error(SQE)       */
 221
 222 /* Rx_Ctl bit asign -------------------------------------------------------- */
 223 #define Rx_EnGood              0x00004000 /* 1:Enable Good                   */
 224 #define Rx_EnRxPar             0x00002000 /* 1:Enable Receive Parity         */
 225 #define Rx_EnLongErr           0x00000800 /* 1:Enable Long Error             */
 226 #define Rx_EnOver              0x00000400 /* 1:Enable OverFlow               */
 227 #define Rx_EnCRCErr            0x00000200 /* 1:Enable CRC Error              */
 228 #define Rx_EnAlign             0x00000100 /* 1:Enable Alignment              */
 229 #define Rx_IgnoreCRC           0x00000040 /* 1:Ignore CRC Value              */
 230 #define Rx_StripCRC            0x00000010 /* 1:Strip CRC Value               */
 231 #define Rx_ShortEn             0x00000008 /* 1:Short Enable                  */
 232 #define Rx_LongEn              0x00000004 /* 1:Long Enable                   */
 233 #define Rx_RxHalt              0x00000002 /* 1:Receive Halt Request          */
 234 #define Rx_RxEn                0x00000001 /* 1:Receive Intrrupt Enable       */
 235
 236 /* Rx_Stat bit asign ------------------------------------------------------- */
 237 #define Rx_Halted              0x00008000 /* Rx Halted                       */
 238 #define Rx_Good                0x00004000 /* Rx Good                         */
 239 #define Rx_RxPar               0x00002000 /* Rx Parity Error                 */
 240 #define Rx_TypePkt             0x00001000 /* Rx Type Packet                  */
 241 #define Rx_LongErr             0x00000800 /* Rx Long Error                   */
 242 #define Rx_Over                0x00000400 /* Rx Overflow                     */
 243 #define Rx_CRCErr              0x00000200 /* Rx CRC Error                    */
 244 #define Rx_Align               0x00000100 /* Rx Alignment Error              */
 245 #define Rx_10Stat              0x00000080 /* Rx 10Mbps Status                */
 246 #define Rx_IntRx               0x00000040 /* Rx Interrupt                    */
 247 #define Rx_CtlRecd             0x00000020 /* Rx Control Receive              */
 248 #define Rx_InLenErr            0x00000010 /* Rx In Range Frame Length Error  */
 249
 250 #define Rx_Stat_Mask           0x0000FFF0 /* Rx All Status Mask              */
 251
 252 /* Int_En bit asign -------------------------------------------------------- */
 253 #define Int_NRAbtEn            0x00000800 /* 1:Non-recoverable Abort Enable  */
 254 #define Int_TxCtlCmpEn         0x00000400 /* 1:Transmit Ctl Complete Enable  */
 255 #define Int_DmParErrEn         0x00000200 /* 1:DMA Parity Error Enable       */
 256 #define Int_DParDEn            0x00000100 /* 1:Data Parity Error Enable      */
 257 #define Int_EarNotEn           0x00000080 /* 1:Early Notify Enable           */
 258 #define Int_DParErrEn          0x00000040 /* 1:Detected Parity Error Enable  */
 259 #define Int_SSysErrEn          0x00000020 /* 1:Signalled System Error Enable */
 260 #define Int_RMasAbtEn          0x00000010 /* 1:Received Master Abort Enable  */
 261 #define Int_RTargAbtEn         0x00000008 /* 1:Received Target Abort Enable  */
 262 #define Int_STargAbtEn         0x00000004 /* 1:Signalled Target Abort Enable */
 263 #define Int_BLExEn             0x00000002 /* 1:Buffer List Exhausted Enable  */
 264 #define Int_FDAExEn            0x00000001 /* 1:Free Descriptor Area          */
 265                                           /*               Exhausted Enable  */
 266
 267 /* Int_Src bit asign ------------------------------------------------------- */
 268 #define Int_NRabt              0x00004000 /* 1:Non Recoverable error         */
 269 #define Int_DmParErrStat       0x00002000 /* 1:DMA Parity Error & Clear      */
 270 #define Int_BLEx               0x00001000 /* 1:Buffer List Empty & Clear     */
 271 #define Int_FDAEx              0x00000800 /* 1:FDA Empty & Clear             */
 272 #define Int_IntNRAbt           0x00000400 /* 1:Non Recoverable Abort         */
 273 #define Int_IntCmp             0x00000200 /* 1:MAC control packet complete   */
 274 #define Int_IntExBD            0x00000100 /* 1:Interrupt Extra BD & Clear    */
 275 #define Int_DmParErr           0x00000080 /* 1:DMA Parity Error & Clear      */
 276 #define Int_IntEarNot          0x00000040 /* 1:Receive Data write & Clear    */
 277 #define Int_SWInt              0x00000020 /* 1:Software request & Clear      */
 278 #define Int_IntBLEx            0x00000010 /* 1:Buffer List Empty & Clear     */
 279 #define Int_IntFDAEx           0x00000008 /* 1:FDA Empty & Clear             */
 280 #define Int_IntPCI             0x00000004 /* 1:PCI controller & Clear        */
 281 #define Int_IntMacRx           0x00000002 /* 1:Rx controller & Clear         */
 282 #define Int_IntMacTx           0x00000001 /* 1:Tx controller & Clear         */
 283
 284 /* MD_CA bit asign --------------------------------------------------------- */
 285 #define MD_CA_PreSup           0x00001000 /* 1:Preamble Supress              */
 286 #define MD_CA_Busy             0x00000800 /* 1:Busy (Start Operation)        */
 287 #define MD_CA_Wr               0x00000400 /* 1:Write 0:Read                  */
 288
 289
 290 /*
 291  * Descriptors
 292  */
 293
 294 /* Frame descripter */
 295 struct FDesc {
 296         volatile __u32 FDNext;
 297         volatile __u32 FDSystem;
 298         volatile __u32 FDStat;
 299         volatile __u32 FDCtl;
 300 };
 301
 302 /* Buffer descripter */
 303 struct BDesc {
 304         volatile __u32 BuffData;
 305         volatile __u32 BDCtl;
 306 };
 307
 308 #define FD_ALIGN        16
 309
 310 /* Frame Descripter bit asign ---------------------------------------------- */
 311 #define FD_FDLength_MASK       0x0000FFFF /* Length MASK                     */
 312 #define FD_BDCnt_MASK          0x001F0000 /* BD count MASK in FD             */
 313 #define FD_FrmOpt_MASK         0x7C000000 /* Frame option MASK               */
 314 #define FD_FrmOpt_BigEndian    0x40000000 /* Tx/Rx */
 315 #define FD_FrmOpt_IntTx        0x20000000 /* Tx only */
 316 #define FD_FrmOpt_NoCRC        0x10000000 /* Tx only */
 317 #define FD_FrmOpt_NoPadding    0x08000000 /* Tx only */
 318 #define FD_FrmOpt_Packing      0x04000000 /* Rx only */
 319 #define FD_CownsFD             0x80000000 /* FD Controller owner bit         */
 320 #define FD_Next_EOL            0x00000001 /* FD EOL indicator                */
 321 #define FD_BDCnt_SHIFT         16
 322
 323 /* Buffer Descripter bit asign --------------------------------------------- */
 324 #define BD_BuffLength_MASK     0x0000FFFF /* Recieve Data Size               */
 325 #define BD_RxBDID_MASK         0x00FF0000 /* BD ID Number MASK               */
 326 #define BD_RxBDSeqN_MASK       0x7F000000 /* Rx BD Sequence Number           */
 327 #define BD_CownsBD             0x80000000 /* BD Controller owner bit         */
 328 #define BD_RxBDID_SHIFT        16
 329 #define BD_RxBDSeqN_SHIFT      24
 330
 331
 332 /* Some useful constants. */
 333 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
 334
 335 #ifdef NO_CHECK_CARRIER
 336 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 337         Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
 338         Tx_En)  /* maybe  0x7b01 */
 339 #else
 340 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 341         Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
 342         Tx_En)  /* maybe  0x7b01 */
 343 #endif
 344 /* Do not use Rx_StripCRC -- it causes trouble on BLEx/FDAEx condition */
 345 #define RX_CTL_CMD      (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
 346         | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
 347 #define INT_EN_CMD  (Int_NRAbtEn | \
 348         Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
 349         Int_SSysErrEn  | Int_RMasAbtEn | Int_RTargAbtEn | \
 350         Int_STargAbtEn | \
 351         Int_BLExEn  | Int_FDAExEn) /* maybe 0xb7f*/
 352 #define DMA_CTL_CMD     DMA_BURST_SIZE
 353 #define HAVE_DMA_RXALIGN(lp)    likely((lp)->chiptype != TC35815CF)
 354
 355 /* Tuning parameters */
 356 #define DMA_BURST_SIZE  32
 357 #define TX_THRESHOLD    1024
 358 /* used threshold with packet max byte for low pci transfer ability.*/
 359 #define TX_THRESHOLD_MAX 1536
 360 /* setting threshold max value when overrun error occured this count. */
 361 #define TX_THRESHOLD_KEEP_LIMIT 10
 362
 363 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
 364 #ifdef TC35815_USE_PACKEDBUFFER
 365 #define FD_PAGE_NUM 2
 366 #define RX_BUF_NUM      8       /* >= 2 */
 367 #define RX_FD_NUM       250     /* >= 32 */
 368 #define TX_FD_NUM       128
 369 #define RX_BUF_SIZE     PAGE_SIZE
 370 #else /* TC35815_USE_PACKEDBUFFER */
 371 #define FD_PAGE_NUM 4
 372 #define RX_BUF_NUM      128     /* < 256 */
 373 #define RX_FD_NUM       256     /* >= 32 */
 374 #define TX_FD_NUM       128
 375 #if RX_CTL_CMD & Rx_LongEn
 376 #define RX_BUF_SIZE     PAGE_SIZE
 377 #elif RX_CTL_CMD & Rx_StripCRC
 378 #define RX_BUF_SIZE     \
 379         L1_CACHE_ALIGN(ETH_FRAME_LEN + VLAN_HLEN + NET_IP_ALIGN)
 380 #else
 381 #define RX_BUF_SIZE     \
 382         L1_CACHE_ALIGN(ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN + NET_IP_ALIGN)
 383 #endif
 384 #endif /* TC35815_USE_PACKEDBUFFER */
 385 #define RX_FD_RESERVE   (2 / 2) /* max 2 BD per RxFD */
 386 #define NAPI_WEIGHT     16
 387
 388 struct TxFD {
 389         struct FDesc fd;
 390         struct BDesc bd;
 391         struct BDesc unused;
 392 };
 393
 394 struct RxFD {
 395         struct FDesc fd;
 396         struct BDesc bd[0];     /* variable length */
 397 };
 398
 399 struct FrFD {
 400         struct FDesc fd;
 401         struct BDesc bd[RX_BUF_NUM];
 402 };
 403
 404
 405 #define tc_readl(addr)  ioread32(addr)
 406 #define tc_writel(d, addr)      iowrite32(d, addr)
 407
 408 #define TC35815_TX_TIMEOUT  msecs_to_jiffies(400)
 409
 410 /* Information that need to be kept for each controller. */
 411 struct tc35815_local {
 412         struct pci_dev *pci_dev;
 413
 414         struct net_device *dev;
 415         struct napi_struct napi;
 416
 417         /* statistics */
 418         struct {
 419                 int max_tx_qlen;
 420                 int tx_ints;
 421                 int rx_ints;
 422                 int tx_underrun;
 423         } lstats;
 424
 425         /* Tx control lock.  This protects the transmit buffer ring
 426          * state along with the "tx full" state of the driver.  This
 427          * means all netif_queue flow control actions are protected
 428          * by this lock as well.
 429          */
 430         spinlock_t lock;
 431
 432         struct mii_bus *mii_bus;
 433         struct phy_device *phy_dev;
 434         int duplex;
 435         int speed;
 436         int link;
 437         struct work_struct restart_work;
 438
 439         /*
 440          * Transmitting: Batch Mode.
 441          *      1 BD in 1 TxFD.
 442          * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
 443          *      1 circular FD for Free Buffer List.
 444          *      RX_BUF_NUM BD in Free Buffer FD.
 445          *      One Free Buffer BD has PAGE_SIZE data buffer.
 446          * Or Non-Packing Mode.
 447          *      1 circular FD for Free Buffer List.
 448          *      RX_BUF_NUM BD in Free Buffer FD.
 449          *      One Free Buffer BD has ETH_FRAME_LEN data buffer.
 450          */
 451         void *fd_buf;   /* for TxFD, RxFD, FrFD */
 452         dma_addr_t fd_buf_dma;
 453         struct TxFD *tfd_base;
 454         unsigned int tfd_start;
 455         unsigned int tfd_end;
 456         struct RxFD *rfd_base;
 457         struct RxFD *rfd_limit;
 458         struct RxFD *rfd_cur;
 459         struct FrFD *fbl_ptr;
 460 #ifdef TC35815_USE_PACKEDBUFFER
 461         unsigned char fbl_curid;
 462         void *data_buf[RX_BUF_NUM];             /* packing */
 463         dma_addr_t data_buf_dma[RX_BUF_NUM];
 464         struct {
 465                 struct sk_buff *skb;
 466                 dma_addr_t skb_dma;
 467         } tx_skbs[TX_FD_NUM];
 468 #else
 469         unsigned int fbl_count;
 470         struct {
 471                 struct sk_buff *skb;
 472                 dma_addr_t skb_dma;
 473         } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
 474 #endif
 475         u32 msg_enable;
 476         enum tc35815_chiptype chiptype;
 477 };
 478
 479 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
 480 {
 481         return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
 482 }
 483 #ifdef DEBUG
 484 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 485 {
 486         return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
 487 }
 488 #endif
 489 #ifdef TC35815_USE_PACKEDBUFFER
 490 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 491 {
 492         int i;
 493         for (i = 0; i < RX_BUF_NUM; i++) {
 494                 if (bus >= lp->data_buf_dma[i] &&
 495                     bus < lp->data_buf_dma[i] + PAGE_SIZE)
 496                         return (void *)((u8 *)lp->data_buf[i] +
 497                                         (bus - lp->data_buf_dma[i]));
 498         }
 499         return NULL;
 500 }
 501
 502 #define TC35815_DMA_SYNC_ONDEMAND
 503 static void *alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
 504 {
 505 #ifdef TC35815_DMA_SYNC_ONDEMAND
 506         void *buf;
 507         /* pci_map + pci_dma_sync will be more effective than
 508          * pci_alloc_consistent on some archs. */
 509         buf = (void *)__get_free_page(GFP_ATOMIC);
 510         if (!buf)
 511                 return NULL;
 512         *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
 513                                      PCI_DMA_FROMDEVICE);
 514         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
 515                 free_page((unsigned long)buf);
 516                 return NULL;
 517         }
 518         return buf;
 519 #else
 520         return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
 521 #endif
 522 }
 523
 524 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
 525 {
 526 #ifdef TC35815_DMA_SYNC_ONDEMAND
 527         pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
 528         free_page((unsigned long)buf);
 529 #else
 530         pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
 531 #endif
 532 }
 533 #else /* TC35815_USE_PACKEDBUFFER */
 534 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
 535                                        struct pci_dev *hwdev,
 536                                        dma_addr_t *dma_handle)
 537 {
 538         struct sk_buff *skb;
 539         skb = dev_alloc_skb(RX_BUF_SIZE);
 540         if (!skb)
 541                 return NULL;
 542         *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
 543                                      PCI_DMA_FROMDEVICE);
 544         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
 545                 dev_kfree_skb_any(skb);
 546                 return NULL;
 547         }
 548         skb_reserve(skb, 2);    /* make IP header 4byte aligned */
 549         return skb;
 550 }
 551
 552 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
 553 {
 554         pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
 555                          PCI_DMA_FROMDEVICE);
 556         dev_kfree_skb_any(skb);
 557 }
 558 #endif /* TC35815_USE_PACKEDBUFFER */
 559
 560 /* Index to functions, as function prototypes. */
 561
 562 static int      tc35815_open(struct net_device *dev);
 563 static int      tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
 564 static irqreturn_t      tc35815_interrupt(int irq, void *dev_id);
 565 #ifdef TC35815_NAPI
 566 static int      tc35815_rx(struct net_device *dev, int limit);
 567 static int      tc35815_poll(struct napi_struct *napi, int budget);
 568 #else
 569 static void     tc35815_rx(struct net_device *dev);
 570 #endif
 571 static void     tc35815_txdone(struct net_device *dev);
 572 static int      tc35815_close(struct net_device *dev);
 573 static struct   net_device_stats *tc35815_get_stats(struct net_device *dev);
 574 static void     tc35815_set_multicast_list(struct net_device *dev);
 575 static void     tc35815_tx_timeout(struct net_device *dev);
 576 static int      tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 577 #ifdef CONFIG_NET_POLL_CONTROLLER
 578 static void     tc35815_poll_controller(struct net_device *dev);
 579 #endif
 580 static const struct ethtool_ops tc35815_ethtool_ops;
 581
 582 /* Example routines you must write ;->. */
 583 static void     tc35815_chip_reset(struct net_device *dev);
 584 static void     tc35815_chip_init(struct net_device *dev);
 585
 586 #ifdef DEBUG
 587 static void     panic_queues(struct net_device *dev);
 588 #endif
 589
 590 static void tc35815_restart_work(struct work_struct *work);
 591
 592 static int tc_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 593 {
 594         struct net_device *dev = bus->priv;
 595         struct tc35815_regs __iomem *tr =
 596                 (struct tc35815_regs __iomem *)dev->base_addr;
 597         unsigned long timeout = jiffies + 10;
 598
 599         tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA);
 600         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 601                 if (time_after(jiffies, timeout))
 602                         return -EIO;
 603                 cpu_relax();
 604         }
 605         return tc_readl(&tr->MD_Data) & 0xffff;
 606 }
 607
 608 static int tc_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 val)
 609 {
 610         struct net_device *dev = bus->priv;
 611         struct tc35815_regs __iomem *tr =
 612                 (struct tc35815_regs __iomem *)dev->base_addr;
 613         unsigned long timeout = jiffies + 10;
 614
 615         tc_writel(val, &tr->MD_Data);
 616         tc_writel(MD_CA_Busy | MD_CA_Wr | (mii_id << 5) | (regnum & 0x1f),
 617                   &tr->MD_CA);
 618         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 619                 if (time_after(jiffies, timeout))
 620                         return -EIO;
 621                 cpu_relax();
 622         }
 623         return 0;
 624 }
 625
 626 static void tc_handle_link_change(struct net_device *dev)
 627 {
 628         struct tc35815_local *lp = netdev_priv(dev);
 629         struct phy_device *phydev = lp->phy_dev;
 630         unsigned long flags;
 631         int status_change = 0;
 632
 633         spin_lock_irqsave(&lp->lock, flags);
 634         if (phydev->link &&
 635             (lp->speed != phydev->speed || lp->duplex != phydev->duplex)) {
 636                 struct tc35815_regs __iomem *tr =
 637                         (struct tc35815_regs __iomem *)dev->base_addr;
 638                 u32 reg;
 639
 640                 reg = tc_readl(&tr->MAC_Ctl);
 641                 reg |= MAC_HaltReq;
 642                 tc_writel(reg, &tr->MAC_Ctl);
 643                 if (phydev->duplex == DUPLEX_FULL)
 644                         reg |= MAC_FullDup;
 645                 else
 646                         reg &= ~MAC_FullDup;
 647                 tc_writel(reg, &tr->MAC_Ctl);
 648                 reg &= ~MAC_HaltReq;
 649                 tc_writel(reg, &tr->MAC_Ctl);
 650
 651                 /*
 652                  * TX4939 PCFG.SPEEDn bit will be changed on
 653                  * NETDEV_CHANGE event.
 654                  */
 655
 656 #if !defined(NO_CHECK_CARRIER) && defined(WORKAROUND_LOSTCAR)
 657                 /*
 658                  * WORKAROUND: enable LostCrS only if half duplex
 659                  * operation.
 660                  * (TX4939 does not have EnLCarr)
 661                  */
 662                 if (phydev->duplex == DUPLEX_HALF &&
 663                     lp->chiptype != TC35815_TX4939)
 664                         tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr,
 665                                   &tr->Tx_Ctl);
 666 #endif
 667
 668                 lp->speed = phydev->speed;
 669                 lp->duplex = phydev->duplex;
 670                 status_change = 1;
 671         }
 672
 673         if (phydev->link != lp->link) {
 674                 if (phydev->link) {
 675 #ifdef WORKAROUND_100HALF_PROMISC
 676                         /* delayed promiscuous enabling */
 677                         if (dev->flags & IFF_PROMISC)
 678                                 tc35815_set_multicast_list(dev);
 679 #endif
 680                 } else {
 681                         lp->speed = 0;
 682                         lp->duplex = -1;
 683                 }
 684                 lp->link = phydev->link;
 685
 686                 status_change = 1;
 687         }
 688         spin_unlock_irqrestore(&lp->lock, flags);
 689
 690         if (status_change && netif_msg_link(lp)) {
 691                 phy_print_status(phydev);
 692                 pr_debug("%s: MII BMCR %04x BMSR %04x LPA %04x\n",
 693                          dev->name,
 694                          phy_read(phydev, MII_BMCR),
 695                          phy_read(phydev, MII_BMSR),
 696                          phy_read(phydev, MII_LPA));
 697         }
 698 }
 699
 700 static int tc_mii_probe(struct net_device *dev)
 701 {
 702         struct tc35815_local *lp = netdev_priv(dev);
 703         struct phy_device *phydev = NULL;
 704         int phy_addr;
 705         u32 dropmask;
 706
 707         /* find the first phy */
 708         for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
 709                 if (lp->mii_bus->phy_map[phy_addr]) {
 710                         if (phydev) {
 711                                 printk(KERN_ERR "%s: multiple PHYs found\n",
 712                                        dev->name);
 713                                 return -EINVAL;
 714                         }
 715                         phydev = lp->mii_bus->phy_map[phy_addr];
 716                         break;
 717                 }
 718         }
 719
 720         if (!phydev) {
 721                 printk(KERN_ERR "%s: no PHY found\n", dev->name);
 722                 return -ENODEV;
 723         }
 724
 725         /* attach the mac to the phy */
 726         phydev = phy_connect(dev, dev_name(&phydev->dev),
 727                              &tc_handle_link_change, 0,
 728                              lp->chiptype == TC35815_TX4939 ?
 729                              PHY_INTERFACE_MODE_RMII : PHY_INTERFACE_MODE_MII);
 730         if (IS_ERR(phydev)) {
 731                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
 732                 return PTR_ERR(phydev);
 733         }
 734         printk(KERN_INFO "%s: attached PHY driver [%s] "
 735                 "(mii_bus:phy_addr=%s, id=%x)\n",
 736                 dev->name, phydev->drv->name, dev_name(&phydev->dev),
 737                 phydev->phy_id);
 738
 739         /* mask with MAC supported features */
 740         phydev->supported &= PHY_BASIC_FEATURES;
 741         dropmask = 0;
 742         if (options.speed == 10)
 743                 dropmask |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
 744         else if (options.speed == 100)
 745                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
 746         if (options.duplex == 1)
 747                 dropmask |= SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full;
 748         else if (options.duplex == 2)
 749                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_100baseT_Half;
 750         phydev->supported &= ~dropmask;
 751         phydev->advertising = phydev->supported;
 752
 753         lp->link = 0;
 754         lp->speed = 0;
 755         lp->duplex = -1;
 756         lp->phy_dev = phydev;
 757
 758         return 0;
 759 }
 760
 761 static int tc_mii_init(struct net_device *dev)
 762 {
 763         struct tc35815_local *lp = netdev_priv(dev);
 764         int err;
 765         int i;
 766
 767         lp->mii_bus = mdiobus_alloc();
 768         if (lp->mii_bus == NULL) {
 769                 err = -ENOMEM;
 770                 goto err_out;
 771         }
 772
 773         lp->mii_bus->name = "tc35815_mii_bus";
 774         lp->mii_bus->read = tc_mdio_read;
 775         lp->mii_bus->write = tc_mdio_write;
 776         snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "%x",
 777                  (lp->pci_dev->bus->number << 8) | lp->pci_dev->devfn);
 778         lp->mii_bus->priv = dev;
 779         lp->mii_bus->parent = &lp->pci_dev->dev;
 780         lp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
 781         if (!lp->mii_bus->irq) {
 782                 err = -ENOMEM;
 783                 goto err_out_free_mii_bus;
 784         }
 785
 786         for (i = 0; i < PHY_MAX_ADDR; i++)
 787                 lp->mii_bus->irq[i] = PHY_POLL;
 788
 789         err = mdiobus_register(lp->mii_bus);
 790         if (err)
 791                 goto err_out_free_mdio_irq;
 792         err = tc_mii_probe(dev);
 793         if (err)
 794                 goto err_out_unregister_bus;
 795         return 0;
 796
 797 err_out_unregister_bus:
 798         mdiobus_unregister(lp->mii_bus);
 799 err_out_free_mdio_irq:
 800         kfree(lp->mii_bus->irq);
 801 err_out_free_mii_bus:
 802         mdiobus_free(lp->mii_bus);
 803 err_out:
 804         return err;
 805 }
 806
 807 #ifdef CONFIG_CPU_TX49XX
 808 /*
 809  * Find a platform_device providing a MAC address.  The platform code
 810  * should provide a "tc35815-mac" device with a MAC address in its
 811  * platform_data.
 812  */
 813 static int __devinit tc35815_mac_match(struct device *dev, void *data)
 814 {
 815         struct platform_device *plat_dev = to_platform_device(dev);
 816         struct pci_dev *pci_dev = data;
 817         unsigned int id = pci_dev->irq;
 818         return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
 819 }
 820
 821 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 822 {
 823         struct tc35815_local *lp = netdev_priv(dev);
 824         struct device *pd = bus_find_device(&platform_bus_type, NULL,
 825                                             lp->pci_dev, tc35815_mac_match);
 826         if (pd) {
 827                 if (pd->platform_data)
 828                         memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
 829                 put_device(pd);
 830                 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
 831         }
 832         return -ENODEV;
 833 }
 834 #else
 835 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 836 {
 837         return -ENODEV;
 838 }
 839 #endif
 840
 841 static int __devinit tc35815_init_dev_addr(struct net_device *dev)
 842 {
 843         struct tc35815_regs __iomem *tr =
 844                 (struct tc35815_regs __iomem *)dev->base_addr;
 845         int i;
 846
 847         while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 848                 ;
 849         for (i = 0; i < 6; i += 2) {
 850                 unsigned short data;
 851                 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
 852                 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 853                         ;
 854                 data = tc_readl(&tr->PROM_Data);
 855                 dev->dev_addr[i] = data & 0xff;
 856                 dev->dev_addr[i+1] = data >> 8;
 857         }
 858         if (!is_valid_ether_addr(dev->dev_addr))
 859                 return tc35815_read_plat_dev_addr(dev);
 860         return 0;
 861 }
 862
 863 static const struct net_device_ops tc35815_netdev_ops = {
 864         .ndo_open               = tc35815_open,
 865         .ndo_stop               = tc35815_close,
 866         .ndo_start_xmit         = tc35815_send_packet,
 867         .ndo_get_stats          = tc35815_get_stats,
 868         .ndo_set_multicast_list = tc35815_set_multicast_list,
 869         .ndo_tx_timeout         = tc35815_tx_timeout,
 870         .ndo_do_ioctl           = tc35815_ioctl,
 871         .ndo_validate_addr      = eth_validate_addr,
 872         .ndo_change_mtu         = eth_change_mtu,
 873         .ndo_set_mac_address    = eth_mac_addr,
 874 #ifdef CONFIG_NET_POLL_CONTROLLER
 875         .ndo_poll_controller    = tc35815_poll_controller,
 876 #endif
 877 };
 878
 879 static int __devinit tc35815_init_one(struct pci_dev *pdev,
 880                                       const struct pci_device_id *ent)
 881 {
 882         void __iomem *ioaddr = NULL;
 883         struct net_device *dev;
 884         struct tc35815_local *lp;
 885         int rc;
 886
 887         static int printed_version;
 888         if (!printed_version++) {
 889                 printk(version);
 890                 dev_printk(KERN_DEBUG, &pdev->dev,
 891                            "speed:%d duplex:%d\n",
 892                            options.speed, options.duplex);
 893         }
 894
 895         if (!pdev->irq) {
 896                 dev_warn(&pdev->dev, "no IRQ assigned.\n");
 897                 return -ENODEV;
 898         }
 899
 900         /* dev zeroed in alloc_etherdev */
 901         dev = alloc_etherdev(sizeof(*lp));
 902         if (dev == NULL) {
 903                 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
 904                 return -ENOMEM;
 905         }
 906         SET_NETDEV_DEV(dev, &pdev->dev);
 907         lp = netdev_priv(dev);
 908         lp->dev = dev;
 909
 910         /* enable device (incl. PCI PM wakeup), and bus-mastering */
 911         rc = pcim_enable_device(pdev);
 912         if (rc)
 913                 goto err_out;
 914         rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
 915         if (rc)
 916                 goto err_out;
 917         pci_set_master(pdev);
 918         ioaddr = pcim_iomap_table(pdev)[1];
 919
 920         /* Initialize the device structure. */
 921         dev->netdev_ops = &tc35815_netdev_ops;
 922         dev->ethtool_ops = &tc35815_ethtool_ops;
 923         dev->watchdog_timeo = TC35815_TX_TIMEOUT;
 924 #ifdef TC35815_NAPI
 925         netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
 926 #endif
 927
 928         dev->irq = pdev->irq;
 929         dev->base_addr = (unsigned long)ioaddr;
 930
 931         INIT_WORK(&lp->restart_work, tc35815_restart_work);
 932         spin_lock_init(&lp->lock);
 933         lp->pci_dev = pdev;
 934         lp->chiptype = ent->driver_data;
 935
 936         lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
 937         pci_set_drvdata(pdev, dev);
 938
 939         /* Soft reset the chip. */
 940         tc35815_chip_reset(dev);
 941
 942         /* Retrieve the ethernet address. */
 943         if (tc35815_init_dev_addr(dev)) {
 944                 dev_warn(&pdev->dev, "not valid ether addr\n");
 945                 random_ether_addr(dev->dev_addr);
 946         }
 947
 948         rc = register_netdev(dev);
 949         if (rc)
 950                 goto err_out;
 951
 952         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 953         printk(KERN_INFO "%s: %s at 0x%lx, %pM, IRQ %d\n",
 954                 dev->name,
 955                 chip_info[ent->driver_data].name,
 956                 dev->base_addr,
 957                 dev->dev_addr,
 958                 dev->irq);
 959
 960         rc = tc_mii_init(dev);
 961         if (rc)
 962                 goto err_out_unregister;
 963
 964         return 0;
 965
 966 err_out_unregister:
 967         unregister_netdev(dev);
 968 err_out:
 969         free_netdev(dev);
 970         return rc;
 971 }
 972
 973
 974 static void __devexit tc35815_remove_one(struct pci_dev *pdev)
 975 {
 976         struct net_device *dev = pci_get_drvdata(pdev);
 977         struct tc35815_local *lp = netdev_priv(dev);
 978
 979         phy_disconnect(lp->phy_dev);
 980         mdiobus_unregister(lp->mii_bus);
 981         kfree(lp->mii_bus->irq);
 982         mdiobus_free(lp->mii_bus);
 983         unregister_netdev(dev);
 984         free_netdev(dev);
 985         pci_set_drvdata(pdev, NULL);
 986 }
 987
 988 static int
 989 tc35815_init_queues(struct net_device *dev)
 990 {
 991         struct tc35815_local *lp = netdev_priv(dev);
 992         int i;
 993         unsigned long fd_addr;
 994
 995         if (!lp->fd_buf) {
 996                 BUG_ON(sizeof(struct FDesc) +
 997                        sizeof(struct BDesc) * RX_BUF_NUM +
 998                        sizeof(struct FDesc) * RX_FD_NUM +
 999                        sizeof(struct TxFD) * TX_FD_NUM >
1000                        PAGE_SIZE * FD_PAGE_NUM);
1001
1002                 lp->fd_buf = pci_alloc_consistent(lp->pci_dev,
1003                                                   PAGE_SIZE * FD_PAGE_NUM,
1004                                                   &lp->fd_buf_dma);
1005                 if (!lp->fd_buf)
1006                         return -ENOMEM;
1007                 for (i = 0; i < RX_BUF_NUM; i++) {
1008 #ifdef TC35815_USE_PACKEDBUFFER
1009                         lp->data_buf[i] =
1010                                 alloc_rxbuf_page(lp->pci_dev,
1011                                                  &lp->data_buf_dma[i]);
1012                         if (!lp->data_buf[i]) {
1013                                 while (--i >= 0) {
1014                                         free_rxbuf_page(lp->pci_dev,
1015                                                         lp->data_buf[i],
1016                                                         lp->data_buf_dma[i]);
1017                                         lp->data_buf[i] = NULL;
1018                                 }
1019                                 pci_free_consistent(lp->pci_dev,
1020                                                     PAGE_SIZE * FD_PAGE_NUM,
1021                                                     lp->fd_buf,
1022                                                     lp->fd_buf_dma);
1023                                 lp->fd_buf = NULL;
1024                                 return -ENOMEM;
1025                         }
1026 #else
1027                         lp->rx_skbs[i].skb =
1028                                 alloc_rxbuf_skb(dev, lp->pci_dev,
1029                                                 &lp->rx_skbs[i].skb_dma);
1030                         if (!lp->rx_skbs[i].skb) {
1031                                 while (--i >= 0) {
1032                                         free_rxbuf_skb(lp->pci_dev,
1033                                                        lp->rx_skbs[i].skb,
1034                                                        lp->rx_skbs[i].skb_dma);
1035                                         lp->rx_skbs[i].skb = NULL;
1036                                 }
1037                                 pci_free_consistent(lp->pci_dev,
1038                                                     PAGE_SIZE * FD_PAGE_NUM,
1039                                                     lp->fd_buf,
1040                                                     lp->fd_buf_dma);
1041                                 lp->fd_buf = NULL;
1042                                 return -ENOMEM;
1043                         }
1044 #endif
1045                 }
1046                 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
1047                        dev->name, lp->fd_buf);
1048 #ifdef TC35815_USE_PACKEDBUFFER
1049                 printk(" DataBuf");
1050                 for (i = 0; i < RX_BUF_NUM; i++)
1051                         printk(" %p", lp->data_buf[i]);
1052 #endif
1053                 printk("\n");
1054         } else {
1055                 for (i = 0; i < FD_PAGE_NUM; i++)
1056                         clear_page((void *)((unsigned long)lp->fd_buf +
1057                                             i * PAGE_SIZE));
1058         }
1059         fd_addr = (unsigned long)lp->fd_buf;
1060
1061         /* Free Descriptors (for Receive) */
1062         lp->rfd_base = (struct RxFD *)fd_addr;
1063         fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
1064         for (i = 0; i < RX_FD_NUM; i++)
1065                 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
1066         lp->rfd_cur = lp->rfd_base;
1067         lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
1068
1069         /* Transmit Descriptors */
1070         lp->tfd_base = (struct TxFD *)fd_addr;
1071         fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
1072         for (i = 0; i < TX_FD_NUM; i++) {
1073                 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
1074                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1075                 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
1076         }
1077         lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
1078         lp->tfd_start = 0;
1079         lp->tfd_end = 0;
1080
1081         /* Buffer List (for Receive) */
1082         lp->fbl_ptr = (struct FrFD *)fd_addr;
1083         lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
1084         lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
1085 #ifndef TC35815_USE_PACKEDBUFFER
1086         /*
1087          * move all allocated skbs to head of rx_skbs[] array.
1088          * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
1089          * tc35815_rx() had failed.
1090          */
1091         lp->fbl_count = 0;
1092         for (i = 0; i < RX_BUF_NUM; i++) {
1093                 if (lp->rx_skbs[i].skb) {
1094                         if (i != lp->fbl_count) {
1095                                 lp->rx_skbs[lp->fbl_count].skb =
1096                                         lp->rx_skbs[i].skb;
1097                                 lp->rx_skbs[lp->fbl_count].skb_dma =
1098                                         lp->rx_skbs[i].skb_dma;
1099                         }
1100                         lp->fbl_count++;
1101                 }
1102         }
1103 #endif
1104         for (i = 0; i < RX_BUF_NUM; i++) {
1105 #ifdef TC35815_USE_PACKEDBUFFER
1106                 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
1107 #else
1108                 if (i >= lp->fbl_count) {
1109                         lp->fbl_ptr->bd[i].BuffData = 0;
1110                         lp->fbl_ptr->bd[i].BDCtl = 0;
1111                         continue;
1112                 }
1113                 lp->fbl_ptr->bd[i].BuffData =
1114                         cpu_to_le32(lp->rx_skbs[i].skb_dma);
1115 #endif
1116                 /* BDID is index of FrFD.bd[] */
1117                 lp->fbl_ptr->bd[i].BDCtl =
1118                         cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
1119                                     RX_BUF_SIZE);
1120         }
1121 #ifdef TC35815_USE_PACKEDBUFFER
1122         lp->fbl_curid = 0;
1123 #endif
1124
1125         printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
1126                dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
1127         return 0;
1128 }
1129
1130 static void
1131 tc35815_clear_queues(struct net_device *dev)
1132 {
1133         struct tc35815_local *lp = netdev_priv(dev);
1134         int i;
1135
1136         for (i = 0; i < TX_FD_NUM; i++) {
1137                 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1138                 struct sk_buff *skb =
1139                         fdsystem != 0xffffffff ?
1140                         lp->tx_skbs[fdsystem].skb : NULL;
1141 #ifdef DEBUG
1142                 if (lp->tx_skbs[i].skb != skb) {
1143                         printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1144                         panic_queues(dev);
1145                 }
1146 #else
1147                 BUG_ON(lp->tx_skbs[i].skb != skb);
1148 #endif
1149                 if (skb) {
1150                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1151                         lp->tx_skbs[i].skb = NULL;
1152                         lp->tx_skbs[i].skb_dma = 0;
1153                         dev_kfree_skb_any(skb);
1154                 }
1155                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1156         }
1157
1158         tc35815_init_queues(dev);
1159 }
1160
1161 static void
1162 tc35815_free_queues(struct net_device *dev)
1163 {
1164         struct tc35815_local *lp = netdev_priv(dev);
1165         int i;
1166
1167         if (lp->tfd_base) {
1168                 for (i = 0; i < TX_FD_NUM; i++) {
1169                         u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1170                         struct sk_buff *skb =
1171                                 fdsystem != 0xffffffff ?
1172                                 lp->tx_skbs[fdsystem].skb : NULL;
1173 #ifdef DEBUG
1174                         if (lp->tx_skbs[i].skb != skb) {
1175                                 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1176                                 panic_queues(dev);
1177                         }
1178 #else
1179                         BUG_ON(lp->tx_skbs[i].skb != skb);
1180 #endif
1181                         if (skb) {
1182                                 dev_kfree_skb(skb);
1183                                 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1184                                 lp->tx_skbs[i].skb = NULL;
1185                                 lp->tx_skbs[i].skb_dma = 0;
1186                         }
1187                         lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1188                 }
1189         }
1190
1191         lp->rfd_base = NULL;
1192         lp->rfd_limit = NULL;
1193         lp->rfd_cur = NULL;
1194         lp->fbl_ptr = NULL;
1195
1196         for (i = 0; i < RX_BUF_NUM; i++) {
1197 #ifdef TC35815_USE_PACKEDBUFFER
1198                 if (lp->data_buf[i]) {
1199                         free_rxbuf_page(lp->pci_dev,
1200                                         lp->data_buf[i], lp->data_buf_dma[i]);
1201                         lp->data_buf[i] = NULL;
1202                 }
1203 #else
1204                 if (lp->rx_skbs[i].skb) {
1205                         free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1206                                        lp->rx_skbs[i].skb_dma);
1207                         lp->rx_skbs[i].skb = NULL;
1208                 }
1209 #endif
1210         }
1211         if (lp->fd_buf) {
1212                 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1213                                     lp->fd_buf, lp->fd_buf_dma);
1214                 lp->fd_buf = NULL;
1215         }
1216 }
1217
1218 static void
1219 dump_txfd(struct TxFD *fd)
1220 {
1221         printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1222                le32_to_cpu(fd->fd.FDNext),
1223                le32_to_cpu(fd->fd.FDSystem),
1224                le32_to_cpu(fd->fd.FDStat),
1225                le32_to_cpu(fd->fd.FDCtl));
1226         printk("BD: ");
1227         printk(" %08x %08x",
1228                le32_to_cpu(fd->bd.BuffData),
1229                le32_to_cpu(fd->bd.BDCtl));
1230         printk("\n");
1231 }
1232
1233 static int
1234 dump_rxfd(struct RxFD *fd)
1235 {
1236         int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1237         if (bd_count > 8)
1238                 bd_count = 8;
1239         printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1240                le32_to_cpu(fd->fd.FDNext),
1241                le32_to_cpu(fd->fd.FDSystem),
1242                le32_to_cpu(fd->fd.FDStat),
1243                le32_to_cpu(fd->fd.FDCtl));
1244         if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1245                 return 0;
1246         printk("BD: ");
1247         for (i = 0; i < bd_count; i++)
1248                 printk(" %08x %08x",
1249                        le32_to_cpu(fd->bd[i].BuffData),
1250                        le32_to_cpu(fd->bd[i].BDCtl));
1251         printk("\n");
1252         return bd_count;
1253 }
1254
1255 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1256 static void
1257 dump_frfd(struct FrFD *fd)
1258 {
1259         int i;
1260         printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1261                le32_to_cpu(fd->fd.FDNext),
1262                le32_to_cpu(fd->fd.FDSystem),
1263                le32_to_cpu(fd->fd.FDStat),
1264                le32_to_cpu(fd->fd.FDCtl));
1265         printk("BD: ");
1266         for (i = 0; i < RX_BUF_NUM; i++)
1267                 printk(" %08x %08x",
1268                        le32_to_cpu(fd->bd[i].BuffData),
1269                        le32_to_cpu(fd->bd[i].BDCtl));
1270         printk("\n");
1271 }
1272 #endif
1273
1274 #ifdef DEBUG
1275 static void
1276 panic_queues(struct net_device *dev)
1277 {
1278         struct tc35815_local *lp = netdev_priv(dev);
1279         int i;
1280
1281         printk("TxFD base %p, start %u, end %u\n",
1282                lp->tfd_base, lp->tfd_start, lp->tfd_end);
1283         printk("RxFD base %p limit %p cur %p\n",
1284                lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1285         printk("FrFD %p\n", lp->fbl_ptr);
1286         for (i = 0; i < TX_FD_NUM; i++)
1287                 dump_txfd(&lp->tfd_base[i]);
1288         for (i = 0; i < RX_FD_NUM; i++) {
1289                 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1290                 i += (bd_count + 1) / 2;        /* skip BDs */
1291         }
1292         dump_frfd(lp->fbl_ptr);
1293         panic("%s: Illegal queue state.", dev->name);
1294 }
1295 #endif
1296
1297 static void print_eth(const u8 *add)
1298 {
1299         printk(KERN_DEBUG "print_eth(%p)\n", add);
1300         printk(KERN_DEBUG " %pM => %pM : %02x%02x\n",
1301                 add + 6, add, add[12], add[13]);
1302 }
1303
1304 static int tc35815_tx_full(struct net_device *dev)
1305 {
1306         struct tc35815_local *lp = netdev_priv(dev);
1307         return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1308 }
1309
1310 static void tc35815_restart(struct net_device *dev)
1311 {
1312         struct tc35815_local *lp = netdev_priv(dev);
1313
1314         if (lp->phy_dev) {
1315                 int timeout;
1316
1317                 phy_write(lp->phy_dev, MII_BMCR, BMCR_RESET);
1318                 timeout = 100;
1319                 while (--timeout) {
1320                         if (!(phy_read(lp->phy_dev, MII_BMCR) & BMCR_RESET))
1321                                 break;
1322                         udelay(1);
1323                 }
1324                 if (!timeout)
1325                         printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1326         }
1327
1328         spin_lock_irq(&lp->lock);
1329         tc35815_chip_reset(dev);
1330         tc35815_clear_queues(dev);
1331         tc35815_chip_init(dev);
1332         /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1333         tc35815_set_multicast_list(dev);
1334         spin_unlock_irq(&lp->lock);
1335
1336         netif_wake_queue(dev);
1337 }
1338
1339 static void tc35815_restart_work(struct work_struct *work)
1340 {
1341         struct tc35815_local *lp =
1342                 container_of(work, struct tc35815_local, restart_work);
1343         struct net_device *dev = lp->dev;
1344
1345         tc35815_restart(dev);
1346 }
1347
1348 static void tc35815_schedule_restart(struct net_device *dev)
1349 {
1350         struct tc35815_local *lp = netdev_priv(dev);
1351         struct tc35815_regs __iomem *tr =
1352                 (struct tc35815_regs __iomem *)dev->base_addr;
1353
1354         /* disable interrupts */
1355         tc_writel(0, &tr->Int_En);
1356         tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl);
1357         schedule_work(&lp->restart_work);
1358 }
1359
1360 static void tc35815_tx_timeout(struct net_device *dev)
1361 {
1362         struct tc35815_regs __iomem *tr =
1363                 (struct tc35815_regs __iomem *)dev->base_addr;
1364
1365         printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1366                dev->name, tc_readl(&tr->Tx_Stat));
1367
1368         /* Try to restart the adaptor. */
1369         tc35815_schedule_restart(dev);
1370         dev->stats.tx_errors++;
1371 }
1372
1373 /*
1374  * Open/initialize the controller. This is called (in the current kernel)
1375  * sometime after booting when the 'ifconfig' program is run.
1376  *
1377  * This routine should set everything up anew at each open, even
1378  * registers that "should" only need to be set once at boot, so that
1379  * there is non-reboot way to recover if something goes wrong.
1380  */
1381 static int
1382 tc35815_open(struct net_device *dev)
1383 {
1384         struct tc35815_local *lp = netdev_priv(dev);
1385
1386         /*
1387          * This is used if the interrupt line can turned off (shared).
1388          * See 3c503.c for an example of selecting the IRQ at config-time.
1389          */
1390         if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED,
1391                         dev->name, dev))
1392                 return -EAGAIN;
1393
1394         tc35815_chip_reset(dev);
1395
1396         if (tc35815_init_queues(dev) != 0) {
1397                 free_irq(dev->irq, dev);
1398                 return -EAGAIN;
1399         }
1400
1401 #ifdef TC35815_NAPI
1402         napi_enable(&lp->napi);
1403 #endif
1404
1405         /* Reset the hardware here. Don't forget to set the station address. */
1406         spin_lock_irq(&lp->lock);
1407         tc35815_chip_init(dev);
1408         spin_unlock_irq(&lp->lock);
1409
1410         netif_carrier_off(dev);
1411         /* schedule a link state check */
1412         phy_start(lp->phy_dev);
1413
1414         /* We are now ready to accept transmit requeusts from
1415          * the queueing layer of the networking.
1416          */
1417         netif_start_queue(dev);
1418
1419         return 0;
1420 }
1421
1422 /* This will only be invoked if your driver is _not_ in XOFF state.
1423  * What this means is that you need not check it, and that this
1424  * invariant will hold if you make sure that the netif_*_queue()
1425  * calls are done at the proper times.
1426  */
1427 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1428 {
1429         struct tc35815_local *lp = netdev_priv(dev);
1430         struct TxFD *txfd;
1431         unsigned long flags;
1432
1433         /* If some error occurs while trying to transmit this
1434          * packet, you should return '1' from this function.
1435          * In such a case you _may not_ do anything to the
1436          * SKB, it is still owned by the network queueing
1437          * layer when an error is returned.  This means you
1438          * may not modify any SKB fields, you may not free
1439          * the SKB, etc.
1440          */
1441
1442         /* This is the most common case for modern hardware.
1443          * The spinlock protects this code from the TX complete
1444          * hardware interrupt handler.  Queue flow control is
1445          * thus managed under this lock as well.
1446          */
1447         spin_lock_irqsave(&lp->lock, flags);
1448
1449         /* failsafe... (handle txdone now if half of FDs are used) */
1450         if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1451             TX_FD_NUM / 2)
1452                 tc35815_txdone(dev);
1453
1454         if (netif_msg_pktdata(lp))
1455                 print_eth(skb->data);
1456 #ifdef DEBUG
1457         if (lp->tx_skbs[lp->tfd_start].skb) {
1458                 printk("%s: tx_skbs conflict.\n", dev->name);
1459                 panic_queues(dev);
1460         }
1461 #else
1462         BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1463 #endif
1464         lp->tx_skbs[lp->tfd_start].skb = skb;
1465         lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1466
1467         /*add to ring */
1468         txfd = &lp->tfd_base[lp->tfd_start];
1469         txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1470         txfd->bd.BDCtl = cpu_to_le32(skb->len);
1471         txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1472         txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1473
1474         if (lp->tfd_start == lp->tfd_end) {
1475                 struct tc35815_regs __iomem *tr =
1476                         (struct tc35815_regs __iomem *)dev->base_addr;
1477                 /* Start DMA Transmitter. */
1478                 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1479 #ifdef GATHER_TXINT
1480                 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1481 #endif
1482                 if (netif_msg_tx_queued(lp)) {
1483                         printk("%s: starting TxFD.\n", dev->name);
1484                         dump_txfd(txfd);
1485                 }
1486                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1487         } else {
1488                 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1489                 if (netif_msg_tx_queued(lp)) {
1490                         printk("%s: queueing TxFD.\n", dev->name);
1491                         dump_txfd(txfd);
1492                 }
1493         }
1494         lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1495
1496         dev->trans_start = jiffies;
1497
1498         /* If we just used up the very last entry in the
1499          * TX ring on this device, tell the queueing
1500          * layer to send no more.
1501          */
1502         if (tc35815_tx_full(dev)) {
1503                 if (netif_msg_tx_queued(lp))
1504                         printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1505                 netif_stop_queue(dev);
1506         }
1507
1508         /* When the TX completion hw interrupt arrives, this
1509          * is when the transmit statistics are updated.
1510          */
1511
1512         spin_unlock_irqrestore(&lp->lock, flags);
1513         return NETDEV_TX_OK;
1514 }
1515
1516 #define FATAL_ERROR_INT \
1517         (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1518 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1519 {
1520         static int count;
1521         printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1522                dev->name, status);
1523         if (status & Int_IntPCI)
1524                 printk(" IntPCI");
1525         if (status & Int_DmParErr)
1526                 printk(" DmParErr");
1527         if (status & Int_IntNRAbt)
1528                 printk(" IntNRAbt");
1529         printk("\n");
1530         if (count++ > 100)
1531                 panic("%s: Too many fatal errors.", dev->name);
1532         printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1533         /* Try to restart the adaptor. */
1534         tc35815_schedule_restart(dev);
1535 }
1536
1537 #ifdef TC35815_NAPI
1538 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1539 #else
1540 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1541 #endif
1542 {
1543         struct tc35815_local *lp = netdev_priv(dev);
1544         int ret = -1;
1545
1546         /* Fatal errors... */
1547         if (status & FATAL_ERROR_INT) {
1548                 tc35815_fatal_error_interrupt(dev, status);
1549                 return 0;
1550         }
1551         /* recoverable errors */
1552         if (status & Int_IntFDAEx) {
1553                 if (netif_msg_rx_err(lp))
1554                         dev_warn(&dev->dev,
1555                                  "Free Descriptor Area Exhausted (%#x).\n",
1556                                  status);
1557                 dev->stats.rx_dropped++;
1558                 ret = 0;
1559         }
1560         if (status & Int_IntBLEx) {
1561                 if (netif_msg_rx_err(lp))
1562                         dev_warn(&dev->dev,
1563                                  "Buffer List Exhausted (%#x).\n",
1564                                  status);
1565                 dev->stats.rx_dropped++;
1566                 ret = 0;
1567         }
1568         if (status & Int_IntExBD) {
1569                 if (netif_msg_rx_err(lp))
1570                         dev_warn(&dev->dev,
1571                                  "Excessive Buffer Descriptiors (%#x).\n",
1572                                  status);
1573                 dev->stats.rx_length_errors++;
1574                 ret = 0;
1575         }
1576
1577         /* normal notification */
1578         if (status & Int_IntMacRx) {
1579                 /* Got a packet(s). */
1580 #ifdef TC35815_NAPI
1581                 ret = tc35815_rx(dev, limit);
1582 #else
1583                 tc35815_rx(dev);
1584                 ret = 0;
1585 #endif
1586                 lp->lstats.rx_ints++;
1587         }
1588         if (status & Int_IntMacTx) {
1589                 /* Transmit complete. */
1590                 lp->lstats.tx_ints++;
1591                 tc35815_txdone(dev);
1592                 netif_wake_queue(dev);
1593                 ret = 0;
1594         }
1595         return ret;
1596 }
1597
1598 /*
1599  * The typical workload of the driver:
1600  * Handle the network interface interrupts.
1601  */
1602 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1603 {
1604         struct net_device *dev = dev_id;
1605         struct tc35815_local *lp = netdev_priv(dev);
1606         struct tc35815_regs __iomem *tr =
1607                 (struct tc35815_regs __iomem *)dev->base_addr;
1608 #ifdef TC35815_NAPI
1609         u32 dmactl = tc_readl(&tr->DMA_Ctl);
1610
1611         if (!(dmactl & DMA_IntMask)) {
1612                 /* disable interrupts */
1613                 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1614                 if (napi_schedule_prep(&lp->napi))
1615                         __napi_schedule(&lp->napi);
1616                 else {
1617                         printk(KERN_ERR "%s: interrupt taken in poll\n",
1618                                dev->name);
1619                         BUG();
1620                 }
1621                 (void)tc_readl(&tr->Int_Src);   /* flush */
1622                 return IRQ_HANDLED;
1623         }
1624         return IRQ_NONE;
1625 #else
1626         int handled;
1627         u32 status;
1628
1629         spin_lock(&lp->lock);
1630         status = tc_readl(&tr->Int_Src);
1631         /* BLEx, FDAEx will be cleared later */
1632         tc_writel(status & ~(Int_BLEx | Int_FDAEx),
1633                   &tr->Int_Src);        /* write to clear */
1634         handled = tc35815_do_interrupt(dev, status);
1635         if (status & (Int_BLEx | Int_FDAEx))
1636                 tc_writel(status & (Int_BLEx | Int_FDAEx), &tr->Int_Src);
1637         (void)tc_readl(&tr->Int_Src);   /* flush */
1638         spin_unlock(&lp->lock);
1639         return IRQ_RETVAL(handled >= 0);
1640 #endif /* TC35815_NAPI */
1641 }
1642
1643 #ifdef CONFIG_NET_POLL_CONTROLLER
1644 static void tc35815_poll_controller(struct net_device *dev)
1645 {
1646         disable_irq(dev->irq);
1647         tc35815_interrupt(dev->irq, dev);
1648         enable_irq(dev->irq);
1649 }
1650 #endif
1651
1652 /* We have a good packet(s), get it/them out of the buffers. */
1653 #ifdef TC35815_NAPI
1654 static int
1655 tc35815_rx(struct net_device *dev, int limit)
1656 #else
1657 static void
1658 tc35815_rx(struct net_device *dev)
1659 #endif
1660 {
1661         struct tc35815_local *lp = netdev_priv(dev);
1662         unsigned int fdctl;
1663         int i;
1664 #ifdef TC35815_NAPI
1665         int received = 0;
1666 #endif
1667
1668         while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1669                 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1670                 int pkt_len = fdctl & FD_FDLength_MASK;
1671                 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1672 #ifdef DEBUG
1673                 struct RxFD *next_rfd;
1674 #endif
1675 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1676                 pkt_len -= ETH_FCS_LEN;
1677 #endif
1678
1679                 if (netif_msg_rx_status(lp))
1680                         dump_rxfd(lp->rfd_cur);
1681                 if (status & Rx_Good) {
1682                         struct sk_buff *skb;
1683                         unsigned char *data;
1684                         int cur_bd;
1685 #ifdef TC35815_USE_PACKEDBUFFER
1686                         int offset;
1687 #endif
1688
1689 #ifdef TC35815_NAPI
1690                         if (--limit < 0)
1691                                 break;
1692 #endif
1693 #ifdef TC35815_USE_PACKEDBUFFER
1694                         BUG_ON(bd_count > 2);
1695                         skb = dev_alloc_skb(pkt_len + NET_IP_ALIGN);
1696                         if (skb == NULL) {
1697                                 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1698                                        dev->name);
1699                                 dev->stats.rx_dropped++;
1700                                 break;
1701                         }
1702                         skb_reserve(skb, NET_IP_ALIGN);
1703
1704                         data = skb_put(skb, pkt_len);
1705
1706                         /* copy from receive buffer */
1707                         cur_bd = 0;
1708                         offset = 0;
1709                         while (offset < pkt_len && cur_bd < bd_count) {
1710                                 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1711                                         BD_BuffLength_MASK;
1712                                 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1713                                 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1714                                 if (offset + len > pkt_len)
1715                                         len = pkt_len - offset;
1716 #ifdef TC35815_DMA_SYNC_ONDEMAND
1717                                 pci_dma_sync_single_for_cpu(lp->pci_dev,
1718                                                             dma, len,
1719                                                             PCI_DMA_FROMDEVICE);
1720 #endif
1721                                 memcpy(data + offset, rxbuf, len);
1722 #ifdef TC35815_DMA_SYNC_ONDEMAND
1723                                 pci_dma_sync_single_for_device(lp->pci_dev,
1724                                                                dma, len,
1725                                                                PCI_DMA_FROMDEVICE);
1726 #endif
1727                                 offset += len;
1728                                 cur_bd++;
1729                         }
1730 #else /* TC35815_USE_PACKEDBUFFER */
1731                         BUG_ON(bd_count > 1);
1732                         cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1733                                   & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1734 #ifdef DEBUG
1735                         if (cur_bd >= RX_BUF_NUM) {
1736                                 printk("%s: invalid BDID.\n", dev->name);
1737                                 panic_queues(dev);
1738                         }
1739                         BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1740                                (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1741                         if (!lp->rx_skbs[cur_bd].skb) {
1742                                 printk("%s: NULL skb.\n", dev->name);
1743                                 panic_queues(dev);
1744                         }
1745 #else
1746                         BUG_ON(cur_bd >= RX_BUF_NUM);
1747 #endif
1748                         skb = lp->rx_skbs[cur_bd].skb;
1749                         prefetch(skb->data);
1750                         lp->rx_skbs[cur_bd].skb = NULL;
1751                         pci_unmap_single(lp->pci_dev,
1752                                          lp->rx_skbs[cur_bd].skb_dma,
1753                                          RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1754                         if (!HAVE_DMA_RXALIGN(lp) && NET_IP_ALIGN)
1755                                 memmove(skb->data, skb->data - NET_IP_ALIGN,
1756                                         pkt_len);
1757                         data = skb_put(skb, pkt_len);
1758 #endif /* TC35815_USE_PACKEDBUFFER */
1759                         if (netif_msg_pktdata(lp))
1760                                 print_eth(data);
1761                         skb->protocol = eth_type_trans(skb, dev);
1762 #ifdef TC35815_NAPI
1763                         netif_receive_skb(skb);
1764                         received++;
1765 #else
1766                         netif_rx(skb);
1767 #endif
1768                         dev->stats.rx_packets++;
1769                         dev->stats.rx_bytes += pkt_len;
1770                 } else {
1771                         dev->stats.rx_errors++;
1772                         if (netif_msg_rx_err(lp))
1773                                 dev_info(&dev->dev, "Rx error (status %x)\n",
1774                                          status & Rx_Stat_Mask);
1775                         /* WORKAROUND: LongErr and CRCErr means Overflow. */
1776                         if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1777                                 status &= ~(Rx_LongErr|Rx_CRCErr);
1778                                 status |= Rx_Over;
1779                         }
1780                         if (status & Rx_LongErr)
1781                                 dev->stats.rx_length_errors++;
1782                         if (status & Rx_Over)
1783                                 dev->stats.rx_fifo_errors++;
1784                         if (status & Rx_CRCErr)
1785                                 dev->stats.rx_crc_errors++;
1786                         if (status & Rx_Align)
1787                                 dev->stats.rx_frame_errors++;
1788                 }
1789
1790                 if (bd_count > 0) {
1791                         /* put Free Buffer back to controller */
1792                         int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1793                         unsigned char id =
1794                                 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1795 #ifdef DEBUG
1796                         if (id >= RX_BUF_NUM) {
1797                                 printk("%s: invalid BDID.\n", dev->name);
1798                                 panic_queues(dev);
1799                         }
1800 #else
1801                         BUG_ON(id >= RX_BUF_NUM);
1802 #endif
1803                         /* free old buffers */
1804 #ifdef TC35815_USE_PACKEDBUFFER
1805                         while (lp->fbl_curid != id)
1806 #else
1807                         lp->fbl_count--;
1808                         while (lp->fbl_count < RX_BUF_NUM)
1809 #endif
1810                         {
1811 #ifdef TC35815_USE_PACKEDBUFFER
1812                                 unsigned char curid = lp->fbl_curid;
1813 #else
1814                                 unsigned char curid =
1815                                         (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1816 #endif
1817                                 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1818 #ifdef DEBUG
1819                                 bdctl = le32_to_cpu(bd->BDCtl);
1820                                 if (bdctl & BD_CownsBD) {
1821                                         printk("%s: Freeing invalid BD.\n",
1822                                                dev->name);
1823                                         panic_queues(dev);
1824                                 }
1825 #endif
1826                                 /* pass BD to controller */
1827 #ifndef TC35815_USE_PACKEDBUFFER
1828                                 if (!lp->rx_skbs[curid].skb) {
1829                                         lp->rx_skbs[curid].skb =
1830                                                 alloc_rxbuf_skb(dev,
1831                                                                 lp->pci_dev,
1832                                                                 &lp->rx_skbs[curid].skb_dma);
1833                                         if (!lp->rx_skbs[curid].skb)
1834                                                 break; /* try on next reception */
1835                                         bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1836                                 }
1837 #endif /* TC35815_USE_PACKEDBUFFER */
1838                                 /* Note: BDLength was modified by chip. */
1839                                 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1840                                                         (curid << BD_RxBDID_SHIFT) |
1841                                                         RX_BUF_SIZE);
1842 #ifdef TC35815_USE_PACKEDBUFFER
1843                                 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1844                                 if (netif_msg_rx_status(lp)) {
1845                                         printk("%s: Entering new FBD %d\n",
1846                                                dev->name, lp->fbl_curid);
1847                                         dump_frfd(lp->fbl_ptr);
1848                                 }
1849 #else
1850                                 lp->fbl_count++;
1851 #endif
1852                         }
1853                 }
1854
1855                 /* put RxFD back to controller */
1856 #ifdef DEBUG
1857                 next_rfd = fd_bus_to_virt(lp,
1858                                           le32_to_cpu(lp->rfd_cur->fd.FDNext));
1859                 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1860                         printk("%s: RxFD FDNext invalid.\n", dev->name);
1861                         panic_queues(dev);
1862                 }
1863 #endif
1864                 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1865                         /* pass FD to controller */
1866 #ifdef DEBUG
1867                         lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1868 #else
1869                         lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1870 #endif
1871                         lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1872                         lp->rfd_cur++;
1873                 }
1874                 if (lp->rfd_cur > lp->rfd_limit)
1875                         lp->rfd_cur = lp->rfd_base;
1876 #ifdef DEBUG
1877                 if (lp->rfd_cur != next_rfd)
1878                         printk("rfd_cur = %p, next_rfd %p\n",
1879                                lp->rfd_cur, next_rfd);
1880 #endif
1881         }
1882
1883 #ifdef TC35815_NAPI
1884         return received;
1885 #endif
1886 }
1887
1888 #ifdef TC35815_NAPI
1889 static int tc35815_poll(struct napi_struct *napi, int budget)
1890 {
1891         struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
1892         struct net_device *dev = lp->dev;
1893         struct tc35815_regs __iomem *tr =
1894                 (struct tc35815_regs __iomem *)dev->base_addr;
1895         int received = 0, handled;
1896         u32 status;
1897
1898         spin_lock(&lp->lock);
1899         status = tc_readl(&tr->Int_Src);
1900         do {
1901                 /* BLEx, FDAEx will be cleared later */
1902                 tc_writel(status & ~(Int_BLEx | Int_FDAEx),
1903                           &tr->Int_Src);        /* write to clear */
1904
1905                 handled = tc35815_do_interrupt(dev, status, budget - received);
1906                 if (status & (Int_BLEx | Int_FDAEx))
1907                         tc_writel(status & (Int_BLEx | Int_FDAEx),
1908                                   &tr->Int_Src);
1909                 if (handled >= 0) {
1910                         received += handled;
1911                         if (received >= budget)
1912                                 break;
1913                 }
1914                 status = tc_readl(&tr->Int_Src);
1915         } while (status);
1916         spin_unlock(&lp->lock);
1917
1918         if (received < budget) {
1919                 napi_complete(napi);
1920                 /* enable interrupts */
1921                 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1922         }
1923         return received;
1924 }
1925 #endif
1926
1927 #ifdef NO_CHECK_CARRIER
1928 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1929 #else
1930 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1931 #endif
1932
1933 static void
1934 tc35815_check_tx_stat(struct net_device *dev, int status)
1935 {
1936         struct tc35815_local *lp = netdev_priv(dev);
1937         const char *msg = NULL;
1938
1939         /* count collisions */
1940         if (status & Tx_ExColl)
1941                 dev->stats.collisions += 16;
1942         if (status & Tx_TxColl_MASK)
1943                 dev->stats.collisions += status & Tx_TxColl_MASK;
1944
1945 #ifndef NO_CHECK_CARRIER
1946         /* TX4939 does not have NCarr */
1947         if (lp->chiptype == TC35815_TX4939)
1948                 status &= ~Tx_NCarr;
1949 #ifdef WORKAROUND_LOSTCAR
1950         /* WORKAROUND: ignore LostCrS in full duplex operation */
1951         if (!lp->link || lp->duplex == DUPLEX_FULL)
1952                 status &= ~Tx_NCarr;
1953 #endif
1954 #endif
1955
1956         if (!(status & TX_STA_ERR)) {
1957                 /* no error. */
1958                 dev->stats.tx_packets++;
1959                 return;
1960         }
1961
1962         dev->stats.tx_errors++;
1963         if (status & Tx_ExColl) {
1964                 dev->stats.tx_aborted_errors++;
1965                 msg = "Excessive Collision.";
1966         }
1967         if (status & Tx_Under) {
1968                 dev->stats.tx_fifo_errors++;
1969                 msg = "Tx FIFO Underrun.";
1970                 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1971                         lp->lstats.tx_underrun++;
1972                         if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1973                                 struct tc35815_regs __iomem *tr =
1974                                         (struct tc35815_regs __iomem *)dev->base_addr;
1975                                 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1976                                 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1977                         }
1978                 }
1979         }
1980         if (status & Tx_Defer) {
1981                 dev->stats.tx_fifo_errors++;
1982                 msg = "Excessive Deferral.";
1983         }
1984 #ifndef NO_CHECK_CARRIER
1985         if (status & Tx_NCarr) {
1986                 dev->stats.tx_carrier_errors++;
1987                 msg = "Lost Carrier Sense.";
1988         }
1989 #endif
1990         if (status & Tx_LateColl) {
1991                 dev->stats.tx_aborted_errors++;
1992                 msg = "Late Collision.";
1993         }
1994         if (status & Tx_TxPar) {
1995                 dev->stats.tx_fifo_errors++;
1996                 msg = "Transmit Parity Error.";
1997         }
1998         if (status & Tx_SQErr) {
1999                 dev->stats.tx_heartbeat_errors++;
2000                 msg = "Signal Quality Error.";
2001         }
2002         if (msg && netif_msg_tx_err(lp))
2003                 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
2004 }
2005
2006 /* This handles TX complete events posted by the device
2007  * via interrupts.
2008  */
2009 static void
2010 tc35815_txdone(struct net_device *dev)
2011 {
2012         struct tc35815_local *lp = netdev_priv(dev);
2013         struct TxFD *txfd;
2014         unsigned int fdctl;
2015
2016         txfd = &lp->tfd_base[lp->tfd_end];
2017         while (lp->tfd_start != lp->tfd_end &&
2018                !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
2019                 int status = le32_to_cpu(txfd->fd.FDStat);
2020                 struct sk_buff *skb;
2021                 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
2022                 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
2023
2024                 if (netif_msg_tx_done(lp)) {
2025                         printk("%s: complete TxFD.\n", dev->name);
2026                         dump_txfd(txfd);
2027                 }
2028                 tc35815_check_tx_stat(dev, status);
2029
2030                 skb = fdsystem != 0xffffffff ?
2031                         lp->tx_skbs[fdsystem].skb : NULL;
2032 #ifdef DEBUG
2033                 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
2034                         printk("%s: tx_skbs mismatch.\n", dev->name);
2035                         panic_queues(dev);
2036                 }
2037 #else
2038                 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
2039 #endif
2040                 if (skb) {
2041                         dev->stats.tx_bytes += skb->len;
2042                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
2043                         lp->tx_skbs[lp->tfd_end].skb = NULL;
2044                         lp->tx_skbs[lp->tfd_end].skb_dma = 0;
2045 #ifdef TC35815_NAPI
2046                         dev_kfree_skb_any(skb);
2047 #else
2048                         dev_kfree_skb_irq(skb);
2049 #endif
2050                 }
2051                 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
2052
2053                 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
2054                 txfd = &lp->tfd_base[lp->tfd_end];
2055 #ifdef DEBUG
2056                 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
2057                         printk("%s: TxFD FDNext invalid.\n", dev->name);
2058                         panic_queues(dev);
2059                 }
2060 #endif
2061                 if (fdnext & FD_Next_EOL) {
2062                         /* DMA Transmitter has been stopping... */
2063                         if (lp->tfd_end != lp->tfd_start) {
2064                                 struct tc35815_regs __iomem *tr =
2065                                         (struct tc35815_regs __iomem *)dev->base_addr;
2066                                 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
2067                                 struct TxFD *txhead = &lp->tfd_base[head];
2068                                 int qlen = (lp->tfd_start + TX_FD_NUM
2069                                             - lp->tfd_end) % TX_FD_NUM;
2070
2071 #ifdef DEBUG
2072                                 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
2073                                         printk("%s: TxFD FDCtl invalid.\n", dev->name);
2074                                         panic_queues(dev);
2075                                 }
2076 #endif
2077                                 /* log max queue length */
2078                                 if (lp->lstats.max_tx_qlen < qlen)
2079                                         lp->lstats.max_tx_qlen = qlen;
2080
2081
2082                                 /* start DMA Transmitter again */
2083                                 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
2084 #ifdef GATHER_TXINT
2085                                 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
2086 #endif
2087                                 if (netif_msg_tx_queued(lp)) {
2088                                         printk("%s: start TxFD on queue.\n",
2089                                                dev->name);
2090                                         dump_txfd(txfd);
2091                                 }
2092                                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
2093                         }
2094                         break;
2095                 }
2096         }
2097
2098         /* If we had stopped the queue due to a "tx full"
2099          * condition, and space has now been made available,
2100          * wake up the queue.
2101          */
2102         if (netif_queue_stopped(dev) && !tc35815_tx_full(dev))
2103                 netif_wake_queue(dev);
2104 }
2105
2106 /* The inverse routine to tc35815_open(). */
2107 static int
2108 tc35815_close(struct net_device *dev)
2109 {
2110         struct tc35815_local *lp = netdev_priv(dev);
2111
2112         netif_stop_queue(dev);
2113 #ifdef TC35815_NAPI
2114         napi_disable(&lp->napi);
2115 #endif
2116         if (lp->phy_dev)
2117                 phy_stop(lp->phy_dev);
2118         cancel_work_sync(&lp->restart_work);
2119
2120         /* Flush the Tx and disable Rx here. */
2121         tc35815_chip_reset(dev);
2122         free_irq(dev->irq, dev);
2123
2124         tc35815_free_queues(dev);
2125
2126         return 0;
2127
2128 }
2129
2130 /*
2131  * Get the current statistics.
2132  * This may be called with the card open or closed.
2133  */
2134 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
2135 {
2136         struct tc35815_regs __iomem *tr =
2137                 (struct tc35815_regs __iomem *)dev->base_addr;
2138         if (netif_running(dev))
2139                 /* Update the statistics from the device registers. */
2140                 dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
2141
2142         return &dev->stats;
2143 }
2144
2145 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
2146 {
2147         struct tc35815_local *lp = netdev_priv(dev);
2148         struct tc35815_regs __iomem *tr =
2149                 (struct tc35815_regs __iomem *)dev->base_addr;
2150         int cam_index = index * 6;
2151         u32 cam_data;
2152         u32 saved_addr;
2153
2154         saved_addr = tc_readl(&tr->CAM_Adr);
2155
2156         if (netif_msg_hw(lp))
2157                 printk(KERN_DEBUG "%s: CAM %d: %pM\n",
2158                         dev->name, index, addr);
2159         if (index & 1) {
2160                 /* read modify write */
2161                 tc_writel(cam_index - 2, &tr->CAM_Adr);
2162                 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
2163                 cam_data |= addr[0] << 8 | addr[1];
2164                 tc_writel(cam_data, &tr->CAM_Data);
2165                 /* write whole word */
2166                 tc_writel(cam_index + 2, &tr->CAM_Adr);
2167                 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2168                 tc_writel(cam_data, &tr->CAM_Data);
2169         } else {
2170                 /* write whole word */
2171                 tc_writel(cam_index, &tr->CAM_Adr);
2172                 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2173                 tc_writel(cam_data, &tr->CAM_Data);
2174                 /* read modify write */
2175                 tc_writel(cam_index + 4, &tr->CAM_Adr);
2176                 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2177                 cam_data |= addr[4] << 24 | (addr[5] << 16);
2178                 tc_writel(cam_data, &tr->CAM_Data);
2179         }
2180
2181         tc_writel(saved_addr, &tr->CAM_Adr);
2182 }
2183
2184
2185 /*
2186  * Set or clear the multicast filter for this adaptor.
2187  * num_addrs == -1      Promiscuous mode, receive all packets
2188  * num_addrs == 0       Normal mode, clear multicast list
2189  * num_addrs > 0        Multicast mode, receive normal and MC packets,
2190  *                      and do best-effort filtering.
2191  */
2192 static void
2193 tc35815_set_multicast_list(struct net_device *dev)
2194 {
2195         struct tc35815_regs __iomem *tr =
2196                 (struct tc35815_regs __iomem *)dev->base_addr;
2197
2198         if (dev->flags & IFF_PROMISC) {
2199 #ifdef WORKAROUND_100HALF_PROMISC
2200                 /* With some (all?) 100MHalf HUB, controller will hang
2201                  * if we enabled promiscuous mode before linkup... */
2202                 struct tc35815_local *lp = netdev_priv(dev);
2203
2204                 if (!lp->link)
2205                         return;
2206 #endif
2207                 /* Enable promiscuous mode */
2208                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2209         } else if ((dev->flags & IFF_ALLMULTI) ||
2210                   dev->mc_count > CAM_ENTRY_MAX - 3) {
2211                 /* CAM 0, 1, 20 are reserved. */
2212                 /* Disable promiscuous mode, use normal mode. */
2213                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2214         } else if (dev->mc_count) {
2215                 struct dev_mc_list *cur_addr = dev->mc_list;
2216                 int i;
2217                 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2218
2219                 tc_writel(0, &tr->CAM_Ctl);
2220                 /* Walk the address list, and load the filter */
2221                 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2222                         if (!cur_addr)
2223                                 break;
2224                         /* entry 0,1 is reserved. */
2225                         tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2226                         ena_bits |= CAM_Ena_Bit(i + 2);
2227                 }
2228                 tc_writel(ena_bits, &tr->CAM_Ena);
2229                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2230         } else {
2231                 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2232                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2233         }
2234 }
2235
2236 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2237 {
2238         struct tc35815_local *lp = netdev_priv(dev);
2239         strcpy(info->driver, MODNAME);
2240         strcpy(info->version, DRV_VERSION);
2241         strcpy(info->bus_info, pci_name(lp->pci_dev));
2242 }
2243
2244 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2245 {
2246         struct tc35815_local *lp = netdev_priv(dev);
2247
2248         if (!lp->phy_dev)
2249                 return -ENODEV;
2250         return phy_ethtool_gset(lp->phy_dev, cmd);
2251 }
2252
2253 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2254 {
2255         struct tc35815_local *lp = netdev_priv(dev);
2256
2257         if (!lp->phy_dev)
2258                 return -ENODEV;
2259         return phy_ethtool_sset(lp->phy_dev, cmd);
2260 }
2261
2262 static u32 tc35815_get_msglevel(struct net_device *dev)
2263 {
2264         struct tc35815_local *lp = netdev_priv(dev);
2265         return lp->msg_enable;
2266 }
2267
2268 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2269 {
2270         struct tc35815_local *lp = netdev_priv(dev);
2271         lp->msg_enable = datum;
2272 }
2273
2274 static int tc35815_get_sset_count(struct net_device *dev, int sset)
2275 {
2276         struct tc35815_local *lp = netdev_priv(dev);
2277
2278         switch (sset) {
2279         case ETH_SS_STATS:
2280                 return sizeof(lp->lstats) / sizeof(int);
2281         default:
2282                 return -EOPNOTSUPP;
2283         }
2284 }
2285
2286 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2287 {
2288         struct tc35815_local *lp = netdev_priv(dev);
2289         data[0] = lp->lstats.max_tx_qlen;
2290         data[1] = lp->lstats.tx_ints;
2291         data[2] = lp->lstats.rx_ints;
2292         data[3] = lp->lstats.tx_underrun;
2293 }
2294
2295 static struct {
2296         const char str[ETH_GSTRING_LEN];
2297 } ethtool_stats_keys[] = {
2298         { "max_tx_qlen" },
2299         { "tx_ints" },
2300         { "rx_ints" },
2301         { "tx_underrun" },
2302 };
2303
2304 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2305 {
2306         memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2307 }
2308
2309 static const struct ethtool_ops tc35815_ethtool_ops = {
2310         .get_drvinfo            = tc35815_get_drvinfo,
2311         .get_settings           = tc35815_get_settings,
2312         .set_settings           = tc35815_set_settings,
2313         .get_link               = ethtool_op_get_link,
2314         .get_msglevel           = tc35815_get_msglevel,
2315         .set_msglevel           = tc35815_set_msglevel,
2316         .get_strings            = tc35815_get_strings,
2317         .get_sset_count         = tc35815_get_sset_count,
2318         .get_ethtool_stats      = tc35815_get_ethtool_stats,
2319 };
2320
2321 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2322 {
2323         struct tc35815_local *lp = netdev_priv(dev);
2324
2325         if (!netif_running(dev))
2326                 return -EINVAL;
2327         if (!lp->phy_dev)
2328                 return -ENODEV;
2329         return phy_mii_ioctl(lp->phy_dev, if_mii(rq), cmd);
2330 }
2331
2332 static void tc35815_chip_reset(struct net_device *dev)
2333 {
2334         struct tc35815_regs __iomem *tr =
2335                 (struct tc35815_regs __iomem *)dev->base_addr;
2336         int i;
2337         /* reset the controller */
2338         tc_writel(MAC_Reset, &tr->MAC_Ctl);
2339         udelay(4); /* 3200ns */
2340         i = 0;
2341         while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2342                 if (i++ > 100) {
2343                         printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2344                         break;
2345                 }
2346                 mdelay(1);
2347         }
2348         tc_writel(0, &tr->MAC_Ctl);
2349
2350         /* initialize registers to default value */
2351         tc_writel(0, &tr->DMA_Ctl);
2352         tc_writel(0, &tr->TxThrsh);
2353         tc_writel(0, &tr->TxPollCtr);
2354         tc_writel(0, &tr->RxFragSize);
2355         tc_writel(0, &tr->Int_En);
2356         tc_writel(0, &tr->FDA_Bas);
2357         tc_writel(0, &tr->FDA_Lim);
2358         tc_writel(0xffffffff, &tr->Int_Src);    /* Write 1 to clear */
2359         tc_writel(0, &tr->CAM_Ctl);
2360         tc_writel(0, &tr->Tx_Ctl);
2361         tc_writel(0, &tr->Rx_Ctl);
2362         tc_writel(0, &tr->CAM_Ena);
2363         (void)tc_readl(&tr->Miss_Cnt);  /* Read to clear */
2364
2365         /* initialize internal SRAM */
2366         tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2367         for (i = 0; i < 0x1000; i += 4) {
2368                 tc_writel(i, &tr->CAM_Adr);
2369                 tc_writel(0, &tr->CAM_Data);
2370         }
2371         tc_writel(0, &tr->DMA_Ctl);
2372 }
2373
2374 static void tc35815_chip_init(struct net_device *dev)
2375 {
2376         struct tc35815_local *lp = netdev_priv(dev);
2377         struct tc35815_regs __iomem *tr =
2378                 (struct tc35815_regs __iomem *)dev->base_addr;
2379         unsigned long txctl = TX_CTL_CMD;
2380
2381         /* load station address to CAM */
2382         tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2383
2384         /* Enable CAM (broadcast and unicast) */
2385         tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2386         tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2387
2388         /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2389         if (HAVE_DMA_RXALIGN(lp))
2390                 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2391         else
2392                 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2393 #ifdef TC35815_USE_PACKEDBUFFER
2394         tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize);   /* Packing */
2395 #else
2396         tc_writel(ETH_ZLEN, &tr->RxFragSize);
2397 #endif
2398         tc_writel(0, &tr->TxPollCtr);   /* Batch mode */
2399         tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2400         tc_writel(INT_EN_CMD, &tr->Int_En);
2401
2402         /* set queues */
2403         tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2404         tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2405                   &tr->FDA_Lim);
2406         /*
2407          * Activation method:
2408          * First, enable the MAC Transmitter and the DMA Receive circuits.
2409          * Then enable the DMA Transmitter and the MAC Receive circuits.
2410          */
2411         tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr);      /* start DMA receiver */
2412         tc_writel(RX_CTL_CMD, &tr->Rx_Ctl);     /* start MAC receiver */
2413
2414         /* start MAC transmitter */
2415 #ifndef NO_CHECK_CARRIER
2416         /* TX4939 does not have EnLCarr */
2417         if (lp->chiptype == TC35815_TX4939)
2418                 txctl &= ~Tx_EnLCarr;
2419 #ifdef WORKAROUND_LOSTCAR
2420         /* WORKAROUND: ignore LostCrS in full duplex operation */
2421         if (!lp->phy_dev || !lp->link || lp->duplex == DUPLEX_FULL)
2422                 txctl &= ~Tx_EnLCarr;
2423 #endif
2424 #endif /* !NO_CHECK_CARRIER */
2425 #ifdef GATHER_TXINT
2426         txctl &= ~Tx_EnComp;    /* disable global tx completion int. */
2427 #endif
2428         tc_writel(txctl, &tr->Tx_Ctl);
2429 }
2430
2431 #ifdef CONFIG_PM
2432 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2433 {
2434         struct net_device *dev = pci_get_drvdata(pdev);
2435         struct tc35815_local *lp = netdev_priv(dev);
2436         unsigned long flags;
2437
2438         pci_save_state(pdev);
2439         if (!netif_running(dev))
2440                 return 0;
2441         netif_device_detach(dev);
2442         if (lp->phy_dev)
2443                 phy_stop(lp->phy_dev);
2444         spin_lock_irqsave(&lp->lock, flags);
2445         tc35815_chip_reset(dev);
2446         spin_unlock_irqrestore(&lp->lock, flags);
2447         pci_set_power_state(pdev, PCI_D3hot);
2448         return 0;
2449 }
2450
2451 static int tc35815_resume(struct pci_dev *pdev)
2452 {
2453         struct net_device *dev = pci_get_drvdata(pdev);
2454         struct tc35815_local *lp = netdev_priv(dev);
2455
2456         pci_restore_state(pdev);
2457         if (!netif_running(dev))
2458                 return 0;
2459         pci_set_power_state(pdev, PCI_D0);
2460         tc35815_restart(dev);
2461         netif_carrier_off(dev);
2462         if (lp->phy_dev)
2463                 phy_start(lp->phy_dev);
2464         netif_device_attach(dev);
2465         return 0;
2466 }
2467 #endif /* CONFIG_PM */
2468
2469 static struct pci_driver tc35815_pci_driver = {
2470         .name           = MODNAME,
2471         .id_table       = tc35815_pci_tbl,
2472         .probe          = tc35815_init_one,
2473         .remove         = __devexit_p(tc35815_remove_one),
2474 #ifdef CONFIG_PM
2475         .suspend        = tc35815_suspend,
2476         .resume         = tc35815_resume,
2477 #endif
2478 };
2479
2480 module_param_named(speed, options.speed, int, 0);
2481 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2482 module_param_named(duplex, options.duplex, int, 0);
2483 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2484
2485 static int __init tc35815_init_module(void)
2486 {
2487         return pci_register_driver(&tc35815_pci_driver);
2488 }
2489
2490 static void __exit tc35815_cleanup_module(void)
2491 {
2492         pci_unregister_driver(&tc35815_pci_driver);
2493 }
2494
2495 module_init(tc35815_init_module);
2496 module_exit(tc35815_cleanup_module);
2497
2498 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2499 MODULE_LICENSE("GPL");