1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
31 #define EFX_MAX_MTU (9 * 1024)
33 /* RX slow fill workqueue. If memory allocation fails in the fast path,
34 * a work item is pushed onto this work queue to retry the allocation later,
35 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
36 * workqueue, there is nothing to be gained in making it per NIC
38 static struct workqueue_struct *refill_workqueue;
40 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
41 * queued onto this work queue. This is not a per-nic work queue, because
42 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
44 static struct workqueue_struct *reset_workqueue;
46 /**************************************************************************
50 *************************************************************************/
53 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
55 * This sets the default for new devices. It can be controlled later
58 static int lro = true;
59 module_param(lro, int, 0644);
60 MODULE_PARM_DESC(lro, "Large receive offload acceleration");
63 * Use separate channels for TX and RX events
65 * Set this to 1 to use separate channels for TX and RX. It allows us
66 * to control interrupt affinity separately for TX and RX.
68 * This is only used in MSI-X interrupt mode
70 static unsigned int separate_tx_channels;
71 module_param(separate_tx_channels, uint, 0644);
72 MODULE_PARM_DESC(separate_tx_channels,
73 "Use separate channels for TX and RX");
75 /* This is the weight assigned to each of the (per-channel) virtual
78 static int napi_weight = 64;
80 /* This is the time (in jiffies) between invocations of the hardware
81 * monitor, which checks for known hardware bugs and resets the
82 * hardware and driver as necessary.
84 unsigned int efx_monitor_interval = 1 * HZ;
86 /* This controls whether or not the driver will initialise devices
87 * with invalid MAC addresses stored in the EEPROM or flash. If true,
88 * such devices will be initialised with a random locally-generated
89 * MAC address. This allows for loading the sfc_mtd driver to
90 * reprogram the flash, even if the flash contents (including the MAC
91 * address) have previously been erased.
93 static unsigned int allow_bad_hwaddr;
95 /* Initial interrupt moderation settings. They can be modified after
96 * module load with ethtool.
98 * The default for RX should strike a balance between increasing the
99 * round-trip latency and reducing overhead.
101 static unsigned int rx_irq_mod_usec = 60;
103 /* Initial interrupt moderation settings. They can be modified after
104 * module load with ethtool.
106 * This default is chosen to ensure that a 10G link does not go idle
107 * while a TX queue is stopped after it has become full. A queue is
108 * restarted when it drops below half full. The time this takes (assuming
109 * worst case 3 descriptors per packet and 1024 descriptors) is
110 * 512 / 3 * 1.2 = 205 usec.
112 static unsigned int tx_irq_mod_usec = 150;
114 /* This is the first interrupt mode to try out of:
119 static unsigned int interrupt_mode;
121 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
122 * i.e. the number of CPUs among which we may distribute simultaneous
123 * interrupt handling.
125 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
126 * The default (0) means to assign an interrupt to each package (level II cache)
128 static unsigned int rss_cpus;
129 module_param(rss_cpus, uint, 0444);
130 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
132 static int phy_flash_cfg;
133 module_param(phy_flash_cfg, int, 0644);
134 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
136 static unsigned irq_adapt_low_thresh = 10000;
137 module_param(irq_adapt_low_thresh, uint, 0644);
138 MODULE_PARM_DESC(irq_adapt_low_thresh,
139 "Threshold score for reducing IRQ moderation");
141 static unsigned irq_adapt_high_thresh = 20000;
142 module_param(irq_adapt_high_thresh, uint, 0644);
143 MODULE_PARM_DESC(irq_adapt_high_thresh,
144 "Threshold score for increasing IRQ moderation");
146 /**************************************************************************
148 * Utility functions and prototypes
150 *************************************************************************/
151 static void efx_remove_channel(struct efx_channel *channel);
152 static void efx_remove_port(struct efx_nic *efx);
153 static void efx_fini_napi(struct efx_nic *efx);
154 static void efx_fini_channels(struct efx_nic *efx);
156 #define EFX_ASSERT_RESET_SERIALISED(efx) \
158 if (efx->state == STATE_RUNNING) \
162 /**************************************************************************
164 * Event queue processing
166 *************************************************************************/
168 /* Process channel's event queue
170 * This function is responsible for processing the event queue of a
171 * single channel. The caller must guarantee that this function will
172 * never be concurrently called more than once on the same channel,
173 * though different channels may be being processed concurrently.
175 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
177 struct efx_nic *efx = channel->efx;
180 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
184 rx_packets = falcon_process_eventq(channel, rx_quota);
188 /* Deliver last RX packet. */
189 if (channel->rx_pkt) {
190 __efx_rx_packet(channel, channel->rx_pkt,
191 channel->rx_pkt_csummed);
192 channel->rx_pkt = NULL;
195 efx_rx_strategy(channel);
197 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
202 /* Mark channel as finished processing
204 * Note that since we will not receive further interrupts for this
205 * channel before we finish processing and call the eventq_read_ack()
206 * method, there is no need to use the interrupt hold-off timers.
208 static inline void efx_channel_processed(struct efx_channel *channel)
210 /* The interrupt handler for this channel may set work_pending
211 * as soon as we acknowledge the events we've seen. Make sure
212 * it's cleared before then. */
213 channel->work_pending = false;
216 falcon_eventq_read_ack(channel);
221 * NAPI guarantees serialisation of polls of the same device, which
222 * provides the guarantee required by efx_process_channel().
224 static int efx_poll(struct napi_struct *napi, int budget)
226 struct efx_channel *channel =
227 container_of(napi, struct efx_channel, napi_str);
230 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
231 channel->channel, raw_smp_processor_id());
233 rx_packets = efx_process_channel(channel, budget);
235 if (rx_packets < budget) {
236 struct efx_nic *efx = channel->efx;
238 if (channel->used_flags & EFX_USED_BY_RX &&
239 efx->irq_rx_adaptive &&
240 unlikely(++channel->irq_count == 1000)) {
241 unsigned old_irq_moderation = channel->irq_moderation;
243 if (unlikely(channel->irq_mod_score <
244 irq_adapt_low_thresh)) {
245 channel->irq_moderation =
247 channel->irq_moderation -
248 FALCON_IRQ_MOD_RESOLUTION,
249 FALCON_IRQ_MOD_RESOLUTION);
250 } else if (unlikely(channel->irq_mod_score >
251 irq_adapt_high_thresh)) {
252 channel->irq_moderation =
253 min(channel->irq_moderation +
254 FALCON_IRQ_MOD_RESOLUTION,
255 efx->irq_rx_moderation);
258 if (channel->irq_moderation != old_irq_moderation)
259 falcon_set_int_moderation(channel);
261 channel->irq_count = 0;
262 channel->irq_mod_score = 0;
265 /* There is no race here; although napi_disable() will
266 * only wait for napi_complete(), this isn't a problem
267 * since efx_channel_processed() will have no effect if
268 * interrupts have already been disabled.
271 efx_channel_processed(channel);
277 /* Process the eventq of the specified channel immediately on this CPU
279 * Disable hardware generated interrupts, wait for any existing
280 * processing to finish, then directly poll (and ack ) the eventq.
281 * Finally reenable NAPI and interrupts.
283 * Since we are touching interrupts the caller should hold the suspend lock
285 void efx_process_channel_now(struct efx_channel *channel)
287 struct efx_nic *efx = channel->efx;
289 BUG_ON(!channel->used_flags);
290 BUG_ON(!channel->enabled);
292 /* Disable interrupts and wait for ISRs to complete */
293 falcon_disable_interrupts(efx);
295 synchronize_irq(efx->legacy_irq);
297 synchronize_irq(channel->irq);
299 /* Wait for any NAPI processing to complete */
300 napi_disable(&channel->napi_str);
302 /* Poll the channel */
303 efx_process_channel(channel, efx->type->evq_size);
305 /* Ack the eventq. This may cause an interrupt to be generated
306 * when they are reenabled */
307 efx_channel_processed(channel);
309 napi_enable(&channel->napi_str);
310 falcon_enable_interrupts(efx);
313 /* Create event queue
314 * Event queue memory allocations are done only once. If the channel
315 * is reset, the memory buffer will be reused; this guards against
316 * errors during channel reset and also simplifies interrupt handling.
318 static int efx_probe_eventq(struct efx_channel *channel)
320 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
322 return falcon_probe_eventq(channel);
325 /* Prepare channel's event queue */
326 static void efx_init_eventq(struct efx_channel *channel)
328 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
330 channel->eventq_read_ptr = 0;
332 falcon_init_eventq(channel);
335 static void efx_fini_eventq(struct efx_channel *channel)
337 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
339 falcon_fini_eventq(channel);
342 static void efx_remove_eventq(struct efx_channel *channel)
344 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
346 falcon_remove_eventq(channel);
349 /**************************************************************************
353 *************************************************************************/
355 static int efx_probe_channel(struct efx_channel *channel)
357 struct efx_tx_queue *tx_queue;
358 struct efx_rx_queue *rx_queue;
361 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
363 rc = efx_probe_eventq(channel);
367 efx_for_each_channel_tx_queue(tx_queue, channel) {
368 rc = efx_probe_tx_queue(tx_queue);
373 efx_for_each_channel_rx_queue(rx_queue, channel) {
374 rc = efx_probe_rx_queue(rx_queue);
379 channel->n_rx_frm_trunc = 0;
384 efx_for_each_channel_rx_queue(rx_queue, channel)
385 efx_remove_rx_queue(rx_queue);
387 efx_for_each_channel_tx_queue(tx_queue, channel)
388 efx_remove_tx_queue(tx_queue);
394 static void efx_set_channel_names(struct efx_nic *efx)
396 struct efx_channel *channel;
397 const char *type = "";
400 efx_for_each_channel(channel, efx) {
401 number = channel->channel;
402 if (efx->n_channels > efx->n_rx_queues) {
403 if (channel->channel < efx->n_rx_queues) {
407 number -= efx->n_rx_queues;
410 snprintf(channel->name, sizeof(channel->name),
411 "%s%s-%d", efx->name, type, number);
415 /* Channels are shutdown and reinitialised whilst the NIC is running
416 * to propagate configuration changes (mtu, checksum offload), or
417 * to clear hardware error conditions
419 static void efx_init_channels(struct efx_nic *efx)
421 struct efx_tx_queue *tx_queue;
422 struct efx_rx_queue *rx_queue;
423 struct efx_channel *channel;
425 /* Calculate the rx buffer allocation parameters required to
426 * support the current MTU, including padding for header
427 * alignment and overruns.
429 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
430 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
431 efx->type->rx_buffer_padding);
432 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
434 /* Initialise the channels */
435 efx_for_each_channel(channel, efx) {
436 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
438 efx_init_eventq(channel);
440 efx_for_each_channel_tx_queue(tx_queue, channel)
441 efx_init_tx_queue(tx_queue);
443 /* The rx buffer allocation strategy is MTU dependent */
444 efx_rx_strategy(channel);
446 efx_for_each_channel_rx_queue(rx_queue, channel)
447 efx_init_rx_queue(rx_queue);
449 WARN_ON(channel->rx_pkt != NULL);
450 efx_rx_strategy(channel);
454 /* This enables event queue processing and packet transmission.
456 * Note that this function is not allowed to fail, since that would
457 * introduce too much complexity into the suspend/resume path.
459 static void efx_start_channel(struct efx_channel *channel)
461 struct efx_rx_queue *rx_queue;
463 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
465 /* The interrupt handler for this channel may set work_pending
466 * as soon as we enable it. Make sure it's cleared before
467 * then. Similarly, make sure it sees the enabled flag set. */
468 channel->work_pending = false;
469 channel->enabled = true;
472 napi_enable(&channel->napi_str);
474 /* Load up RX descriptors */
475 efx_for_each_channel_rx_queue(rx_queue, channel)
476 efx_fast_push_rx_descriptors(rx_queue);
479 /* This disables event queue processing and packet transmission.
480 * This function does not guarantee that all queue processing
481 * (e.g. RX refill) is complete.
483 static void efx_stop_channel(struct efx_channel *channel)
485 struct efx_rx_queue *rx_queue;
487 if (!channel->enabled)
490 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
492 channel->enabled = false;
493 napi_disable(&channel->napi_str);
495 /* Ensure that any worker threads have exited or will be no-ops */
496 efx_for_each_channel_rx_queue(rx_queue, channel) {
497 spin_lock_bh(&rx_queue->add_lock);
498 spin_unlock_bh(&rx_queue->add_lock);
502 static void efx_fini_channels(struct efx_nic *efx)
504 struct efx_channel *channel;
505 struct efx_tx_queue *tx_queue;
506 struct efx_rx_queue *rx_queue;
509 EFX_ASSERT_RESET_SERIALISED(efx);
510 BUG_ON(efx->port_enabled);
512 rc = falcon_flush_queues(efx);
514 EFX_ERR(efx, "failed to flush queues\n");
516 EFX_LOG(efx, "successfully flushed all queues\n");
518 efx_for_each_channel(channel, efx) {
519 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
521 efx_for_each_channel_rx_queue(rx_queue, channel)
522 efx_fini_rx_queue(rx_queue);
523 efx_for_each_channel_tx_queue(tx_queue, channel)
524 efx_fini_tx_queue(tx_queue);
525 efx_fini_eventq(channel);
529 static void efx_remove_channel(struct efx_channel *channel)
531 struct efx_tx_queue *tx_queue;
532 struct efx_rx_queue *rx_queue;
534 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
536 efx_for_each_channel_rx_queue(rx_queue, channel)
537 efx_remove_rx_queue(rx_queue);
538 efx_for_each_channel_tx_queue(tx_queue, channel)
539 efx_remove_tx_queue(tx_queue);
540 efx_remove_eventq(channel);
542 channel->used_flags = 0;
545 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
547 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
550 /**************************************************************************
554 **************************************************************************/
556 /* This ensures that the kernel is kept informed (via
557 * netif_carrier_on/off) of the link status, and also maintains the
558 * link status's stop on the port's TX queue.
560 static void efx_link_status_changed(struct efx_nic *efx)
562 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
563 * that no events are triggered between unregister_netdev() and the
564 * driver unloading. A more general condition is that NETDEV_CHANGE
565 * can only be generated between NETDEV_UP and NETDEV_DOWN */
566 if (!netif_running(efx->net_dev))
569 if (efx->port_inhibited) {
570 netif_carrier_off(efx->net_dev);
574 if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
575 efx->n_link_state_changes++;
578 netif_carrier_on(efx->net_dev);
580 netif_carrier_off(efx->net_dev);
583 /* Status message for kernel log */
585 EFX_INFO(efx, "link up at %uMbps %s-duplex (MTU %d)%s\n",
586 efx->link_speed, efx->link_fd ? "full" : "half",
588 (efx->promiscuous ? " [PROMISC]" : ""));
590 EFX_INFO(efx, "link down\n");
595 static void efx_fini_port(struct efx_nic *efx);
597 /* This call reinitialises the MAC to pick up new PHY settings. The
598 * caller must hold the mac_lock */
599 void __efx_reconfigure_port(struct efx_nic *efx)
601 WARN_ON(!mutex_is_locked(&efx->mac_lock));
603 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
604 raw_smp_processor_id());
606 /* Serialise the promiscuous flag with efx_set_multicast_list. */
607 if (efx_dev_registered(efx)) {
608 netif_addr_lock_bh(efx->net_dev);
609 netif_addr_unlock_bh(efx->net_dev);
612 falcon_deconfigure_mac_wrapper(efx);
614 /* Reconfigure the PHY, disabling transmit in mac level loopback. */
615 if (LOOPBACK_INTERNAL(efx))
616 efx->phy_mode |= PHY_MODE_TX_DISABLED;
618 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
619 efx->phy_op->reconfigure(efx);
621 if (falcon_switch_mac(efx))
624 efx->mac_op->reconfigure(efx);
626 /* Inform kernel of loss/gain of carrier */
627 efx_link_status_changed(efx);
631 EFX_ERR(efx, "failed to reconfigure MAC\n");
632 efx->port_enabled = false;
636 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
638 void efx_reconfigure_port(struct efx_nic *efx)
640 EFX_ASSERT_RESET_SERIALISED(efx);
642 mutex_lock(&efx->mac_lock);
643 __efx_reconfigure_port(efx);
644 mutex_unlock(&efx->mac_lock);
647 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
648 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
649 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
650 static void efx_phy_work(struct work_struct *data)
652 struct efx_nic *efx = container_of(data, struct efx_nic, phy_work);
654 mutex_lock(&efx->mac_lock);
655 if (efx->port_enabled)
656 __efx_reconfigure_port(efx);
657 mutex_unlock(&efx->mac_lock);
660 static void efx_mac_work(struct work_struct *data)
662 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
664 mutex_lock(&efx->mac_lock);
665 if (efx->port_enabled)
666 efx->mac_op->irq(efx);
667 mutex_unlock(&efx->mac_lock);
670 static int efx_probe_port(struct efx_nic *efx)
674 EFX_LOG(efx, "create port\n");
676 /* Connect up MAC/PHY operations table and read MAC address */
677 rc = falcon_probe_port(efx);
682 efx->phy_mode = PHY_MODE_SPECIAL;
684 /* Sanity check MAC address */
685 if (is_valid_ether_addr(efx->mac_address)) {
686 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
688 EFX_ERR(efx, "invalid MAC address %pM\n",
690 if (!allow_bad_hwaddr) {
694 random_ether_addr(efx->net_dev->dev_addr);
695 EFX_INFO(efx, "using locally-generated MAC %pM\n",
696 efx->net_dev->dev_addr);
702 efx_remove_port(efx);
706 static int efx_init_port(struct efx_nic *efx)
710 EFX_LOG(efx, "init port\n");
712 rc = efx->phy_op->init(efx);
715 mutex_lock(&efx->mac_lock);
716 efx->phy_op->reconfigure(efx);
717 rc = falcon_switch_mac(efx);
718 mutex_unlock(&efx->mac_lock);
721 efx->mac_op->reconfigure(efx);
723 efx->port_initialized = true;
724 efx_stats_enable(efx);
728 efx->phy_op->fini(efx);
732 /* Allow efx_reconfigure_port() to be scheduled, and close the window
733 * between efx_stop_port and efx_flush_all whereby a previously scheduled
734 * efx_phy_work()/efx_mac_work() may have been cancelled */
735 static void efx_start_port(struct efx_nic *efx)
737 EFX_LOG(efx, "start port\n");
738 BUG_ON(efx->port_enabled);
740 mutex_lock(&efx->mac_lock);
741 efx->port_enabled = true;
742 __efx_reconfigure_port(efx);
743 efx->mac_op->irq(efx);
744 mutex_unlock(&efx->mac_lock);
747 /* Prevent efx_phy_work, efx_mac_work, and efx_monitor() from executing,
748 * and efx_set_multicast_list() from scheduling efx_phy_work. efx_phy_work
749 * and efx_mac_work may still be scheduled via NAPI processing until
750 * efx_flush_all() is called */
751 static void efx_stop_port(struct efx_nic *efx)
753 EFX_LOG(efx, "stop port\n");
755 mutex_lock(&efx->mac_lock);
756 efx->port_enabled = false;
757 mutex_unlock(&efx->mac_lock);
759 /* Serialise against efx_set_multicast_list() */
760 if (efx_dev_registered(efx)) {
761 netif_addr_lock_bh(efx->net_dev);
762 netif_addr_unlock_bh(efx->net_dev);
766 static void efx_fini_port(struct efx_nic *efx)
768 EFX_LOG(efx, "shut down port\n");
770 if (!efx->port_initialized)
773 efx_stats_disable(efx);
774 efx->phy_op->fini(efx);
775 efx->port_initialized = false;
777 efx->link_up = false;
778 efx_link_status_changed(efx);
781 static void efx_remove_port(struct efx_nic *efx)
783 EFX_LOG(efx, "destroying port\n");
785 falcon_remove_port(efx);
788 /**************************************************************************
792 **************************************************************************/
794 /* This configures the PCI device to enable I/O and DMA. */
795 static int efx_init_io(struct efx_nic *efx)
797 struct pci_dev *pci_dev = efx->pci_dev;
798 dma_addr_t dma_mask = efx->type->max_dma_mask;
801 EFX_LOG(efx, "initialising I/O\n");
803 rc = pci_enable_device(pci_dev);
805 EFX_ERR(efx, "failed to enable PCI device\n");
809 pci_set_master(pci_dev);
811 /* Set the PCI DMA mask. Try all possibilities from our
812 * genuine mask down to 32 bits, because some architectures
813 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
814 * masks event though they reject 46 bit masks.
816 while (dma_mask > 0x7fffffffUL) {
817 if (pci_dma_supported(pci_dev, dma_mask) &&
818 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
823 EFX_ERR(efx, "could not find a suitable DMA mask\n");
826 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
827 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
829 /* pci_set_consistent_dma_mask() is not *allowed* to
830 * fail with a mask that pci_set_dma_mask() accepted,
831 * but just in case...
833 EFX_ERR(efx, "failed to set consistent DMA mask\n");
837 efx->membase_phys = pci_resource_start(efx->pci_dev,
839 rc = pci_request_region(pci_dev, efx->type->mem_bar, "sfc");
841 EFX_ERR(efx, "request for memory BAR failed\n");
845 efx->membase = ioremap_nocache(efx->membase_phys,
846 efx->type->mem_map_size);
848 EFX_ERR(efx, "could not map memory BAR %d at %llx+%x\n",
850 (unsigned long long)efx->membase_phys,
851 efx->type->mem_map_size);
855 EFX_LOG(efx, "memory BAR %u at %llx+%x (virtual %p)\n",
856 efx->type->mem_bar, (unsigned long long)efx->membase_phys,
857 efx->type->mem_map_size, efx->membase);
862 pci_release_region(efx->pci_dev, efx->type->mem_bar);
864 efx->membase_phys = 0;
866 pci_disable_device(efx->pci_dev);
871 static void efx_fini_io(struct efx_nic *efx)
873 EFX_LOG(efx, "shutting down I/O\n");
876 iounmap(efx->membase);
880 if (efx->membase_phys) {
881 pci_release_region(efx->pci_dev, efx->type->mem_bar);
882 efx->membase_phys = 0;
885 pci_disable_device(efx->pci_dev);
888 /* Get number of RX queues wanted. Return number of online CPU
889 * packages in the expectation that an IRQ balancer will spread
890 * interrupts across them. */
891 static int efx_wanted_rx_queues(void)
893 cpumask_var_t core_mask;
897 if (!alloc_cpumask_var(&core_mask, GFP_KERNEL)) {
899 "efx.c: allocation failure, irq balancing hobbled\n");
903 cpumask_clear(core_mask);
905 for_each_online_cpu(cpu) {
906 if (!cpumask_test_cpu(cpu, core_mask)) {
908 cpumask_or(core_mask, core_mask,
909 topology_core_cpumask(cpu));
913 free_cpumask_var(core_mask);
917 /* Probe the number and type of interrupts we are able to obtain, and
918 * the resulting numbers of channels and RX queues.
920 static void efx_probe_interrupts(struct efx_nic *efx)
923 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
926 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
927 struct msix_entry xentries[EFX_MAX_CHANNELS];
931 /* We want one RX queue and interrupt per CPU package
932 * (or as specified by the rss_cpus module parameter).
933 * We will need one channel per interrupt.
935 rx_queues = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
936 wanted_ints = rx_queues + (separate_tx_channels ? 1 : 0);
937 wanted_ints = min(wanted_ints, max_channels);
939 for (i = 0; i < wanted_ints; i++)
940 xentries[i].entry = i;
941 rc = pci_enable_msix(efx->pci_dev, xentries, wanted_ints);
943 EFX_ERR(efx, "WARNING: Insufficient MSI-X vectors"
944 " available (%d < %d).\n", rc, wanted_ints);
945 EFX_ERR(efx, "WARNING: Performance may be reduced.\n");
946 EFX_BUG_ON_PARANOID(rc >= wanted_ints);
948 rc = pci_enable_msix(efx->pci_dev, xentries,
953 efx->n_rx_queues = min(rx_queues, wanted_ints);
954 efx->n_channels = wanted_ints;
955 for (i = 0; i < wanted_ints; i++)
956 efx->channel[i].irq = xentries[i].vector;
958 /* Fall back to single channel MSI */
959 efx->interrupt_mode = EFX_INT_MODE_MSI;
960 EFX_ERR(efx, "could not enable MSI-X\n");
964 /* Try single interrupt MSI */
965 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
966 efx->n_rx_queues = 1;
968 rc = pci_enable_msi(efx->pci_dev);
970 efx->channel[0].irq = efx->pci_dev->irq;
972 EFX_ERR(efx, "could not enable MSI\n");
973 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
977 /* Assume legacy interrupts */
978 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
979 efx->n_rx_queues = 1;
980 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
981 efx->legacy_irq = efx->pci_dev->irq;
985 static void efx_remove_interrupts(struct efx_nic *efx)
987 struct efx_channel *channel;
989 /* Remove MSI/MSI-X interrupts */
990 efx_for_each_channel(channel, efx)
992 pci_disable_msi(efx->pci_dev);
993 pci_disable_msix(efx->pci_dev);
995 /* Remove legacy interrupt */
999 static void efx_set_channels(struct efx_nic *efx)
1001 struct efx_tx_queue *tx_queue;
1002 struct efx_rx_queue *rx_queue;
1004 efx_for_each_tx_queue(tx_queue, efx) {
1005 if (separate_tx_channels)
1006 tx_queue->channel = &efx->channel[efx->n_channels-1];
1008 tx_queue->channel = &efx->channel[0];
1009 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
1012 efx_for_each_rx_queue(rx_queue, efx) {
1013 rx_queue->channel = &efx->channel[rx_queue->queue];
1014 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
1018 static int efx_probe_nic(struct efx_nic *efx)
1022 EFX_LOG(efx, "creating NIC\n");
1024 /* Carry out hardware-type specific initialisation */
1025 rc = falcon_probe_nic(efx);
1029 /* Determine the number of channels and RX queues by trying to hook
1030 * in MSI-X interrupts. */
1031 efx_probe_interrupts(efx);
1033 efx_set_channels(efx);
1035 /* Initialise the interrupt moderation settings */
1036 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1041 static void efx_remove_nic(struct efx_nic *efx)
1043 EFX_LOG(efx, "destroying NIC\n");
1045 efx_remove_interrupts(efx);
1046 falcon_remove_nic(efx);
1049 /**************************************************************************
1051 * NIC startup/shutdown
1053 *************************************************************************/
1055 static int efx_probe_all(struct efx_nic *efx)
1057 struct efx_channel *channel;
1061 rc = efx_probe_nic(efx);
1063 EFX_ERR(efx, "failed to create NIC\n");
1068 rc = efx_probe_port(efx);
1070 EFX_ERR(efx, "failed to create port\n");
1074 /* Create channels */
1075 efx_for_each_channel(channel, efx) {
1076 rc = efx_probe_channel(channel);
1078 EFX_ERR(efx, "failed to create channel %d\n",
1083 efx_set_channel_names(efx);
1088 efx_for_each_channel(channel, efx)
1089 efx_remove_channel(channel);
1090 efx_remove_port(efx);
1092 efx_remove_nic(efx);
1097 /* Called after previous invocation(s) of efx_stop_all, restarts the
1098 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1099 * and ensures that the port is scheduled to be reconfigured.
1100 * This function is safe to call multiple times when the NIC is in any
1102 static void efx_start_all(struct efx_nic *efx)
1104 struct efx_channel *channel;
1106 EFX_ASSERT_RESET_SERIALISED(efx);
1108 /* Check that it is appropriate to restart the interface. All
1109 * of these flags are safe to read under just the rtnl lock */
1110 if (efx->port_enabled)
1112 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1114 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1117 /* Mark the port as enabled so port reconfigurations can start, then
1118 * restart the transmit interface early so the watchdog timer stops */
1119 efx_start_port(efx);
1120 if (efx_dev_registered(efx))
1121 efx_wake_queue(efx);
1123 efx_for_each_channel(channel, efx)
1124 efx_start_channel(channel);
1126 falcon_enable_interrupts(efx);
1128 /* Start hardware monitor if we're in RUNNING */
1129 if (efx->state == STATE_RUNNING)
1130 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1131 efx_monitor_interval);
1134 /* Flush all delayed work. Should only be called when no more delayed work
1135 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1136 * since we're holding the rtnl_lock at this point. */
1137 static void efx_flush_all(struct efx_nic *efx)
1139 struct efx_rx_queue *rx_queue;
1141 /* Make sure the hardware monitor is stopped */
1142 cancel_delayed_work_sync(&efx->monitor_work);
1144 /* Ensure that all RX slow refills are complete. */
1145 efx_for_each_rx_queue(rx_queue, efx)
1146 cancel_delayed_work_sync(&rx_queue->work);
1148 /* Stop scheduled port reconfigurations */
1149 cancel_work_sync(&efx->mac_work);
1150 cancel_work_sync(&efx->phy_work);
1154 /* Quiesce hardware and software without bringing the link down.
1155 * Safe to call multiple times, when the nic and interface is in any
1156 * state. The caller is guaranteed to subsequently be in a position
1157 * to modify any hardware and software state they see fit without
1159 static void efx_stop_all(struct efx_nic *efx)
1161 struct efx_channel *channel;
1163 EFX_ASSERT_RESET_SERIALISED(efx);
1165 /* port_enabled can be read safely under the rtnl lock */
1166 if (!efx->port_enabled)
1169 /* Disable interrupts and wait for ISR to complete */
1170 falcon_disable_interrupts(efx);
1171 if (efx->legacy_irq)
1172 synchronize_irq(efx->legacy_irq);
1173 efx_for_each_channel(channel, efx) {
1175 synchronize_irq(channel->irq);
1178 /* Stop all NAPI processing and synchronous rx refills */
1179 efx_for_each_channel(channel, efx)
1180 efx_stop_channel(channel);
1182 /* Stop all asynchronous port reconfigurations. Since all
1183 * event processing has already been stopped, there is no
1184 * window to loose phy events */
1187 /* Flush efx_phy_work, efx_mac_work, refill_workqueue, monitor_work */
1190 /* Isolate the MAC from the TX and RX engines, so that queue
1191 * flushes will complete in a timely fashion. */
1192 falcon_drain_tx_fifo(efx);
1194 /* Stop the kernel transmit interface late, so the watchdog
1195 * timer isn't ticking over the flush */
1196 if (efx_dev_registered(efx)) {
1197 efx_stop_queue(efx);
1198 netif_tx_lock_bh(efx->net_dev);
1199 netif_tx_unlock_bh(efx->net_dev);
1203 static void efx_remove_all(struct efx_nic *efx)
1205 struct efx_channel *channel;
1207 efx_for_each_channel(channel, efx)
1208 efx_remove_channel(channel);
1209 efx_remove_port(efx);
1210 efx_remove_nic(efx);
1213 /* A convinience function to safely flush all the queues */
1214 void efx_flush_queues(struct efx_nic *efx)
1216 EFX_ASSERT_RESET_SERIALISED(efx);
1220 efx_fini_channels(efx);
1221 efx_init_channels(efx);
1226 /**************************************************************************
1228 * Interrupt moderation
1230 **************************************************************************/
1232 /* Set interrupt moderation parameters */
1233 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1236 struct efx_tx_queue *tx_queue;
1237 struct efx_rx_queue *rx_queue;
1239 EFX_ASSERT_RESET_SERIALISED(efx);
1241 efx_for_each_tx_queue(tx_queue, efx)
1242 tx_queue->channel->irq_moderation = tx_usecs;
1244 efx->irq_rx_adaptive = rx_adaptive;
1245 efx->irq_rx_moderation = rx_usecs;
1246 efx_for_each_rx_queue(rx_queue, efx)
1247 rx_queue->channel->irq_moderation = rx_usecs;
1250 /**************************************************************************
1254 **************************************************************************/
1256 /* Run periodically off the general workqueue. Serialised against
1257 * efx_reconfigure_port via the mac_lock */
1258 static void efx_monitor(struct work_struct *data)
1260 struct efx_nic *efx = container_of(data, struct efx_nic,
1264 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1265 raw_smp_processor_id());
1267 /* If the mac_lock is already held then it is likely a port
1268 * reconfiguration is already in place, which will likely do
1269 * most of the work of check_hw() anyway. */
1270 if (!mutex_trylock(&efx->mac_lock))
1272 if (!efx->port_enabled)
1274 rc = efx->board_info.monitor(efx);
1276 EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
1277 (rc == -ERANGE) ? "reported fault" : "failed");
1278 efx->phy_mode |= PHY_MODE_LOW_POWER;
1279 falcon_sim_phy_event(efx);
1281 efx->phy_op->poll(efx);
1282 efx->mac_op->poll(efx);
1285 mutex_unlock(&efx->mac_lock);
1287 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1288 efx_monitor_interval);
1291 /**************************************************************************
1295 *************************************************************************/
1298 * Context: process, rtnl_lock() held.
1300 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1302 struct efx_nic *efx = netdev_priv(net_dev);
1303 struct mii_ioctl_data *data = if_mii(ifr);
1305 EFX_ASSERT_RESET_SERIALISED(efx);
1307 /* Convert phy_id from older PRTAD/DEVAD format */
1308 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1309 (data->phy_id & 0xfc00) == 0x0400)
1310 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1312 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1315 /**************************************************************************
1319 **************************************************************************/
1321 static int efx_init_napi(struct efx_nic *efx)
1323 struct efx_channel *channel;
1325 efx_for_each_channel(channel, efx) {
1326 channel->napi_dev = efx->net_dev;
1327 netif_napi_add(channel->napi_dev, &channel->napi_str,
1328 efx_poll, napi_weight);
1333 static void efx_fini_napi(struct efx_nic *efx)
1335 struct efx_channel *channel;
1337 efx_for_each_channel(channel, efx) {
1338 if (channel->napi_dev)
1339 netif_napi_del(&channel->napi_str);
1340 channel->napi_dev = NULL;
1344 /**************************************************************************
1346 * Kernel netpoll interface
1348 *************************************************************************/
1350 #ifdef CONFIG_NET_POLL_CONTROLLER
1352 /* Although in the common case interrupts will be disabled, this is not
1353 * guaranteed. However, all our work happens inside the NAPI callback,
1354 * so no locking is required.
1356 static void efx_netpoll(struct net_device *net_dev)
1358 struct efx_nic *efx = netdev_priv(net_dev);
1359 struct efx_channel *channel;
1361 efx_for_each_channel(channel, efx)
1362 efx_schedule_channel(channel);
1367 /**************************************************************************
1369 * Kernel net device interface
1371 *************************************************************************/
1373 /* Context: process, rtnl_lock() held. */
1374 static int efx_net_open(struct net_device *net_dev)
1376 struct efx_nic *efx = netdev_priv(net_dev);
1377 EFX_ASSERT_RESET_SERIALISED(efx);
1379 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1380 raw_smp_processor_id());
1382 if (efx->state == STATE_DISABLED)
1384 if (efx->phy_mode & PHY_MODE_SPECIAL)
1391 /* Context: process, rtnl_lock() held.
1392 * Note that the kernel will ignore our return code; this method
1393 * should really be a void.
1395 static int efx_net_stop(struct net_device *net_dev)
1397 struct efx_nic *efx = netdev_priv(net_dev);
1399 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1400 raw_smp_processor_id());
1402 if (efx->state != STATE_DISABLED) {
1403 /* Stop the device and flush all the channels */
1405 efx_fini_channels(efx);
1406 efx_init_channels(efx);
1412 void efx_stats_disable(struct efx_nic *efx)
1414 spin_lock(&efx->stats_lock);
1415 ++efx->stats_disable_count;
1416 spin_unlock(&efx->stats_lock);
1419 void efx_stats_enable(struct efx_nic *efx)
1421 spin_lock(&efx->stats_lock);
1422 --efx->stats_disable_count;
1423 spin_unlock(&efx->stats_lock);
1426 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1427 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1429 struct efx_nic *efx = netdev_priv(net_dev);
1430 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1431 struct net_device_stats *stats = &net_dev->stats;
1433 /* Update stats if possible, but do not wait if another thread
1434 * is updating them or if MAC stats fetches are temporarily
1435 * disabled; slightly stale stats are acceptable.
1437 if (!spin_trylock(&efx->stats_lock))
1439 if (!efx->stats_disable_count) {
1440 efx->mac_op->update_stats(efx);
1441 falcon_update_nic_stats(efx);
1443 spin_unlock(&efx->stats_lock);
1445 stats->rx_packets = mac_stats->rx_packets;
1446 stats->tx_packets = mac_stats->tx_packets;
1447 stats->rx_bytes = mac_stats->rx_bytes;
1448 stats->tx_bytes = mac_stats->tx_bytes;
1449 stats->multicast = mac_stats->rx_multicast;
1450 stats->collisions = mac_stats->tx_collision;
1451 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1452 mac_stats->rx_length_error);
1453 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1454 stats->rx_crc_errors = mac_stats->rx_bad;
1455 stats->rx_frame_errors = mac_stats->rx_align_error;
1456 stats->rx_fifo_errors = mac_stats->rx_overflow;
1457 stats->rx_missed_errors = mac_stats->rx_missed;
1458 stats->tx_window_errors = mac_stats->tx_late_collision;
1460 stats->rx_errors = (stats->rx_length_errors +
1461 stats->rx_over_errors +
1462 stats->rx_crc_errors +
1463 stats->rx_frame_errors +
1464 stats->rx_fifo_errors +
1465 stats->rx_missed_errors +
1466 mac_stats->rx_symbol_error);
1467 stats->tx_errors = (stats->tx_window_errors +
1473 /* Context: netif_tx_lock held, BHs disabled. */
1474 static void efx_watchdog(struct net_device *net_dev)
1476 struct efx_nic *efx = netdev_priv(net_dev);
1478 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d:"
1479 " resetting channels\n",
1480 atomic_read(&efx->netif_stop_count), efx->port_enabled);
1482 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1486 /* Context: process, rtnl_lock() held. */
1487 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1489 struct efx_nic *efx = netdev_priv(net_dev);
1492 EFX_ASSERT_RESET_SERIALISED(efx);
1494 if (new_mtu > EFX_MAX_MTU)
1499 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1501 efx_fini_channels(efx);
1502 net_dev->mtu = new_mtu;
1503 efx_init_channels(efx);
1509 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1511 struct efx_nic *efx = netdev_priv(net_dev);
1512 struct sockaddr *addr = data;
1513 char *new_addr = addr->sa_data;
1515 EFX_ASSERT_RESET_SERIALISED(efx);
1517 if (!is_valid_ether_addr(new_addr)) {
1518 EFX_ERR(efx, "invalid ethernet MAC address requested: %pM\n",
1523 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1525 /* Reconfigure the MAC */
1526 efx_reconfigure_port(efx);
1531 /* Context: netif_addr_lock held, BHs disabled. */
1532 static void efx_set_multicast_list(struct net_device *net_dev)
1534 struct efx_nic *efx = netdev_priv(net_dev);
1535 struct dev_mc_list *mc_list = net_dev->mc_list;
1536 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1537 bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
1538 bool changed = (efx->promiscuous != promiscuous);
1543 efx->promiscuous = promiscuous;
1545 /* Build multicast hash table */
1546 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1547 memset(mc_hash, 0xff, sizeof(*mc_hash));
1549 memset(mc_hash, 0x00, sizeof(*mc_hash));
1550 for (i = 0; i < net_dev->mc_count; i++) {
1551 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1552 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1553 set_bit_le(bit, mc_hash->byte);
1554 mc_list = mc_list->next;
1558 if (!efx->port_enabled)
1559 /* Delay pushing settings until efx_start_port() */
1563 queue_work(efx->workqueue, &efx->phy_work);
1565 /* Create and activate new global multicast hash table */
1566 falcon_set_multicast_hash(efx);
1569 static const struct net_device_ops efx_netdev_ops = {
1570 .ndo_open = efx_net_open,
1571 .ndo_stop = efx_net_stop,
1572 .ndo_get_stats = efx_net_stats,
1573 .ndo_tx_timeout = efx_watchdog,
1574 .ndo_start_xmit = efx_hard_start_xmit,
1575 .ndo_validate_addr = eth_validate_addr,
1576 .ndo_do_ioctl = efx_ioctl,
1577 .ndo_change_mtu = efx_change_mtu,
1578 .ndo_set_mac_address = efx_set_mac_address,
1579 .ndo_set_multicast_list = efx_set_multicast_list,
1580 #ifdef CONFIG_NET_POLL_CONTROLLER
1581 .ndo_poll_controller = efx_netpoll,
1585 static void efx_update_name(struct efx_nic *efx)
1587 strcpy(efx->name, efx->net_dev->name);
1588 efx_mtd_rename(efx);
1589 efx_set_channel_names(efx);
1592 static int efx_netdev_event(struct notifier_block *this,
1593 unsigned long event, void *ptr)
1595 struct net_device *net_dev = ptr;
1597 if (net_dev->netdev_ops == &efx_netdev_ops &&
1598 event == NETDEV_CHANGENAME)
1599 efx_update_name(netdev_priv(net_dev));
1604 static struct notifier_block efx_netdev_notifier = {
1605 .notifier_call = efx_netdev_event,
1609 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1611 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1612 return sprintf(buf, "%d\n", efx->phy_type);
1614 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1616 static int efx_register_netdev(struct efx_nic *efx)
1618 struct net_device *net_dev = efx->net_dev;
1621 net_dev->watchdog_timeo = 5 * HZ;
1622 net_dev->irq = efx->pci_dev->irq;
1623 net_dev->netdev_ops = &efx_netdev_ops;
1624 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1625 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1627 /* Always start with carrier off; PHY events will detect the link */
1628 netif_carrier_off(efx->net_dev);
1630 /* Clear MAC statistics */
1631 efx->mac_op->update_stats(efx);
1632 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1634 rc = register_netdev(net_dev);
1636 EFX_ERR(efx, "could not register net dev\n");
1641 efx_update_name(efx);
1644 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1646 EFX_ERR(efx, "failed to init net dev attributes\n");
1647 goto fail_registered;
1653 unregister_netdev(net_dev);
1657 static void efx_unregister_netdev(struct efx_nic *efx)
1659 struct efx_tx_queue *tx_queue;
1664 BUG_ON(netdev_priv(efx->net_dev) != efx);
1666 /* Free up any skbs still remaining. This has to happen before
1667 * we try to unregister the netdev as running their destructors
1668 * may be needed to get the device ref. count to 0. */
1669 efx_for_each_tx_queue(tx_queue, efx)
1670 efx_release_tx_buffers(tx_queue);
1672 if (efx_dev_registered(efx)) {
1673 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1674 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1675 unregister_netdev(efx->net_dev);
1679 /**************************************************************************
1681 * Device reset and suspend
1683 **************************************************************************/
1685 /* Tears down the entire software state and most of the hardware state
1687 void efx_reset_down(struct efx_nic *efx, enum reset_type method,
1688 struct ethtool_cmd *ecmd)
1690 EFX_ASSERT_RESET_SERIALISED(efx);
1692 efx_stats_disable(efx);
1694 mutex_lock(&efx->mac_lock);
1695 mutex_lock(&efx->spi_lock);
1697 efx->phy_op->get_settings(efx, ecmd);
1699 efx_fini_channels(efx);
1700 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1701 efx->phy_op->fini(efx);
1704 /* This function will always ensure that the locks acquired in
1705 * efx_reset_down() are released. A failure return code indicates
1706 * that we were unable to reinitialise the hardware, and the
1707 * driver should be disabled. If ok is false, then the rx and tx
1708 * engines are not restarted, pending a RESET_DISABLE. */
1709 int efx_reset_up(struct efx_nic *efx, enum reset_type method,
1710 struct ethtool_cmd *ecmd, bool ok)
1714 EFX_ASSERT_RESET_SERIALISED(efx);
1716 rc = falcon_init_nic(efx);
1718 EFX_ERR(efx, "failed to initialise NIC\n");
1722 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1724 rc = efx->phy_op->init(efx);
1729 efx->port_initialized = false;
1733 efx_init_channels(efx);
1735 if (efx->phy_op->set_settings(efx, ecmd))
1736 EFX_ERR(efx, "could not restore PHY settings\n");
1739 mutex_unlock(&efx->spi_lock);
1740 mutex_unlock(&efx->mac_lock);
1744 efx_stats_enable(efx);
1749 /* Reset the NIC as transparently as possible. Do not reset the PHY
1750 * Note that the reset may fail, in which case the card will be left
1751 * in a most-probably-unusable state.
1753 * This function will sleep. You cannot reset from within an atomic
1754 * state; use efx_schedule_reset() instead.
1756 * Grabs the rtnl_lock.
1758 static int efx_reset(struct efx_nic *efx)
1760 struct ethtool_cmd ecmd;
1761 enum reset_type method = efx->reset_pending;
1764 /* Serialise with kernel interfaces */
1767 /* If we're not RUNNING then don't reset. Leave the reset_pending
1768 * flag set so that efx_pci_probe_main will be retried */
1769 if (efx->state != STATE_RUNNING) {
1770 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1774 EFX_INFO(efx, "resetting (%d)\n", method);
1776 efx_reset_down(efx, method, &ecmd);
1778 rc = falcon_reset_hw(efx, method);
1780 EFX_ERR(efx, "failed to reset hardware\n");
1784 /* Allow resets to be rescheduled. */
1785 efx->reset_pending = RESET_TYPE_NONE;
1787 /* Reinitialise bus-mastering, which may have been turned off before
1788 * the reset was scheduled. This is still appropriate, even in the
1789 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1790 * can respond to requests. */
1791 pci_set_master(efx->pci_dev);
1793 /* Leave device stopped if necessary */
1794 if (method == RESET_TYPE_DISABLE) {
1795 efx_reset_up(efx, method, &ecmd, false);
1798 rc = efx_reset_up(efx, method, &ecmd, true);
1803 EFX_ERR(efx, "has been disabled\n");
1804 efx->state = STATE_DISABLED;
1805 dev_close(efx->net_dev);
1807 EFX_LOG(efx, "reset complete\n");
1815 /* The worker thread exists so that code that cannot sleep can
1816 * schedule a reset for later.
1818 static void efx_reset_work(struct work_struct *data)
1820 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1825 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1827 enum reset_type method;
1829 if (efx->reset_pending != RESET_TYPE_NONE) {
1830 EFX_INFO(efx, "quenching already scheduled reset\n");
1835 case RESET_TYPE_INVISIBLE:
1836 case RESET_TYPE_ALL:
1837 case RESET_TYPE_WORLD:
1838 case RESET_TYPE_DISABLE:
1841 case RESET_TYPE_RX_RECOVERY:
1842 case RESET_TYPE_RX_DESC_FETCH:
1843 case RESET_TYPE_TX_DESC_FETCH:
1844 case RESET_TYPE_TX_SKIP:
1845 method = RESET_TYPE_INVISIBLE;
1848 method = RESET_TYPE_ALL;
1853 EFX_LOG(efx, "scheduling reset (%d:%d)\n", type, method);
1855 EFX_LOG(efx, "scheduling reset (%d)\n", method);
1857 efx->reset_pending = method;
1859 queue_work(reset_workqueue, &efx->reset_work);
1862 /**************************************************************************
1864 * List of NICs we support
1866 **************************************************************************/
1868 /* PCI device ID table */
1869 static struct pci_device_id efx_pci_table[] __devinitdata = {
1870 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1871 .driver_data = (unsigned long) &falcon_a_nic_type},
1872 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1873 .driver_data = (unsigned long) &falcon_b_nic_type},
1874 {0} /* end of list */
1877 /**************************************************************************
1879 * Dummy PHY/MAC/Board operations
1881 * Can be used for some unimplemented operations
1882 * Needed so all function pointers are valid and do not have to be tested
1885 **************************************************************************/
1886 int efx_port_dummy_op_int(struct efx_nic *efx)
1890 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1891 void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink) {}
1893 static struct efx_mac_operations efx_dummy_mac_operations = {
1894 .reconfigure = efx_port_dummy_op_void,
1895 .poll = efx_port_dummy_op_void,
1896 .irq = efx_port_dummy_op_void,
1899 static struct efx_phy_operations efx_dummy_phy_operations = {
1900 .init = efx_port_dummy_op_int,
1901 .reconfigure = efx_port_dummy_op_void,
1902 .poll = efx_port_dummy_op_void,
1903 .fini = efx_port_dummy_op_void,
1904 .clear_interrupt = efx_port_dummy_op_void,
1907 static struct efx_board efx_dummy_board_info = {
1908 .init = efx_port_dummy_op_int,
1909 .init_leds = efx_port_dummy_op_void,
1910 .set_id_led = efx_port_dummy_op_blink,
1911 .monitor = efx_port_dummy_op_int,
1912 .blink = efx_port_dummy_op_blink,
1913 .fini = efx_port_dummy_op_void,
1916 /**************************************************************************
1920 **************************************************************************/
1922 /* This zeroes out and then fills in the invariants in a struct
1923 * efx_nic (including all sub-structures).
1925 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1926 struct pci_dev *pci_dev, struct net_device *net_dev)
1928 struct efx_channel *channel;
1929 struct efx_tx_queue *tx_queue;
1930 struct efx_rx_queue *rx_queue;
1933 /* Initialise common structures */
1934 memset(efx, 0, sizeof(*efx));
1935 spin_lock_init(&efx->biu_lock);
1936 spin_lock_init(&efx->phy_lock);
1937 mutex_init(&efx->spi_lock);
1938 INIT_WORK(&efx->reset_work, efx_reset_work);
1939 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1940 efx->pci_dev = pci_dev;
1941 efx->state = STATE_INIT;
1942 efx->reset_pending = RESET_TYPE_NONE;
1943 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1944 efx->board_info = efx_dummy_board_info;
1946 efx->net_dev = net_dev;
1947 efx->rx_checksum_enabled = true;
1948 spin_lock_init(&efx->netif_stop_lock);
1949 spin_lock_init(&efx->stats_lock);
1950 efx->stats_disable_count = 1;
1951 mutex_init(&efx->mac_lock);
1952 efx->mac_op = &efx_dummy_mac_operations;
1953 efx->phy_op = &efx_dummy_phy_operations;
1954 efx->mdio.dev = net_dev;
1955 INIT_WORK(&efx->phy_work, efx_phy_work);
1956 INIT_WORK(&efx->mac_work, efx_mac_work);
1957 atomic_set(&efx->netif_stop_count, 1);
1959 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1960 channel = &efx->channel[i];
1962 channel->channel = i;
1963 channel->work_pending = false;
1965 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
1966 tx_queue = &efx->tx_queue[i];
1967 tx_queue->efx = efx;
1968 tx_queue->queue = i;
1969 tx_queue->buffer = NULL;
1970 tx_queue->channel = &efx->channel[0]; /* for safety */
1971 tx_queue->tso_headers_free = NULL;
1973 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1974 rx_queue = &efx->rx_queue[i];
1975 rx_queue->efx = efx;
1976 rx_queue->queue = i;
1977 rx_queue->channel = &efx->channel[0]; /* for safety */
1978 rx_queue->buffer = NULL;
1979 spin_lock_init(&rx_queue->add_lock);
1980 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
1985 /* Sanity-check NIC type */
1986 EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
1987 (efx->type->txd_ring_mask + 1));
1988 EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
1989 (efx->type->rxd_ring_mask + 1));
1990 EFX_BUG_ON_PARANOID(efx->type->evq_size &
1991 (efx->type->evq_size - 1));
1992 /* As close as we can get to guaranteeing that we don't overflow */
1993 EFX_BUG_ON_PARANOID(efx->type->evq_size <
1994 (efx->type->txd_ring_mask + 1 +
1995 efx->type->rxd_ring_mask + 1));
1996 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
1998 /* Higher numbered interrupt modes are less capable! */
1999 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2002 /* Would be good to use the net_dev name, but we're too early */
2003 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2005 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2006 if (!efx->workqueue)
2012 static void efx_fini_struct(struct efx_nic *efx)
2014 if (efx->workqueue) {
2015 destroy_workqueue(efx->workqueue);
2016 efx->workqueue = NULL;
2020 /**************************************************************************
2024 **************************************************************************/
2026 /* Main body of final NIC shutdown code
2027 * This is called only at module unload (or hotplug removal).
2029 static void efx_pci_remove_main(struct efx_nic *efx)
2031 EFX_ASSERT_RESET_SERIALISED(efx);
2033 /* Skip everything if we never obtained a valid membase */
2037 efx_fini_channels(efx);
2040 /* Shutdown the board, then the NIC and board state */
2041 efx->board_info.fini(efx);
2042 falcon_fini_interrupt(efx);
2045 efx_remove_all(efx);
2048 /* Final NIC shutdown
2049 * This is called only at module unload (or hotplug removal).
2051 static void efx_pci_remove(struct pci_dev *pci_dev)
2053 struct efx_nic *efx;
2055 efx = pci_get_drvdata(pci_dev);
2059 /* Mark the NIC as fini, then stop the interface */
2061 efx->state = STATE_FINI;
2062 dev_close(efx->net_dev);
2064 /* Allow any queued efx_resets() to complete */
2067 if (efx->membase == NULL)
2070 efx_unregister_netdev(efx);
2072 efx_mtd_remove(efx);
2074 /* Wait for any scheduled resets to complete. No more will be
2075 * scheduled from this point because efx_stop_all() has been
2076 * called, we are no longer registered with driverlink, and
2077 * the net_device's have been removed. */
2078 cancel_work_sync(&efx->reset_work);
2080 efx_pci_remove_main(efx);
2084 EFX_LOG(efx, "shutdown successful\n");
2086 pci_set_drvdata(pci_dev, NULL);
2087 efx_fini_struct(efx);
2088 free_netdev(efx->net_dev);
2091 /* Main body of NIC initialisation
2092 * This is called at module load (or hotplug insertion, theoretically).
2094 static int efx_pci_probe_main(struct efx_nic *efx)
2098 /* Do start-of-day initialisation */
2099 rc = efx_probe_all(efx);
2103 rc = efx_init_napi(efx);
2107 /* Initialise the board */
2108 rc = efx->board_info.init(efx);
2110 EFX_ERR(efx, "failed to initialise board\n");
2114 rc = falcon_init_nic(efx);
2116 EFX_ERR(efx, "failed to initialise NIC\n");
2120 rc = efx_init_port(efx);
2122 EFX_ERR(efx, "failed to initialise port\n");
2126 efx_init_channels(efx);
2128 rc = falcon_init_interrupt(efx);
2135 efx_fini_channels(efx);
2139 efx->board_info.fini(efx);
2143 efx_remove_all(efx);
2148 /* NIC initialisation
2150 * This is called at module load (or hotplug insertion,
2151 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2152 * sets up and registers the network devices with the kernel and hooks
2153 * the interrupt service routine. It does not prepare the device for
2154 * transmission; this is left to the first time one of the network
2155 * interfaces is brought up (i.e. efx_net_open).
2157 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2158 const struct pci_device_id *entry)
2160 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2161 struct net_device *net_dev;
2162 struct efx_nic *efx;
2165 /* Allocate and initialise a struct net_device and struct efx_nic */
2166 net_dev = alloc_etherdev(sizeof(*efx));
2169 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2170 NETIF_F_HIGHDMA | NETIF_F_TSO);
2172 net_dev->features |= NETIF_F_GRO;
2173 /* Mask for features that also apply to VLAN devices */
2174 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2175 NETIF_F_HIGHDMA | NETIF_F_TSO);
2176 efx = netdev_priv(net_dev);
2177 pci_set_drvdata(pci_dev, efx);
2178 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2182 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2184 /* Set up basic I/O (BAR mappings etc) */
2185 rc = efx_init_io(efx);
2189 /* No serialisation is required with the reset path because
2190 * we're in STATE_INIT. */
2191 for (i = 0; i < 5; i++) {
2192 rc = efx_pci_probe_main(efx);
2194 /* Serialise against efx_reset(). No more resets will be
2195 * scheduled since efx_stop_all() has been called, and we
2196 * have not and never have been registered with either
2197 * the rtnetlink or driverlink layers. */
2198 cancel_work_sync(&efx->reset_work);
2201 if (efx->reset_pending != RESET_TYPE_NONE) {
2202 /* If there was a scheduled reset during
2203 * probe, the NIC is probably hosed anyway */
2204 efx_pci_remove_main(efx);
2211 /* Retry if a recoverably reset event has been scheduled */
2212 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2213 (efx->reset_pending != RESET_TYPE_ALL))
2216 efx->reset_pending = RESET_TYPE_NONE;
2220 EFX_ERR(efx, "Could not reset NIC\n");
2224 /* Switch to the running state before we expose the device to
2225 * the OS. This is to ensure that the initial gathering of
2226 * MAC stats succeeds. */
2227 efx->state = STATE_RUNNING;
2229 efx_mtd_probe(efx); /* allowed to fail */
2231 rc = efx_register_netdev(efx);
2235 EFX_LOG(efx, "initialisation successful\n");
2239 efx_pci_remove_main(efx);
2244 efx_fini_struct(efx);
2246 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2247 free_netdev(net_dev);
2251 static struct pci_driver efx_pci_driver = {
2252 .name = EFX_DRIVER_NAME,
2253 .id_table = efx_pci_table,
2254 .probe = efx_pci_probe,
2255 .remove = efx_pci_remove,
2258 /**************************************************************************
2260 * Kernel module interface
2262 *************************************************************************/
2264 module_param(interrupt_mode, uint, 0444);
2265 MODULE_PARM_DESC(interrupt_mode,
2266 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2268 static int __init efx_init_module(void)
2272 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2274 rc = register_netdevice_notifier(&efx_netdev_notifier);
2278 refill_workqueue = create_workqueue("sfc_refill");
2279 if (!refill_workqueue) {
2283 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2284 if (!reset_workqueue) {
2289 rc = pci_register_driver(&efx_pci_driver);
2296 destroy_workqueue(reset_workqueue);
2298 destroy_workqueue(refill_workqueue);
2300 unregister_netdevice_notifier(&efx_netdev_notifier);
2305 static void __exit efx_exit_module(void)
2307 printk(KERN_INFO "Solarflare NET driver unloading\n");
2309 pci_unregister_driver(&efx_pci_driver);
2310 destroy_workqueue(reset_workqueue);
2311 destroy_workqueue(refill_workqueue);
2312 unregister_netdevice_notifier(&efx_netdev_notifier);
2316 module_init(efx_init_module);
2317 module_exit(efx_exit_module);
2319 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2320 "Solarflare Communications");
2321 MODULE_DESCRIPTION("Solarflare Communications network driver");
2322 MODULE_LICENSE("GPL");
2323 MODULE_DEVICE_TABLE(pci, efx_pci_table);