2 * Copyright (C) 2009 - QLogic Corporation.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called "COPYING".
28 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
34 /* give atleast 1ms for firmware to respond */
37 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
38 return QLCNIC_CDRP_RSP_TIMEOUT;
40 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
41 } while (!QLCNIC_CDRP_IS_RSP(rsp));
47 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
48 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
52 u32 rcode = QLCNIC_RCODE_SUCCESS;
53 struct pci_dev *pdev = adapter->pdev;
55 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
57 /* Acquire semaphore before accessing CRB */
58 if (qlcnic_api_lock(adapter))
59 return QLCNIC_RCODE_TIMEOUT;
61 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
62 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
63 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
64 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
65 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
67 rsp = qlcnic_poll_rsp(adapter);
69 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
70 dev_err(&pdev->dev, "card response timeout.\n");
71 rcode = QLCNIC_RCODE_TIMEOUT;
72 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
73 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
74 dev_err(&pdev->dev, "failed card response code:0x%x\n",
78 /* Release semaphore */
79 qlcnic_api_unlock(adapter);
85 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
87 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
89 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
90 if (qlcnic_issue_cmd(adapter,
91 adapter->ahw.pci_func,
92 adapter->fw_hal_version,
96 QLCNIC_CDRP_CMD_SET_MTU)) {
98 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
107 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
110 struct qlcnic_hostrq_rx_ctx *prq;
111 struct qlcnic_cardrsp_rx_ctx *prsp;
112 struct qlcnic_hostrq_rds_ring *prq_rds;
113 struct qlcnic_hostrq_sds_ring *prq_sds;
114 struct qlcnic_cardrsp_rds_ring *prsp_rds;
115 struct qlcnic_cardrsp_sds_ring *prsp_sds;
116 struct qlcnic_host_rds_ring *rds_ring;
117 struct qlcnic_host_sds_ring *sds_ring;
119 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
122 int i, nrds_rings, nsds_rings;
123 size_t rq_size, rsp_size;
124 u32 cap, reg, val, reg2;
127 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
129 nrds_rings = adapter->max_rds_rings;
130 nsds_rings = adapter->max_sds_rings;
133 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
136 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
139 addr = pci_alloc_consistent(adapter->pdev,
140 rq_size, &hostrq_phys_addr);
143 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
145 addr = pci_alloc_consistent(adapter->pdev,
146 rsp_size, &cardrsp_phys_addr);
151 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
153 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
155 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
156 | QLCNIC_CAP0_VALIDOFF);
157 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
159 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
161 prq->txrx_sds_binding = nsds_rings - 1;
163 prq->capabilities[0] = cpu_to_le32(cap);
164 prq->host_int_crb_mode =
165 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
166 prq->host_rds_crb_mode =
167 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
169 prq->num_rds_rings = cpu_to_le16(nrds_rings);
170 prq->num_sds_rings = cpu_to_le16(nsds_rings);
171 prq->rds_ring_offset = cpu_to_le32(0);
173 val = le32_to_cpu(prq->rds_ring_offset) +
174 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
175 prq->sds_ring_offset = cpu_to_le32(val);
177 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
178 le32_to_cpu(prq->rds_ring_offset));
180 for (i = 0; i < nrds_rings; i++) {
182 rds_ring = &recv_ctx->rds_rings[i];
183 rds_ring->producer = 0;
185 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
186 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
187 prq_rds[i].ring_kind = cpu_to_le32(i);
188 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
191 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
192 le32_to_cpu(prq->sds_ring_offset));
194 for (i = 0; i < nsds_rings; i++) {
196 sds_ring = &recv_ctx->sds_rings[i];
197 sds_ring->consumer = 0;
198 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
200 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
201 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
202 prq_sds[i].msi_index = cpu_to_le16(i);
205 phys_addr = hostrq_phys_addr;
206 err = qlcnic_issue_cmd(adapter,
207 adapter->ahw.pci_func,
208 adapter->fw_hal_version,
209 (u32)(phys_addr >> 32),
210 (u32)(phys_addr & 0xffffffff),
212 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
214 dev_err(&adapter->pdev->dev,
215 "Failed to create rx ctx in firmware%d\n", err);
220 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
221 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
223 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
224 rds_ring = &recv_ctx->rds_rings[i];
226 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
227 if (adapter->fw_hal_version == QLCNIC_FW_BASE)
228 rds_ring->crb_rcv_producer = qlcnic_get_ioaddr(adapter,
229 QLCNIC_REG(reg - 0x200));
231 rds_ring->crb_rcv_producer = adapter->ahw.pci_base0 +
235 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
236 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
238 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
239 sds_ring = &recv_ctx->sds_rings[i];
241 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
242 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
244 if (adapter->fw_hal_version == QLCNIC_FW_BASE) {
245 sds_ring->crb_sts_consumer = qlcnic_get_ioaddr(adapter,
246 QLCNIC_REG(reg - 0x200));
247 sds_ring->crb_intr_mask = qlcnic_get_ioaddr(adapter,
248 QLCNIC_REG(reg2 - 0x200));
250 sds_ring->crb_sts_consumer = adapter->ahw.pci_base0 +
252 sds_ring->crb_intr_mask = adapter->ahw.pci_base0 + reg2;
256 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
257 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
258 recv_ctx->virt_port = prsp->virt_port;
261 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
263 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
268 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
270 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
272 if (qlcnic_issue_cmd(adapter,
273 adapter->ahw.pci_func,
274 adapter->fw_hal_version,
275 recv_ctx->context_id,
276 QLCNIC_DESTROY_CTX_RESET,
278 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
280 dev_err(&adapter->pdev->dev,
281 "Failed to destroy rx ctx in firmware\n");
284 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
288 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
290 struct qlcnic_hostrq_tx_ctx *prq;
291 struct qlcnic_hostrq_cds_ring *prq_cds;
292 struct qlcnic_cardrsp_tx_ctx *prsp;
293 void *rq_addr, *rsp_addr;
294 size_t rq_size, rsp_size;
298 dma_addr_t rq_phys_addr, rsp_phys_addr;
299 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
301 /* reset host resources */
302 tx_ring->producer = 0;
303 tx_ring->sw_consumer = 0;
304 *(tx_ring->hw_consumer) = 0;
306 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
307 rq_addr = pci_alloc_consistent(adapter->pdev,
308 rq_size, &rq_phys_addr);
312 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
313 rsp_addr = pci_alloc_consistent(adapter->pdev,
314 rsp_size, &rsp_phys_addr);
320 memset(rq_addr, 0, rq_size);
321 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
323 memset(rsp_addr, 0, rsp_size);
324 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
326 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
328 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
330 prq->capabilities[0] = cpu_to_le32(temp);
332 prq->host_int_crb_mode =
333 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
335 prq->interrupt_ctl = 0;
337 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
339 prq_cds = &prq->cds_ring;
341 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
342 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
344 phys_addr = rq_phys_addr;
345 err = qlcnic_issue_cmd(adapter,
346 adapter->ahw.pci_func,
347 adapter->fw_hal_version,
348 (u32)(phys_addr >> 32),
349 ((u32)phys_addr & 0xffffffff),
351 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
353 if (err == QLCNIC_RCODE_SUCCESS) {
354 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
355 if (adapter->fw_hal_version == QLCNIC_FW_BASE)
356 tx_ring->crb_cmd_producer = qlcnic_get_ioaddr(adapter,
357 QLCNIC_REG(temp - 0x200));
359 tx_ring->crb_cmd_producer = adapter->ahw.pci_base0 +
362 adapter->tx_context_id =
363 le16_to_cpu(prsp->context_id);
365 dev_err(&adapter->pdev->dev,
366 "Failed to create tx ctx in firmware%d\n", err);
370 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
373 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
379 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
381 if (qlcnic_issue_cmd(adapter,
382 adapter->ahw.pci_func,
383 adapter->fw_hal_version,
384 adapter->tx_context_id,
385 QLCNIC_DESTROY_CTX_RESET,
387 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
389 dev_err(&adapter->pdev->dev,
390 "Failed to destroy tx ctx in firmware\n");
395 qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val)
398 if (qlcnic_issue_cmd(adapter,
399 adapter->ahw.pci_func,
400 adapter->fw_hal_version,
404 QLCNIC_CDRP_CMD_READ_PHY)) {
409 return QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
413 qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val)
415 return qlcnic_issue_cmd(adapter,
416 adapter->ahw.pci_func,
417 adapter->fw_hal_version,
421 QLCNIC_CDRP_CMD_WRITE_PHY);
424 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
429 struct qlcnic_recv_context *recv_ctx;
430 struct qlcnic_host_rds_ring *rds_ring;
431 struct qlcnic_host_sds_ring *sds_ring;
432 struct qlcnic_host_tx_ring *tx_ring;
434 struct pci_dev *pdev = adapter->pdev;
436 recv_ctx = &adapter->recv_ctx;
437 tx_ring = adapter->tx_ring;
439 tx_ring->hw_consumer = (__le32 *)pci_alloc_consistent(pdev, sizeof(u32),
440 &tx_ring->hw_cons_phys_addr);
441 if (tx_ring->hw_consumer == NULL) {
442 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
445 *(tx_ring->hw_consumer) = 0;
448 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
449 &tx_ring->phys_addr);
452 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
457 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
459 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
460 rds_ring = &recv_ctx->rds_rings[ring];
461 addr = pci_alloc_consistent(adapter->pdev,
462 RCV_DESC_RINGSIZE(rds_ring),
463 &rds_ring->phys_addr);
466 "failed to allocate rds ring [%d]\n", ring);
470 rds_ring->desc_head = (struct rcv_desc *)addr;
474 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
475 sds_ring = &recv_ctx->sds_rings[ring];
477 addr = pci_alloc_consistent(adapter->pdev,
478 STATUS_DESC_RINGSIZE(sds_ring),
479 &sds_ring->phys_addr);
482 "failed to allocate sds ring [%d]\n", ring);
486 sds_ring->desc_head = (struct status_desc *)addr;
492 qlcnic_free_hw_resources(adapter);
497 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
501 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
505 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
507 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
511 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
515 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
517 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
518 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
519 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
521 /* Allow dma queues to drain after context reset */
526 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
528 struct qlcnic_recv_context *recv_ctx;
529 struct qlcnic_host_rds_ring *rds_ring;
530 struct qlcnic_host_sds_ring *sds_ring;
531 struct qlcnic_host_tx_ring *tx_ring;
534 recv_ctx = &adapter->recv_ctx;
536 tx_ring = adapter->tx_ring;
537 if (tx_ring->hw_consumer != NULL) {
538 pci_free_consistent(adapter->pdev,
540 tx_ring->hw_consumer,
541 tx_ring->hw_cons_phys_addr);
542 tx_ring->hw_consumer = NULL;
545 if (tx_ring->desc_head != NULL) {
546 pci_free_consistent(adapter->pdev,
547 TX_DESC_RINGSIZE(tx_ring),
548 tx_ring->desc_head, tx_ring->phys_addr);
549 tx_ring->desc_head = NULL;
552 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
553 rds_ring = &recv_ctx->rds_rings[ring];
555 if (rds_ring->desc_head != NULL) {
556 pci_free_consistent(adapter->pdev,
557 RCV_DESC_RINGSIZE(rds_ring),
559 rds_ring->phys_addr);
560 rds_ring->desc_head = NULL;
564 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
565 sds_ring = &recv_ctx->sds_rings[ring];
567 if (sds_ring->desc_head != NULL) {
568 pci_free_consistent(adapter->pdev,
569 STATUS_DESC_RINGSIZE(sds_ring),
571 sds_ring->phys_addr);
572 sds_ring->desc_head = NULL;
577 /* Set MAC address of a NIC partition */
578 int qlcnic_set_mac_address(struct qlcnic_adapter *adapter, u8* mac)
581 u32 arg1, arg2, arg3;
583 arg1 = adapter->ahw.pci_func | BIT_9;
584 arg2 = mac[0] | (mac[1] << 8) | (mac[2] << 16) | (mac[3] << 24);
585 arg3 = mac[4] | (mac[5] << 16);
587 err = qlcnic_issue_cmd(adapter,
588 adapter->ahw.pci_func,
589 adapter->fw_hal_version,
593 QLCNIC_CDRP_CMD_MAC_ADDRESS);
595 if (err != QLCNIC_RCODE_SUCCESS) {
596 dev_err(&adapter->pdev->dev,
597 "Failed to set mac address%d\n", err);
604 /* Get MAC address of a NIC partition */
605 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
610 arg1 = adapter->ahw.pci_func | BIT_8;
611 err = qlcnic_issue_cmd(adapter,
612 adapter->ahw.pci_func,
613 adapter->fw_hal_version,
617 QLCNIC_CDRP_CMD_MAC_ADDRESS);
619 if (err == QLCNIC_RCODE_SUCCESS)
620 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
621 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
623 dev_err(&adapter->pdev->dev,
624 "Failed to get mac address%d\n", err);
631 /* Get info of a NIC partition */
632 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter, u8 func_id)
635 dma_addr_t nic_dma_t;
636 struct qlcnic_info *nic_info;
638 size_t nic_size = sizeof(struct qlcnic_info);
640 nic_info_addr = pci_alloc_consistent(adapter->pdev,
641 nic_size, &nic_dma_t);
644 memset(nic_info_addr, 0, nic_size);
646 nic_info = (struct qlcnic_info *) nic_info_addr;
647 err = qlcnic_issue_cmd(adapter,
648 adapter->ahw.pci_func,
649 adapter->fw_hal_version,
652 (func_id << 16 | nic_size),
653 QLCNIC_CDRP_CMD_GET_NIC_INFO);
655 if (err == QLCNIC_RCODE_SUCCESS) {
656 adapter->physical_port = le16_to_cpu(nic_info->phys_port);
657 adapter->switch_mode = le16_to_cpu(nic_info->switch_mode);
658 adapter->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
659 adapter->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
660 adapter->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
661 adapter->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
662 adapter->max_mtu = le16_to_cpu(nic_info->max_mtu);
663 adapter->capabilities = le32_to_cpu(nic_info->capabilities);
664 adapter->max_mac_filters = nic_info->max_mac_filters;
666 if (adapter->capabilities & BIT_6)
667 adapter->flags |= QLCNIC_ESWITCH_ENABLED;
669 adapter->flags &= ~QLCNIC_ESWITCH_ENABLED;
671 dev_info(&adapter->pdev->dev,
672 "phy port: %d switch_mode: %d,\n"
673 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
674 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
675 adapter->physical_port, adapter->switch_mode,
676 adapter->max_tx_ques, adapter->max_rx_ques,
677 adapter->min_tx_bw, adapter->max_tx_bw,
678 adapter->max_mtu, adapter->capabilities);
680 dev_err(&adapter->pdev->dev,
681 "Failed to get nic info%d\n", err);
685 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
689 /* Configure a NIC partition */
690 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
694 dma_addr_t nic_dma_t;
696 struct qlcnic_info *nic_info;
697 size_t nic_size = sizeof(struct qlcnic_info);
699 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
702 if (qlcnic_api_lock(adapter))
705 func_state = QLCRD32(adapter, QLCNIC_CRB_DEV_REF_COUNT);
706 if (QLC_DEV_CHECK_ACTIVE(func_state, nic->pci_func)) {
707 qlcnic_api_unlock(adapter);
711 qlcnic_api_unlock(adapter);
713 nic_info_addr = pci_alloc_consistent(adapter->pdev, nic_size,
718 memset(nic_info_addr, 0, nic_size);
719 nic_info = (struct qlcnic_info *)nic_info_addr;
721 nic_info->pci_func = cpu_to_le16(nic->pci_func);
722 nic_info->op_mode = cpu_to_le16(nic->op_mode);
723 nic_info->phys_port = cpu_to_le16(nic->phys_port);
724 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
725 nic_info->capabilities = cpu_to_le32(nic->capabilities);
726 nic_info->max_mac_filters = nic->max_mac_filters;
727 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
728 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
729 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
730 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
732 err = qlcnic_issue_cmd(adapter,
733 adapter->ahw.pci_func,
734 adapter->fw_hal_version,
738 QLCNIC_CDRP_CMD_SET_NIC_INFO);
740 if (err != QLCNIC_RCODE_SUCCESS) {
741 dev_err(&adapter->pdev->dev,
742 "Failed to set nic info%d\n", err);
746 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
750 /* Get PCI Info of a partition */
751 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter)
754 dma_addr_t pci_info_dma_t;
755 struct qlcnic_pci_info *npar;
757 size_t npar_size = sizeof(struct qlcnic_pci_info);
758 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
760 pci_info_addr = pci_alloc_consistent(adapter->pdev, pci_size,
764 memset(pci_info_addr, 0, pci_size);
767 adapter->npars = kzalloc(pci_size, GFP_KERNEL);
768 if (!adapter->npars) {
773 if (!adapter->eswitch)
774 adapter->eswitch = kzalloc(sizeof(struct qlcnic_eswitch) *
775 QLCNIC_NIU_MAX_XG_PORTS, GFP_KERNEL);
776 if (!adapter->eswitch) {
781 npar = (struct qlcnic_pci_info *) pci_info_addr;
782 err = qlcnic_issue_cmd(adapter,
783 adapter->ahw.pci_func,
784 adapter->fw_hal_version,
788 QLCNIC_CDRP_CMD_GET_PCI_INFO);
790 if (err == QLCNIC_RCODE_SUCCESS) {
791 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++) {
792 adapter->npars[i].id = le32_to_cpu(npar->id);
793 adapter->npars[i].active = le32_to_cpu(npar->active);
794 adapter->npars[i].type = le32_to_cpu(npar->type);
795 adapter->npars[i].default_port =
796 le32_to_cpu(npar->default_port);
797 adapter->npars[i].tx_min_bw =
798 le32_to_cpu(npar->tx_min_bw);
799 adapter->npars[i].tx_max_bw =
800 le32_to_cpu(npar->tx_max_bw);
801 memcpy(adapter->npars[i].mac, npar->mac, ETH_ALEN);
804 dev_err(&adapter->pdev->dev,
805 "Failed to get PCI Info%d\n", err);
806 kfree(adapter->npars);
812 kfree(adapter->npars);
813 adapter->npars = NULL;
816 pci_free_consistent(adapter->pdev, pci_size, pci_info_addr,
821 /* Reset a NIC partition */
823 int qlcnic_reset_partition(struct qlcnic_adapter *adapter, u8 func_no)
827 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
830 err = qlcnic_issue_cmd(adapter,
831 adapter->ahw.pci_func,
832 adapter->fw_hal_version,
836 QLCNIC_CDRP_CMD_RESET_NPAR);
838 if (err != QLCNIC_RCODE_SUCCESS) {
839 dev_err(&adapter->pdev->dev,
840 "Failed to issue reset partition%d\n", err);
847 /* Get eSwitch Capabilities */
848 int qlcnic_get_eswitch_capabilities(struct qlcnic_adapter *adapter, u8 port,
849 struct qlcnic_eswitch *eswitch)
854 if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC)
857 err = qlcnic_issue_cmd(adapter,
858 adapter->ahw.pci_func,
859 adapter->fw_hal_version,
863 QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY);
865 if (err == QLCNIC_RCODE_SUCCESS) {
866 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
867 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
869 eswitch->port = arg1 & 0xf;
870 eswitch->active_vports = LSB(arg2);
871 eswitch->max_ucast_filters = MSB(arg2);
872 eswitch->max_active_vlans = LSB(MSW(arg2));
874 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
876 eswitch->flags |= QLCNIC_SWITCH_PROMISC_MODE;
878 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
880 dev_err(&adapter->pdev->dev,
881 "Failed to get eswitch capabilities%d\n", err);
887 /* Get current status of eswitch */
888 int qlcnic_get_eswitch_status(struct qlcnic_adapter *adapter, u8 port,
889 struct qlcnic_eswitch *eswitch)
894 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
897 err = qlcnic_issue_cmd(adapter,
898 adapter->ahw.pci_func,
899 adapter->fw_hal_version,
903 QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS);
905 if (err == QLCNIC_RCODE_SUCCESS) {
906 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
907 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
909 eswitch->port = arg1 & 0xf;
910 eswitch->active_vports = LSB(arg2);
911 eswitch->active_ucast_filters = MSB(arg2);
912 eswitch->active_vlans = LSB(MSW(arg2));
914 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
916 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
919 dev_err(&adapter->pdev->dev,
920 "Failed to get eswitch status%d\n", err);
926 /* Enable/Disable eSwitch */
927 int qlcnic_toggle_eswitch(struct qlcnic_adapter *adapter, u8 id, u8 enable)
931 struct qlcnic_eswitch *eswitch;
933 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
936 eswitch = &adapter->eswitch[id];
940 arg1 = eswitch->port | (enable ? BIT_4 : 0);
941 arg2 = eswitch->active_vports | (eswitch->max_ucast_filters << 8) |
942 (eswitch->max_active_vlans << 16);
943 err = qlcnic_issue_cmd(adapter,
944 adapter->ahw.pci_func,
945 adapter->fw_hal_version,
949 QLCNIC_CDRP_CMD_TOGGLE_ESWITCH);
951 if (err != QLCNIC_RCODE_SUCCESS) {
952 dev_err(&adapter->pdev->dev,
953 "Failed to enable eswitch%d\n", eswitch->port);
954 eswitch->flags &= ~QLCNIC_SWITCH_ENABLE;
957 eswitch->flags |= QLCNIC_SWITCH_ENABLE;
958 dev_info(&adapter->pdev->dev,
959 "Enabled eSwitch for port %d\n", eswitch->port);
965 /* Configure eSwitch for port mirroring */
966 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
967 u8 enable_mirroring, u8 pci_func)
972 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
973 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
976 arg1 = id | (enable_mirroring ? BIT_4 : 0);
977 arg1 |= pci_func << 8;
979 err = qlcnic_issue_cmd(adapter,
980 adapter->ahw.pci_func,
981 adapter->fw_hal_version,
985 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
987 if (err != QLCNIC_RCODE_SUCCESS) {
988 dev_err(&adapter->pdev->dev,
989 "Failed to configure port mirroring%d on eswitch:%d\n",
992 dev_info(&adapter->pdev->dev,
993 "Configured eSwitch %d for port mirroring:%d\n",
1000 /* Configure eSwitch port */
1001 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter, u8 id,
1002 int vlan_tagging, u8 discard_tagged, u8 promsc_mode,
1003 u8 mac_learn, u8 pci_func, u16 vlan_id)
1007 struct qlcnic_eswitch *eswitch;
1009 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1012 eswitch = &adapter->eswitch[id];
1013 if (!(eswitch->flags & QLCNIC_SWITCH_ENABLE))
1016 arg1 = eswitch->port | (discard_tagged ? BIT_4 : 0);
1017 arg1 |= (promsc_mode ? BIT_6 : 0) | (mac_learn ? BIT_7 : 0);
1018 arg1 |= pci_func << 8;
1020 arg1 |= BIT_5 | (vlan_id << 16);
1022 err = qlcnic_issue_cmd(adapter,
1023 adapter->ahw.pci_func,
1024 adapter->fw_hal_version,
1028 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
1030 if (err != QLCNIC_RCODE_SUCCESS) {
1031 dev_err(&adapter->pdev->dev,
1032 "Failed to configure eswitch port%d\n", eswitch->port);
1033 eswitch->flags |= QLCNIC_SWITCH_ENABLE;
1035 eswitch->flags &= ~QLCNIC_SWITCH_ENABLE;
1036 dev_info(&adapter->pdev->dev,
1037 "Configured eSwitch for port %d\n", eswitch->port);