drivers/net/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/ip.h>
  37 #include <linux/tcp.h>
  38 #include <linux/ipv6.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/if_vlan.h>
  43
  44 #include "ixgbe.h"
  45 #include "ixgbe_common.h"
  46
  47 char ixgbe_driver_name[] = "ixgbe";
  48 static const char ixgbe_driver_string[] =
  49         "Intel(R) 10 Gigabit PCI Express Network Driver";
  50
  51 #define DRV_VERSION "1.3.18-k4"
  52 const char ixgbe_driver_version[] = DRV_VERSION;
  53 static const char ixgbe_copyright[] =
  54          "Copyright (c) 1999-2007 Intel Corporation.";
  55
  56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  57         [board_82598]                   = &ixgbe_82598_info,
  58 };
  59
  60 /* ixgbe_pci_tbl - PCI Device ID Table
  61  *
  62  * Wildcard entries (PCI_ANY_ID) should come last
  63  * Last entry must be all 0s
  64  *
  65  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  66  *   Class, Class Mask, private data (not used) }
  67  */
  68 static struct pci_device_id ixgbe_pci_tbl[] = {
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 #ifdef DEBUG
 121 /**
 122  * ixgbe_get_hw_dev_name - return device name string
 123  * used by hardware layer to print debugging information
 124  **/
 125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
 126 {
 127         struct ixgbe_adapter *adapter = hw->back;
 128         struct net_device *netdev = adapter->netdev;
 129         return netdev->name;
 130 }
 131 #endif
 132
 133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 134                            u8 msix_vector)
 135 {
 136         u32 ivar, index;
 137
 138         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 139         index = (int_alloc_entry >> 2) & 0x1F;
 140         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 141         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 142         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 143         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 144 }
 145
 146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 147                                              struct ixgbe_tx_buffer
 148                                              *tx_buffer_info)
 149 {
 150         if (tx_buffer_info->dma) {
 151                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 152                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 153                 tx_buffer_info->dma = 0;
 154         }
 155         if (tx_buffer_info->skb) {
 156                 dev_kfree_skb_any(tx_buffer_info->skb);
 157                 tx_buffer_info->skb = NULL;
 158         }
 159         /* tx_buffer_info must be completely set up in the transmit path */
 160 }
 161
 162 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 163                                        struct ixgbe_ring *tx_ring,
 164                                        unsigned int eop)
 165 {
 166         struct ixgbe_hw *hw = &adapter->hw;
 167         u32 head, tail;
 168
 169         /* Detect a transmit hang in hardware, this serializes the
 170          * check with the clearing of time_stamp and movement of eop */
 171         head = IXGBE_READ_REG(hw, tx_ring->head);
 172         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 173         adapter->detect_tx_hung = false;
 174         if ((head != tail) &&
 175             tx_ring->tx_buffer_info[eop].time_stamp &&
 176             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 177             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 178                 /* detected Tx unit hang */
 179                 union ixgbe_adv_tx_desc *tx_desc;
 180                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 181                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 182                         "  Tx Queue             <%d>\n"
 183                         "  TDH, TDT             <%x>, <%x>\n"
 184                         "  next_to_use          <%x>\n"
 185                         "  next_to_clean        <%x>\n"
 186                         "tx_buffer_info[next_to_clean]\n"
 187                         "  time_stamp           <%lx>\n"
 188                         "  jiffies              <%lx>\n",
 189                         tx_ring->queue_index,
 190                         head, tail,
 191                         tx_ring->next_to_use, eop,
 192                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 193                 return true;
 194         }
 195
 196         return false;
 197 }
 198
 199 #define IXGBE_MAX_TXD_PWR       14
 200 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 201
 202 /* Tx Descriptors needed, worst case */
 203 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 204                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 205 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 206         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1)   /* for context */
 207
 208 #define GET_TX_HEAD_FROM_RING(ring) (\
 209         *(volatile u32 *) \
 210         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 211 static void ixgbe_tx_timeout(struct net_device *netdev);
 212
 213 /**
 214  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 215  * @adapter: board private structure
 216  * @tx_ring: tx ring to clean
 217  **/
 218 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 219                                struct ixgbe_ring *tx_ring)
 220 {
 221         union ixgbe_adv_tx_desc *tx_desc;
 222         struct ixgbe_tx_buffer *tx_buffer_info;
 223         struct net_device *netdev = adapter->netdev;
 224         struct sk_buff *skb;
 225         unsigned int i;
 226         u32 head, oldhead;
 227         unsigned int count = 0;
 228         unsigned int total_bytes = 0, total_packets = 0;
 229
 230         rmb();
 231         head = GET_TX_HEAD_FROM_RING(tx_ring);
 232         head = le32_to_cpu(head);
 233         i = tx_ring->next_to_clean;
 234         while (1) {
 235                 while (i != head) {
 236                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 237                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 238                         skb = tx_buffer_info->skb;
 239
 240                         if (skb) {
 241                                 unsigned int segs, bytecount;
 242
 243                                 /* gso_segs is currently only valid for tcp */
 244                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 245                                 /* multiply data chunks by size of headers */
 246                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 247                                             skb->len;
 248                                 total_packets += segs;
 249                                 total_bytes += bytecount;
 250                         }
 251
 252                         ixgbe_unmap_and_free_tx_resource(adapter,
 253                                                          tx_buffer_info);
 254
 255                         i++;
 256                         if (i == tx_ring->count)
 257                                 i = 0;
 258
 259                         count++;
 260                         if (count == tx_ring->count)
 261                                 goto done_cleaning;
 262                 }
 263                 oldhead = head;
 264                 rmb();
 265                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 266                 head = le32_to_cpu(head);
 267                 if (head == oldhead)
 268                         goto done_cleaning;
 269         } /* while (1) */
 270
 271 done_cleaning:
 272         tx_ring->next_to_clean = i;
 273
 274 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 275         if (unlikely(count && netif_carrier_ok(netdev) &&
 276                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 277                 /* Make sure that anybody stopping the queue after this
 278                  * sees the new next_to_clean.
 279                  */
 280                 smp_mb();
 281                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 282                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 283                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 284                         ++adapter->restart_queue;
 285                 }
 286         }
 287
 288         if (adapter->detect_tx_hung) {
 289                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 290                         /* schedule immediate reset if we believe we hung */
 291                         DPRINTK(PROBE, INFO,
 292                                 "tx hang %d detected, resetting adapter\n",
 293                                 adapter->tx_timeout_count + 1);
 294                         ixgbe_tx_timeout(adapter->netdev);
 295                 }
 296         }
 297
 298         /* re-arm the interrupt */
 299         if ((total_packets >= tx_ring->work_limit) ||
 300             (count == tx_ring->count))
 301                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 302
 303         tx_ring->total_bytes += total_bytes;
 304         tx_ring->total_packets += total_packets;
 305         tx_ring->stats.bytes += total_bytes;
 306         tx_ring->stats.packets += total_packets;
 307         adapter->net_stats.tx_bytes += total_bytes;
 308         adapter->net_stats.tx_packets += total_packets;
 309         return (total_packets ? true : false);
 310 }
 311
 312 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
 313 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 314                                 struct ixgbe_ring *rx_ring)
 315 {
 316         u32 rxctrl;
 317         int cpu = get_cpu();
 318         int q = rx_ring - adapter->rx_ring;
 319
 320         if (rx_ring->cpu != cpu) {
 321                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 322                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 323                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 324                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 325                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 326                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 327                 rx_ring->cpu = cpu;
 328         }
 329         put_cpu();
 330 }
 331
 332 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 333                                 struct ixgbe_ring *tx_ring)
 334 {
 335         u32 txctrl;
 336         int cpu = get_cpu();
 337         int q = tx_ring - adapter->tx_ring;
 338
 339         if (tx_ring->cpu != cpu) {
 340                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 341                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 342                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 343                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 344                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 345                 tx_ring->cpu = cpu;
 346         }
 347         put_cpu();
 348 }
 349
 350 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 351 {
 352         int i;
 353
 354         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 355                 return;
 356
 357         for (i = 0; i < adapter->num_tx_queues; i++) {
 358                 adapter->tx_ring[i].cpu = -1;
 359                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 360         }
 361         for (i = 0; i < adapter->num_rx_queues; i++) {
 362                 adapter->rx_ring[i].cpu = -1;
 363                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 364         }
 365 }
 366
 367 static int __ixgbe_notify_dca(struct device *dev, void *data)
 368 {
 369         struct net_device *netdev = dev_get_drvdata(dev);
 370         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 371         unsigned long event = *(unsigned long *)data;
 372
 373         switch (event) {
 374         case DCA_PROVIDER_ADD:
 375                 /* if we're already enabled, don't do it again */
 376                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 377                         break;
 378                 /* Always use CB2 mode, difference is masked
 379                  * in the CB driver. */
 380                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 381                 if (dca_add_requester(dev) == 0) {
 382                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 383                         ixgbe_setup_dca(adapter);
 384                         break;
 385                 }
 386                 /* Fall Through since DCA is disabled. */
 387         case DCA_PROVIDER_REMOVE:
 388                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 389                         dca_remove_requester(dev);
 390                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 391                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 392                 }
 393                 break;
 394         }
 395
 396         return 0;
 397 }
 398
 399 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
 400 /**
 401  * ixgbe_receive_skb - Send a completed packet up the stack
 402  * @adapter: board private structure
 403  * @skb: packet to send up
 404  * @status: hardware indication of status of receive
 405  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 406  * @rx_desc: rx descriptor
 407  **/
 408 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 409                               struct sk_buff *skb, u8 status,
 410                               struct ixgbe_ring *ring,
 411                               union ixgbe_adv_rx_desc *rx_desc)
 412 {
 413         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 414         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 415
 416         if (adapter->netdev->features & NETIF_F_LRO &&
 417             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 418                 if (adapter->vlgrp && is_vlan)
 419                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 420                                                      adapter->vlgrp, tag,
 421                                                      rx_desc);
 422                 else
 423                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 424                 ring->lro_used = true;
 425         } else {
 426                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 427                         if (adapter->vlgrp && is_vlan)
 428                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 429                         else
 430                                 netif_receive_skb(skb);
 431                 } else {
 432                         if (adapter->vlgrp && is_vlan)
 433                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 434                         else
 435                                 netif_rx(skb);
 436                 }
 437         }
 438 }
 439
 440 /**
 441  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 442  * @adapter: address of board private structure
 443  * @status_err: hardware indication of status of receive
 444  * @skb: skb currently being received and modified
 445  **/
 446 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 447                                      u32 status_err, struct sk_buff *skb)
 448 {
 449         skb->ip_summed = CHECKSUM_NONE;
 450
 451         /* Rx csum disabled */
 452         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 453                 return;
 454
 455         /* if IP and error */
 456         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 457             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 458                 adapter->hw_csum_rx_error++;
 459                 return;
 460         }
 461
 462         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 463                 return;
 464
 465         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 466                 adapter->hw_csum_rx_error++;
 467                 return;
 468         }
 469
 470         /* It must be a TCP or UDP packet with a valid checksum */
 471         skb->ip_summed = CHECKSUM_UNNECESSARY;
 472         adapter->hw_csum_rx_good++;
 473 }
 474
 475 /**
 476  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 477  * @adapter: address of board private structure
 478  **/
 479 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 480                                    struct ixgbe_ring *rx_ring,
 481                                    int cleaned_count)
 482 {
 483         struct net_device *netdev = adapter->netdev;
 484         struct pci_dev *pdev = adapter->pdev;
 485         union ixgbe_adv_rx_desc *rx_desc;
 486         struct ixgbe_rx_buffer *bi;
 487         unsigned int i;
 488         unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
 489
 490         i = rx_ring->next_to_use;
 491         bi = &rx_ring->rx_buffer_info[i];
 492
 493         while (cleaned_count--) {
 494                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 495
 496                 if (!bi->page &&
 497                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 498                         bi->page = alloc_page(GFP_ATOMIC);
 499                         if (!bi->page) {
 500                                 adapter->alloc_rx_page_failed++;
 501                                 goto no_buffers;
 502                         }
 503                         bi->page_dma = pci_map_page(pdev, bi->page, 0,
 504                                                     PAGE_SIZE,
 505                                                     PCI_DMA_FROMDEVICE);
 506                 }
 507
 508                 if (!bi->skb) {
 509                         struct sk_buff *skb = netdev_alloc_skb(netdev, bufsz);
 510
 511                         if (!skb) {
 512                                 adapter->alloc_rx_buff_failed++;
 513                                 goto no_buffers;
 514                         }
 515
 516                         /*
 517                          * Make buffer alignment 2 beyond a 16 byte boundary
 518                          * this will result in a 16 byte aligned IP header after
 519                          * the 14 byte MAC header is removed
 520                          */
 521                         skb_reserve(skb, NET_IP_ALIGN);
 522
 523                         bi->skb = skb;
 524                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
 525                                                  PCI_DMA_FROMDEVICE);
 526                 }
 527                 /* Refresh the desc even if buffer_addrs didn't change because
 528                  * each write-back erases this info. */
 529                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 530                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 531                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 532                 } else {
 533                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 534                 }
 535
 536                 i++;
 537                 if (i == rx_ring->count)
 538                         i = 0;
 539                 bi = &rx_ring->rx_buffer_info[i];
 540         }
 541
 542 no_buffers:
 543         if (rx_ring->next_to_use != i) {
 544                 rx_ring->next_to_use = i;
 545                 if (i-- == 0)
 546                         i = (rx_ring->count - 1);
 547
 548                 /*
 549                  * Force memory writes to complete before letting h/w
 550                  * know there are new descriptors to fetch.  (Only
 551                  * applicable for weak-ordered memory model archs,
 552                  * such as IA-64).
 553                  */
 554                 wmb();
 555                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 556         }
 557 }
 558
 559 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 560 {
 561         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 562 }
 563
 564 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 565 {
 566         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 567 }
 568
 569 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 570                                struct ixgbe_ring *rx_ring,
 571                                int *work_done, int work_to_do)
 572 {
 573         struct net_device *netdev = adapter->netdev;
 574         struct pci_dev *pdev = adapter->pdev;
 575         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 576         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 577         struct sk_buff *skb;
 578         unsigned int i;
 579         u32 len, staterr;
 580         u16 hdr_info;
 581         bool cleaned = false;
 582         int cleaned_count = 0;
 583         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 584
 585         i = rx_ring->next_to_clean;
 586         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 587         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 588         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 589
 590         while (staterr & IXGBE_RXD_STAT_DD) {
 591                 u32 upper_len = 0;
 592                 if (*work_done >= work_to_do)
 593                         break;
 594                 (*work_done)++;
 595
 596                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 597                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 598                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 599                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 600                         if (hdr_info & IXGBE_RXDADV_SPH)
 601                                 adapter->rx_hdr_split++;
 602                         if (len > IXGBE_RX_HDR_SIZE)
 603                                 len = IXGBE_RX_HDR_SIZE;
 604                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 605                 } else {
 606                         len = le16_to_cpu(rx_desc->wb.upper.length);
 607                 }
 608
 609                 cleaned = true;
 610                 skb = rx_buffer_info->skb;
 611                 prefetch(skb->data - NET_IP_ALIGN);
 612                 rx_buffer_info->skb = NULL;
 613
 614                 if (len && !skb_shinfo(skb)->nr_frags) {
 615                         pci_unmap_single(pdev, rx_buffer_info->dma,
 616                                          rx_ring->rx_buf_len + NET_IP_ALIGN,
 617                                          PCI_DMA_FROMDEVICE);
 618                         skb_put(skb, len);
 619                 }
 620
 621                 if (upper_len) {
 622                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 623                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
 624                         rx_buffer_info->page_dma = 0;
 625                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 626                                            rx_buffer_info->page, 0, upper_len);
 627                         rx_buffer_info->page = NULL;
 628
 629                         skb->len += upper_len;
 630                         skb->data_len += upper_len;
 631                         skb->truesize += upper_len;
 632                 }
 633
 634                 i++;
 635                 if (i == rx_ring->count)
 636                         i = 0;
 637                 next_buffer = &rx_ring->rx_buffer_info[i];
 638
 639                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 640                 prefetch(next_rxd);
 641
 642                 cleaned_count++;
 643                 if (staterr & IXGBE_RXD_STAT_EOP) {
 644                         rx_ring->stats.packets++;
 645                         rx_ring->stats.bytes += skb->len;
 646                 } else {
 647                         rx_buffer_info->skb = next_buffer->skb;
 648                         rx_buffer_info->dma = next_buffer->dma;
 649                         next_buffer->skb = skb;
 650                         adapter->non_eop_descs++;
 651                         goto next_desc;
 652                 }
 653
 654                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 655                         dev_kfree_skb_irq(skb);
 656                         goto next_desc;
 657                 }
 658
 659                 ixgbe_rx_checksum(adapter, staterr, skb);
 660
 661                 /* probably a little skewed due to removing CRC */
 662                 total_rx_bytes += skb->len;
 663                 total_rx_packets++;
 664
 665                 skb->protocol = eth_type_trans(skb, netdev);
 666                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 667                 netdev->last_rx = jiffies;
 668
 669 next_desc:
 670                 rx_desc->wb.upper.status_error = 0;
 671
 672                 /* return some buffers to hardware, one at a time is too slow */
 673                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 674                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 675                         cleaned_count = 0;
 676                 }
 677
 678                 /* use prefetched values */
 679                 rx_desc = next_rxd;
 680                 rx_buffer_info = next_buffer;
 681
 682                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 683         }
 684
 685         if (rx_ring->lro_used) {
 686                 lro_flush_all(&rx_ring->lro_mgr);
 687                 rx_ring->lro_used = false;
 688         }
 689
 690         rx_ring->next_to_clean = i;
 691         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 692
 693         if (cleaned_count)
 694                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 695
 696         rx_ring->total_packets += total_rx_packets;
 697         rx_ring->total_bytes += total_rx_bytes;
 698         adapter->net_stats.rx_bytes += total_rx_bytes;
 699         adapter->net_stats.rx_packets += total_rx_packets;
 700
 701         return cleaned;
 702 }
 703
 704 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 705 /**
 706  * ixgbe_configure_msix - Configure MSI-X hardware
 707  * @adapter: board private structure
 708  *
 709  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 710  * interrupts.
 711  **/
 712 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 713 {
 714         struct ixgbe_q_vector *q_vector;
 715         int i, j, q_vectors, v_idx, r_idx;
 716         u32 mask;
 717
 718         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 719
 720         /* Populate the IVAR table and set the ITR values to the
 721          * corresponding register.
 722          */
 723         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 724                 q_vector = &adapter->q_vector[v_idx];
 725                 /* XXX for_each_bit(...) */
 726                 r_idx = find_first_bit(q_vector->rxr_idx,
 727                                       adapter->num_rx_queues);
 728
 729                 for (i = 0; i < q_vector->rxr_count; i++) {
 730                         j = adapter->rx_ring[r_idx].reg_idx;
 731                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 732                         r_idx = find_next_bit(q_vector->rxr_idx,
 733                                               adapter->num_rx_queues,
 734                                               r_idx + 1);
 735                 }
 736                 r_idx = find_first_bit(q_vector->txr_idx,
 737                                        adapter->num_tx_queues);
 738
 739                 for (i = 0; i < q_vector->txr_count; i++) {
 740                         j = adapter->tx_ring[r_idx].reg_idx;
 741                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 742                         r_idx = find_next_bit(q_vector->txr_idx,
 743                                               adapter->num_tx_queues,
 744                                               r_idx + 1);
 745                 }
 746
 747                 /* if this is a tx only vector halve the interrupt rate */
 748                 if (q_vector->txr_count && !q_vector->rxr_count)
 749                         q_vector->eitr = (adapter->eitr_param >> 1);
 750                 else
 751                         /* rx only */
 752                         q_vector->eitr = adapter->eitr_param;
 753
 754                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 755                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 756         }
 757
 758         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 759         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 760
 761         /* set up to autoclear timer, and the vectors */
 762         mask = IXGBE_EIMS_ENABLE_MASK;
 763         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 764         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 765 }
 766
 767 enum latency_range {
 768         lowest_latency = 0,
 769         low_latency = 1,
 770         bulk_latency = 2,
 771         latency_invalid = 255
 772 };
 773
 774 /**
 775  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 776  * @adapter: pointer to adapter
 777  * @eitr: eitr setting (ints per sec) to give last timeslice
 778  * @itr_setting: current throttle rate in ints/second
 779  * @packets: the number of packets during this measurement interval
 780  * @bytes: the number of bytes during this measurement interval
 781  *
 782  *      Stores a new ITR value based on packets and byte
 783  *      counts during the last interrupt.  The advantage of per interrupt
 784  *      computation is faster updates and more accurate ITR for the current
 785  *      traffic pattern.  Constants in this function were computed
 786  *      based on theoretical maximum wire speed and thresholds were set based
 787  *      on testing data as well as attempting to minimize response time
 788  *      while increasing bulk throughput.
 789  *      this functionality is controlled by the InterruptThrottleRate module
 790  *      parameter (see ixgbe_param.c)
 791  **/
 792 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 793                            u32 eitr, u8 itr_setting,
 794                            int packets, int bytes)
 795 {
 796         unsigned int retval = itr_setting;
 797         u32 timepassed_us;
 798         u64 bytes_perint;
 799
 800         if (packets == 0)
 801                 goto update_itr_done;
 802
 803
 804         /* simple throttlerate management
 805          *    0-20MB/s lowest (100000 ints/s)
 806          *   20-100MB/s low   (20000 ints/s)
 807          *  100-1249MB/s bulk (8000 ints/s)
 808          */
 809         /* what was last interrupt timeslice? */
 810         timepassed_us = 1000000/eitr;
 811         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 812
 813         switch (itr_setting) {
 814         case lowest_latency:
 815                 if (bytes_perint > adapter->eitr_low)
 816                         retval = low_latency;
 817                 break;
 818         case low_latency:
 819                 if (bytes_perint > adapter->eitr_high)
 820                         retval = bulk_latency;
 821                 else if (bytes_perint <= adapter->eitr_low)
 822                         retval = lowest_latency;
 823                 break;
 824         case bulk_latency:
 825                 if (bytes_perint <= adapter->eitr_high)
 826                         retval = low_latency;
 827                 break;
 828         }
 829
 830 update_itr_done:
 831         return retval;
 832 }
 833
 834 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 835 {
 836         struct ixgbe_adapter *adapter = q_vector->adapter;
 837         struct ixgbe_hw *hw = &adapter->hw;
 838         u32 new_itr;
 839         u8 current_itr, ret_itr;
 840         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 841                               sizeof(struct ixgbe_q_vector);
 842         struct ixgbe_ring *rx_ring, *tx_ring;
 843
 844         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 845         for (i = 0; i < q_vector->txr_count; i++) {
 846                 tx_ring = &(adapter->tx_ring[r_idx]);
 847                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 848                                            q_vector->tx_itr,
 849                                            tx_ring->total_packets,
 850                                            tx_ring->total_bytes);
 851                 /* if the result for this queue would decrease interrupt
 852                  * rate for this vector then use that result */
 853                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
 854                                     q_vector->tx_itr - 1 : ret_itr);
 855                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 856                                       r_idx + 1);
 857         }
 858
 859         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 860         for (i = 0; i < q_vector->rxr_count; i++) {
 861                 rx_ring = &(adapter->rx_ring[r_idx]);
 862                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 863                                            q_vector->rx_itr,
 864                                            rx_ring->total_packets,
 865                                            rx_ring->total_bytes);
 866                 /* if the result for this queue would decrease interrupt
 867                  * rate for this vector then use that result */
 868                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
 869                                     q_vector->rx_itr - 1 : ret_itr);
 870                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 871                                       r_idx + 1);
 872         }
 873
 874         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
 875
 876         switch (current_itr) {
 877         /* counts and packets in update_itr are dependent on these numbers */
 878         case lowest_latency:
 879                 new_itr = 100000;
 880                 break;
 881         case low_latency:
 882                 new_itr = 20000; /* aka hwitr = ~200 */
 883                 break;
 884         case bulk_latency:
 885         default:
 886                 new_itr = 8000;
 887                 break;
 888         }
 889
 890         if (new_itr != q_vector->eitr) {
 891                 u32 itr_reg;
 892                 /* do an exponential smoothing */
 893                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 894                 q_vector->eitr = new_itr;
 895                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 896                 /* must write high and low 16 bits to reset counter */
 897                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 898                         itr_reg);
 899                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 900         }
 901
 902         return;
 903 }
 904
 905
 906 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
 907 {
 908         struct ixgbe_hw *hw = &adapter->hw;
 909
 910         adapter->lsc_int++;
 911         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
 912         adapter->link_check_timeout = jiffies;
 913         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
 914                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 915                 schedule_work(&adapter->watchdog_task);
 916         }
 917 }
 918
 919 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 920 {
 921         struct net_device *netdev = data;
 922         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 923         struct ixgbe_hw *hw = &adapter->hw;
 924         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 925
 926         if (eicr & IXGBE_EICR_LSC)
 927                 ixgbe_check_lsc(adapter);
 928
 929         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 930                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 931
 932         return IRQ_HANDLED;
 933 }
 934
 935 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 936 {
 937         struct ixgbe_q_vector *q_vector = data;
 938         struct ixgbe_adapter  *adapter = q_vector->adapter;
 939         struct ixgbe_ring     *tx_ring;
 940         int i, r_idx;
 941
 942         if (!q_vector->txr_count)
 943                 return IRQ_HANDLED;
 944
 945         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 946         for (i = 0; i < q_vector->txr_count; i++) {
 947                 tx_ring = &(adapter->tx_ring[r_idx]);
 948 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
 949                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 950                         ixgbe_update_tx_dca(adapter, tx_ring);
 951 #endif
 952                 tx_ring->total_bytes = 0;
 953                 tx_ring->total_packets = 0;
 954                 ixgbe_clean_tx_irq(adapter, tx_ring);
 955                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 956                                       r_idx + 1);
 957         }
 958
 959         return IRQ_HANDLED;
 960 }
 961
 962 /**
 963  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 964  * @irq: unused
 965  * @data: pointer to our q_vector struct for this interrupt vector
 966  **/
 967 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 968 {
 969         struct ixgbe_q_vector *q_vector = data;
 970         struct ixgbe_adapter  *adapter = q_vector->adapter;
 971         struct ixgbe_ring  *rx_ring;
 972         int r_idx;
 973         int i;
 974
 975         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 976         for (i = 0;  i < q_vector->rxr_count; i++) {
 977                 rx_ring = &(adapter->rx_ring[r_idx]);
 978                 rx_ring->total_bytes = 0;
 979                 rx_ring->total_packets = 0;
 980                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 981                                       r_idx + 1);
 982         }
 983
 984         if (!q_vector->rxr_count)
 985                 return IRQ_HANDLED;
 986
 987         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 988         rx_ring = &(adapter->rx_ring[r_idx]);
 989         /* disable interrupts on this vector only */
 990         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
 991         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 992
 993         return IRQ_HANDLED;
 994 }
 995
 996 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 997 {
 998         ixgbe_msix_clean_rx(irq, data);
 999         ixgbe_msix_clean_tx(irq, data);
1000
1001         return IRQ_HANDLED;
1002 }
1003
1004 /**
1005  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1006  * @napi: napi struct with our devices info in it
1007  * @budget: amount of work driver is allowed to do this pass, in packets
1008  *
1009  **/
1010 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1011 {
1012         struct ixgbe_q_vector *q_vector =
1013                                container_of(napi, struct ixgbe_q_vector, napi);
1014         struct ixgbe_adapter *adapter = q_vector->adapter;
1015         struct ixgbe_ring *rx_ring;
1016         int work_done = 0;
1017         long r_idx;
1018
1019         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1020         rx_ring = &(adapter->rx_ring[r_idx]);
1021 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1022         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1023                 ixgbe_update_rx_dca(adapter, rx_ring);
1024 #endif
1025
1026         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1027
1028         /* If all Rx work done, exit the polling mode */
1029         if (work_done < budget) {
1030                 netif_rx_complete(adapter->netdev, napi);
1031                 if (adapter->itr_setting & 3)
1032                         ixgbe_set_itr_msix(q_vector);
1033                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1034                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1035         }
1036
1037         return work_done;
1038 }
1039
1040 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1041                                      int r_idx)
1042 {
1043         a->q_vector[v_idx].adapter = a;
1044         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1045         a->q_vector[v_idx].rxr_count++;
1046         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1047 }
1048
1049 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1050                                      int r_idx)
1051 {
1052         a->q_vector[v_idx].adapter = a;
1053         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1054         a->q_vector[v_idx].txr_count++;
1055         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1056 }
1057
1058 /**
1059  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1060  * @adapter: board private structure to initialize
1061  * @vectors: allotted vector count for descriptor rings
1062  *
1063  * This function maps descriptor rings to the queue-specific vectors
1064  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1065  * one vector per ring/queue, but on a constrained vector budget, we
1066  * group the rings as "efficiently" as possible.  You would add new
1067  * mapping configurations in here.
1068  **/
1069 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1070                                       int vectors)
1071 {
1072         int v_start = 0;
1073         int rxr_idx = 0, txr_idx = 0;
1074         int rxr_remaining = adapter->num_rx_queues;
1075         int txr_remaining = adapter->num_tx_queues;
1076         int i, j;
1077         int rqpv, tqpv;
1078         int err = 0;
1079
1080         /* No mapping required if MSI-X is disabled. */
1081         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1082                 goto out;
1083
1084         /*
1085          * The ideal configuration...
1086          * We have enough vectors to map one per queue.
1087          */
1088         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1089                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1090                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1091
1092                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1093                         map_vector_to_txq(adapter, v_start, txr_idx);
1094
1095                 goto out;
1096         }
1097
1098         /*
1099          * If we don't have enough vectors for a 1-to-1
1100          * mapping, we'll have to group them so there are
1101          * multiple queues per vector.
1102          */
1103         /* Re-adjusting *qpv takes care of the remainder. */
1104         for (i = v_start; i < vectors; i++) {
1105                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1106                 for (j = 0; j < rqpv; j++) {
1107                         map_vector_to_rxq(adapter, i, rxr_idx);
1108                         rxr_idx++;
1109                         rxr_remaining--;
1110                 }
1111         }
1112         for (i = v_start; i < vectors; i++) {
1113                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1114                 for (j = 0; j < tqpv; j++) {
1115                         map_vector_to_txq(adapter, i, txr_idx);
1116                         txr_idx++;
1117                         txr_remaining--;
1118                 }
1119         }
1120
1121 out:
1122         return err;
1123 }
1124
1125 /**
1126  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1127  * @adapter: board private structure
1128  *
1129  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1130  * interrupts from the kernel.
1131  **/
1132 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1133 {
1134         struct net_device *netdev = adapter->netdev;
1135         irqreturn_t (*handler)(int, void *);
1136         int i, vector, q_vectors, err;
1137
1138         /* Decrement for Other and TCP Timer vectors */
1139         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1140
1141         /* Map the Tx/Rx rings to the vectors we were allotted. */
1142         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1143         if (err)
1144                 goto out;
1145
1146 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1147                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1148                          &ixgbe_msix_clean_many)
1149         for (vector = 0; vector < q_vectors; vector++) {
1150                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1151                 sprintf(adapter->name[vector], "%s:v%d-%s",
1152                         netdev->name, vector,
1153                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1154                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1155                 err = request_irq(adapter->msix_entries[vector].vector,
1156                                   handler, 0, adapter->name[vector],
1157                                   &(adapter->q_vector[vector]));
1158                 if (err) {
1159                         DPRINTK(PROBE, ERR,
1160                                 "request_irq failed for MSIX interrupt "
1161                                 "Error: %d\n", err);
1162                         goto free_queue_irqs;
1163                 }
1164         }
1165
1166         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1167         err = request_irq(adapter->msix_entries[vector].vector,
1168                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1169         if (err) {
1170                 DPRINTK(PROBE, ERR,
1171                         "request_irq for msix_lsc failed: %d\n", err);
1172                 goto free_queue_irqs;
1173         }
1174
1175         return 0;
1176
1177 free_queue_irqs:
1178         for (i = vector - 1; i >= 0; i--)
1179                 free_irq(adapter->msix_entries[--vector].vector,
1180                          &(adapter->q_vector[i]));
1181         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1182         pci_disable_msix(adapter->pdev);
1183         kfree(adapter->msix_entries);
1184         adapter->msix_entries = NULL;
1185 out:
1186         return err;
1187 }
1188
1189 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1190 {
1191         struct ixgbe_hw *hw = &adapter->hw;
1192         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1193         u8 current_itr;
1194         u32 new_itr = q_vector->eitr;
1195         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1196         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1197
1198         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1199                                             q_vector->tx_itr,
1200                                             tx_ring->total_packets,
1201                                             tx_ring->total_bytes);
1202         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1203                                             q_vector->rx_itr,
1204                                             rx_ring->total_packets,
1205                                             rx_ring->total_bytes);
1206
1207         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1208
1209         switch (current_itr) {
1210         /* counts and packets in update_itr are dependent on these numbers */
1211         case lowest_latency:
1212                 new_itr = 100000;
1213                 break;
1214         case low_latency:
1215                 new_itr = 20000; /* aka hwitr = ~200 */
1216                 break;
1217         case bulk_latency:
1218                 new_itr = 8000;
1219                 break;
1220         default:
1221                 break;
1222         }
1223
1224         if (new_itr != q_vector->eitr) {
1225                 u32 itr_reg;
1226                 /* do an exponential smoothing */
1227                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1228                 q_vector->eitr = new_itr;
1229                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1230                 /* must write high and low 16 bits to reset counter */
1231                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1232         }
1233
1234         return;
1235 }
1236
1237 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1238
1239 /**
1240  * ixgbe_intr - legacy mode Interrupt Handler
1241  * @irq: interrupt number
1242  * @data: pointer to a network interface device structure
1243  * @pt_regs: CPU registers structure
1244  **/
1245 static irqreturn_t ixgbe_intr(int irq, void *data)
1246 {
1247         struct net_device *netdev = data;
1248         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1249         struct ixgbe_hw *hw = &adapter->hw;
1250         u32 eicr;
1251
1252
1253         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1254          * therefore no explict interrupt disable is necessary */
1255         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1256         if (!eicr) {
1257                 /* shared interrupt alert!
1258                  * make sure interrupts are enabled because the read will
1259                  * have disabled interrupts due to EIAM */
1260                 ixgbe_irq_enable(adapter);
1261                 return IRQ_NONE;        /* Not our interrupt */
1262         }
1263
1264         if (eicr & IXGBE_EICR_LSC)
1265                 ixgbe_check_lsc(adapter);
1266
1267         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1268                 adapter->tx_ring[0].total_packets = 0;
1269                 adapter->tx_ring[0].total_bytes = 0;
1270                 adapter->rx_ring[0].total_packets = 0;
1271                 adapter->rx_ring[0].total_bytes = 0;
1272                 /* would disable interrupts here but EIAM disabled it */
1273                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1274         }
1275
1276         return IRQ_HANDLED;
1277 }
1278
1279 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1280 {
1281         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1282
1283         for (i = 0; i < q_vectors; i++) {
1284                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1285                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1286                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1287                 q_vector->rxr_count = 0;
1288                 q_vector->txr_count = 0;
1289         }
1290 }
1291
1292 /**
1293  * ixgbe_request_irq - initialize interrupts
1294  * @adapter: board private structure
1295  *
1296  * Attempts to configure interrupts using the best available
1297  * capabilities of the hardware and kernel.
1298  **/
1299 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1300 {
1301         struct net_device *netdev = adapter->netdev;
1302         int err;
1303
1304         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1305                 err = ixgbe_request_msix_irqs(adapter);
1306         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1307                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1308                                   netdev->name, netdev);
1309         } else {
1310                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1311                                   netdev->name, netdev);
1312         }
1313
1314         if (err)
1315                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1316
1317         return err;
1318 }
1319
1320 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1321 {
1322         struct net_device *netdev = adapter->netdev;
1323
1324         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1325                 int i, q_vectors;
1326
1327                 q_vectors = adapter->num_msix_vectors;
1328
1329                 i = q_vectors - 1;
1330                 free_irq(adapter->msix_entries[i].vector, netdev);
1331
1332                 i--;
1333                 for (; i >= 0; i--) {
1334                         free_irq(adapter->msix_entries[i].vector,
1335                                  &(adapter->q_vector[i]));
1336                 }
1337
1338                 ixgbe_reset_q_vectors(adapter);
1339         } else {
1340                 free_irq(adapter->pdev->irq, netdev);
1341         }
1342 }
1343
1344 /**
1345  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1346  * @adapter: board private structure
1347  **/
1348 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1349 {
1350         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1351         IXGBE_WRITE_FLUSH(&adapter->hw);
1352         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1353                 int i;
1354                 for (i = 0; i < adapter->num_msix_vectors; i++)
1355                         synchronize_irq(adapter->msix_entries[i].vector);
1356         } else {
1357                 synchronize_irq(adapter->pdev->irq);
1358         }
1359 }
1360
1361 /**
1362  * ixgbe_irq_enable - Enable default interrupt generation settings
1363  * @adapter: board private structure
1364  **/
1365 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1366 {
1367         u32 mask;
1368         mask = IXGBE_EIMS_ENABLE_MASK;
1369         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1370         IXGBE_WRITE_FLUSH(&adapter->hw);
1371 }
1372
1373 /**
1374  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1375  *
1376  **/
1377 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1378 {
1379         struct ixgbe_hw *hw = &adapter->hw;
1380
1381         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1382                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1383
1384         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1385         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1386
1387         map_vector_to_rxq(adapter, 0, 0);
1388         map_vector_to_txq(adapter, 0, 0);
1389
1390         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1391 }
1392
1393 /**
1394  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1395  * @adapter: board private structure
1396  *
1397  * Configure the Tx unit of the MAC after a reset.
1398  **/
1399 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1400 {
1401         u64 tdba, tdwba;
1402         struct ixgbe_hw *hw = &adapter->hw;
1403         u32 i, j, tdlen, txctrl;
1404
1405         /* Setup the HW Tx Head and Tail descriptor pointers */
1406         for (i = 0; i < adapter->num_tx_queues; i++) {
1407                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1408                 j = ring->reg_idx;
1409                 tdba = ring->dma;
1410                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1411                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1412                                 (tdba & DMA_32BIT_MASK));
1413                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1414                 tdwba = ring->dma +
1415                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1416                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1417                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1418                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1419                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1420                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1421                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1422                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1423                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1424                 /* Disable Tx Head Writeback RO bit, since this hoses
1425                  * bookkeeping if things aren't delivered in order.
1426                  */
1427                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1428                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1429                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1430         }
1431 }
1432
1433 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1434
1435 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1436 {
1437         struct ixgbe_ring *rx_ring;
1438         u32 srrctl;
1439         int queue0;
1440         unsigned long mask;
1441
1442         /* program one srrctl register per VMDq index */
1443         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1444                 long shift, len;
1445                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1446                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1447                 shift = find_first_bit(&mask, len);
1448                 queue0 = index & mask;
1449                 index = (index & mask) >> shift;
1450         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1451         } else {
1452                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1453                 queue0 = index & mask;
1454                 index = index & mask;
1455         }
1456
1457         rx_ring = &adapter->rx_ring[queue0];
1458
1459         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1460
1461         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1462         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1463
1464         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1465                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1466                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1467                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1468                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1469                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1470         } else {
1471                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1472
1473                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1474                         srrctl |= IXGBE_RXBUFFER_2048 >>
1475                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1476                 else
1477                         srrctl |= rx_ring->rx_buf_len >>
1478                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1479         }
1480         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1481 }
1482
1483 /**
1484  * ixgbe_get_skb_hdr - helper function for LRO header processing
1485  * @skb: pointer to sk_buff to be added to LRO packet
1486  * @iphdr: pointer to tcp header structure
1487  * @tcph: pointer to tcp header structure
1488  * @hdr_flags: pointer to header flags
1489  * @priv: private data
1490  **/
1491 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1492                              u64 *hdr_flags, void *priv)
1493 {
1494         union ixgbe_adv_rx_desc *rx_desc = priv;
1495
1496         /* Verify that this is a valid IPv4 TCP packet */
1497         if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1498              (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1499                 return -1;
1500
1501         /* Set network headers */
1502         skb_reset_network_header(skb);
1503         skb_set_transport_header(skb, ip_hdrlen(skb));
1504         *iphdr = ip_hdr(skb);
1505         *tcph = tcp_hdr(skb);
1506         *hdr_flags = LRO_IPV4 | LRO_TCP;
1507         return 0;
1508 }
1509
1510 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1511                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1512
1513 /**
1514  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1515  * @adapter: board private structure
1516  *
1517  * Configure the Rx unit of the MAC after a reset.
1518  **/
1519 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1520 {
1521         u64 rdba;
1522         struct ixgbe_hw *hw = &adapter->hw;
1523         struct net_device *netdev = adapter->netdev;
1524         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1525         int i, j;
1526         u32 rdlen, rxctrl, rxcsum;
1527         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1528                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1529                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1530         u32 fctrl, hlreg0;
1531         u32 pages;
1532         u32 reta = 0, mrqc;
1533         u32 rdrxctl;
1534         int rx_buf_len;
1535
1536         /* Decide whether to use packet split mode or not */
1537         if (netdev->mtu > ETH_DATA_LEN)
1538                 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1539         else
1540                 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1541
1542         /* Set the RX buffer length according to the mode */
1543         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1544                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1545         } else {
1546                 if (netdev->mtu <= ETH_DATA_LEN)
1547                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1548                 else
1549                         rx_buf_len = ALIGN(max_frame, 1024);
1550         }
1551
1552         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1553         fctrl |= IXGBE_FCTRL_BAM;
1554         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1555         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1556
1557         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1558         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1559                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1560         else
1561                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1562         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1563
1564         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1565
1566         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1567         /* disable receives while setting up the descriptors */
1568         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1569         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1570
1571         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1572          * the Base and Length of the Rx Descriptor Ring */
1573         for (i = 0; i < adapter->num_rx_queues; i++) {
1574                 rdba = adapter->rx_ring[i].dma;
1575                 j = adapter->rx_ring[i].reg_idx;
1576                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1577                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1578                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1579                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1580                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1581                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1582                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1583                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1584                 /* Intitial LRO Settings */
1585                 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1586                 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1587                 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1588                 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1589                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1590                         adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1591                 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1592                 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1593                 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1594
1595                 ixgbe_configure_srrctl(adapter, j);
1596         }
1597
1598         /*
1599          * For VMDq support of different descriptor types or
1600          * buffer sizes through the use of multiple SRRCTL
1601          * registers, RDRXCTL.MVMEN must be set to 1
1602          *
1603          * also, the manual doesn't mention it clearly but DCA hints
1604          * will only use queue 0's tags unless this bit is set.  Side
1605          * effects of setting this bit are only that SRRCTL must be
1606          * fully programmed [0..15]
1607          */
1608         rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1609         rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1610         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1611
1612
1613         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1614                 /* Fill out redirection table */
1615                 for (i = 0, j = 0; i < 128; i++, j++) {
1616                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1617                                 j = 0;
1618                         /* reta = 4-byte sliding window of
1619                          * 0x00..(indices-1)(indices-1)00..etc. */
1620                         reta = (reta << 8) | (j * 0x11);
1621                         if ((i & 3) == 3)
1622                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1623                 }
1624
1625                 /* Fill out hash function seeds */
1626                 for (i = 0; i < 10; i++)
1627                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1628
1629                 mrqc = IXGBE_MRQC_RSSEN
1630                     /* Perform hash on these packet types */
1631                        | IXGBE_MRQC_RSS_FIELD_IPV4
1632                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1633                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1634                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1635                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1636                        | IXGBE_MRQC_RSS_FIELD_IPV6
1637                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1638                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1639                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1640                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1641         }
1642
1643         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1644
1645         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1646             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1647                 /* Disable indicating checksum in descriptor, enables
1648                  * RSS hash */
1649                 rxcsum |= IXGBE_RXCSUM_PCSD;
1650         }
1651         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1652                 /* Enable IPv4 payload checksum for UDP fragments
1653                  * if PCSD is not set */
1654                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1655         }
1656
1657         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1658 }
1659
1660 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1661                                    struct vlan_group *grp)
1662 {
1663         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1664         u32 ctrl;
1665
1666         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1667                 ixgbe_irq_disable(adapter);
1668         adapter->vlgrp = grp;
1669
1670         if (grp) {
1671                 /* enable VLAN tag insert/strip */
1672                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1673                 ctrl |= IXGBE_VLNCTRL_VME;
1674                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1675                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1676         }
1677
1678         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1679                 ixgbe_irq_enable(adapter);
1680 }
1681
1682 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1683 {
1684         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1685
1686         /* add VID to filter table */
1687         ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1688 }
1689
1690 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1691 {
1692         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1693
1694         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1695                 ixgbe_irq_disable(adapter);
1696
1697         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1698
1699         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1700                 ixgbe_irq_enable(adapter);
1701
1702         /* remove VID from filter table */
1703         ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1704 }
1705
1706 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1707 {
1708         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1709
1710         if (adapter->vlgrp) {
1711                 u16 vid;
1712                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1713                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1714                                 continue;
1715                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1716                 }
1717         }
1718 }
1719
1720 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1721 {
1722         struct dev_mc_list *mc_ptr;
1723         u8 *addr = *mc_addr_ptr;
1724         *vmdq = 0;
1725
1726         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1727         if (mc_ptr->next)
1728                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1729         else
1730                 *mc_addr_ptr = NULL;
1731
1732         return addr;
1733 }
1734
1735 /**
1736  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1737  * @netdev: network interface device structure
1738  *
1739  * The set_rx_method entry point is called whenever the unicast/multicast
1740  * address list or the network interface flags are updated.  This routine is
1741  * responsible for configuring the hardware for proper unicast, multicast and
1742  * promiscuous mode.
1743  **/
1744 static void ixgbe_set_rx_mode(struct net_device *netdev)
1745 {
1746         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1747         struct ixgbe_hw *hw = &adapter->hw;
1748         u32 fctrl, vlnctrl;
1749         u8 *addr_list = NULL;
1750         int addr_count = 0;
1751
1752         /* Check for Promiscuous and All Multicast modes */
1753
1754         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1755         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1756
1757         if (netdev->flags & IFF_PROMISC) {
1758                 hw->addr_ctrl.user_set_promisc = 1;
1759                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1760                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1761         } else {
1762                 if (netdev->flags & IFF_ALLMULTI) {
1763                         fctrl |= IXGBE_FCTRL_MPE;
1764                         fctrl &= ~IXGBE_FCTRL_UPE;
1765                 } else {
1766                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1767                 }
1768                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1769                 hw->addr_ctrl.user_set_promisc = 0;
1770         }
1771
1772         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1773         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1774
1775         /* reprogram secondary unicast list */
1776         addr_count = netdev->uc_count;
1777         if (addr_count)
1778                 addr_list = netdev->uc_list->dmi_addr;
1779         ixgbe_update_uc_addr_list(hw, addr_list, addr_count,
1780                                   ixgbe_addr_list_itr);
1781
1782         /* reprogram multicast list */
1783         addr_count = netdev->mc_count;
1784         if (addr_count)
1785                 addr_list = netdev->mc_list->dmi_addr;
1786         ixgbe_update_mc_addr_list(hw, addr_list, addr_count,
1787                                   ixgbe_addr_list_itr);
1788 }
1789
1790 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1791 {
1792         int q_idx;
1793         struct ixgbe_q_vector *q_vector;
1794         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1795
1796         /* legacy and MSI only use one vector */
1797         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1798                 q_vectors = 1;
1799
1800         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1801                 q_vector = &adapter->q_vector[q_idx];
1802                 if (!q_vector->rxr_count)
1803                         continue;
1804                 napi_enable(&q_vector->napi);
1805         }
1806 }
1807
1808 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1809 {
1810         int q_idx;
1811         struct ixgbe_q_vector *q_vector;
1812         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1813
1814         /* legacy and MSI only use one vector */
1815         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1816                 q_vectors = 1;
1817
1818         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1819                 q_vector = &adapter->q_vector[q_idx];
1820                 if (!q_vector->rxr_count)
1821                         continue;
1822                 napi_disable(&q_vector->napi);
1823         }
1824 }
1825
1826 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1827 {
1828         struct net_device *netdev = adapter->netdev;
1829         int i;
1830
1831         ixgbe_set_rx_mode(netdev);
1832
1833         ixgbe_restore_vlan(adapter);
1834
1835         ixgbe_configure_tx(adapter);
1836         ixgbe_configure_rx(adapter);
1837         for (i = 0; i < adapter->num_rx_queues; i++)
1838                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1839                                            (adapter->rx_ring[i].count - 1));
1840 }
1841
1842 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1843 {
1844         struct net_device *netdev = adapter->netdev;
1845         struct ixgbe_hw *hw = &adapter->hw;
1846         int i, j = 0;
1847         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1848         u32 txdctl, rxdctl, mhadd;
1849         u32 gpie;
1850
1851         ixgbe_get_hw_control(adapter);
1852
1853         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1854             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1855                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1856                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1857                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1858                 } else {
1859                         /* MSI only */
1860                         gpie = 0;
1861                 }
1862                 /* XXX: to interrupt immediately for EICS writes, enable this */
1863                 /* gpie |= IXGBE_GPIE_EIMEN; */
1864                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1865         }
1866
1867         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1868                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1869                  * specifically only auto mask tx and rx interrupts */
1870                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1871         }
1872
1873         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1874         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1875                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1876                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1877
1878                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1879         }
1880
1881         for (i = 0; i < adapter->num_tx_queues; i++) {
1882                 j = adapter->tx_ring[i].reg_idx;
1883                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1884                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1885                 txdctl |= (8 << 16);
1886                 txdctl |= IXGBE_TXDCTL_ENABLE;
1887                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1888         }
1889
1890         for (i = 0; i < adapter->num_rx_queues; i++) {
1891                 j = adapter->rx_ring[i].reg_idx;
1892                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1893                 /* enable PTHRESH=32 descriptors (half the internal cache)
1894                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1895                  * this also removes a pesky rx_no_buffer_count increment */
1896                 rxdctl |= 0x0020;
1897                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1898                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1899         }
1900         /* enable all receives */
1901         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1902         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1903         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1904
1905         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1906                 ixgbe_configure_msix(adapter);
1907         else
1908                 ixgbe_configure_msi_and_legacy(adapter);
1909
1910         clear_bit(__IXGBE_DOWN, &adapter->state);
1911         ixgbe_napi_enable_all(adapter);
1912
1913         /* clear any pending interrupts, may auto mask */
1914         IXGBE_READ_REG(hw, IXGBE_EICR);
1915
1916         ixgbe_irq_enable(adapter);
1917
1918         /* bring the link up in the watchdog, this could race with our first
1919          * link up interrupt but shouldn't be a problem */
1920         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1921         adapter->link_check_timeout = jiffies;
1922         mod_timer(&adapter->watchdog_timer, jiffies);
1923         return 0;
1924 }
1925
1926 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1927 {
1928         WARN_ON(in_interrupt());
1929         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1930                 msleep(1);
1931         ixgbe_down(adapter);
1932         ixgbe_up(adapter);
1933         clear_bit(__IXGBE_RESETTING, &adapter->state);
1934 }
1935
1936 int ixgbe_up(struct ixgbe_adapter *adapter)
1937 {
1938         /* hardware has been reset, we need to reload some things */
1939         ixgbe_configure(adapter);
1940
1941         return ixgbe_up_complete(adapter);
1942 }
1943
1944 void ixgbe_reset(struct ixgbe_adapter *adapter)
1945 {
1946         if (ixgbe_init_hw(&adapter->hw))
1947                 DPRINTK(PROBE, ERR, "Hardware Error\n");
1948
1949         /* reprogram the RAR[0] in case user changed it. */
1950         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1951
1952 }
1953
1954 #ifdef CONFIG_PM
1955 static int ixgbe_resume(struct pci_dev *pdev)
1956 {
1957         struct net_device *netdev = pci_get_drvdata(pdev);
1958         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1959         u32 err;
1960
1961         pci_set_power_state(pdev, PCI_D0);
1962         pci_restore_state(pdev);
1963         err = pci_enable_device(pdev);
1964         if (err) {
1965                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1966                                 "suspend\n");
1967                 return err;
1968         }
1969         pci_set_master(pdev);
1970
1971         pci_enable_wake(pdev, PCI_D3hot, 0);
1972         pci_enable_wake(pdev, PCI_D3cold, 0);
1973
1974         if (netif_running(netdev)) {
1975                 err = ixgbe_request_irq(adapter);
1976                 if (err)
1977                         return err;
1978         }
1979
1980         ixgbe_reset(adapter);
1981
1982         if (netif_running(netdev))
1983                 ixgbe_up(adapter);
1984
1985         netif_device_attach(netdev);
1986
1987         return 0;
1988 }
1989 #endif
1990
1991 /**
1992  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1993  * @adapter: board private structure
1994  * @rx_ring: ring to free buffers from
1995  **/
1996 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1997                                 struct ixgbe_ring *rx_ring)
1998 {
1999         struct pci_dev *pdev = adapter->pdev;
2000         unsigned long size;
2001         unsigned int i;
2002
2003         /* Free all the Rx ring sk_buffs */
2004
2005         for (i = 0; i < rx_ring->count; i++) {
2006                 struct ixgbe_rx_buffer *rx_buffer_info;
2007
2008                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2009                 if (rx_buffer_info->dma) {
2010                         pci_unmap_single(pdev, rx_buffer_info->dma,
2011                                          rx_ring->rx_buf_len,
2012                                          PCI_DMA_FROMDEVICE);
2013                         rx_buffer_info->dma = 0;
2014                 }
2015                 if (rx_buffer_info->skb) {
2016                         dev_kfree_skb(rx_buffer_info->skb);
2017                         rx_buffer_info->skb = NULL;
2018                 }
2019                 if (!rx_buffer_info->page)
2020                         continue;
2021                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
2022                                PCI_DMA_FROMDEVICE);
2023                 rx_buffer_info->page_dma = 0;
2024
2025                 put_page(rx_buffer_info->page);
2026                 rx_buffer_info->page = NULL;
2027         }
2028
2029         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2030         memset(rx_ring->rx_buffer_info, 0, size);
2031
2032         /* Zero out the descriptor ring */
2033         memset(rx_ring->desc, 0, rx_ring->size);
2034
2035         rx_ring->next_to_clean = 0;
2036         rx_ring->next_to_use = 0;
2037
2038         writel(0, adapter->hw.hw_addr + rx_ring->head);
2039         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2040 }
2041
2042 /**
2043  * ixgbe_clean_tx_ring - Free Tx Buffers
2044  * @adapter: board private structure
2045  * @tx_ring: ring to be cleaned
2046  **/
2047 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2048                                 struct ixgbe_ring *tx_ring)
2049 {
2050         struct ixgbe_tx_buffer *tx_buffer_info;
2051         unsigned long size;
2052         unsigned int i;
2053
2054         /* Free all the Tx ring sk_buffs */
2055
2056         for (i = 0; i < tx_ring->count; i++) {
2057                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2058                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2059         }
2060
2061         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2062         memset(tx_ring->tx_buffer_info, 0, size);
2063
2064         /* Zero out the descriptor ring */
2065         memset(tx_ring->desc, 0, tx_ring->size);
2066
2067         tx_ring->next_to_use = 0;
2068         tx_ring->next_to_clean = 0;
2069
2070         writel(0, adapter->hw.hw_addr + tx_ring->head);
2071         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2072 }
2073
2074 /**
2075  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2076  * @adapter: board private structure
2077  **/
2078 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2079 {
2080         int i;
2081
2082         for (i = 0; i < adapter->num_rx_queues; i++)
2083                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2084 }
2085
2086 /**
2087  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2088  * @adapter: board private structure
2089  **/
2090 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2091 {
2092         int i;
2093
2094         for (i = 0; i < adapter->num_tx_queues; i++)
2095                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2096 }
2097
2098 void ixgbe_down(struct ixgbe_adapter *adapter)
2099 {
2100         struct net_device *netdev = adapter->netdev;
2101         u32 rxctrl;
2102
2103         /* signal that we are down to the interrupt handler */
2104         set_bit(__IXGBE_DOWN, &adapter->state);
2105
2106         /* disable receives */
2107         rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
2108         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
2109                         rxctrl & ~IXGBE_RXCTRL_RXEN);
2110
2111         netif_tx_disable(netdev);
2112
2113         /* disable transmits in the hardware */
2114
2115         /* flush both disables */
2116         IXGBE_WRITE_FLUSH(&adapter->hw);
2117         msleep(10);
2118
2119         ixgbe_irq_disable(adapter);
2120
2121         ixgbe_napi_disable_all(adapter);
2122         del_timer_sync(&adapter->watchdog_timer);
2123         cancel_work_sync(&adapter->watchdog_task);
2124
2125         netif_carrier_off(netdev);
2126         netif_tx_stop_all_queues(netdev);
2127
2128 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2129         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2130                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2131                 dca_remove_requester(&adapter->pdev->dev);
2132         }
2133
2134 #endif
2135         if (!pci_channel_offline(adapter->pdev))
2136                 ixgbe_reset(adapter);
2137         ixgbe_clean_all_tx_rings(adapter);
2138         ixgbe_clean_all_rx_rings(adapter);
2139
2140 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2141         /* since we reset the hardware DCA settings were cleared */
2142         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2143                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2144                 /* always use CB2 mode, difference is masked
2145                  * in the CB driver */
2146                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
2147                 ixgbe_setup_dca(adapter);
2148         }
2149 #endif
2150 }
2151
2152 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2153 {
2154         struct net_device *netdev = pci_get_drvdata(pdev);
2155         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2156 #ifdef CONFIG_PM
2157         int retval = 0;
2158 #endif
2159
2160         netif_device_detach(netdev);
2161
2162         if (netif_running(netdev)) {
2163                 ixgbe_down(adapter);
2164                 ixgbe_free_irq(adapter);
2165         }
2166
2167 #ifdef CONFIG_PM
2168         retval = pci_save_state(pdev);
2169         if (retval)
2170                 return retval;
2171 #endif
2172
2173         pci_enable_wake(pdev, PCI_D3hot, 0);
2174         pci_enable_wake(pdev, PCI_D3cold, 0);
2175
2176         ixgbe_release_hw_control(adapter);
2177
2178         pci_disable_device(pdev);
2179
2180         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2181
2182         return 0;
2183 }
2184
2185 static void ixgbe_shutdown(struct pci_dev *pdev)
2186 {
2187         ixgbe_suspend(pdev, PMSG_SUSPEND);
2188 }
2189
2190 /**
2191  * ixgbe_poll - NAPI Rx polling callback
2192  * @napi: structure for representing this polling device
2193  * @budget: how many packets driver is allowed to clean
2194  *
2195  * This function is used for legacy and MSI, NAPI mode
2196  **/
2197 static int ixgbe_poll(struct napi_struct *napi, int budget)
2198 {
2199         struct ixgbe_q_vector *q_vector = container_of(napi,
2200                                           struct ixgbe_q_vector, napi);
2201         struct ixgbe_adapter *adapter = q_vector->adapter;
2202         int tx_cleaned = 0, work_done = 0;
2203
2204 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2205         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2206                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2207                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2208         }
2209 #endif
2210
2211         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2212         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2213
2214         if (tx_cleaned)
2215                 work_done = budget;
2216
2217         /* If budget not fully consumed, exit the polling mode */
2218         if (work_done < budget) {
2219                 netif_rx_complete(adapter->netdev, napi);
2220                 if (adapter->itr_setting & 3)
2221                         ixgbe_set_itr(adapter);
2222                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2223                         ixgbe_irq_enable(adapter);
2224         }
2225
2226         return work_done;
2227 }
2228
2229 /**
2230  * ixgbe_tx_timeout - Respond to a Tx Hang
2231  * @netdev: network interface device structure
2232  **/
2233 static void ixgbe_tx_timeout(struct net_device *netdev)
2234 {
2235         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2236
2237         /* Do the reset outside of interrupt context */
2238         schedule_work(&adapter->reset_task);
2239 }
2240
2241 static void ixgbe_reset_task(struct work_struct *work)
2242 {
2243         struct ixgbe_adapter *adapter;
2244         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2245
2246         adapter->tx_timeout_count++;
2247
2248         ixgbe_reinit_locked(adapter);
2249 }
2250
2251 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2252                                        int vectors)
2253 {
2254         int err, vector_threshold;
2255
2256         /* We'll want at least 3 (vector_threshold):
2257          * 1) TxQ[0] Cleanup
2258          * 2) RxQ[0] Cleanup
2259          * 3) Other (Link Status Change, etc.)
2260          * 4) TCP Timer (optional)
2261          */
2262         vector_threshold = MIN_MSIX_COUNT;
2263
2264         /* The more we get, the more we will assign to Tx/Rx Cleanup
2265          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2266          * Right now, we simply care about how many we'll get; we'll
2267          * set them up later while requesting irq's.
2268          */
2269         while (vectors >= vector_threshold) {
2270                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2271                                       vectors);
2272                 if (!err) /* Success in acquiring all requested vectors. */
2273                         break;
2274                 else if (err < 0)
2275                         vectors = 0; /* Nasty failure, quit now */
2276                 else /* err == number of vectors we should try again with */
2277                         vectors = err;
2278         }
2279
2280         if (vectors < vector_threshold) {
2281                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2282                  * This just means we'll go with either a single MSI
2283                  * vector or fall back to legacy interrupts.
2284                  */
2285                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2286                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2287                 kfree(adapter->msix_entries);
2288                 adapter->msix_entries = NULL;
2289                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2290                 adapter->num_tx_queues = 1;
2291                 adapter->num_rx_queues = 1;
2292         } else {
2293                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2294                 adapter->num_msix_vectors = vectors;
2295         }
2296 }
2297
2298 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2299 {
2300         int nrq, ntq;
2301         int feature_mask = 0, rss_i, rss_m;
2302
2303         /* Number of supported queues */
2304         switch (adapter->hw.mac.type) {
2305         case ixgbe_mac_82598EB:
2306                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2307                 rss_m = 0;
2308                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2309
2310                 switch (adapter->flags & feature_mask) {
2311                 case (IXGBE_FLAG_RSS_ENABLED):
2312                         rss_m = 0xF;
2313                         nrq = rss_i;
2314                         ntq = rss_i;
2315                         break;
2316                 case 0:
2317                 default:
2318                         rss_i = 0;
2319                         rss_m = 0;
2320                         nrq = 1;
2321                         ntq = 1;
2322                         break;
2323                 }
2324
2325                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2326                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2327                 break;
2328         default:
2329                 nrq = 1;
2330                 ntq = 1;
2331                 break;
2332         }
2333
2334         adapter->num_rx_queues = nrq;
2335         adapter->num_tx_queues = ntq;
2336 }
2337
2338 /**
2339  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2340  * @adapter: board private structure to initialize
2341  *
2342  * Once we know the feature-set enabled for the device, we'll cache
2343  * the register offset the descriptor ring is assigned to.
2344  **/
2345 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2346 {
2347         /* TODO: Remove all uses of the indices in the cases where multiple
2348          *       features are OR'd together, if the feature set makes sense.
2349          */
2350         int feature_mask = 0, rss_i;
2351         int i, txr_idx, rxr_idx;
2352
2353         /* Number of supported queues */
2354         switch (adapter->hw.mac.type) {
2355         case ixgbe_mac_82598EB:
2356                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2357                 txr_idx = 0;
2358                 rxr_idx = 0;
2359                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2360                 switch (adapter->flags & feature_mask) {
2361                 case (IXGBE_FLAG_RSS_ENABLED):
2362                         for (i = 0; i < adapter->num_rx_queues; i++)
2363                                 adapter->rx_ring[i].reg_idx = i;
2364                         for (i = 0; i < adapter->num_tx_queues; i++)
2365                                 adapter->tx_ring[i].reg_idx = i;
2366                         break;
2367                 case 0:
2368                 default:
2369                         break;
2370                 }
2371                 break;
2372         default:
2373                 break;
2374         }
2375 }
2376
2377 /**
2378  * ixgbe_alloc_queues - Allocate memory for all rings
2379  * @adapter: board private structure to initialize
2380  *
2381  * We allocate one ring per queue at run-time since we don't know the
2382  * number of queues at compile-time.  The polling_netdev array is
2383  * intended for Multiqueue, but should work fine with a single queue.
2384  **/
2385 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2386 {
2387         int i;
2388
2389         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2390                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2391         if (!adapter->tx_ring)
2392                 goto err_tx_ring_allocation;
2393
2394         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2395                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2396         if (!adapter->rx_ring)
2397                 goto err_rx_ring_allocation;
2398
2399         for (i = 0; i < adapter->num_tx_queues; i++) {
2400                 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2401                 adapter->tx_ring[i].queue_index = i;
2402         }
2403         for (i = 0; i < adapter->num_rx_queues; i++) {
2404                 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2405                 adapter->rx_ring[i].queue_index = i;
2406         }
2407
2408         ixgbe_cache_ring_register(adapter);
2409
2410         return 0;
2411
2412 err_rx_ring_allocation:
2413         kfree(adapter->tx_ring);
2414 err_tx_ring_allocation:
2415         return -ENOMEM;
2416 }
2417
2418 /**
2419  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2420  * @adapter: board private structure to initialize
2421  *
2422  * Attempt to configure the interrupts using the best available
2423  * capabilities of the hardware and the kernel.
2424  **/
2425 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2426                                                     *adapter)
2427 {
2428         int err = 0;
2429         int vector, v_budget;
2430
2431         /*
2432          * It's easy to be greedy for MSI-X vectors, but it really
2433          * doesn't do us much good if we have a lot more vectors
2434          * than CPU's.  So let's be conservative and only ask for
2435          * (roughly) twice the number of vectors as there are CPU's.
2436          */
2437         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2438                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2439
2440         /*
2441          * At the same time, hardware can only support a maximum of
2442          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2443          * we can easily reach upwards of 64 Rx descriptor queues and
2444          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2445          * the cpu count also exceeds our vector limit.
2446          */
2447         v_budget = min(v_budget, MAX_MSIX_COUNT);
2448
2449         /* A failure in MSI-X entry allocation isn't fatal, but it does
2450          * mean we disable MSI-X capabilities of the adapter. */
2451         adapter->msix_entries = kcalloc(v_budget,
2452                                         sizeof(struct msix_entry), GFP_KERNEL);
2453         if (!adapter->msix_entries) {
2454                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2455                 ixgbe_set_num_queues(adapter);
2456                 kfree(adapter->tx_ring);
2457                 kfree(adapter->rx_ring);
2458                 err = ixgbe_alloc_queues(adapter);
2459                 if (err) {
2460                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2461                                             "for queues\n");
2462                         goto out;
2463                 }
2464
2465                 goto try_msi;
2466         }
2467
2468         for (vector = 0; vector < v_budget; vector++)
2469                 adapter->msix_entries[vector].entry = vector;
2470
2471         ixgbe_acquire_msix_vectors(adapter, v_budget);
2472
2473         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2474                 goto out;
2475
2476 try_msi:
2477         err = pci_enable_msi(adapter->pdev);
2478         if (!err) {
2479                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2480         } else {
2481                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2482                                    "falling back to legacy.  Error: %d\n", err);
2483                 /* reset err */
2484                 err = 0;
2485         }
2486
2487 out:
2488         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2489         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2490
2491         return err;
2492 }
2493
2494 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2495 {
2496         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2497                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2498                 pci_disable_msix(adapter->pdev);
2499                 kfree(adapter->msix_entries);
2500                 adapter->msix_entries = NULL;
2501         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2502                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2503                 pci_disable_msi(adapter->pdev);
2504         }
2505         return;
2506 }
2507
2508 /**
2509  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2510  * @adapter: board private structure to initialize
2511  *
2512  * We determine which interrupt scheme to use based on...
2513  * - Kernel support (MSI, MSI-X)
2514  *   - which can be user-defined (via MODULE_PARAM)
2515  * - Hardware queue count (num_*_queues)
2516  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2517  **/
2518 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2519 {
2520         int err;
2521
2522         /* Number of supported queues */
2523         ixgbe_set_num_queues(adapter);
2524
2525         err = ixgbe_alloc_queues(adapter);
2526         if (err) {
2527                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2528                 goto err_alloc_queues;
2529         }
2530
2531         err = ixgbe_set_interrupt_capability(adapter);
2532         if (err) {
2533                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2534                 goto err_set_interrupt;
2535         }
2536
2537         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2538                            "Tx Queue count = %u\n",
2539                 (adapter->num_rx_queues > 1) ? "Enabled" :
2540                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2541
2542         set_bit(__IXGBE_DOWN, &adapter->state);
2543
2544         return 0;
2545
2546 err_set_interrupt:
2547         kfree(adapter->tx_ring);
2548         kfree(adapter->rx_ring);
2549 err_alloc_queues:
2550         return err;
2551 }
2552
2553 /**
2554  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2555  * @adapter: board private structure to initialize
2556  *
2557  * ixgbe_sw_init initializes the Adapter private data structure.
2558  * Fields are initialized based on PCI device information and
2559  * OS network device settings (MTU size).
2560  **/
2561 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2562 {
2563         struct ixgbe_hw *hw = &adapter->hw;
2564         struct pci_dev *pdev = adapter->pdev;
2565         unsigned int rss;
2566
2567         /* Set capability flags */
2568         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2569         adapter->ring_feature[RING_F_RSS].indices = rss;
2570         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2571
2572         /* default flow control settings */
2573         hw->fc.original_type = ixgbe_fc_none;
2574         hw->fc.type = ixgbe_fc_none;
2575         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2576         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2577         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2578         hw->fc.send_xon = true;
2579
2580         /* select 10G link by default */
2581         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2582         if (hw->mac.ops.reset(hw)) {
2583                 dev_err(&pdev->dev, "HW Init failed\n");
2584                 return -EIO;
2585         }
2586         if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2587                                          false)) {
2588                 dev_err(&pdev->dev, "Link Speed setup failed\n");
2589                 return -EIO;
2590         }
2591
2592         /* enable itr by default in dynamic mode */
2593         adapter->itr_setting = 1;
2594         adapter->eitr_param = 20000;
2595
2596         /* set defaults for eitr in MegaBytes */
2597         adapter->eitr_low = 10;
2598         adapter->eitr_high = 20;
2599
2600         /* set default ring sizes */
2601         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2602         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2603
2604         /* initialize eeprom parameters */
2605         if (ixgbe_init_eeprom(hw)) {
2606                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2607                 return -EIO;
2608         }
2609
2610         /* enable rx csum by default */
2611         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2612
2613         set_bit(__IXGBE_DOWN, &adapter->state);
2614
2615         return 0;
2616 }
2617
2618 /**
2619  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2620  * @adapter: board private structure
2621  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2622  *
2623  * Return 0 on success, negative on failure
2624  **/
2625 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2626                              struct ixgbe_ring *tx_ring)
2627 {
2628         struct pci_dev *pdev = adapter->pdev;
2629         int size;
2630
2631         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2632         tx_ring->tx_buffer_info = vmalloc(size);
2633         if (!tx_ring->tx_buffer_info)
2634                 goto err;
2635         memset(tx_ring->tx_buffer_info, 0, size);
2636
2637         /* round up to nearest 4K */
2638         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2639                         sizeof(u32);
2640         tx_ring->size = ALIGN(tx_ring->size, 4096);
2641
2642         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2643                                              &tx_ring->dma);
2644         if (!tx_ring->desc)
2645                 goto err;
2646
2647         tx_ring->next_to_use = 0;
2648         tx_ring->next_to_clean = 0;
2649         tx_ring->work_limit = tx_ring->count;
2650         return 0;
2651
2652 err:
2653         vfree(tx_ring->tx_buffer_info);
2654         tx_ring->tx_buffer_info = NULL;
2655         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2656                             "descriptor ring\n");
2657         return -ENOMEM;
2658 }
2659
2660 /**
2661  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2662  * @adapter: board private structure
2663  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2664  *
2665  * Returns 0 on success, negative on failure
2666  **/
2667 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2668                              struct ixgbe_ring *rx_ring)
2669 {
2670         struct pci_dev *pdev = adapter->pdev;
2671         int size;
2672
2673         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2674         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2675         if (!rx_ring->lro_mgr.lro_arr)
2676                 return -ENOMEM;
2677         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2678
2679         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2680         rx_ring->rx_buffer_info = vmalloc(size);
2681         if (!rx_ring->rx_buffer_info) {
2682                 DPRINTK(PROBE, ERR,
2683                         "vmalloc allocation failed for the rx desc ring\n");
2684                 goto alloc_failed;
2685         }
2686         memset(rx_ring->rx_buffer_info, 0, size);
2687
2688         /* Round up to nearest 4K */
2689         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2690         rx_ring->size = ALIGN(rx_ring->size, 4096);
2691
2692         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2693
2694         if (!rx_ring->desc) {
2695                 DPRINTK(PROBE, ERR,
2696                         "Memory allocation failed for the rx desc ring\n");
2697                 vfree(rx_ring->rx_buffer_info);
2698                 goto alloc_failed;
2699         }
2700
2701         rx_ring->next_to_clean = 0;
2702         rx_ring->next_to_use = 0;
2703
2704         return 0;
2705
2706 alloc_failed:
2707         vfree(rx_ring->lro_mgr.lro_arr);
2708         rx_ring->lro_mgr.lro_arr = NULL;
2709         return -ENOMEM;
2710 }
2711
2712 /**
2713  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2714  * @adapter: board private structure
2715  * @tx_ring: Tx descriptor ring for a specific queue
2716  *
2717  * Free all transmit software resources
2718  **/
2719 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2720                                     struct ixgbe_ring *tx_ring)
2721 {
2722         struct pci_dev *pdev = adapter->pdev;
2723
2724         ixgbe_clean_tx_ring(adapter, tx_ring);
2725
2726         vfree(tx_ring->tx_buffer_info);
2727         tx_ring->tx_buffer_info = NULL;
2728
2729         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2730
2731         tx_ring->desc = NULL;
2732 }
2733
2734 /**
2735  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2736  * @adapter: board private structure
2737  *
2738  * Free all transmit software resources
2739  **/
2740 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2741 {
2742         int i;
2743
2744         for (i = 0; i < adapter->num_tx_queues; i++)
2745                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2746 }
2747
2748 /**
2749  * ixgbe_free_rx_resources - Free Rx Resources
2750  * @adapter: board private structure
2751  * @rx_ring: ring to clean the resources from
2752  *
2753  * Free all receive software resources
2754  **/
2755 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2756                                     struct ixgbe_ring *rx_ring)
2757 {
2758         struct pci_dev *pdev = adapter->pdev;
2759
2760         vfree(rx_ring->lro_mgr.lro_arr);
2761         rx_ring->lro_mgr.lro_arr = NULL;
2762
2763         ixgbe_clean_rx_ring(adapter, rx_ring);
2764
2765         vfree(rx_ring->rx_buffer_info);
2766         rx_ring->rx_buffer_info = NULL;
2767
2768         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2769
2770         rx_ring->desc = NULL;
2771 }
2772
2773 /**
2774  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2775  * @adapter: board private structure
2776  *
2777  * Free all receive software resources
2778  **/
2779 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2780 {
2781         int i;
2782
2783         for (i = 0; i < adapter->num_rx_queues; i++)
2784                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2785 }
2786
2787 /**
2788  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2789  * @adapter: board private structure
2790  *
2791  * If this function returns with an error, then it's possible one or
2792  * more of the rings is populated (while the rest are not).  It is the
2793  * callers duty to clean those orphaned rings.
2794  *
2795  * Return 0 on success, negative on failure
2796  **/
2797 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2798 {
2799         int i, err = 0;
2800
2801         for (i = 0; i < adapter->num_tx_queues; i++) {
2802                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2803                 if (err) {
2804                         DPRINTK(PROBE, ERR,
2805                                 "Allocation for Tx Queue %u failed\n", i);
2806                         break;
2807                 }
2808         }
2809
2810         return err;
2811 }
2812
2813 /**
2814  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2815  * @adapter: board private structure
2816  *
2817  * If this function returns with an error, then it's possible one or
2818  * more of the rings is populated (while the rest are not).  It is the
2819  * callers duty to clean those orphaned rings.
2820  *
2821  * Return 0 on success, negative on failure
2822  **/
2823
2824 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2825 {
2826         int i, err = 0;
2827
2828         for (i = 0; i < adapter->num_rx_queues; i++) {
2829                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2830                 if (err) {
2831                         DPRINTK(PROBE, ERR,
2832                                 "Allocation for Rx Queue %u failed\n", i);
2833                         break;
2834                 }
2835         }
2836
2837         return err;
2838 }
2839
2840 /**
2841  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2842  * @netdev: network interface device structure
2843  * @new_mtu: new value for maximum frame size
2844  *
2845  * Returns 0 on success, negative on failure
2846  **/
2847 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2848 {
2849         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2850         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2851
2852         /* MTU < 68 is an error and causes problems on some kernels */
2853         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2854                 return -EINVAL;
2855
2856         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2857                 netdev->mtu, new_mtu);
2858         /* must set new MTU before calling down or up */
2859         netdev->mtu = new_mtu;
2860
2861         if (netif_running(netdev))
2862                 ixgbe_reinit_locked(adapter);
2863
2864         return 0;
2865 }
2866
2867 /**
2868  * ixgbe_open - Called when a network interface is made active
2869  * @netdev: network interface device structure
2870  *
2871  * Returns 0 on success, negative value on failure
2872  *
2873  * The open entry point is called when a network interface is made
2874  * active by the system (IFF_UP).  At this point all resources needed
2875  * for transmit and receive operations are allocated, the interrupt
2876  * handler is registered with the OS, the watchdog timer is started,
2877  * and the stack is notified that the interface is ready.
2878  **/
2879 static int ixgbe_open(struct net_device *netdev)
2880 {
2881         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2882         int err;
2883
2884         /* disallow open during test */
2885         if (test_bit(__IXGBE_TESTING, &adapter->state))
2886                 return -EBUSY;
2887
2888         /* allocate transmit descriptors */
2889         err = ixgbe_setup_all_tx_resources(adapter);
2890         if (err)
2891                 goto err_setup_tx;
2892
2893         /* allocate receive descriptors */
2894         err = ixgbe_setup_all_rx_resources(adapter);
2895         if (err)
2896                 goto err_setup_rx;
2897
2898         ixgbe_configure(adapter);
2899
2900         err = ixgbe_request_irq(adapter);
2901         if (err)
2902                 goto err_req_irq;
2903
2904         err = ixgbe_up_complete(adapter);
2905         if (err)
2906                 goto err_up;
2907
2908         netif_tx_start_all_queues(netdev);
2909
2910         return 0;
2911
2912 err_up:
2913         ixgbe_release_hw_control(adapter);
2914         ixgbe_free_irq(adapter);
2915 err_req_irq:
2916         ixgbe_free_all_rx_resources(adapter);
2917 err_setup_rx:
2918         ixgbe_free_all_tx_resources(adapter);
2919 err_setup_tx:
2920         ixgbe_reset(adapter);
2921
2922         return err;
2923 }
2924
2925 /**
2926  * ixgbe_close - Disables a network interface
2927  * @netdev: network interface device structure
2928  *
2929  * Returns 0, this is not allowed to fail
2930  *
2931  * The close entry point is called when an interface is de-activated
2932  * by the OS.  The hardware is still under the drivers control, but
2933  * needs to be disabled.  A global MAC reset is issued to stop the
2934  * hardware, and all transmit and receive resources are freed.
2935  **/
2936 static int ixgbe_close(struct net_device *netdev)
2937 {
2938         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2939
2940         ixgbe_down(adapter);
2941         ixgbe_free_irq(adapter);
2942
2943         ixgbe_free_all_tx_resources(adapter);
2944         ixgbe_free_all_rx_resources(adapter);
2945
2946         ixgbe_release_hw_control(adapter);
2947
2948         return 0;
2949 }
2950
2951 /**
2952  * ixgbe_update_stats - Update the board statistics counters.
2953  * @adapter: board private structure
2954  **/
2955 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2956 {
2957         struct ixgbe_hw *hw = &adapter->hw;
2958         u64 total_mpc = 0;
2959         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2960
2961         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2962         for (i = 0; i < 8; i++) {
2963                 /* for packet buffers not used, the register should read 0 */
2964                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2965                 missed_rx += mpc;
2966                 adapter->stats.mpc[i] += mpc;
2967                 total_mpc += adapter->stats.mpc[i];
2968                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2969         }
2970         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2971         /* work around hardware counting issue */
2972         adapter->stats.gprc -= missed_rx;
2973
2974         /* 82598 hardware only has a 32 bit counter in the high register */
2975         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2976         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2977         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2978         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2979         adapter->stats.bprc += bprc;
2980         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2981         adapter->stats.mprc -= bprc;
2982         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2983         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2984         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2985         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2986         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2987         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2988         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2989         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2990         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2991         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2992         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2993         adapter->stats.lxontxc += lxon;
2994         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2995         adapter->stats.lxofftxc += lxoff;
2996         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2997         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2998         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2999         /*
3000          * 82598 errata - tx of flow control packets is included in tx counters
3001          */
3002         xon_off_tot = lxon + lxoff;
3003         adapter->stats.gptc -= xon_off_tot;
3004         adapter->stats.mptc -= xon_off_tot;
3005         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3006         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3007         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3008         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3009         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3010         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3011         adapter->stats.ptc64 -= xon_off_tot;
3012         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3013         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3014         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3015         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3016         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3017         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3018
3019         /* Fill out the OS statistics structure */
3020         adapter->net_stats.multicast = adapter->stats.mprc;
3021
3022         /* Rx Errors */
3023         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3024                                                 adapter->stats.rlec;
3025         adapter->net_stats.rx_dropped = 0;
3026         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3027         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3028         adapter->net_stats.rx_missed_errors = total_mpc;
3029 }
3030
3031 /**
3032  * ixgbe_watchdog - Timer Call-back
3033  * @data: pointer to adapter cast into an unsigned long
3034  **/
3035 static void ixgbe_watchdog(unsigned long data)
3036 {
3037         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3038         struct ixgbe_hw *hw = &adapter->hw;
3039
3040         /* Do the watchdog outside of interrupt context due to the lovely
3041          * delays that some of the newer hardware requires */
3042         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3043                 /* Cause software interrupt to ensure rx rings are cleaned */
3044                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3045                         u32 eics =
3046                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3047                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3048                 } else {
3049                         /* For legacy and MSI interrupts don't set any bits that
3050                          * are enabled for EIAM, because this operation would
3051                          * set *both* EIMS and EICS for any bit in EIAM */
3052                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3053                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3054                 }
3055                 /* Reset the timer */
3056                 mod_timer(&adapter->watchdog_timer,
3057                           round_jiffies(jiffies + 2 * HZ));
3058         }
3059
3060         schedule_work(&adapter->watchdog_task);
3061 }
3062
3063 /**
3064  *  ixgbe_watchdog_task - worker thread to bring link up
3065  *  @work: pointer to work_struct containing our data
3066  **/
3067 static void ixgbe_watchdog_task(struct work_struct *work)
3068 {
3069         struct ixgbe_adapter *adapter = container_of(work,
3070                                                      struct ixgbe_adapter,
3071                                                      watchdog_task);
3072         struct net_device *netdev = adapter->netdev;
3073         struct ixgbe_hw *hw = &adapter->hw;
3074         u32 link_speed = adapter->link_speed;
3075         bool link_up = adapter->link_up;
3076
3077         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3078
3079         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3080                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3081                 if (link_up ||
3082                     time_after(jiffies, (adapter->link_check_timeout +
3083                                          IXGBE_TRY_LINK_TIMEOUT))) {
3084                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3085                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3086                 }
3087                 adapter->link_up = link_up;
3088                 adapter->link_speed = link_speed;
3089         }
3090
3091         if (link_up) {
3092                 if (!netif_carrier_ok(netdev)) {
3093                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3094                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3095 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3096 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3097                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
3098                                 "Flow Control: %s\n",
3099                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3100                                  "10 Gbps" :
3101                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3102                                   "1 Gbps" : "unknown speed")),
3103                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3104                                  (FLOW_RX ? "RX" :
3105                                  (FLOW_TX ? "TX" : "None"))));
3106
3107                         netif_carrier_on(netdev);
3108                         netif_tx_wake_all_queues(netdev);
3109                 } else {
3110                         /* Force detection of hung controller */
3111                         adapter->detect_tx_hung = true;
3112                 }
3113         } else {
3114                 adapter->link_up = false;
3115                 adapter->link_speed = 0;
3116                 if (netif_carrier_ok(netdev)) {
3117                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
3118                         netif_carrier_off(netdev);
3119                         netif_tx_stop_all_queues(netdev);
3120                 }
3121         }
3122
3123         ixgbe_update_stats(adapter);
3124         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3125 }
3126
3127 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3128                          struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3129                          u32 tx_flags, u8 *hdr_len)
3130 {
3131         struct ixgbe_adv_tx_context_desc *context_desc;
3132         unsigned int i;
3133         int err;
3134         struct ixgbe_tx_buffer *tx_buffer_info;
3135         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3136         u32 mss_l4len_idx = 0, l4len;
3137
3138         if (skb_is_gso(skb)) {
3139                 if (skb_header_cloned(skb)) {
3140                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3141                         if (err)
3142                                 return err;
3143                 }
3144                 l4len = tcp_hdrlen(skb);
3145                 *hdr_len += l4len;
3146
3147                 if (skb->protocol == htons(ETH_P_IP)) {
3148                         struct iphdr *iph = ip_hdr(skb);
3149                         iph->tot_len = 0;
3150                         iph->check = 0;
3151                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3152                                                                  iph->daddr, 0,
3153                                                                  IPPROTO_TCP,
3154                                                                  0);
3155                         adapter->hw_tso_ctxt++;
3156                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3157                         ipv6_hdr(skb)->payload_len = 0;
3158                         tcp_hdr(skb)->check =
3159                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3160                                              &ipv6_hdr(skb)->daddr,
3161                                              0, IPPROTO_TCP, 0);
3162                         adapter->hw_tso6_ctxt++;
3163                 }
3164
3165                 i = tx_ring->next_to_use;
3166
3167                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3168                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3169
3170                 /* VLAN MACLEN IPLEN */
3171                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3172                         vlan_macip_lens |=
3173                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3174                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3175                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3176                 *hdr_len += skb_network_offset(skb);
3177                 vlan_macip_lens |=
3178                     (skb_transport_header(skb) - skb_network_header(skb));
3179                 *hdr_len +=
3180                     (skb_transport_header(skb) - skb_network_header(skb));
3181                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3182                 context_desc->seqnum_seed = 0;
3183
3184                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3185                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3186                                     IXGBE_ADVTXD_DTYP_CTXT);
3187
3188                 if (skb->protocol == htons(ETH_P_IP))
3189                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3190                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3191                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3192
3193                 /* MSS L4LEN IDX */
3194                 mss_l4len_idx |=
3195                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3196                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3197                 /* use index 1 for TSO */
3198                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3199                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3200
3201                 tx_buffer_info->time_stamp = jiffies;
3202                 tx_buffer_info->next_to_watch = i;
3203
3204                 i++;
3205                 if (i == tx_ring->count)
3206                         i = 0;
3207                 tx_ring->next_to_use = i;
3208
3209                 return true;
3210         }
3211         return false;
3212 }
3213
3214 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3215                                    struct ixgbe_ring *tx_ring,
3216                                    struct sk_buff *skb, u32 tx_flags)
3217 {
3218         struct ixgbe_adv_tx_context_desc *context_desc;
3219         unsigned int i;
3220         struct ixgbe_tx_buffer *tx_buffer_info;
3221         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3222
3223         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3224             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3225                 i = tx_ring->next_to_use;
3226                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3227                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3228
3229                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3230                         vlan_macip_lens |=
3231                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3232                 vlan_macip_lens |= (skb_network_offset(skb) <<
3233                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3234                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3235                         vlan_macip_lens |= (skb_transport_header(skb) -
3236                                             skb_network_header(skb));
3237
3238                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3239                 context_desc->seqnum_seed = 0;
3240
3241                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3242                                     IXGBE_ADVTXD_DTYP_CTXT);
3243
3244                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3245                         switch (skb->protocol) {
3246                         case __constant_htons(ETH_P_IP):
3247                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3248                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3249                                         type_tucmd_mlhl |=
3250                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3251                                 break;
3252
3253                         case __constant_htons(ETH_P_IPV6):
3254                                 /* XXX what about other V6 headers?? */
3255                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3256                                         type_tucmd_mlhl |=
3257                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3258                                 break;
3259
3260                         default:
3261                                 if (unlikely(net_ratelimit())) {
3262                                         DPRINTK(PROBE, WARNING,
3263                                          "partial checksum but proto=%x!\n",
3264                                          skb->protocol);
3265                                 }
3266                                 break;
3267                         }
3268                 }
3269
3270                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3271                 /* use index zero for tx checksum offload */
3272                 context_desc->mss_l4len_idx = 0;
3273
3274                 tx_buffer_info->time_stamp = jiffies;
3275                 tx_buffer_info->next_to_watch = i;
3276                 adapter->hw_csum_tx_good++;
3277                 i++;
3278                 if (i == tx_ring->count)
3279                         i = 0;
3280                 tx_ring->next_to_use = i;
3281
3282                 return true;
3283         }
3284         return false;
3285 }
3286
3287 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3288                         struct ixgbe_ring *tx_ring,
3289                         struct sk_buff *skb, unsigned int first)
3290 {
3291         struct ixgbe_tx_buffer *tx_buffer_info;
3292         unsigned int len = skb->len;
3293         unsigned int offset = 0, size, count = 0, i;
3294         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3295         unsigned int f;
3296
3297         len -= skb->data_len;
3298
3299         i = tx_ring->next_to_use;
3300
3301         while (len) {
3302                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3303                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3304
3305                 tx_buffer_info->length = size;
3306                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3307                                                   skb->data + offset,
3308                                                   size, PCI_DMA_TODEVICE);
3309                 tx_buffer_info->time_stamp = jiffies;
3310                 tx_buffer_info->next_to_watch = i;
3311
3312                 len -= size;
3313                 offset += size;
3314                 count++;
3315                 i++;
3316                 if (i == tx_ring->count)
3317                         i = 0;
3318         }
3319
3320         for (f = 0; f < nr_frags; f++) {
3321                 struct skb_frag_struct *frag;
3322
3323                 frag = &skb_shinfo(skb)->frags[f];
3324                 len = frag->size;
3325                 offset = frag->page_offset;
3326
3327                 while (len) {
3328                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3329                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3330
3331                         tx_buffer_info->length = size;
3332                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3333                                                         frag->page,
3334                                                         offset,
3335                                                         size, PCI_DMA_TODEVICE);
3336                         tx_buffer_info->time_stamp = jiffies;
3337                         tx_buffer_info->next_to_watch = i;
3338
3339                         len -= size;
3340                         offset += size;
3341                         count++;
3342                         i++;
3343                         if (i == tx_ring->count)
3344                                 i = 0;
3345                 }
3346         }
3347         if (i == 0)
3348                 i = tx_ring->count - 1;
3349         else
3350                 i = i - 1;
3351         tx_ring->tx_buffer_info[i].skb = skb;
3352         tx_ring->tx_buffer_info[first].next_to_watch = i;
3353
3354         return count;
3355 }
3356
3357 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3358                                struct ixgbe_ring *tx_ring,
3359                                int tx_flags, int count, u32 paylen, u8 hdr_len)
3360 {
3361         union ixgbe_adv_tx_desc *tx_desc = NULL;
3362         struct ixgbe_tx_buffer *tx_buffer_info;
3363         u32 olinfo_status = 0, cmd_type_len = 0;
3364         unsigned int i;
3365         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3366
3367         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3368
3369         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3370
3371         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3372                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3373
3374         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3375                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3376
3377                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3378                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3379
3380                 /* use index 1 context for tso */
3381                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3382                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3383                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3384                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3385
3386         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3387                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3388                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3389
3390         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3391
3392         i = tx_ring->next_to_use;
3393         while (count--) {
3394                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3395                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3396                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3397                 tx_desc->read.cmd_type_len =
3398                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3399                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3400
3401                 i++;
3402                 if (i == tx_ring->count)
3403                         i = 0;
3404         }
3405
3406         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3407
3408         /*
3409          * Force memory writes to complete before letting h/w
3410          * know there are new descriptors to fetch.  (Only
3411          * applicable for weak-ordered memory model archs,
3412          * such as IA-64).
3413          */
3414         wmb();
3415
3416         tx_ring->next_to_use = i;
3417         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3418 }
3419
3420 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3421                                  struct ixgbe_ring *tx_ring, int size)
3422 {
3423         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3424
3425         netif_stop_subqueue(netdev, tx_ring->queue_index);
3426         /* Herbert's original patch had:
3427          *  smp_mb__after_netif_stop_queue();
3428          * but since that doesn't exist yet, just open code it. */
3429         smp_mb();
3430
3431         /* We need to check again in a case another CPU has just
3432          * made room available. */
3433         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3434                 return -EBUSY;
3435
3436         /* A reprieve! - use start_queue because it doesn't call schedule */
3437         netif_start_subqueue(netdev, tx_ring->queue_index);
3438         ++adapter->restart_queue;
3439         return 0;
3440 }
3441
3442 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3443                                struct ixgbe_ring *tx_ring, int size)
3444 {
3445         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3446                 return 0;
3447         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3448 }
3449
3450
3451 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3452 {
3453         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3454         struct ixgbe_ring *tx_ring;
3455         unsigned int len = skb->len;
3456         unsigned int first;
3457         unsigned int tx_flags = 0;
3458         u8 hdr_len = 0;
3459         int r_idx = 0, tso;
3460         unsigned int mss = 0;
3461         int count = 0;
3462         unsigned int f;
3463         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3464         len -= skb->data_len;
3465         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3466         tx_ring = &adapter->tx_ring[r_idx];
3467
3468
3469         if (skb->len <= 0) {
3470                 dev_kfree_skb(skb);
3471                 return NETDEV_TX_OK;
3472         }
3473         mss = skb_shinfo(skb)->gso_size;
3474
3475         if (mss)
3476                 count++;
3477         else if (skb->ip_summed == CHECKSUM_PARTIAL)
3478                 count++;
3479
3480         count += TXD_USE_COUNT(len);
3481         for (f = 0; f < nr_frags; f++)
3482                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3483
3484         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3485                 adapter->tx_busy++;
3486                 return NETDEV_TX_BUSY;
3487         }
3488         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3489                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3490                 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3491         }
3492
3493         if (skb->protocol == htons(ETH_P_IP))
3494                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3495         first = tx_ring->next_to_use;
3496         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3497         if (tso < 0) {
3498                 dev_kfree_skb_any(skb);
3499                 return NETDEV_TX_OK;
3500         }
3501
3502         if (tso)
3503                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3504         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3505                  (skb->ip_summed == CHECKSUM_PARTIAL))
3506                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3507
3508         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3509                            ixgbe_tx_map(adapter, tx_ring, skb, first),
3510                            skb->len, hdr_len);
3511
3512         netdev->trans_start = jiffies;
3513
3514         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3515
3516         return NETDEV_TX_OK;
3517 }
3518
3519 /**
3520  * ixgbe_get_stats - Get System Network Statistics
3521  * @netdev: network interface device structure
3522  *
3523  * Returns the address of the device statistics structure.
3524  * The statistics are actually updated from the timer callback.
3525  **/
3526 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3527 {
3528         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3529
3530         /* only return the current stats */
3531         return &adapter->net_stats;
3532 }
3533
3534 /**
3535  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3536  * @netdev: network interface device structure
3537  * @p: pointer to an address structure
3538  *
3539  * Returns 0 on success, negative on failure
3540  **/
3541 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3542 {
3543         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3544         struct sockaddr *addr = p;
3545
3546         if (!is_valid_ether_addr(addr->sa_data))
3547                 return -EADDRNOTAVAIL;
3548
3549         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3550         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3551
3552         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3553
3554         return 0;
3555 }
3556
3557 #ifdef CONFIG_NET_POLL_CONTROLLER
3558 /*
3559  * Polling 'interrupt' - used by things like netconsole to send skbs
3560  * without having to re-enable interrupts. It's not called while
3561  * the interrupt routine is executing.
3562  */
3563 static void ixgbe_netpoll(struct net_device *netdev)
3564 {
3565         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3566
3567         disable_irq(adapter->pdev->irq);
3568         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3569         ixgbe_intr(adapter->pdev->irq, netdev);
3570         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3571         enable_irq(adapter->pdev->irq);
3572 }
3573 #endif
3574
3575 /**
3576  * ixgbe_napi_add_all - prep napi structs for use
3577  * @adapter: private struct
3578  * helper function to napi_add each possible q_vector->napi
3579  */
3580 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3581 {
3582         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3583         int (*poll)(struct napi_struct *, int);
3584
3585         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3586                 poll = &ixgbe_clean_rxonly;
3587         } else {
3588                 poll = &ixgbe_poll;
3589                 /* only one q_vector for legacy modes */
3590                 q_vectors = 1;
3591         }
3592
3593         for (i = 0; i < q_vectors; i++) {
3594                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3595                 netif_napi_add(adapter->netdev, &q_vector->napi,
3596                                (*poll), 64);
3597         }
3598 }
3599
3600 /**
3601  * ixgbe_probe - Device Initialization Routine
3602  * @pdev: PCI device information struct
3603  * @ent: entry in ixgbe_pci_tbl
3604  *
3605  * Returns 0 on success, negative on failure
3606  *
3607  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3608  * The OS initialization, configuring of the adapter private structure,
3609  * and a hardware reset occur.
3610  **/
3611 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3612                                  const struct pci_device_id *ent)
3613 {
3614         struct net_device *netdev;
3615         struct ixgbe_adapter *adapter = NULL;
3616         struct ixgbe_hw *hw;
3617         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3618         static int cards_found;
3619         int i, err, pci_using_dac;
3620         u16 link_status, link_speed, link_width;
3621         u32 part_num;
3622
3623         err = pci_enable_device(pdev);
3624         if (err)
3625                 return err;
3626
3627         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3628             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3629                 pci_using_dac = 1;
3630         } else {
3631                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3632                 if (err) {
3633                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3634                         if (err) {
3635                                 dev_err(&pdev->dev, "No usable DMA "
3636                                         "configuration, aborting\n");
3637                                 goto err_dma;
3638                         }
3639                 }
3640                 pci_using_dac = 0;
3641         }
3642
3643         err = pci_request_regions(pdev, ixgbe_driver_name);
3644         if (err) {
3645                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3646                 goto err_pci_reg;
3647         }
3648
3649         pci_set_master(pdev);
3650         pci_save_state(pdev);
3651
3652         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3653         if (!netdev) {
3654                 err = -ENOMEM;
3655                 goto err_alloc_etherdev;
3656         }
3657
3658         SET_NETDEV_DEV(netdev, &pdev->dev);
3659
3660         pci_set_drvdata(pdev, netdev);
3661         adapter = netdev_priv(netdev);
3662
3663         adapter->netdev = netdev;
3664         adapter->pdev = pdev;
3665         hw = &adapter->hw;
3666         hw->back = adapter;
3667         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3668
3669         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3670                               pci_resource_len(pdev, 0));
3671         if (!hw->hw_addr) {
3672                 err = -EIO;
3673                 goto err_ioremap;
3674         }
3675
3676         for (i = 1; i <= 5; i++) {
3677                 if (pci_resource_len(pdev, i) == 0)
3678                         continue;
3679         }
3680
3681         netdev->open = &ixgbe_open;
3682         netdev->stop = &ixgbe_close;
3683         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3684         netdev->get_stats = &ixgbe_get_stats;
3685         netdev->set_rx_mode = &ixgbe_set_rx_mode;
3686         netdev->set_multicast_list = &ixgbe_set_rx_mode;
3687         netdev->set_mac_address = &ixgbe_set_mac;
3688         netdev->change_mtu = &ixgbe_change_mtu;
3689         ixgbe_set_ethtool_ops(netdev);
3690         netdev->tx_timeout = &ixgbe_tx_timeout;
3691         netdev->watchdog_timeo = 5 * HZ;
3692         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3693         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3694         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3695 #ifdef CONFIG_NET_POLL_CONTROLLER
3696         netdev->poll_controller = ixgbe_netpoll;
3697 #endif
3698         strcpy(netdev->name, pci_name(pdev));
3699
3700         adapter->bd_number = cards_found;
3701
3702         /* PCI config space info */
3703         hw->vendor_id = pdev->vendor;
3704         hw->device_id = pdev->device;
3705         hw->revision_id = pdev->revision;
3706         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3707         hw->subsystem_device_id = pdev->subsystem_device;
3708
3709         /* Setup hw api */
3710         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3711         hw->mac.type  = ii->mac;
3712
3713         err = ii->get_invariants(hw);
3714         if (err)
3715                 goto err_hw_init;
3716
3717         /* setup the private structure */
3718         err = ixgbe_sw_init(adapter);
3719         if (err)
3720                 goto err_sw_init;
3721
3722         netdev->features = NETIF_F_SG |
3723                            NETIF_F_IP_CSUM |
3724                            NETIF_F_HW_VLAN_TX |
3725                            NETIF_F_HW_VLAN_RX |
3726                            NETIF_F_HW_VLAN_FILTER;
3727
3728         netdev->features |= NETIF_F_IPV6_CSUM;
3729         netdev->features |= NETIF_F_TSO;
3730         netdev->features |= NETIF_F_TSO6;
3731         netdev->features |= NETIF_F_LRO;
3732
3733         netdev->vlan_features |= NETIF_F_TSO;
3734         netdev->vlan_features |= NETIF_F_TSO6;
3735         netdev->vlan_features |= NETIF_F_IP_CSUM;
3736         netdev->vlan_features |= NETIF_F_SG;
3737
3738         if (pci_using_dac)
3739                 netdev->features |= NETIF_F_HIGHDMA;
3740
3741         /* make sure the EEPROM is good */
3742         if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3743                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3744                 err = -EIO;
3745                 goto err_eeprom;
3746         }
3747
3748         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3749         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3750
3751         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3752                 err = -EIO;
3753                 goto err_eeprom;
3754         }
3755
3756         init_timer(&adapter->watchdog_timer);
3757         adapter->watchdog_timer.function = &ixgbe_watchdog;
3758         adapter->watchdog_timer.data = (unsigned long)adapter;
3759
3760         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3761         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
3762
3763         err = ixgbe_init_interrupt_scheme(adapter);
3764         if (err)
3765                 goto err_sw_init;
3766
3767         /* print bus type/speed/width info */
3768         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3769         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3770         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3771         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3772                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3773                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3774                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3775                  "Unknown"),
3776                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3777                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3778                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3779                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3780                  "Unknown"),
3781                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3782                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3783         ixgbe_read_part_num(hw, &part_num);
3784         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3785                  hw->mac.type, hw->phy.type,
3786                  (part_num >> 8), (part_num & 0xff));
3787
3788         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3789                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3790                          "this card is not sufficient for optimal "
3791                          "performance.\n");
3792                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3793                          "PCI-Express slot is required.\n");
3794         }
3795
3796         /* reset the hardware with the new settings */
3797         ixgbe_start_hw(hw);
3798
3799         netif_carrier_off(netdev);
3800         netif_tx_stop_all_queues(netdev);
3801
3802         ixgbe_napi_add_all(adapter);
3803
3804         strcpy(netdev->name, "eth%d");
3805         err = register_netdev(netdev);
3806         if (err)
3807                 goto err_register;
3808
3809 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3810         if (dca_add_requester(&pdev->dev) == 0) {
3811                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3812                 /* always use CB2 mode, difference is masked
3813                  * in the CB driver */
3814                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3815                 ixgbe_setup_dca(adapter);
3816         }
3817 #endif
3818
3819         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3820         cards_found++;
3821         return 0;
3822
3823 err_register:
3824         ixgbe_release_hw_control(adapter);
3825 err_hw_init:
3826 err_sw_init:
3827         ixgbe_reset_interrupt_capability(adapter);
3828 err_eeprom:
3829         iounmap(hw->hw_addr);
3830 err_ioremap:
3831         free_netdev(netdev);
3832 err_alloc_etherdev:
3833         pci_release_regions(pdev);
3834 err_pci_reg:
3835 err_dma:
3836         pci_disable_device(pdev);
3837         return err;
3838 }
3839
3840 /**
3841  * ixgbe_remove - Device Removal Routine
3842  * @pdev: PCI device information struct
3843  *
3844  * ixgbe_remove is called by the PCI subsystem to alert the driver
3845  * that it should release a PCI device.  The could be caused by a
3846  * Hot-Plug event, or because the driver is going to be removed from
3847  * memory.
3848  **/
3849 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3850 {
3851         struct net_device *netdev = pci_get_drvdata(pdev);
3852         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3853
3854         set_bit(__IXGBE_DOWN, &adapter->state);
3855         del_timer_sync(&adapter->watchdog_timer);
3856
3857         flush_scheduled_work();
3858
3859 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3860         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3861                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3862                 dca_remove_requester(&pdev->dev);
3863                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3864         }
3865
3866 #endif
3867         unregister_netdev(netdev);
3868
3869         ixgbe_reset_interrupt_capability(adapter);
3870
3871         ixgbe_release_hw_control(adapter);
3872
3873         iounmap(adapter->hw.hw_addr);
3874         pci_release_regions(pdev);
3875
3876         DPRINTK(PROBE, INFO, "complete\n");
3877         kfree(adapter->tx_ring);
3878         kfree(adapter->rx_ring);
3879
3880         free_netdev(netdev);
3881
3882         pci_disable_device(pdev);
3883 }
3884
3885 /**
3886  * ixgbe_io_error_detected - called when PCI error is detected
3887  * @pdev: Pointer to PCI device
3888  * @state: The current pci connection state
3889  *
3890  * This function is called after a PCI bus error affecting
3891  * this device has been detected.
3892  */
3893 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3894                                                 pci_channel_state_t state)
3895 {
3896         struct net_device *netdev = pci_get_drvdata(pdev);
3897         struct ixgbe_adapter *adapter = netdev->priv;
3898
3899         netif_device_detach(netdev);
3900
3901         if (netif_running(netdev))
3902                 ixgbe_down(adapter);
3903         pci_disable_device(pdev);
3904
3905         /* Request a slot slot reset. */
3906         return PCI_ERS_RESULT_NEED_RESET;
3907 }
3908
3909 /**
3910  * ixgbe_io_slot_reset - called after the pci bus has been reset.
3911  * @pdev: Pointer to PCI device
3912  *
3913  * Restart the card from scratch, as if from a cold-boot.
3914  */
3915 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3916 {
3917         struct net_device *netdev = pci_get_drvdata(pdev);
3918         struct ixgbe_adapter *adapter = netdev->priv;
3919
3920         if (pci_enable_device(pdev)) {
3921                 DPRINTK(PROBE, ERR,
3922                         "Cannot re-enable PCI device after reset.\n");
3923                 return PCI_ERS_RESULT_DISCONNECT;
3924         }
3925         pci_set_master(pdev);
3926         pci_restore_state(pdev);
3927
3928         pci_enable_wake(pdev, PCI_D3hot, 0);
3929         pci_enable_wake(pdev, PCI_D3cold, 0);
3930
3931         ixgbe_reset(adapter);
3932
3933         return PCI_ERS_RESULT_RECOVERED;
3934 }
3935
3936 /**
3937  * ixgbe_io_resume - called when traffic can start flowing again.
3938  * @pdev: Pointer to PCI device
3939  *
3940  * This callback is called when the error recovery driver tells us that
3941  * its OK to resume normal operation.
3942  */
3943 static void ixgbe_io_resume(struct pci_dev *pdev)
3944 {
3945         struct net_device *netdev = pci_get_drvdata(pdev);
3946         struct ixgbe_adapter *adapter = netdev->priv;
3947
3948         if (netif_running(netdev)) {
3949                 if (ixgbe_up(adapter)) {
3950                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3951                         return;
3952                 }
3953         }
3954
3955         netif_device_attach(netdev);
3956
3957 }
3958
3959 static struct pci_error_handlers ixgbe_err_handler = {
3960         .error_detected = ixgbe_io_error_detected,
3961         .slot_reset = ixgbe_io_slot_reset,
3962         .resume = ixgbe_io_resume,
3963 };
3964
3965 static struct pci_driver ixgbe_driver = {
3966         .name     = ixgbe_driver_name,
3967         .id_table = ixgbe_pci_tbl,
3968         .probe    = ixgbe_probe,
3969         .remove   = __devexit_p(ixgbe_remove),
3970 #ifdef CONFIG_PM
3971         .suspend  = ixgbe_suspend,
3972         .resume   = ixgbe_resume,
3973 #endif
3974         .shutdown = ixgbe_shutdown,
3975         .err_handler = &ixgbe_err_handler
3976 };
3977
3978 /**
3979  * ixgbe_init_module - Driver Registration Routine
3980  *
3981  * ixgbe_init_module is the first routine called when the driver is
3982  * loaded. All it does is register with the PCI subsystem.
3983  **/
3984 static int __init ixgbe_init_module(void)
3985 {
3986         int ret;
3987         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3988                ixgbe_driver_string, ixgbe_driver_version);
3989
3990         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3991
3992 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3993         dca_register_notify(&dca_notifier);
3994
3995 #endif
3996         ret = pci_register_driver(&ixgbe_driver);
3997         return ret;
3998 }
3999 module_init(ixgbe_init_module);
4000
4001 /**
4002  * ixgbe_exit_module - Driver Exit Cleanup Routine
4003  *
4004  * ixgbe_exit_module is called just before the driver is removed
4005  * from memory.
4006  **/
4007 static void __exit ixgbe_exit_module(void)
4008 {
4009 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4010         dca_unregister_notify(&dca_notifier);
4011 #endif
4012         pci_unregister_driver(&ixgbe_driver);
4013 }
4014
4015 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4016 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4017                             void *p)
4018 {
4019         int ret_val;
4020
4021         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4022                                          __ixgbe_notify_dca);
4023
4024         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4025 }
4026 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
4027
4028 module_exit(ixgbe_exit_module);
4029
4030 /* ixgbe_main.c */