1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
29 /* Linux PRO/1000 Ethernet Driver main header file */
34 #include "e1000_mac.h"
35 #include "e1000_82575.h"
37 #include <linux/clocksource.h>
38 #include <linux/timecompare.h>
39 #include <linux/net_tstamp.h>
43 /* ((1000000000ns / (6000ints/s * 1024ns)) << 2 = 648 */
44 #define IGB_START_ITR 648
46 /* TX/RX descriptor defines */
47 #define IGB_DEFAULT_TXD 256
48 #define IGB_MIN_TXD 80
49 #define IGB_MAX_TXD 4096
51 #define IGB_DEFAULT_RXD 256
52 #define IGB_MIN_RXD 80
53 #define IGB_MAX_RXD 4096
55 #define IGB_DEFAULT_ITR 3 /* dynamic */
56 #define IGB_MAX_ITR_USECS 10000
57 #define IGB_MIN_ITR_USECS 10
58 #define NON_Q_VECTORS 1
59 #define MAX_Q_VECTORS 8
61 /* Transmit and receive queues */
62 #define IGB_MAX_RX_QUEUES (adapter->vfs_allocated_count ? 2 : \
63 (hw->mac.type > e1000_82575 ? 8 : 4))
64 #define IGB_ABS_MAX_TX_QUEUES 8
65 #define IGB_MAX_TX_QUEUES IGB_MAX_RX_QUEUES
67 #define IGB_MAX_VF_MC_ENTRIES 30
68 #define IGB_MAX_VF_FUNCTIONS 8
69 #define IGB_MAX_VFTA_ENTRIES 128
71 struct vf_data_storage {
72 unsigned char vf_mac_addresses[ETH_ALEN];
73 u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
77 unsigned long last_nack;
80 #define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */
81 #define IGB_VF_FLAG_UNI_PROMISC 0x00000002 /* VF has unicast promisc */
82 #define IGB_VF_FLAG_MULTI_PROMISC 0x00000004 /* VF has multicast promisc */
84 /* RX descriptor control thresholds.
85 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
86 * descriptors available in its onboard memory.
87 * Setting this to 0 disables RX descriptor prefetch.
88 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
89 * available in host memory.
90 * If PTHRESH is 0, this should also be 0.
91 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
92 * descriptors until either it has this many to write back, or the
95 #define IGB_RX_PTHRESH (hw->mac.type <= e1000_82576 ? 16 : 8)
96 #define IGB_RX_HTHRESH 8
97 #define IGB_RX_WTHRESH 1
98 #define IGB_TX_PTHRESH 8
99 #define IGB_TX_HTHRESH 1
100 #define IGB_TX_WTHRESH ((hw->mac.type == e1000_82576 && \
101 adapter->msix_entries) ? 0 : 16)
103 /* this is the size past which hardware will drop packets when setting LPE=0 */
104 #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
106 /* Supported Rx Buffer Sizes */
107 #define IGB_RXBUFFER_128 128 /* Used for packet split */
108 #define IGB_RXBUFFER_1024 1024
109 #define IGB_RXBUFFER_2048 2048
110 #define IGB_RXBUFFER_16384 16384
112 #define MAX_STD_JUMBO_FRAME_SIZE 9234
114 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
115 #define IGB_TX_QUEUE_WAKE 16
116 /* How many Rx Buffers do we bundle into one write to the hardware ? */
117 #define IGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */
119 #define AUTO_ALL_MODES 0
120 #define IGB_EEPROM_APME 0x0400
122 #ifndef IGB_MASTER_SLAVE
123 /* Switch to override PHY master/slave setting */
124 #define IGB_MASTER_SLAVE e1000_ms_hw_default
127 #define IGB_MNG_VLAN_NONE -1
129 /* wrapper around a pointer to a socket buffer,
130 * so a DMA handle can be stored along with the buffer */
137 unsigned long time_stamp;
145 unsigned int page_offset;
150 struct igb_tx_queue_stats {
156 struct igb_rx_queue_stats {
164 struct igb_q_vector {
165 struct igb_adapter *adapter; /* backlink */
166 struct igb_ring *rx_ring;
167 struct igb_ring *tx_ring;
168 struct napi_struct napi;
176 void __iomem *itr_register;
178 char name[IFNAMSIZ + 9];
182 struct igb_q_vector *q_vector; /* backlink to q_vector */
183 struct net_device *netdev; /* back pointer to net_device */
184 struct pci_dev *pdev; /* pci device for dma mapping */
185 dma_addr_t dma; /* phys address of the ring */
186 void *desc; /* descriptor ring memory */
187 unsigned int size; /* length of desc. ring in bytes */
188 u16 count; /* number of desc. in the ring */
195 struct igb_buffer *buffer_info; /* array of buffer info structs */
197 unsigned int total_bytes;
198 unsigned int total_packets;
205 struct igb_tx_queue_stats tx_stats;
210 struct igb_rx_queue_stats rx_stats;
216 #define IGB_RING_FLAG_RX_CSUM 0x00000001 /* RX CSUM enabled */
217 #define IGB_RING_FLAG_RX_SCTP_CSUM 0x00000002 /* SCTP CSUM offload enabled */
219 #define IGB_RING_FLAG_TX_CTX_IDX 0x00000001 /* HW requires context index */
221 #define IGB_ADVTXD_DCMD (E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS)
223 #define E1000_RX_DESC_ADV(R, i) \
224 (&(((union e1000_adv_rx_desc *)((R).desc))[i]))
225 #define E1000_TX_DESC_ADV(R, i) \
226 (&(((union e1000_adv_tx_desc *)((R).desc))[i]))
227 #define E1000_TX_CTXTDESC_ADV(R, i) \
228 (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i]))
230 /* igb_desc_unused - calculate if we have unused descriptors */
231 static inline int igb_desc_unused(struct igb_ring *ring)
233 if (ring->next_to_clean > ring->next_to_use)
234 return ring->next_to_clean - ring->next_to_use - 1;
236 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
239 /* board specific private data structure */
242 struct timer_list watchdog_timer;
243 struct timer_list phy_info_timer;
244 struct vlan_group *vlgrp;
252 /* Interrupt Throttle Rate */
258 struct work_struct reset_task;
259 struct work_struct watchdog_task;
261 u8 tx_timeout_factor;
262 struct timer_list blink_timer;
263 unsigned long led_status;
266 struct igb_ring *tx_ring; /* One per active queue */
267 unsigned long tx_queue_len;
268 u32 tx_timeout_count;
271 struct igb_ring *rx_ring; /* One per active queue */
278 /* OS defined structs */
279 struct net_device *netdev;
280 struct pci_dev *pdev;
281 struct cyclecounter cycles;
282 struct timecounter clock;
283 struct timecompare compare;
284 struct hwtstamp_config hwtstamp_config;
286 /* structs defined in e1000_hw.h */
288 struct e1000_hw_stats stats;
289 struct e1000_phy_info phy_info;
290 struct e1000_phy_stats phy_stats;
293 struct igb_ring test_tx_ring;
294 struct igb_ring test_rx_ring;
298 unsigned int num_q_vectors;
299 struct igb_q_vector *q_vector[MAX_Q_VECTORS];
300 struct msix_entry *msix_entries;
301 u32 eims_enable_mask;
304 /* to not mess up cache alignment, always add to the bottom */
309 struct igb_ring *multi_tx_table[IGB_ABS_MAX_TX_QUEUES];
312 unsigned int vfs_allocated_count;
313 struct vf_data_storage *vf_data;
317 #define IGB_FLAG_HAS_MSI (1 << 0)
318 #define IGB_FLAG_DCA_ENABLED (1 << 1)
319 #define IGB_FLAG_QUAD_PORT_A (1 << 2)
320 #define IGB_FLAG_QUEUE_PAIRS (1 << 3)
322 #define IGB_82576_TSYNC_SHIFT 19
323 #define IGB_82580_TSYNC_SHIFT 24
334 extern char igb_driver_name[];
335 extern char igb_driver_version[];
337 extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
338 extern int igb_up(struct igb_adapter *);
339 extern void igb_down(struct igb_adapter *);
340 extern void igb_reinit_locked(struct igb_adapter *);
341 extern void igb_reset(struct igb_adapter *);
342 extern int igb_set_spd_dplx(struct igb_adapter *, u16);
343 extern int igb_setup_tx_resources(struct igb_ring *);
344 extern int igb_setup_rx_resources(struct igb_ring *);
345 extern void igb_free_tx_resources(struct igb_ring *);
346 extern void igb_free_rx_resources(struct igb_ring *);
347 extern void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *);
348 extern void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *);
349 extern void igb_setup_tctl(struct igb_adapter *);
350 extern void igb_setup_rctl(struct igb_adapter *);
351 extern netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *, struct igb_ring *);
352 extern void igb_unmap_and_free_tx_resource(struct igb_ring *,
353 struct igb_buffer *);
354 extern void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
355 extern void igb_update_stats(struct igb_adapter *);
356 extern void igb_set_ethtool_ops(struct net_device *);
358 static inline s32 igb_reset_phy(struct e1000_hw *hw)
360 if (hw->phy.ops.reset)
361 return hw->phy.ops.reset(hw);
366 static inline s32 igb_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)
368 if (hw->phy.ops.read_reg)
369 return hw->phy.ops.read_reg(hw, offset, data);
374 static inline s32 igb_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)
376 if (hw->phy.ops.write_reg)
377 return hw->phy.ops.write_reg(hw, offset, data);
382 static inline s32 igb_get_phy_info(struct e1000_hw *hw)
384 if (hw->phy.ops.get_phy_info)
385 return hw->phy.ops.get_phy_info(hw);