drivers/net/cxgb3/cxgb3_main.c

   1 /*
   2  * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include <linux/module.h>
  33 #include <linux/moduleparam.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/netdevice.h>
  38 #include <linux/etherdevice.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/mdio.h>
  41 #include <linux/sockios.h>
  42 #include <linux/workqueue.h>
  43 #include <linux/proc_fs.h>
  44 #include <linux/rtnetlink.h>
  45 #include <linux/firmware.h>
  46 #include <linux/log2.h>
  47 #include <linux/stringify.h>
  48 #include <linux/sched.h>
  49 #include <linux/slab.h>
  50 #include <asm/uaccess.h>
  51
  52 #include "common.h"
  53 #include "cxgb3_ioctl.h"
  54 #include "regs.h"
  55 #include "cxgb3_offload.h"
  56 #include "version.h"
  57
  58 #include "cxgb3_ctl_defs.h"
  59 #include "t3_cpl.h"
  60 #include "firmware_exports.h"
  61
  62 enum {
  63         MAX_TXQ_ENTRIES = 16384,
  64         MAX_CTRL_TXQ_ENTRIES = 1024,
  65         MAX_RSPQ_ENTRIES = 16384,
  66         MAX_RX_BUFFERS = 16384,
  67         MAX_RX_JUMBO_BUFFERS = 16384,
  68         MIN_TXQ_ENTRIES = 4,
  69         MIN_CTRL_TXQ_ENTRIES = 4,
  70         MIN_RSPQ_ENTRIES = 32,
  71         MIN_FL_ENTRIES = 32
  72 };
  73
  74 #define PORT_MASK ((1 << MAX_NPORTS) - 1)
  75
  76 #define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  77                          NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
  78                          NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
  79
  80 #define EEPROM_MAGIC 0x38E2F10C
  81
  82 #define CH_DEVICE(devid, idx) \
  83         { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx }
  84
  85 static DEFINE_PCI_DEVICE_TABLE(cxgb3_pci_tbl) = {
  86         CH_DEVICE(0x20, 0),     /* PE9000 */
  87         CH_DEVICE(0x21, 1),     /* T302E */
  88         CH_DEVICE(0x22, 2),     /* T310E */
  89         CH_DEVICE(0x23, 3),     /* T320X */
  90         CH_DEVICE(0x24, 1),     /* T302X */
  91         CH_DEVICE(0x25, 3),     /* T320E */
  92         CH_DEVICE(0x26, 2),     /* T310X */
  93         CH_DEVICE(0x30, 2),     /* T3B10 */
  94         CH_DEVICE(0x31, 3),     /* T3B20 */
  95         CH_DEVICE(0x32, 1),     /* T3B02 */
  96         CH_DEVICE(0x35, 6),     /* T3C20-derived T3C10 */
  97         CH_DEVICE(0x36, 3),     /* S320E-CR */
  98         CH_DEVICE(0x37, 7),     /* N320E-G2 */
  99         {0,}
 100 };
 101
 102 MODULE_DESCRIPTION(DRV_DESC);
 103 MODULE_AUTHOR("Chelsio Communications");
 104 MODULE_LICENSE("Dual BSD/GPL");
 105 MODULE_VERSION(DRV_VERSION);
 106 MODULE_DEVICE_TABLE(pci, cxgb3_pci_tbl);
 107
 108 static int dflt_msg_enable = DFLT_MSG_ENABLE;
 109
 110 module_param(dflt_msg_enable, int, 0644);
 111 MODULE_PARM_DESC(dflt_msg_enable, "Chelsio T3 default message enable bitmap");
 112
 113 /*
 114  * The driver uses the best interrupt scheme available on a platform in the
 115  * order MSI-X, MSI, legacy pin interrupts.  This parameter determines which
 116  * of these schemes the driver may consider as follows:
 117  *
 118  * msi = 2: choose from among all three options
 119  * msi = 1: only consider MSI and pin interrupts
 120  * msi = 0: force pin interrupts
 121  */
 122 static int msi = 2;
 123
 124 module_param(msi, int, 0644);
 125 MODULE_PARM_DESC(msi, "whether to use MSI or MSI-X");
 126
 127 /*
 128  * The driver enables offload as a default.
 129  * To disable it, use ofld_disable = 1.
 130  */
 131
 132 static int ofld_disable = 0;
 133
 134 module_param(ofld_disable, int, 0644);
 135 MODULE_PARM_DESC(ofld_disable, "whether to enable offload at init time or not");
 136
 137 /*
 138  * We have work elements that we need to cancel when an interface is taken
 139  * down.  Normally the work elements would be executed by keventd but that
 140  * can deadlock because of linkwatch.  If our close method takes the rtnl
 141  * lock and linkwatch is ahead of our work elements in keventd, linkwatch
 142  * will block keventd as it needs the rtnl lock, and we'll deadlock waiting
 143  * for our work to complete.  Get our own work queue to solve this.
 144  */
 145 struct workqueue_struct *cxgb3_wq;
 146
 147 /**
 148  *      link_report - show link status and link speed/duplex
 149  *      @p: the port whose settings are to be reported
 150  *
 151  *      Shows the link status, speed, and duplex of a port.
 152  */
 153 static void link_report(struct net_device *dev)
 154 {
 155         if (!netif_carrier_ok(dev))
 156                 printk(KERN_INFO "%s: link down\n", dev->name);
 157         else {
 158                 const char *s = "10Mbps";
 159                 const struct port_info *p = netdev_priv(dev);
 160
 161                 switch (p->link_config.speed) {
 162                 case SPEED_10000:
 163                         s = "10Gbps";
 164                         break;
 165                 case SPEED_1000:
 166                         s = "1000Mbps";
 167                         break;
 168                 case SPEED_100:
 169                         s = "100Mbps";
 170                         break;
 171                 }
 172
 173                 printk(KERN_INFO "%s: link up, %s, %s-duplex\n", dev->name, s,
 174                        p->link_config.duplex == DUPLEX_FULL ? "full" : "half");
 175         }
 176 }
 177
 178 static void enable_tx_fifo_drain(struct adapter *adapter,
 179                                  struct port_info *pi)
 180 {
 181         t3_set_reg_field(adapter, A_XGM_TXFIFO_CFG + pi->mac.offset, 0,
 182                          F_ENDROPPKT);
 183         t3_write_reg(adapter, A_XGM_RX_CTRL + pi->mac.offset, 0);
 184         t3_write_reg(adapter, A_XGM_TX_CTRL + pi->mac.offset, F_TXEN);
 185         t3_write_reg(adapter, A_XGM_RX_CTRL + pi->mac.offset, F_RXEN);
 186 }
 187
 188 static void disable_tx_fifo_drain(struct adapter *adapter,
 189                                   struct port_info *pi)
 190 {
 191         t3_set_reg_field(adapter, A_XGM_TXFIFO_CFG + pi->mac.offset,
 192                          F_ENDROPPKT, 0);
 193 }
 194
 195 void t3_os_link_fault(struct adapter *adap, int port_id, int state)
 196 {
 197         struct net_device *dev = adap->port[port_id];
 198         struct port_info *pi = netdev_priv(dev);
 199
 200         if (state == netif_carrier_ok(dev))
 201                 return;
 202
 203         if (state) {
 204                 struct cmac *mac = &pi->mac;
 205
 206                 netif_carrier_on(dev);
 207
 208                 disable_tx_fifo_drain(adap, pi);
 209
 210                 /* Clear local faults */
 211                 t3_xgm_intr_disable(adap, pi->port_id);
 212                 t3_read_reg(adap, A_XGM_INT_STATUS +
 213                                     pi->mac.offset);
 214                 t3_write_reg(adap,
 215                              A_XGM_INT_CAUSE + pi->mac.offset,
 216                              F_XGM_INT);
 217
 218                 t3_set_reg_field(adap,
 219                                  A_XGM_INT_ENABLE +
 220                                  pi->mac.offset,
 221                                  F_XGM_INT, F_XGM_INT);
 222                 t3_xgm_intr_enable(adap, pi->port_id);
 223
 224                 t3_mac_enable(mac, MAC_DIRECTION_TX);
 225         } else {
 226                 netif_carrier_off(dev);
 227
 228                 /* Flush TX FIFO */
 229                 enable_tx_fifo_drain(adap, pi);
 230         }
 231         link_report(dev);
 232 }
 233
 234 /**
 235  *      t3_os_link_changed - handle link status changes
 236  *      @adapter: the adapter associated with the link change
 237  *      @port_id: the port index whose limk status has changed
 238  *      @link_stat: the new status of the link
 239  *      @speed: the new speed setting
 240  *      @duplex: the new duplex setting
 241  *      @pause: the new flow-control setting
 242  *
 243  *      This is the OS-dependent handler for link status changes.  The OS
 244  *      neutral handler takes care of most of the processing for these events,
 245  *      then calls this handler for any OS-specific processing.
 246  */
 247 void t3_os_link_changed(struct adapter *adapter, int port_id, int link_stat,
 248                         int speed, int duplex, int pause)
 249 {
 250         struct net_device *dev = adapter->port[port_id];
 251         struct port_info *pi = netdev_priv(dev);
 252         struct cmac *mac = &pi->mac;
 253
 254         /* Skip changes from disabled ports. */
 255         if (!netif_running(dev))
 256                 return;
 257
 258         if (link_stat != netif_carrier_ok(dev)) {
 259                 if (link_stat) {
 260                         disable_tx_fifo_drain(adapter, pi);
 261
 262                         t3_mac_enable(mac, MAC_DIRECTION_RX);
 263
 264                         /* Clear local faults */
 265                         t3_xgm_intr_disable(adapter, pi->port_id);
 266                         t3_read_reg(adapter, A_XGM_INT_STATUS +
 267                                     pi->mac.offset);
 268                         t3_write_reg(adapter,
 269                                      A_XGM_INT_CAUSE + pi->mac.offset,
 270                                      F_XGM_INT);
 271
 272                         t3_set_reg_field(adapter,
 273                                          A_XGM_INT_ENABLE + pi->mac.offset,
 274                                          F_XGM_INT, F_XGM_INT);
 275                         t3_xgm_intr_enable(adapter, pi->port_id);
 276
 277                         netif_carrier_on(dev);
 278                 } else {
 279                         netif_carrier_off(dev);
 280
 281                         t3_xgm_intr_disable(adapter, pi->port_id);
 282                         t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
 283                         t3_set_reg_field(adapter,
 284                                          A_XGM_INT_ENABLE + pi->mac.offset,
 285                                          F_XGM_INT, 0);
 286
 287                         if (is_10G(adapter))
 288                                 pi->phy.ops->power_down(&pi->phy, 1);
 289
 290                         t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
 291                         t3_mac_disable(mac, MAC_DIRECTION_RX);
 292                         t3_link_start(&pi->phy, mac, &pi->link_config);
 293
 294                         /* Flush TX FIFO */
 295                         enable_tx_fifo_drain(adapter, pi);
 296                 }
 297
 298                 link_report(dev);
 299         }
 300 }
 301
 302 /**
 303  *      t3_os_phymod_changed - handle PHY module changes
 304  *      @phy: the PHY reporting the module change
 305  *      @mod_type: new module type
 306  *
 307  *      This is the OS-dependent handler for PHY module changes.  It is
 308  *      invoked when a PHY module is removed or inserted for any OS-specific
 309  *      processing.
 310  */
 311 void t3_os_phymod_changed(struct adapter *adap, int port_id)
 312 {
 313         static const char *mod_str[] = {
 314                 NULL, "SR", "LR", "LRM", "TWINAX", "TWINAX", "unknown"
 315         };
 316
 317         const struct net_device *dev = adap->port[port_id];
 318         const struct port_info *pi = netdev_priv(dev);
 319
 320         if (pi->phy.modtype == phy_modtype_none)
 321                 printk(KERN_INFO "%s: PHY module unplugged\n", dev->name);
 322         else
 323                 printk(KERN_INFO "%s: %s PHY module inserted\n", dev->name,
 324                        mod_str[pi->phy.modtype]);
 325 }
 326
 327 static void cxgb_set_rxmode(struct net_device *dev)
 328 {
 329         struct port_info *pi = netdev_priv(dev);
 330
 331         t3_mac_set_rx_mode(&pi->mac, dev);
 332 }
 333
 334 /**
 335  *      link_start - enable a port
 336  *      @dev: the device to enable
 337  *
 338  *      Performs the MAC and PHY actions needed to enable a port.
 339  */
 340 static void link_start(struct net_device *dev)
 341 {
 342         struct port_info *pi = netdev_priv(dev);
 343         struct cmac *mac = &pi->mac;
 344
 345         t3_mac_reset(mac);
 346         t3_mac_set_num_ucast(mac, MAX_MAC_IDX);
 347         t3_mac_set_mtu(mac, dev->mtu);
 348         t3_mac_set_address(mac, LAN_MAC_IDX, dev->dev_addr);
 349         t3_mac_set_address(mac, SAN_MAC_IDX, pi->iscsic.mac_addr);
 350         t3_mac_set_rx_mode(mac, dev);
 351         t3_link_start(&pi->phy, mac, &pi->link_config);
 352         t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
 353 }
 354
 355 static inline void cxgb_disable_msi(struct adapter *adapter)
 356 {
 357         if (adapter->flags & USING_MSIX) {
 358                 pci_disable_msix(adapter->pdev);
 359                 adapter->flags &= ~USING_MSIX;
 360         } else if (adapter->flags & USING_MSI) {
 361                 pci_disable_msi(adapter->pdev);
 362                 adapter->flags &= ~USING_MSI;
 363         }
 364 }
 365
 366 /*
 367  * Interrupt handler for asynchronous events used with MSI-X.
 368  */
 369 static irqreturn_t t3_async_intr_handler(int irq, void *cookie)
 370 {
 371         t3_slow_intr_handler(cookie);
 372         return IRQ_HANDLED;
 373 }
 374
 375 /*
 376  * Name the MSI-X interrupts.
 377  */
 378 static void name_msix_vecs(struct adapter *adap)
 379 {
 380         int i, j, msi_idx = 1, n = sizeof(adap->msix_info[0].desc) - 1;
 381
 382         snprintf(adap->msix_info[0].desc, n, "%s", adap->name);
 383         adap->msix_info[0].desc[n] = 0;
 384
 385         for_each_port(adap, j) {
 386                 struct net_device *d = adap->port[j];
 387                 const struct port_info *pi = netdev_priv(d);
 388
 389                 for (i = 0; i < pi->nqsets; i++, msi_idx++) {
 390                         snprintf(adap->msix_info[msi_idx].desc, n,
 391                                  "%s-%d", d->name, pi->first_qset + i);
 392                         adap->msix_info[msi_idx].desc[n] = 0;
 393                 }
 394         }
 395 }
 396
 397 static int request_msix_data_irqs(struct adapter *adap)
 398 {
 399         int i, j, err, qidx = 0;
 400
 401         for_each_port(adap, i) {
 402                 int nqsets = adap2pinfo(adap, i)->nqsets;
 403
 404                 for (j = 0; j < nqsets; ++j) {
 405                         err = request_irq(adap->msix_info[qidx + 1].vec,
 406                                           t3_intr_handler(adap,
 407                                                           adap->sge.qs[qidx].
 408                                                           rspq.polling), 0,
 409                                           adap->msix_info[qidx + 1].desc,
 410                                           &adap->sge.qs[qidx]);
 411                         if (err) {
 412                                 while (--qidx >= 0)
 413                                         free_irq(adap->msix_info[qidx + 1].vec,
 414                                                  &adap->sge.qs[qidx]);
 415                                 return err;
 416                         }
 417                         qidx++;
 418                 }
 419         }
 420         return 0;
 421 }
 422
 423 static void free_irq_resources(struct adapter *adapter)
 424 {
 425         if (adapter->flags & USING_MSIX) {
 426                 int i, n = 0;
 427
 428                 free_irq(adapter->msix_info[0].vec, adapter);
 429                 for_each_port(adapter, i)
 430                         n += adap2pinfo(adapter, i)->nqsets;
 431
 432                 for (i = 0; i < n; ++i)
 433                         free_irq(adapter->msix_info[i + 1].vec,
 434                                  &adapter->sge.qs[i]);
 435         } else
 436                 free_irq(adapter->pdev->irq, adapter);
 437 }
 438
 439 static int await_mgmt_replies(struct adapter *adap, unsigned long init_cnt,
 440                               unsigned long n)
 441 {
 442         int attempts = 10;
 443
 444         while (adap->sge.qs[0].rspq.offload_pkts < init_cnt + n) {
 445                 if (!--attempts)
 446                         return -ETIMEDOUT;
 447                 msleep(10);
 448         }
 449         return 0;
 450 }
 451
 452 static int init_tp_parity(struct adapter *adap)
 453 {
 454         int i;
 455         struct sk_buff *skb;
 456         struct cpl_set_tcb_field *greq;
 457         unsigned long cnt = adap->sge.qs[0].rspq.offload_pkts;
 458
 459         t3_tp_set_offload_mode(adap, 1);
 460
 461         for (i = 0; i < 16; i++) {
 462                 struct cpl_smt_write_req *req;
 463
 464                 skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 465                 if (!skb)
 466                         skb = adap->nofail_skb;
 467                 if (!skb)
 468                         goto alloc_skb_fail;
 469
 470                 req = (struct cpl_smt_write_req *)__skb_put(skb, sizeof(*req));
 471                 memset(req, 0, sizeof(*req));
 472                 req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 473                 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, i));
 474                 req->mtu_idx = NMTUS - 1;
 475                 req->iff = i;
 476                 t3_mgmt_tx(adap, skb);
 477                 if (skb == adap->nofail_skb) {
 478                         await_mgmt_replies(adap, cnt, i + 1);
 479                         adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 480                         if (!adap->nofail_skb)
 481                                 goto alloc_skb_fail;
 482                 }
 483         }
 484
 485         for (i = 0; i < 2048; i++) {
 486                 struct cpl_l2t_write_req *req;
 487
 488                 skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 489                 if (!skb)
 490                         skb = adap->nofail_skb;
 491                 if (!skb)
 492                         goto alloc_skb_fail;
 493
 494                 req = (struct cpl_l2t_write_req *)__skb_put(skb, sizeof(*req));
 495                 memset(req, 0, sizeof(*req));
 496                 req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 497                 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, i));
 498                 req->params = htonl(V_L2T_W_IDX(i));
 499                 t3_mgmt_tx(adap, skb);
 500                 if (skb == adap->nofail_skb) {
 501                         await_mgmt_replies(adap, cnt, 16 + i + 1);
 502                         adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 503                         if (!adap->nofail_skb)
 504                                 goto alloc_skb_fail;
 505                 }
 506         }
 507
 508         for (i = 0; i < 2048; i++) {
 509                 struct cpl_rte_write_req *req;
 510
 511                 skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 512                 if (!skb)
 513                         skb = adap->nofail_skb;
 514                 if (!skb)
 515                         goto alloc_skb_fail;
 516
 517                 req = (struct cpl_rte_write_req *)__skb_put(skb, sizeof(*req));
 518                 memset(req, 0, sizeof(*req));
 519                 req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 520                 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_RTE_WRITE_REQ, i));
 521                 req->l2t_idx = htonl(V_L2T_W_IDX(i));
 522                 t3_mgmt_tx(adap, skb);
 523                 if (skb == adap->nofail_skb) {
 524                         await_mgmt_replies(adap, cnt, 16 + 2048 + i + 1);
 525                         adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 526                         if (!adap->nofail_skb)
 527                                 goto alloc_skb_fail;
 528                 }
 529         }
 530
 531         skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 532         if (!skb)
 533                 skb = adap->nofail_skb;
 534         if (!skb)
 535                 goto alloc_skb_fail;
 536
 537         greq = (struct cpl_set_tcb_field *)__skb_put(skb, sizeof(*greq));
 538         memset(greq, 0, sizeof(*greq));
 539         greq->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 540         OPCODE_TID(greq) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, 0));
 541         greq->mask = cpu_to_be64(1);
 542         t3_mgmt_tx(adap, skb);
 543
 544         i = await_mgmt_replies(adap, cnt, 16 + 2048 + 2048 + 1);
 545         if (skb == adap->nofail_skb) {
 546                 i = await_mgmt_replies(adap, cnt, 16 + 2048 + 2048 + 1);
 547                 adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 548         }
 549
 550         t3_tp_set_offload_mode(adap, 0);
 551         return i;
 552
 553 alloc_skb_fail:
 554         t3_tp_set_offload_mode(adap, 0);
 555         return -ENOMEM;
 556 }
 557
 558 /**
 559  *      setup_rss - configure RSS
 560  *      @adap: the adapter
 561  *
 562  *      Sets up RSS to distribute packets to multiple receive queues.  We
 563  *      configure the RSS CPU lookup table to distribute to the number of HW
 564  *      receive queues, and the response queue lookup table to narrow that
 565  *      down to the response queues actually configured for each port.
 566  *      We always configure the RSS mapping for two ports since the mapping
 567  *      table has plenty of entries.
 568  */
 569 static void setup_rss(struct adapter *adap)
 570 {
 571         int i;
 572         unsigned int nq0 = adap2pinfo(adap, 0)->nqsets;
 573         unsigned int nq1 = adap->port[1] ? adap2pinfo(adap, 1)->nqsets : 1;
 574         u8 cpus[SGE_QSETS + 1];
 575         u16 rspq_map[RSS_TABLE_SIZE];
 576
 577         for (i = 0; i < SGE_QSETS; ++i)
 578                 cpus[i] = i;
 579         cpus[SGE_QSETS] = 0xff; /* terminator */
 580
 581         for (i = 0; i < RSS_TABLE_SIZE / 2; ++i) {
 582                 rspq_map[i] = i % nq0;
 583                 rspq_map[i + RSS_TABLE_SIZE / 2] = (i % nq1) + nq0;
 584         }
 585
 586         t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN |
 587                       F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN |
 588                       V_RRCPLCPUSIZE(6) | F_HASHTOEPLITZ, cpus, rspq_map);
 589 }
 590
 591 static void ring_dbs(struct adapter *adap)
 592 {
 593         int i, j;
 594
 595         for (i = 0; i < SGE_QSETS; i++) {
 596                 struct sge_qset *qs = &adap->sge.qs[i];
 597
 598                 if (qs->adap)
 599                         for (j = 0; j < SGE_TXQ_PER_SET; j++)
 600                                 t3_write_reg(adap, A_SG_KDOORBELL, F_SELEGRCNTX | V_EGRCNTX(qs->txq[j].cntxt_id));
 601         }
 602 }
 603
 604 static void init_napi(struct adapter *adap)
 605 {
 606         int i;
 607
 608         for (i = 0; i < SGE_QSETS; i++) {
 609                 struct sge_qset *qs = &adap->sge.qs[i];
 610
 611                 if (qs->adap)
 612                         netif_napi_add(qs->netdev, &qs->napi, qs->napi.poll,
 613                                        64);
 614         }
 615
 616         /*
 617          * netif_napi_add() can be called only once per napi_struct because it
 618          * adds each new napi_struct to a list.  Be careful not to call it a
 619          * second time, e.g., during EEH recovery, by making a note of it.
 620          */
 621         adap->flags |= NAPI_INIT;
 622 }
 623
 624 /*
 625  * Wait until all NAPI handlers are descheduled.  This includes the handlers of
 626  * both netdevices representing interfaces and the dummy ones for the extra
 627  * queues.
 628  */
 629 static void quiesce_rx(struct adapter *adap)
 630 {
 631         int i;
 632
 633         for (i = 0; i < SGE_QSETS; i++)
 634                 if (adap->sge.qs[i].adap)
 635                         napi_disable(&adap->sge.qs[i].napi);
 636 }
 637
 638 static void enable_all_napi(struct adapter *adap)
 639 {
 640         int i;
 641         for (i = 0; i < SGE_QSETS; i++)
 642                 if (adap->sge.qs[i].adap)
 643                         napi_enable(&adap->sge.qs[i].napi);
 644 }
 645
 646 /**
 647  *      set_qset_lro - Turn a queue set's LRO capability on and off
 648  *      @dev: the device the qset is attached to
 649  *      @qset_idx: the queue set index
 650  *      @val: the LRO switch
 651  *
 652  *      Sets LRO on or off for a particular queue set.
 653  *      the device's features flag is updated to reflect the LRO
 654  *      capability when all queues belonging to the device are
 655  *      in the same state.
 656  */
 657 static void set_qset_lro(struct net_device *dev, int qset_idx, int val)
 658 {
 659         struct port_info *pi = netdev_priv(dev);
 660         struct adapter *adapter = pi->adapter;
 661
 662         adapter->params.sge.qset[qset_idx].lro = !!val;
 663         adapter->sge.qs[qset_idx].lro_enabled = !!val;
 664 }
 665
 666 /**
 667  *      setup_sge_qsets - configure SGE Tx/Rx/response queues
 668  *      @adap: the adapter
 669  *
 670  *      Determines how many sets of SGE queues to use and initializes them.
 671  *      We support multiple queue sets per port if we have MSI-X, otherwise
 672  *      just one queue set per port.
 673  */
 674 static int setup_sge_qsets(struct adapter *adap)
 675 {
 676         int i, j, err, irq_idx = 0, qset_idx = 0;
 677         unsigned int ntxq = SGE_TXQ_PER_SET;
 678
 679         if (adap->params.rev > 0 && !(adap->flags & USING_MSI))
 680                 irq_idx = -1;
 681
 682         for_each_port(adap, i) {
 683                 struct net_device *dev = adap->port[i];
 684                 struct port_info *pi = netdev_priv(dev);
 685
 686                 pi->qs = &adap->sge.qs[pi->first_qset];
 687                 for (j = 0; j < pi->nqsets; ++j, ++qset_idx) {
 688                         set_qset_lro(dev, qset_idx, pi->rx_offload & T3_LRO);
 689                         err = t3_sge_alloc_qset(adap, qset_idx, 1,
 690                                 (adap->flags & USING_MSIX) ? qset_idx + 1 :
 691                                                              irq_idx,
 692                                 &adap->params.sge.qset[qset_idx], ntxq, dev,
 693                                 netdev_get_tx_queue(dev, j));
 694                         if (err) {
 695                                 t3_free_sge_resources(adap);
 696                                 return err;
 697                         }
 698                 }
 699         }
 700
 701         return 0;
 702 }
 703
 704 static ssize_t attr_show(struct device *d, char *buf,
 705                          ssize_t(*format) (struct net_device *, char *))
 706 {
 707         ssize_t len;
 708
 709         /* Synchronize with ioctls that may shut down the device */
 710         rtnl_lock();
 711         len = (*format) (to_net_dev(d), buf);
 712         rtnl_unlock();
 713         return len;
 714 }
 715
 716 static ssize_t attr_store(struct device *d,
 717                           const char *buf, size_t len,
 718                           ssize_t(*set) (struct net_device *, unsigned int),
 719                           unsigned int min_val, unsigned int max_val)
 720 {
 721         char *endp;
 722         ssize_t ret;
 723         unsigned int val;
 724
 725         if (!capable(CAP_NET_ADMIN))
 726                 return -EPERM;
 727
 728         val = simple_strtoul(buf, &endp, 0);
 729         if (endp == buf || val < min_val || val > max_val)
 730                 return -EINVAL;
 731
 732         rtnl_lock();
 733         ret = (*set) (to_net_dev(d), val);
 734         if (!ret)
 735                 ret = len;
 736         rtnl_unlock();
 737         return ret;
 738 }
 739
 740 #define CXGB3_SHOW(name, val_expr) \
 741 static ssize_t format_##name(struct net_device *dev, char *buf) \
 742 { \
 743         struct port_info *pi = netdev_priv(dev); \
 744         struct adapter *adap = pi->adapter; \
 745         return sprintf(buf, "%u\n", val_expr); \
 746 } \
 747 static ssize_t show_##name(struct device *d, struct device_attribute *attr, \
 748                            char *buf) \
 749 { \
 750         return attr_show(d, buf, format_##name); \
 751 }
 752
 753 static ssize_t set_nfilters(struct net_device *dev, unsigned int val)
 754 {
 755         struct port_info *pi = netdev_priv(dev);
 756         struct adapter *adap = pi->adapter;
 757         int min_tids = is_offload(adap) ? MC5_MIN_TIDS : 0;
 758
 759         if (adap->flags & FULL_INIT_DONE)
 760                 return -EBUSY;
 761         if (val && adap->params.rev == 0)
 762                 return -EINVAL;
 763         if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nservers -
 764             min_tids)
 765                 return -EINVAL;
 766         adap->params.mc5.nfilters = val;
 767         return 0;
 768 }
 769
 770 static ssize_t store_nfilters(struct device *d, struct device_attribute *attr,
 771                               const char *buf, size_t len)
 772 {
 773         return attr_store(d, buf, len, set_nfilters, 0, ~0);
 774 }
 775
 776 static ssize_t set_nservers(struct net_device *dev, unsigned int val)
 777 {
 778         struct port_info *pi = netdev_priv(dev);
 779         struct adapter *adap = pi->adapter;
 780
 781         if (adap->flags & FULL_INIT_DONE)
 782                 return -EBUSY;
 783         if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nfilters -
 784             MC5_MIN_TIDS)
 785                 return -EINVAL;
 786         adap->params.mc5.nservers = val;
 787         return 0;
 788 }
 789
 790 static ssize_t store_nservers(struct device *d, struct device_attribute *attr,
 791                               const char *buf, size_t len)
 792 {
 793         return attr_store(d, buf, len, set_nservers, 0, ~0);
 794 }
 795
 796 #define CXGB3_ATTR_R(name, val_expr) \
 797 CXGB3_SHOW(name, val_expr) \
 798 static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
 799
 800 #define CXGB3_ATTR_RW(name, val_expr, store_method) \
 801 CXGB3_SHOW(name, val_expr) \
 802 static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, show_##name, store_method)
 803
 804 CXGB3_ATTR_R(cam_size, t3_mc5_size(&adap->mc5));
 805 CXGB3_ATTR_RW(nfilters, adap->params.mc5.nfilters, store_nfilters);
 806 CXGB3_ATTR_RW(nservers, adap->params.mc5.nservers, store_nservers);
 807
 808 static struct attribute *cxgb3_attrs[] = {
 809         &dev_attr_cam_size.attr,
 810         &dev_attr_nfilters.attr,
 811         &dev_attr_nservers.attr,
 812         NULL
 813 };
 814
 815 static struct attribute_group cxgb3_attr_group = {.attrs = cxgb3_attrs };
 816
 817 static ssize_t tm_attr_show(struct device *d,
 818                             char *buf, int sched)
 819 {
 820         struct port_info *pi = netdev_priv(to_net_dev(d));
 821         struct adapter *adap = pi->adapter;
 822         unsigned int v, addr, bpt, cpt;
 823         ssize_t len;
 824
 825         addr = A_TP_TX_MOD_Q1_Q0_RATE_LIMIT - sched / 2;
 826         rtnl_lock();
 827         t3_write_reg(adap, A_TP_TM_PIO_ADDR, addr);
 828         v = t3_read_reg(adap, A_TP_TM_PIO_DATA);
 829         if (sched & 1)
 830                 v >>= 16;
 831         bpt = (v >> 8) & 0xff;
 832         cpt = v & 0xff;
 833         if (!cpt)
 834                 len = sprintf(buf, "disabled\n");
 835         else {
 836                 v = (adap->params.vpd.cclk * 1000) / cpt;
 837                 len = sprintf(buf, "%u Kbps\n", (v * bpt) / 125);
 838         }
 839         rtnl_unlock();
 840         return len;
 841 }
 842
 843 static ssize_t tm_attr_store(struct device *d,
 844                              const char *buf, size_t len, int sched)
 845 {
 846         struct port_info *pi = netdev_priv(to_net_dev(d));
 847         struct adapter *adap = pi->adapter;
 848         unsigned int val;
 849         char *endp;
 850         ssize_t ret;
 851
 852         if (!capable(CAP_NET_ADMIN))
 853                 return -EPERM;
 854
 855         val = simple_strtoul(buf, &endp, 0);
 856         if (endp == buf || val > 10000000)
 857                 return -EINVAL;
 858
 859         rtnl_lock();
 860         ret = t3_config_sched(adap, val, sched);
 861         if (!ret)
 862                 ret = len;
 863         rtnl_unlock();
 864         return ret;
 865 }
 866
 867 #define TM_ATTR(name, sched) \
 868 static ssize_t show_##name(struct device *d, struct device_attribute *attr, \
 869                            char *buf) \
 870 { \
 871         return tm_attr_show(d, buf, sched); \
 872 } \
 873 static ssize_t store_##name(struct device *d, struct device_attribute *attr, \
 874                             const char *buf, size_t len) \
 875 { \
 876         return tm_attr_store(d, buf, len, sched); \
 877 } \
 878 static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, show_##name, store_##name)
 879
 880 TM_ATTR(sched0, 0);
 881 TM_ATTR(sched1, 1);
 882 TM_ATTR(sched2, 2);
 883 TM_ATTR(sched3, 3);
 884 TM_ATTR(sched4, 4);
 885 TM_ATTR(sched5, 5);
 886 TM_ATTR(sched6, 6);
 887 TM_ATTR(sched7, 7);
 888
 889 static struct attribute *offload_attrs[] = {
 890         &dev_attr_sched0.attr,
 891         &dev_attr_sched1.attr,
 892         &dev_attr_sched2.attr,
 893         &dev_attr_sched3.attr,
 894         &dev_attr_sched4.attr,
 895         &dev_attr_sched5.attr,
 896         &dev_attr_sched6.attr,
 897         &dev_attr_sched7.attr,
 898         NULL
 899 };
 900
 901 static struct attribute_group offload_attr_group = {.attrs = offload_attrs };
 902
 903 /*
 904  * Sends an sk_buff to an offload queue driver
 905  * after dealing with any active network taps.
 906  */
 907 static inline int offload_tx(struct t3cdev *tdev, struct sk_buff *skb)
 908 {
 909         int ret;
 910
 911         local_bh_disable();
 912         ret = t3_offload_tx(tdev, skb);
 913         local_bh_enable();
 914         return ret;
 915 }
 916
 917 static int write_smt_entry(struct adapter *adapter, int idx)
 918 {
 919         struct cpl_smt_write_req *req;
 920         struct port_info *pi = netdev_priv(adapter->port[idx]);
 921         struct sk_buff *skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 922
 923         if (!skb)
 924                 return -ENOMEM;
 925
 926         req = (struct cpl_smt_write_req *)__skb_put(skb, sizeof(*req));
 927         req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 928         OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, idx));
 929         req->mtu_idx = NMTUS - 1;       /* should be 0 but there's a T3 bug */
 930         req->iff = idx;
 931         memcpy(req->src_mac0, adapter->port[idx]->dev_addr, ETH_ALEN);
 932         memcpy(req->src_mac1, pi->iscsic.mac_addr, ETH_ALEN);
 933         skb->priority = 1;
 934         offload_tx(&adapter->tdev, skb);
 935         return 0;
 936 }
 937
 938 static int init_smt(struct adapter *adapter)
 939 {
 940         int i;
 941
 942         for_each_port(adapter, i)
 943             write_smt_entry(adapter, i);
 944         return 0;
 945 }
 946
 947 static void init_port_mtus(struct adapter *adapter)
 948 {
 949         unsigned int mtus = adapter->port[0]->mtu;
 950
 951         if (adapter->port[1])
 952                 mtus |= adapter->port[1]->mtu << 16;
 953         t3_write_reg(adapter, A_TP_MTU_PORT_TABLE, mtus);
 954 }
 955
 956 static int send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
 957                               int hi, int port)
 958 {
 959         struct sk_buff *skb;
 960         struct mngt_pktsched_wr *req;
 961         int ret;
 962
 963         skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 964         if (!skb)
 965                 skb = adap->nofail_skb;
 966         if (!skb)
 967                 return -ENOMEM;
 968
 969         req = (struct mngt_pktsched_wr *)skb_put(skb, sizeof(*req));
 970         req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_MNGT));
 971         req->mngt_opcode = FW_MNGTOPCODE_PKTSCHED_SET;
 972         req->sched = sched;
 973         req->idx = qidx;
 974         req->min = lo;
 975         req->max = hi;
 976         req->binding = port;
 977         ret = t3_mgmt_tx(adap, skb);
 978         if (skb == adap->nofail_skb) {
 979                 adap->nofail_skb = alloc_skb(sizeof(struct cpl_set_tcb_field),
 980                                              GFP_KERNEL);
 981                 if (!adap->nofail_skb)
 982                         ret = -ENOMEM;
 983         }
 984
 985         return ret;
 986 }
 987
 988 static int bind_qsets(struct adapter *adap)
 989 {
 990         int i, j, err = 0;
 991
 992         for_each_port(adap, i) {
 993                 const struct port_info *pi = adap2pinfo(adap, i);
 994
 995                 for (j = 0; j < pi->nqsets; ++j) {
 996                         int ret = send_pktsched_cmd(adap, 1,
 997                                                     pi->first_qset + j, -1,
 998                                                     -1, i);
 999                         if (ret)
1000                                 err = ret;
1001                 }
1002         }
1003
1004         return err;
1005 }
1006
1007 #define FW_VERSION __stringify(FW_VERSION_MAJOR) "."                    \
1008         __stringify(FW_VERSION_MINOR) "." __stringify(FW_VERSION_MICRO)
1009 #define FW_FNAME "cxgb3/t3fw-" FW_VERSION ".bin"
1010 #define TPSRAM_VERSION __stringify(TP_VERSION_MAJOR) "."                \
1011         __stringify(TP_VERSION_MINOR) "." __stringify(TP_VERSION_MICRO)
1012 #define TPSRAM_NAME "cxgb3/t3%c_psram-" TPSRAM_VERSION ".bin"
1013 #define AEL2005_OPT_EDC_NAME "cxgb3/ael2005_opt_edc.bin"
1014 #define AEL2005_TWX_EDC_NAME "cxgb3/ael2005_twx_edc.bin"
1015 #define AEL2020_TWX_EDC_NAME "cxgb3/ael2020_twx_edc.bin"
1016 MODULE_FIRMWARE(FW_FNAME);
1017 MODULE_FIRMWARE("cxgb3/t3b_psram-" TPSRAM_VERSION ".bin");
1018 MODULE_FIRMWARE("cxgb3/t3c_psram-" TPSRAM_VERSION ".bin");
1019 MODULE_FIRMWARE(AEL2005_OPT_EDC_NAME);
1020 MODULE_FIRMWARE(AEL2005_TWX_EDC_NAME);
1021 MODULE_FIRMWARE(AEL2020_TWX_EDC_NAME);
1022
1023 static inline const char *get_edc_fw_name(int edc_idx)
1024 {
1025         const char *fw_name = NULL;
1026
1027         switch (edc_idx) {
1028         case EDC_OPT_AEL2005:
1029                 fw_name = AEL2005_OPT_EDC_NAME;
1030                 break;
1031         case EDC_TWX_AEL2005:
1032                 fw_name = AEL2005_TWX_EDC_NAME;
1033                 break;
1034         case EDC_TWX_AEL2020:
1035                 fw_name = AEL2020_TWX_EDC_NAME;
1036                 break;
1037         }
1038         return fw_name;
1039 }
1040
1041 int t3_get_edc_fw(struct cphy *phy, int edc_idx, int size)
1042 {
1043         struct adapter *adapter = phy->adapter;
1044         const struct firmware *fw;
1045         char buf[64];
1046         u32 csum;
1047         const __be32 *p;
1048         u16 *cache = phy->phy_cache;
1049         int i, ret;
1050
1051         snprintf(buf, sizeof(buf), get_edc_fw_name(edc_idx));
1052
1053         ret = request_firmware(&fw, buf, &adapter->pdev->dev);
1054         if (ret < 0) {
1055                 dev_err(&adapter->pdev->dev,
1056                         "could not upgrade firmware: unable to load %s\n",
1057                         buf);
1058                 return ret;
1059         }
1060
1061         /* check size, take checksum in account */
1062         if (fw->size > size + 4) {
1063                 CH_ERR(adapter, "firmware image too large %u, expected %d\n",
1064                        (unsigned int)fw->size, size + 4);
1065                 ret = -EINVAL;
1066         }
1067
1068         /* compute checksum */
1069         p = (const __be32 *)fw->data;
1070         for (csum = 0, i = 0; i < fw->size / sizeof(csum); i++)
1071                 csum += ntohl(p[i]);
1072
1073         if (csum != 0xffffffff) {
1074                 CH_ERR(adapter, "corrupted firmware image, checksum %u\n",
1075                        csum);
1076                 ret = -EINVAL;
1077         }
1078
1079         for (i = 0; i < size / 4 ; i++) {
1080                 *cache++ = (be32_to_cpu(p[i]) & 0xffff0000) >> 16;
1081                 *cache++ = be32_to_cpu(p[i]) & 0xffff;
1082         }
1083
1084         release_firmware(fw);
1085
1086         return ret;
1087 }
1088
1089 static int upgrade_fw(struct adapter *adap)
1090 {
1091         int ret;
1092         const struct firmware *fw;
1093         struct device *dev = &adap->pdev->dev;
1094
1095         ret = request_firmware(&fw, FW_FNAME, dev);
1096         if (ret < 0) {
1097                 dev_err(dev, "could not upgrade firmware: unable to load %s\n",
1098                         FW_FNAME);
1099                 return ret;
1100         }
1101         ret = t3_load_fw(adap, fw->data, fw->size);
1102         release_firmware(fw);
1103
1104         if (ret == 0)
1105                 dev_info(dev, "successful upgrade to firmware %d.%d.%d\n",
1106                          FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
1107         else
1108                 dev_err(dev, "failed to upgrade to firmware %d.%d.%d\n",
1109                         FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
1110
1111         return ret;
1112 }
1113
1114 static inline char t3rev2char(struct adapter *adapter)
1115 {
1116         char rev = 0;
1117
1118         switch(adapter->params.rev) {
1119         case T3_REV_B:
1120         case T3_REV_B2:
1121                 rev = 'b';
1122                 break;
1123         case T3_REV_C:
1124                 rev = 'c';
1125                 break;
1126         }
1127         return rev;
1128 }
1129
1130 static int update_tpsram(struct adapter *adap)
1131 {
1132         const struct firmware *tpsram;
1133         char buf[64];
1134         struct device *dev = &adap->pdev->dev;
1135         int ret;
1136         char rev;
1137
1138         rev = t3rev2char(adap);
1139         if (!rev)
1140                 return 0;
1141
1142         snprintf(buf, sizeof(buf), TPSRAM_NAME, rev);
1143
1144         ret = request_firmware(&tpsram, buf, dev);
1145         if (ret < 0) {
1146                 dev_err(dev, "could not load TP SRAM: unable to load %s\n",
1147                         buf);
1148                 return ret;
1149         }
1150
1151         ret = t3_check_tpsram(adap, tpsram->data, tpsram->size);
1152         if (ret)
1153                 goto release_tpsram;
1154
1155         ret = t3_set_proto_sram(adap, tpsram->data);
1156         if (ret == 0)
1157                 dev_info(dev,
1158                          "successful update of protocol engine "
1159                          "to %d.%d.%d\n",
1160                          TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
1161         else
1162                 dev_err(dev, "failed to update of protocol engine %d.%d.%d\n",
1163                         TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
1164         if (ret)
1165                 dev_err(dev, "loading protocol SRAM failed\n");
1166
1167 release_tpsram:
1168         release_firmware(tpsram);
1169
1170         return ret;
1171 }
1172
1173 /**
1174  *      cxgb_up - enable the adapter
1175  *      @adapter: adapter being enabled
1176  *
1177  *      Called when the first port is enabled, this function performs the
1178  *      actions necessary to make an adapter operational, such as completing
1179  *      the initialization of HW modules, and enabling interrupts.
1180  *
1181  *      Must be called with the rtnl lock held.
1182  */
1183 static int cxgb_up(struct adapter *adap)
1184 {
1185         int err;
1186
1187         if (!(adap->flags & FULL_INIT_DONE)) {
1188                 err = t3_check_fw_version(adap);
1189                 if (err == -EINVAL) {
1190                         err = upgrade_fw(adap);
1191                         CH_WARN(adap, "FW upgrade to %d.%d.%d %s\n",
1192                                 FW_VERSION_MAJOR, FW_VERSION_MINOR,
1193                                 FW_VERSION_MICRO, err ? "failed" : "succeeded");
1194                 }
1195
1196                 err = t3_check_tpsram_version(adap);
1197                 if (err == -EINVAL) {
1198                         err = update_tpsram(adap);
1199                         CH_WARN(adap, "TP upgrade to %d.%d.%d %s\n",
1200                                 TP_VERSION_MAJOR, TP_VERSION_MINOR,
1201                                 TP_VERSION_MICRO, err ? "failed" : "succeeded");
1202                 }
1203
1204                 /*
1205                  * Clear interrupts now to catch errors if t3_init_hw fails.
1206                  * We clear them again later as initialization may trigger
1207                  * conditions that can interrupt.
1208                  */
1209                 t3_intr_clear(adap);
1210
1211                 err = t3_init_hw(adap, 0);
1212                 if (err)
1213                         goto out;
1214
1215                 t3_set_reg_field(adap, A_TP_PARA_REG5, 0, F_RXDDPOFFINIT);
1216                 t3_write_reg(adap, A_ULPRX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12));
1217
1218                 err = setup_sge_qsets(adap);
1219                 if (err)
1220                         goto out;
1221
1222                 setup_rss(adap);
1223                 if (!(adap->flags & NAPI_INIT))
1224                         init_napi(adap);
1225
1226                 t3_start_sge_timers(adap);
1227                 adap->flags |= FULL_INIT_DONE;
1228         }
1229
1230         t3_intr_clear(adap);
1231
1232         if (adap->flags & USING_MSIX) {
1233                 name_msix_vecs(adap);
1234                 err = request_irq(adap->msix_info[0].vec,
1235                                   t3_async_intr_handler, 0,
1236                                   adap->msix_info[0].desc, adap);
1237                 if (err)
1238                         goto irq_err;
1239
1240                 err = request_msix_data_irqs(adap);
1241                 if (err) {
1242                         free_irq(adap->msix_info[0].vec, adap);
1243                         goto irq_err;
1244                 }
1245         } else if ((err = request_irq(adap->pdev->irq,
1246                                       t3_intr_handler(adap,
1247                                                       adap->sge.qs[0].rspq.
1248                                                       polling),
1249                                       (adap->flags & USING_MSI) ?
1250                                        0 : IRQF_SHARED,
1251                                       adap->name, adap)))
1252                 goto irq_err;
1253
1254         enable_all_napi(adap);
1255         t3_sge_start(adap);
1256         t3_intr_enable(adap);
1257
1258         if (adap->params.rev >= T3_REV_C && !(adap->flags & TP_PARITY_INIT) &&
1259             is_offload(adap) && init_tp_parity(adap) == 0)
1260                 adap->flags |= TP_PARITY_INIT;
1261
1262         if (adap->flags & TP_PARITY_INIT) {
1263                 t3_write_reg(adap, A_TP_INT_CAUSE,
1264                              F_CMCACHEPERR | F_ARPLUTPERR);
1265                 t3_write_reg(adap, A_TP_INT_ENABLE, 0x7fbfffff);
1266         }
1267
1268         if (!(adap->flags & QUEUES_BOUND)) {
1269                 err = bind_qsets(adap);
1270                 if (err) {
1271                         CH_ERR(adap, "failed to bind qsets, err %d\n", err);
1272                         t3_intr_disable(adap);
1273                         free_irq_resources(adap);
1274                         goto out;
1275                 }
1276                 adap->flags |= QUEUES_BOUND;
1277         }
1278
1279 out:
1280         return err;
1281 irq_err:
1282         CH_ERR(adap, "request_irq failed, err %d\n", err);
1283         goto out;
1284 }
1285
1286 /*
1287  * Release resources when all the ports and offloading have been stopped.
1288  */
1289 static void cxgb_down(struct adapter *adapter, int on_wq)
1290 {
1291         t3_sge_stop(adapter);
1292         spin_lock_irq(&adapter->work_lock);     /* sync with PHY intr task */
1293         t3_intr_disable(adapter);
1294         spin_unlock_irq(&adapter->work_lock);
1295
1296         free_irq_resources(adapter);
1297         quiesce_rx(adapter);
1298         t3_sge_stop(adapter);
1299         if (!on_wq)
1300                 flush_workqueue(cxgb3_wq);/* wait for external IRQ handler */
1301 }
1302
1303 static void schedule_chk_task(struct adapter *adap)
1304 {
1305         unsigned int timeo;
1306
1307         timeo = adap->params.linkpoll_period ?
1308             (HZ * adap->params.linkpoll_period) / 10 :
1309             adap->params.stats_update_period * HZ;
1310         if (timeo)
1311                 queue_delayed_work(cxgb3_wq, &adap->adap_check_task, timeo);
1312 }
1313
1314 static int offload_open(struct net_device *dev)
1315 {
1316         struct port_info *pi = netdev_priv(dev);
1317         struct adapter *adapter = pi->adapter;
1318         struct t3cdev *tdev = dev2t3cdev(dev);
1319         int adap_up = adapter->open_device_map & PORT_MASK;
1320         int err;
1321
1322         if (test_and_set_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map))
1323                 return 0;
1324
1325         if (!adap_up && (err = cxgb_up(adapter)) < 0)
1326                 goto out;
1327
1328         t3_tp_set_offload_mode(adapter, 1);
1329         tdev->lldev = adapter->port[0];
1330         err = cxgb3_offload_activate(adapter);
1331         if (err)
1332                 goto out;
1333
1334         init_port_mtus(adapter);
1335         t3_load_mtus(adapter, adapter->params.mtus, adapter->params.a_wnd,
1336                      adapter->params.b_wnd,
1337                      adapter->params.rev == 0 ?
1338                      adapter->port[0]->mtu : 0xffff);
1339         init_smt(adapter);
1340
1341         if (sysfs_create_group(&tdev->lldev->dev.kobj, &offload_attr_group))
1342                 dev_dbg(&dev->dev, "cannot create sysfs group\n");
1343
1344         /* Call back all registered clients */
1345         cxgb3_add_clients(tdev);
1346
1347 out:
1348         /* restore them in case the offload module has changed them */
1349         if (err) {
1350                 t3_tp_set_offload_mode(adapter, 0);
1351                 clear_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
1352                 cxgb3_set_dummy_ops(tdev);
1353         }
1354         return err;
1355 }
1356
1357 static int offload_close(struct t3cdev *tdev)
1358 {
1359         struct adapter *adapter = tdev2adap(tdev);
1360
1361         if (!test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map))
1362                 return 0;
1363
1364         /* Call back all registered clients */
1365         cxgb3_remove_clients(tdev);
1366
1367         sysfs_remove_group(&tdev->lldev->dev.kobj, &offload_attr_group);
1368
1369         /* Flush work scheduled while releasing TIDs */
1370         flush_scheduled_work();
1371
1372         tdev->lldev = NULL;
1373         cxgb3_set_dummy_ops(tdev);
1374         t3_tp_set_offload_mode(adapter, 0);
1375         clear_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
1376
1377         if (!adapter->open_device_map)
1378                 cxgb_down(adapter, 0);
1379
1380         cxgb3_offload_deactivate(adapter);
1381         return 0;
1382 }
1383
1384 static int cxgb_open(struct net_device *dev)
1385 {
1386         struct port_info *pi = netdev_priv(dev);
1387         struct adapter *adapter = pi->adapter;
1388         int other_ports = adapter->open_device_map & PORT_MASK;
1389         int err;
1390
1391         if (!adapter->open_device_map && (err = cxgb_up(adapter)) < 0)
1392                 return err;
1393
1394         set_bit(pi->port_id, &adapter->open_device_map);
1395         if (is_offload(adapter) && !ofld_disable) {
1396                 err = offload_open(dev);
1397                 if (err)
1398                         printk(KERN_WARNING
1399                                "Could not initialize offload capabilities\n");
1400         }
1401
1402         netif_set_real_num_tx_queues(dev, pi->nqsets);
1403         err = netif_set_real_num_rx_queues(dev, pi->nqsets);
1404         if (err)
1405                 return err;
1406         link_start(dev);
1407         t3_port_intr_enable(adapter, pi->port_id);
1408         netif_tx_start_all_queues(dev);
1409         if (!other_ports)
1410                 schedule_chk_task(adapter);
1411
1412         cxgb3_event_notify(&adapter->tdev, OFFLOAD_PORT_UP, pi->port_id);
1413         return 0;
1414 }
1415
1416 static int __cxgb_close(struct net_device *dev, int on_wq)
1417 {
1418         struct port_info *pi = netdev_priv(dev);
1419         struct adapter *adapter = pi->adapter;
1420
1421
1422         if (!adapter->open_device_map)
1423                 return 0;
1424
1425         /* Stop link fault interrupts */
1426         t3_xgm_intr_disable(adapter, pi->port_id);
1427         t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
1428
1429         t3_port_intr_disable(adapter, pi->port_id);
1430         netif_tx_stop_all_queues(dev);
1431         pi->phy.ops->power_down(&pi->phy, 1);
1432         netif_carrier_off(dev);
1433         t3_mac_disable(&pi->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
1434
1435         spin_lock_irq(&adapter->work_lock);     /* sync with update task */
1436         clear_bit(pi->port_id, &adapter->open_device_map);
1437         spin_unlock_irq(&adapter->work_lock);
1438
1439         if (!(adapter->open_device_map & PORT_MASK))
1440                 cancel_delayed_work_sync(&adapter->adap_check_task);
1441
1442         if (!adapter->open_device_map)
1443                 cxgb_down(adapter, on_wq);
1444
1445         cxgb3_event_notify(&adapter->tdev, OFFLOAD_PORT_DOWN, pi->port_id);
1446         return 0;
1447 }
1448
1449 static int cxgb_close(struct net_device *dev)
1450 {
1451         return __cxgb_close(dev, 0);
1452 }
1453
1454 static struct net_device_stats *cxgb_get_stats(struct net_device *dev)
1455 {
1456         struct port_info *pi = netdev_priv(dev);
1457         struct adapter *adapter = pi->adapter;
1458         struct net_device_stats *ns = &pi->netstats;
1459         const struct mac_stats *pstats;
1460
1461         spin_lock(&adapter->stats_lock);
1462         pstats = t3_mac_update_stats(&pi->mac);
1463         spin_unlock(&adapter->stats_lock);
1464
1465         ns->tx_bytes = pstats->tx_octets;
1466         ns->tx_packets = pstats->tx_frames;
1467         ns->rx_bytes = pstats->rx_octets;
1468         ns->rx_packets = pstats->rx_frames;
1469         ns->multicast = pstats->rx_mcast_frames;
1470
1471         ns->tx_errors = pstats->tx_underrun;
1472         ns->rx_errors = pstats->rx_symbol_errs + pstats->rx_fcs_errs +
1473             pstats->rx_too_long + pstats->rx_jabber + pstats->rx_short +
1474             pstats->rx_fifo_ovfl;
1475
1476         /* detailed rx_errors */
1477         ns->rx_length_errors = pstats->rx_jabber + pstats->rx_too_long;
1478         ns->rx_over_errors = 0;
1479         ns->rx_crc_errors = pstats->rx_fcs_errs;
1480         ns->rx_frame_errors = pstats->rx_symbol_errs;
1481         ns->rx_fifo_errors = pstats->rx_fifo_ovfl;
1482         ns->rx_missed_errors = pstats->rx_cong_drops;
1483
1484         /* detailed tx_errors */
1485         ns->tx_aborted_errors = 0;
1486         ns->tx_carrier_errors = 0;
1487         ns->tx_fifo_errors = pstats->tx_underrun;
1488         ns->tx_heartbeat_errors = 0;
1489         ns->tx_window_errors = 0;
1490         return ns;
1491 }
1492
1493 static u32 get_msglevel(struct net_device *dev)
1494 {
1495         struct port_info *pi = netdev_priv(dev);
1496         struct adapter *adapter = pi->adapter;
1497
1498         return adapter->msg_enable;
1499 }
1500
1501 static void set_msglevel(struct net_device *dev, u32 val)
1502 {
1503         struct port_info *pi = netdev_priv(dev);
1504         struct adapter *adapter = pi->adapter;
1505
1506         adapter->msg_enable = val;
1507 }
1508
1509 static char stats_strings[][ETH_GSTRING_LEN] = {
1510         "TxOctetsOK         ",
1511         "TxFramesOK         ",
1512         "TxMulticastFramesOK",
1513         "TxBroadcastFramesOK",
1514         "TxPauseFrames      ",
1515         "TxUnderrun         ",
1516         "TxExtUnderrun      ",
1517
1518         "TxFrames64         ",
1519         "TxFrames65To127    ",
1520         "TxFrames128To255   ",
1521         "TxFrames256To511   ",
1522         "TxFrames512To1023  ",
1523         "TxFrames1024To1518 ",
1524         "TxFrames1519ToMax  ",
1525
1526         "RxOctetsOK         ",
1527         "RxFramesOK         ",
1528         "RxMulticastFramesOK",
1529         "RxBroadcastFramesOK",
1530         "RxPauseFrames      ",
1531         "RxFCSErrors        ",
1532         "RxSymbolErrors     ",
1533         "RxShortErrors      ",
1534         "RxJabberErrors     ",
1535         "RxLengthErrors     ",
1536         "RxFIFOoverflow     ",
1537
1538         "RxFrames64         ",
1539         "RxFrames65To127    ",
1540         "RxFrames128To255   ",
1541         "RxFrames256To511   ",
1542         "RxFrames512To1023  ",
1543         "RxFrames1024To1518 ",
1544         "RxFrames1519ToMax  ",
1545
1546         "PhyFIFOErrors      ",
1547         "TSO                ",
1548         "VLANextractions    ",
1549         "VLANinsertions     ",
1550         "TxCsumOffload      ",
1551         "RxCsumGood         ",
1552         "LroAggregated      ",
1553         "LroFlushed         ",
1554         "LroNoDesc          ",
1555         "RxDrops            ",
1556
1557         "CheckTXEnToggled   ",
1558         "CheckResets        ",
1559
1560         "LinkFaults         ",
1561 };
1562
1563 static int get_sset_count(struct net_device *dev, int sset)
1564 {
1565         switch (sset) {
1566         case ETH_SS_STATS:
1567                 return ARRAY_SIZE(stats_strings);
1568         default:
1569                 return -EOPNOTSUPP;
1570         }
1571 }
1572
1573 #define T3_REGMAP_SIZE (3 * 1024)
1574
1575 static int get_regs_len(struct net_device *dev)
1576 {
1577         return T3_REGMAP_SIZE;
1578 }
1579
1580 static int get_eeprom_len(struct net_device *dev)
1581 {
1582         return EEPROMSIZE;
1583 }
1584
1585 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1586 {
1587         struct port_info *pi = netdev_priv(dev);
1588         struct adapter *adapter = pi->adapter;
1589         u32 fw_vers = 0;
1590         u32 tp_vers = 0;
1591
1592         spin_lock(&adapter->stats_lock);
1593         t3_get_fw_version(adapter, &fw_vers);
1594         t3_get_tp_version(adapter, &tp_vers);
1595         spin_unlock(&adapter->stats_lock);
1596
1597         strcpy(info->driver, DRV_NAME);
1598         strcpy(info->version, DRV_VERSION);
1599         strcpy(info->bus_info, pci_name(adapter->pdev));
1600         if (!fw_vers)
1601                 strcpy(info->fw_version, "N/A");
1602         else {
1603                 snprintf(info->fw_version, sizeof(info->fw_version),
1604                          "%s %u.%u.%u TP %u.%u.%u",
1605                          G_FW_VERSION_TYPE(fw_vers) ? "T" : "N",
1606                          G_FW_VERSION_MAJOR(fw_vers),
1607                          G_FW_VERSION_MINOR(fw_vers),
1608                          G_FW_VERSION_MICRO(fw_vers),
1609                          G_TP_VERSION_MAJOR(tp_vers),
1610                          G_TP_VERSION_MINOR(tp_vers),
1611                          G_TP_VERSION_MICRO(tp_vers));
1612         }
1613 }
1614
1615 static void get_strings(struct net_device *dev, u32 stringset, u8 * data)
1616 {
1617         if (stringset == ETH_SS_STATS)
1618                 memcpy(data, stats_strings, sizeof(stats_strings));
1619 }
1620
1621 static unsigned long collect_sge_port_stats(struct adapter *adapter,
1622                                             struct port_info *p, int idx)
1623 {
1624         int i;
1625         unsigned long tot = 0;
1626
1627         for (i = p->first_qset; i < p->first_qset + p->nqsets; ++i)
1628                 tot += adapter->sge.qs[i].port_stats[idx];
1629         return tot;
1630 }
1631
1632 static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
1633                       u64 *data)
1634 {
1635         struct port_info *pi = netdev_priv(dev);
1636         struct adapter *adapter = pi->adapter;
1637         const struct mac_stats *s;
1638
1639         spin_lock(&adapter->stats_lock);
1640         s = t3_mac_update_stats(&pi->mac);
1641         spin_unlock(&adapter->stats_lock);
1642
1643         *data++ = s->tx_octets;
1644         *data++ = s->tx_frames;
1645         *data++ = s->tx_mcast_frames;
1646         *data++ = s->tx_bcast_frames;
1647         *data++ = s->tx_pause;
1648         *data++ = s->tx_underrun;
1649         *data++ = s->tx_fifo_urun;
1650
1651         *data++ = s->tx_frames_64;
1652         *data++ = s->tx_frames_65_127;
1653         *data++ = s->tx_frames_128_255;
1654         *data++ = s->tx_frames_256_511;
1655         *data++ = s->tx_frames_512_1023;
1656         *data++ = s->tx_frames_1024_1518;
1657         *data++ = s->tx_frames_1519_max;
1658
1659         *data++ = s->rx_octets;
1660         *data++ = s->rx_frames;
1661         *data++ = s->rx_mcast_frames;
1662         *data++ = s->rx_bcast_frames;
1663         *data++ = s->rx_pause;
1664         *data++ = s->rx_fcs_errs;
1665         *data++ = s->rx_symbol_errs;
1666         *data++ = s->rx_short;
1667         *data++ = s->rx_jabber;
1668         *data++ = s->rx_too_long;
1669         *data++ = s->rx_fifo_ovfl;
1670
1671         *data++ = s->rx_frames_64;
1672         *data++ = s->rx_frames_65_127;
1673         *data++ = s->rx_frames_128_255;
1674         *data++ = s->rx_frames_256_511;
1675         *data++ = s->rx_frames_512_1023;
1676         *data++ = s->rx_frames_1024_1518;
1677         *data++ = s->rx_frames_1519_max;
1678
1679         *data++ = pi->phy.fifo_errors;
1680
1681         *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TSO);
1682         *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANEX);
1683         *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANINS);
1684         *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TX_CSUM);
1685         *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_RX_CSUM_GOOD);
1686         *data++ = 0;
1687         *data++ = 0;
1688         *data++ = 0;
1689         *data++ = s->rx_cong_drops;
1690
1691         *data++ = s->num_toggled;
1692         *data++ = s->num_resets;
1693
1694         *data++ = s->link_faults;
1695 }
1696
1697 static inline void reg_block_dump(struct adapter *ap, void *buf,
1698                                   unsigned int start, unsigned int end)
1699 {
1700         u32 *p = buf + start;
1701
1702         for (; start <= end; start += sizeof(u32))
1703                 *p++ = t3_read_reg(ap, start);
1704 }
1705
1706 static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
1707                      void *buf)
1708 {
1709         struct port_info *pi = netdev_priv(dev);
1710         struct adapter *ap = pi->adapter;
1711
1712         /*
1713          * Version scheme:
1714          * bits 0..9: chip version
1715          * bits 10..15: chip revision
1716          * bit 31: set for PCIe cards
1717          */
1718         regs->version = 3 | (ap->params.rev << 10) | (is_pcie(ap) << 31);
1719
1720         /*
1721          * We skip the MAC statistics registers because they are clear-on-read.
1722          * Also reading multi-register stats would need to synchronize with the
1723          * periodic mac stats accumulation.  Hard to justify the complexity.
1724          */
1725         memset(buf, 0, T3_REGMAP_SIZE);
1726         reg_block_dump(ap, buf, 0, A_SG_RSPQ_CREDIT_RETURN);
1727         reg_block_dump(ap, buf, A_SG_HI_DRB_HI_THRSH, A_ULPRX_PBL_ULIMIT);
1728         reg_block_dump(ap, buf, A_ULPTX_CONFIG, A_MPS_INT_CAUSE);
1729         reg_block_dump(ap, buf, A_CPL_SWITCH_CNTRL, A_CPL_MAP_TBL_DATA);
1730         reg_block_dump(ap, buf, A_SMB_GLOBAL_TIME_CFG, A_XGM_SERDES_STAT3);
1731         reg_block_dump(ap, buf, A_XGM_SERDES_STATUS0,
1732                        XGM_REG(A_XGM_SERDES_STAT3, 1));
1733         reg_block_dump(ap, buf, XGM_REG(A_XGM_SERDES_STATUS0, 1),
1734                        XGM_REG(A_XGM_RX_SPI4_SOP_EOP_CNT, 1));
1735 }
1736
1737 static int restart_autoneg(struct net_device *dev)
1738 {
1739         struct port_info *p = netdev_priv(dev);
1740
1741         if (!netif_running(dev))
1742                 return -EAGAIN;
1743         if (p->link_config.autoneg != AUTONEG_ENABLE)
1744                 return -EINVAL;
1745         p->phy.ops->autoneg_restart(&p->phy);
1746         return 0;
1747 }
1748
1749 static int cxgb3_phys_id(struct net_device *dev, u32 data)
1750 {
1751         struct port_info *pi = netdev_priv(dev);
1752         struct adapter *adapter = pi->adapter;
1753         int i;
1754
1755         if (data == 0)
1756                 data = 2;
1757
1758         for (i = 0; i < data * 2; i++) {
1759                 t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL,
1760                                  (i & 1) ? F_GPIO0_OUT_VAL : 0);
1761                 if (msleep_interruptible(500))
1762                         break;
1763         }
1764         t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL,
1765                          F_GPIO0_OUT_VAL);
1766         return 0;
1767 }
1768
1769 static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1770 {
1771         struct port_info *p = netdev_priv(dev);
1772
1773         cmd->supported = p->link_config.supported;
1774         cmd->advertising = p->link_config.advertising;
1775
1776         if (netif_carrier_ok(dev)) {
1777                 cmd->speed = p->link_config.speed;
1778                 cmd->duplex = p->link_config.duplex;
1779         } else {
1780                 cmd->speed = -1;
1781                 cmd->duplex = -1;
1782         }
1783
1784         cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
1785         cmd->phy_address = p->phy.mdio.prtad;
1786         cmd->transceiver = XCVR_EXTERNAL;
1787         cmd->autoneg = p->link_config.autoneg;
1788         cmd->maxtxpkt = 0;
1789         cmd->maxrxpkt = 0;
1790         return 0;
1791 }
1792
1793 static int speed_duplex_to_caps(int speed, int duplex)
1794 {
1795         int cap = 0;
1796
1797         switch (speed) {
1798         case SPEED_10:
1799                 if (duplex == DUPLEX_FULL)
1800                         cap = SUPPORTED_10baseT_Full;
1801                 else
1802                         cap = SUPPORTED_10baseT_Half;
1803                 break;
1804         case SPEED_100:
1805                 if (duplex == DUPLEX_FULL)
1806                         cap = SUPPORTED_100baseT_Full;
1807                 else
1808                         cap = SUPPORTED_100baseT_Half;
1809                 break;
1810         case SPEED_1000:
1811                 if (duplex == DUPLEX_FULL)
1812                         cap = SUPPORTED_1000baseT_Full;
1813                 else
1814                         cap = SUPPORTED_1000baseT_Half;
1815                 break;
1816         case SPEED_10000:
1817                 if (duplex == DUPLEX_FULL)
1818                         cap = SUPPORTED_10000baseT_Full;
1819         }
1820         return cap;
1821 }
1822
1823 #define ADVERTISED_MASK (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \
1824                       ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \
1825                       ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full | \
1826                       ADVERTISED_10000baseT_Full)
1827
1828 static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1829 {
1830         struct port_info *p = netdev_priv(dev);
1831         struct link_config *lc = &p->link_config;
1832
1833         if (!(lc->supported & SUPPORTED_Autoneg)) {
1834                 /*
1835                  * PHY offers a single speed/duplex.  See if that's what's
1836                  * being requested.
1837                  */
1838                 if (cmd->autoneg == AUTONEG_DISABLE) {
1839                         int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
1840                         if (lc->supported & cap)
1841                                 return 0;
1842                 }
1843                 return -EINVAL;
1844         }
1845
1846         if (cmd->autoneg == AUTONEG_DISABLE) {
1847                 int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
1848
1849                 if (!(lc->supported & cap) || cmd->speed == SPEED_1000)
1850                         return -EINVAL;
1851                 lc->requested_speed = cmd->speed;
1852                 lc->requested_duplex = cmd->duplex;
1853                 lc->advertising = 0;
1854         } else {
1855                 cmd->advertising &= ADVERTISED_MASK;
1856                 cmd->advertising &= lc->supported;
1857                 if (!cmd->advertising)
1858                         return -EINVAL;
1859                 lc->requested_speed = SPEED_INVALID;
1860                 lc->requested_duplex = DUPLEX_INVALID;
1861                 lc->advertising = cmd->advertising | ADVERTISED_Autoneg;
1862         }
1863         lc->autoneg = cmd->autoneg;
1864         if (netif_running(dev))
1865                 t3_link_start(&p->phy, &p->mac, lc);
1866         return 0;
1867 }
1868
1869 static void get_pauseparam(struct net_device *dev,
1870                            struct ethtool_pauseparam *epause)
1871 {
1872         struct port_info *p = netdev_priv(dev);
1873
1874         epause->autoneg = (p->link_config.requested_fc & PAUSE_AUTONEG) != 0;
1875         epause->rx_pause = (p->link_config.fc & PAUSE_RX) != 0;
1876         epause->tx_pause = (p->link_config.fc & PAUSE_TX) != 0;
1877 }
1878
1879 static int set_pauseparam(struct net_device *dev,
1880                           struct ethtool_pauseparam *epause)
1881 {
1882         struct port_info *p = netdev_priv(dev);
1883         struct link_config *lc = &p->link_config;
1884
1885         if (epause->autoneg == AUTONEG_DISABLE)
1886                 lc->requested_fc = 0;
1887         else if (lc->supported & SUPPORTED_Autoneg)
1888                 lc->requested_fc = PAUSE_AUTONEG;
1889         else
1890                 return -EINVAL;
1891
1892         if (epause->rx_pause)
1893                 lc->requested_fc |= PAUSE_RX;
1894         if (epause->tx_pause)
1895                 lc->requested_fc |= PAUSE_TX;
1896         if (lc->autoneg == AUTONEG_ENABLE) {
1897                 if (netif_running(dev))
1898                         t3_link_start(&p->phy, &p->mac, lc);
1899         } else {
1900                 lc->fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
1901                 if (netif_running(dev))
1902                         t3_mac_set_speed_duplex_fc(&p->mac, -1, -1, lc->fc);
1903         }
1904         return 0;
1905 }
1906
1907 static u32 get_rx_csum(struct net_device *dev)
1908 {
1909         struct port_info *p = netdev_priv(dev);
1910
1911         return p->rx_offload & T3_RX_CSUM;
1912 }
1913
1914 static int set_rx_csum(struct net_device *dev, u32 data)
1915 {
1916         struct port_info *p = netdev_priv(dev);
1917
1918         if (data) {
1919                 p->rx_offload |= T3_RX_CSUM;
1920         } else {
1921                 int i;
1922
1923                 p->rx_offload &= ~(T3_RX_CSUM | T3_LRO);
1924                 for (i = p->first_qset; i < p->first_qset + p->nqsets; i++)
1925                         set_qset_lro(dev, i, 0);
1926         }
1927         return 0;
1928 }
1929
1930 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1931 {
1932         struct port_info *pi = netdev_priv(dev);
1933         struct adapter *adapter = pi->adapter;
1934         const struct qset_params *q = &adapter->params.sge.qset[pi->first_qset];
1935
1936         e->rx_max_pending = MAX_RX_BUFFERS;
1937         e->rx_mini_max_pending = 0;
1938         e->rx_jumbo_max_pending = MAX_RX_JUMBO_BUFFERS;
1939         e->tx_max_pending = MAX_TXQ_ENTRIES;
1940
1941         e->rx_pending = q->fl_size;
1942         e->rx_mini_pending = q->rspq_size;
1943         e->rx_jumbo_pending = q->jumbo_size;
1944         e->tx_pending = q->txq_size[0];
1945 }
1946
1947 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1948 {
1949         struct port_info *pi = netdev_priv(dev);
1950         struct adapter *adapter = pi->adapter;
1951         struct qset_params *q;
1952         int i;
1953
1954         if (e->rx_pending > MAX_RX_BUFFERS ||
1955             e->rx_jumbo_pending > MAX_RX_JUMBO_BUFFERS ||
1956             e->tx_pending > MAX_TXQ_ENTRIES ||
1957             e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
1958             e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
1959             e->rx_pending < MIN_FL_ENTRIES ||
1960             e->rx_jumbo_pending < MIN_FL_ENTRIES ||
1961             e->tx_pending < adapter->params.nports * MIN_TXQ_ENTRIES)
1962                 return -EINVAL;
1963
1964         if (adapter->flags & FULL_INIT_DONE)
1965                 return -EBUSY;
1966
1967         q = &adapter->params.sge.qset[pi->first_qset];
1968         for (i = 0; i < pi->nqsets; ++i, ++q) {
1969                 q->rspq_size = e->rx_mini_pending;
1970                 q->fl_size = e->rx_pending;
1971                 q->jumbo_size = e->rx_jumbo_pending;
1972                 q->txq_size[0] = e->tx_pending;
1973                 q->txq_size[1] = e->tx_pending;
1974                 q->txq_size[2] = e->tx_pending;
1975         }
1976         return 0;
1977 }
1978
1979 static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1980 {
1981         struct port_info *pi = netdev_priv(dev);
1982         struct adapter *adapter = pi->adapter;
1983         struct qset_params *qsp = &adapter->params.sge.qset[0];
1984         struct sge_qset *qs = &adapter->sge.qs[0];
1985
1986         if (c->rx_coalesce_usecs * 10 > M_NEWTIMER)
1987                 return -EINVAL;
1988
1989         qsp->coalesce_usecs = c->rx_coalesce_usecs;
1990         t3_update_qset_coalesce(qs, qsp);
1991         return 0;
1992 }
1993
1994 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1995 {
1996         struct port_info *pi = netdev_priv(dev);
1997         struct adapter *adapter = pi->adapter;
1998         struct qset_params *q = adapter->params.sge.qset;
1999
2000         c->rx_coalesce_usecs = q->coalesce_usecs;
2001         return 0;
2002 }
2003
2004 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
2005                       u8 * data)
2006 {
2007         struct port_info *pi = netdev_priv(dev);
2008         struct adapter *adapter = pi->adapter;
2009         int i, err = 0;
2010
2011         u8 *buf = kmalloc(EEPROMSIZE, GFP_KERNEL);
2012         if (!buf)
2013                 return -ENOMEM;
2014
2015         e->magic = EEPROM_MAGIC;
2016         for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
2017                 err = t3_seeprom_read(adapter, i, (__le32 *) & buf[i]);
2018
2019         if (!err)
2020                 memcpy(data, buf + e->offset, e->len);
2021         kfree(buf);
2022         return err;
2023 }
2024
2025 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
2026                       u8 * data)
2027 {
2028         struct port_info *pi = netdev_priv(dev);
2029         struct adapter *adapter = pi->adapter;
2030         u32 aligned_offset, aligned_len;
2031         __le32 *p;
2032         u8 *buf;
2033         int err;
2034
2035         if (eeprom->magic != EEPROM_MAGIC)
2036                 return -EINVAL;
2037
2038         aligned_offset = eeprom->offset & ~3;
2039         aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
2040
2041         if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
2042                 buf = kmalloc(aligned_len, GFP_KERNEL);
2043                 if (!buf)
2044                         return -ENOMEM;
2045                 err = t3_seeprom_read(adapter, aligned_offset, (__le32 *) buf);
2046                 if (!err && aligned_len > 4)
2047                         err = t3_seeprom_read(adapter,
2048                                               aligned_offset + aligned_len - 4,
2049                                               (__le32 *) & buf[aligned_len - 4]);
2050                 if (err)
2051                         goto out;
2052                 memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
2053         } else
2054                 buf = data;
2055
2056         err = t3_seeprom_wp(adapter, 0);
2057         if (err)
2058                 goto out;
2059
2060         for (p = (__le32 *) buf; !err && aligned_len; aligned_len -= 4, p++) {
2061                 err = t3_seeprom_write(adapter, aligned_offset, *p);
2062                 aligned_offset += 4;
2063         }
2064
2065         if (!err)
2066                 err = t3_seeprom_wp(adapter, 1);
2067 out:
2068         if (buf != data)
2069                 kfree(buf);
2070         return err;
2071 }
2072
2073 static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2074 {
2075         wol->supported = 0;
2076         wol->wolopts = 0;
2077         memset(&wol->sopass, 0, sizeof(wol->sopass));
2078 }
2079
2080 static const struct ethtool_ops cxgb_ethtool_ops = {
2081         .get_settings = get_settings,
2082         .set_settings = set_settings,
2083         .get_drvinfo = get_drvinfo,
2084         .get_msglevel = get_msglevel,
2085         .set_msglevel = set_msglevel,
2086         .get_ringparam = get_sge_param,
2087         .set_ringparam = set_sge_param,
2088         .get_coalesce = get_coalesce,
2089         .set_coalesce = set_coalesce,
2090         .get_eeprom_len = get_eeprom_len,
2091         .get_eeprom = get_eeprom,
2092         .set_eeprom = set_eeprom,
2093         .get_pauseparam = get_pauseparam,
2094         .set_pauseparam = set_pauseparam,
2095         .get_rx_csum = get_rx_csum,
2096         .set_rx_csum = set_rx_csum,
2097         .set_tx_csum = ethtool_op_set_tx_csum,
2098         .set_sg = ethtool_op_set_sg,
2099         .get_link = ethtool_op_get_link,
2100         .get_strings = get_strings,
2101         .phys_id = cxgb3_phys_id,
2102         .nway_reset = restart_autoneg,
2103         .get_sset_count = get_sset_count,
2104         .get_ethtool_stats = get_stats,
2105         .get_regs_len = get_regs_len,
2106         .get_regs = get_regs,
2107         .get_wol = get_wol,
2108         .set_tso = ethtool_op_set_tso,
2109 };
2110
2111 static int in_range(int val, int lo, int hi)
2112 {
2113         return val < 0 || (val <= hi && val >= lo);
2114 }
2115
2116 static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
2117 {
2118         struct port_info *pi = netdev_priv(dev);
2119         struct adapter *adapter = pi->adapter;
2120         u32 cmd;
2121         int ret;
2122
2123         if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
2124                 return -EFAULT;
2125
2126         switch (cmd) {
2127         case CHELSIO_SET_QSET_PARAMS:{
2128                 int i;
2129                 struct qset_params *q;
2130                 struct ch_qset_params t;
2131                 int q1 = pi->first_qset;
2132                 int nqsets = pi->nqsets;
2133
2134                 if (!capable(CAP_NET_ADMIN))
2135                         return -EPERM;
2136                 if (copy_from_user(&t, useraddr, sizeof(t)))
2137                         return -EFAULT;
2138                 if (t.qset_idx >= SGE_QSETS)
2139                         return -EINVAL;
2140                 if (!in_range(t.intr_lat, 0, M_NEWTIMER) ||
2141                     !in_range(t.cong_thres, 0, 255) ||
2142                     !in_range(t.txq_size[0], MIN_TXQ_ENTRIES,
2143                               MAX_TXQ_ENTRIES) ||
2144                     !in_range(t.txq_size[1], MIN_TXQ_ENTRIES,
2145                               MAX_TXQ_ENTRIES) ||
2146                     !in_range(t.txq_size[2], MIN_CTRL_TXQ_ENTRIES,
2147                               MAX_CTRL_TXQ_ENTRIES) ||
2148                     !in_range(t.fl_size[0], MIN_FL_ENTRIES,
2149                               MAX_RX_BUFFERS) ||
2150                     !in_range(t.fl_size[1], MIN_FL_ENTRIES,
2151                               MAX_RX_JUMBO_BUFFERS) ||
2152                     !in_range(t.rspq_size, MIN_RSPQ_ENTRIES,
2153                               MAX_RSPQ_ENTRIES))
2154                         return -EINVAL;
2155
2156                 if ((adapter->flags & FULL_INIT_DONE) && t.lro > 0)
2157                         for_each_port(adapter, i) {
2158                                 pi = adap2pinfo(adapter, i);
2159                                 if (t.qset_idx >= pi->first_qset &&
2160                                     t.qset_idx < pi->first_qset + pi->nqsets &&
2161                                     !(pi->rx_offload & T3_RX_CSUM))
2162                                         return -EINVAL;
2163                         }
2164
2165                 if ((adapter->flags & FULL_INIT_DONE) &&
2166                         (t.rspq_size >= 0 || t.fl_size[0] >= 0 ||
2167                         t.fl_size[1] >= 0 || t.txq_size[0] >= 0 ||
2168                         t.txq_size[1] >= 0 || t.txq_size[2] >= 0 ||
2169                         t.polling >= 0 || t.cong_thres >= 0))
2170                         return -EBUSY;
2171
2172                 /* Allow setting of any available qset when offload enabled */
2173                 if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2174                         q1 = 0;
2175                         for_each_port(adapter, i) {
2176                                 pi = adap2pinfo(adapter, i);
2177                                 nqsets += pi->first_qset + pi->nqsets;
2178                         }
2179                 }
2180
2181                 if (t.qset_idx < q1)
2182                         return -EINVAL;
2183                 if (t.qset_idx > q1 + nqsets - 1)
2184                         return -EINVAL;
2185
2186                 q = &adapter->params.sge.qset[t.qset_idx];
2187
2188                 if (t.rspq_size >= 0)
2189                         q->rspq_size = t.rspq_size;
2190                 if (t.fl_size[0] >= 0)
2191                         q->fl_size = t.fl_size[0];
2192                 if (t.fl_size[1] >= 0)
2193                         q->jumbo_size = t.fl_size[1];
2194                 if (t.txq_size[0] >= 0)
2195                         q->txq_size[0] = t.txq_size[0];
2196                 if (t.txq_size[1] >= 0)
2197                         q->txq_size[1] = t.txq_size[1];
2198                 if (t.txq_size[2] >= 0)
2199                         q->txq_size[2] = t.txq_size[2];
2200                 if (t.cong_thres >= 0)
2201                         q->cong_thres = t.cong_thres;
2202                 if (t.intr_lat >= 0) {
2203                         struct sge_qset *qs =
2204                                 &adapter->sge.qs[t.qset_idx];
2205
2206                         q->coalesce_usecs = t.intr_lat;
2207                         t3_update_qset_coalesce(qs, q);
2208                 }
2209                 if (t.polling >= 0) {
2210                         if (adapter->flags & USING_MSIX)
2211                                 q->polling = t.polling;
2212                         else {
2213                                 /* No polling with INTx for T3A */
2214                                 if (adapter->params.rev == 0 &&
2215                                         !(adapter->flags & USING_MSI))
2216                                         t.polling = 0;
2217
2218                                 for (i = 0; i < SGE_QSETS; i++) {
2219                                         q = &adapter->params.sge.
2220                                                 qset[i];
2221                                         q->polling = t.polling;
2222                                 }
2223                         }
2224                 }
2225                 if (t.lro >= 0)
2226                         set_qset_lro(dev, t.qset_idx, t.lro);
2227
2228                 break;
2229         }
2230         case CHELSIO_GET_QSET_PARAMS:{
2231                 struct qset_params *q;
2232                 struct ch_qset_params t;
2233                 int q1 = pi->first_qset;
2234                 int nqsets = pi->nqsets;
2235                 int i;
2236
2237                 if (copy_from_user(&t, useraddr, sizeof(t)))
2238                         return -EFAULT;
2239
2240                 /* Display qsets for all ports when offload enabled */
2241                 if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2242                         q1 = 0;
2243                         for_each_port(adapter, i) {
2244                                 pi = adap2pinfo(adapter, i);
2245                                 nqsets = pi->first_qset + pi->nqsets;
2246                         }
2247                 }
2248
2249                 if (t.qset_idx >= nqsets)
2250                         return -EINVAL;
2251
2252                 q = &adapter->params.sge.qset[q1 + t.qset_idx];
2253                 t.rspq_size = q->rspq_size;
2254                 t.txq_size[0] = q->txq_size[0];
2255                 t.txq_size[1] = q->txq_size[1];
2256                 t.txq_size[2] = q->txq_size[2];
2257                 t.fl_size[0] = q->fl_size;
2258                 t.fl_size[1] = q->jumbo_size;
2259                 t.polling = q->polling;
2260                 t.lro = q->lro;
2261                 t.intr_lat = q->coalesce_usecs;
2262                 t.cong_thres = q->cong_thres;
2263                 t.qnum = q1;
2264
2265                 if (adapter->flags & USING_MSIX)
2266                         t.vector = adapter->msix_info[q1 + t.qset_idx + 1].vec;
2267                 else
2268                         t.vector = adapter->pdev->irq;
2269
2270                 if (copy_to_user(useraddr, &t, sizeof(t)))
2271                         return -EFAULT;
2272                 break;
2273         }
2274         case CHELSIO_SET_QSET_NUM:{
2275                 struct ch_reg edata;
2276                 unsigned int i, first_qset = 0, other_qsets = 0;
2277
2278                 if (!capable(CAP_NET_ADMIN))
2279                         return -EPERM;
2280                 if (adapter->flags & FULL_INIT_DONE)
2281                         return -EBUSY;
2282                 if (copy_from_user(&edata, useraddr, sizeof(edata)))
2283                         return -EFAULT;
2284                 if (edata.val < 1 ||
2285                         (edata.val > 1 && !(adapter->flags & USING_MSIX)))
2286                         return -EINVAL;
2287
2288                 for_each_port(adapter, i)
2289                         if (adapter->port[i] && adapter->port[i] != dev)
2290                                 other_qsets += adap2pinfo(adapter, i)->nqsets;
2291
2292                 if (edata.val + other_qsets > SGE_QSETS)
2293                         return -EINVAL;
2294
2295                 pi->nqsets = edata.val;
2296
2297                 for_each_port(adapter, i)
2298                         if (adapter->port[i]) {
2299                                 pi = adap2pinfo(adapter, i);
2300                                 pi->first_qset = first_qset;
2301                                 first_qset += pi->nqsets;
2302                         }
2303                 break;
2304         }
2305         case CHELSIO_GET_QSET_NUM:{
2306                 struct ch_reg edata;
2307
2308                 memset(&edata, 0, sizeof(struct ch_reg));
2309
2310                 edata.cmd = CHELSIO_GET_QSET_NUM;
2311                 edata.val = pi->nqsets;
2312                 if (copy_to_user(useraddr, &edata, sizeof(edata)))
2313                         return -EFAULT;
2314                 break;
2315         }
2316         case CHELSIO_LOAD_FW:{
2317                 u8 *fw_data;
2318                 struct ch_mem_range t;
2319
2320                 if (!capable(CAP_SYS_RAWIO))
2321                         return -EPERM;
2322                 if (copy_from_user(&t, useraddr, sizeof(t)))
2323                         return -EFAULT;
2324                 /* Check t.len sanity ? */
2325                 fw_data = memdup_user(useraddr + sizeof(t), t.len);
2326                 if (IS_ERR(fw_data))
2327                         return PTR_ERR(fw_data);
2328
2329                 ret = t3_load_fw(adapter, fw_data, t.len);
2330                 kfree(fw_data);
2331                 if (ret)
2332                         return ret;
2333                 break;
2334         }
2335         case CHELSIO_SETMTUTAB:{
2336                 struct ch_mtus m;
2337                 int i;
2338
2339                 if (!is_offload(adapter))
2340                         return -EOPNOTSUPP;
2341                 if (!capable(CAP_NET_ADMIN))
2342                         return -EPERM;
2343                 if (offload_running(adapter))
2344                         return -EBUSY;
2345                 if (copy_from_user(&m, useraddr, sizeof(m)))
2346                         return -EFAULT;
2347                 if (m.nmtus != NMTUS)
2348                         return -EINVAL;
2349                 if (m.mtus[0] < 81)     /* accommodate SACK */
2350                         return -EINVAL;
2351
2352                 /* MTUs must be in ascending order */
2353                 for (i = 1; i < NMTUS; ++i)
2354                         if (m.mtus[i] < m.mtus[i - 1])
2355                                 return -EINVAL;
2356
2357                 memcpy(adapter->params.mtus, m.mtus,
2358                         sizeof(adapter->params.mtus));
2359                 break;
2360         }
2361         case CHELSIO_GET_PM:{
2362                 struct tp_params *p = &adapter->params.tp;
2363                 struct ch_pm m = {.cmd = CHELSIO_GET_PM };
2364
2365                 if (!is_offload(adapter))
2366                         return -EOPNOTSUPP;
2367                 m.tx_pg_sz = p->tx_pg_size;
2368                 m.tx_num_pg = p->tx_num_pgs;
2369                 m.rx_pg_sz = p->rx_pg_size;
2370                 m.rx_num_pg = p->rx_num_pgs;
2371                 m.pm_total = p->pmtx_size + p->chan_rx_size * p->nchan;
2372                 if (copy_to_user(useraddr, &m, sizeof(m)))
2373                         return -EFAULT;
2374                 break;
2375         }
2376         case CHELSIO_SET_PM:{
2377                 struct ch_pm m;
2378                 struct tp_params *p = &adapter->params.tp;
2379
2380                 if (!is_offload(adapter))
2381                         return -EOPNOTSUPP;
2382                 if (!capable(CAP_NET_ADMIN))
2383                         return -EPERM;
2384                 if (adapter->flags & FULL_INIT_DONE)
2385                         return -EBUSY;
2386                 if (copy_from_user(&m, useraddr, sizeof(m)))
2387                         return -EFAULT;
2388                 if (!is_power_of_2(m.rx_pg_sz) ||
2389                         !is_power_of_2(m.tx_pg_sz))
2390                         return -EINVAL; /* not power of 2 */
2391                 if (!(m.rx_pg_sz & 0x14000))
2392                         return -EINVAL; /* not 16KB or 64KB */
2393                 if (!(m.tx_pg_sz & 0x1554000))
2394                         return -EINVAL;
2395                 if (m.tx_num_pg == -1)
2396                         m.tx_num_pg = p->tx_num_pgs;
2397                 if (m.rx_num_pg == -1)
2398                         m.rx_num_pg = p->rx_num_pgs;
2399                 if (m.tx_num_pg % 24 || m.rx_num_pg % 24)
2400                         return -EINVAL;
2401                 if (m.rx_num_pg * m.rx_pg_sz > p->chan_rx_size ||
2402                         m.tx_num_pg * m.tx_pg_sz > p->chan_tx_size)
2403                         return -EINVAL;
2404                 p->rx_pg_size = m.rx_pg_sz;
2405                 p->tx_pg_size = m.tx_pg_sz;
2406                 p->rx_num_pgs = m.rx_num_pg;
2407                 p->tx_num_pgs = m.tx_num_pg;
2408                 break;
2409         }
2410         case CHELSIO_GET_MEM:{
2411                 struct ch_mem_range t;
2412                 struct mc7 *mem;
2413                 u64 buf[32];
2414
2415                 if (!is_offload(adapter))
2416                         return -EOPNOTSUPP;
2417                 if (!(adapter->flags & FULL_INIT_DONE))
2418                         return -EIO;    /* need the memory controllers */
2419                 if (copy_from_user(&t, useraddr, sizeof(t)))
2420                         return -EFAULT;
2421                 if ((t.addr & 7) || (t.len & 7))
2422                         return -EINVAL;
2423                 if (t.mem_id == MEM_CM)
2424                         mem = &adapter->cm;
2425                 else if (t.mem_id == MEM_PMRX)
2426                         mem = &adapter->pmrx;
2427                 else if (t.mem_id == MEM_PMTX)
2428                         mem = &adapter->pmtx;
2429                 else
2430                         return -EINVAL;
2431
2432                 /*
2433                  * Version scheme:
2434                  * bits 0..9: chip version
2435                  * bits 10..15: chip revision
2436                  */
2437                 t.version = 3 | (adapter->params.rev << 10);
2438                 if (copy_to_user(useraddr, &t, sizeof(t)))
2439                         return -EFAULT;
2440
2441                 /*
2442                  * Read 256 bytes at a time as len can be large and we don't
2443                  * want to use huge intermediate buffers.
2444                  */
2445                 useraddr += sizeof(t);  /* advance to start of buffer */
2446                 while (t.len) {
2447                         unsigned int chunk =
2448                                 min_t(unsigned int, t.len, sizeof(buf));
2449
2450                         ret =
2451                                 t3_mc7_bd_read(mem, t.addr / 8, chunk / 8,
2452                                                 buf);
2453                         if (ret)
2454                                 return ret;
2455                         if (copy_to_user(useraddr, buf, chunk))
2456                                 return -EFAULT;
2457                         useraddr += chunk;
2458                         t.addr += chunk;
2459                         t.len -= chunk;
2460                 }
2461                 break;
2462         }
2463         case CHELSIO_SET_TRACE_FILTER:{
2464                 struct ch_trace t;
2465                 const struct trace_params *tp;
2466
2467                 if (!capable(CAP_NET_ADMIN))
2468                         return -EPERM;
2469                 if (!offload_running(adapter))
2470                         return -EAGAIN;
2471                 if (copy_from_user(&t, useraddr, sizeof(t)))
2472                         return -EFAULT;
2473
2474                 tp = (const struct trace_params *)&t.sip;
2475                 if (t.config_tx)
2476                         t3_config_trace_filter(adapter, tp, 0,
2477                                                 t.invert_match,
2478                                                 t.trace_tx);
2479                 if (t.config_rx)
2480                         t3_config_trace_filter(adapter, tp, 1,
2481                                                 t.invert_match,
2482                                                 t.trace_rx);
2483                 break;
2484         }
2485         default:
2486                 return -EOPNOTSUPP;
2487         }
2488         return 0;
2489 }
2490
2491 static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
2492 {
2493         struct mii_ioctl_data *data = if_mii(req);
2494         struct port_info *pi = netdev_priv(dev);
2495         struct adapter *adapter = pi->adapter;
2496
2497         switch (cmd) {
2498         case SIOCGMIIREG:
2499         case SIOCSMIIREG:
2500                 /* Convert phy_id from older PRTAD/DEVAD format */
2501                 if (is_10G(adapter) &&
2502                     !mdio_phy_id_is_c45(data->phy_id) &&
2503                     (data->phy_id & 0x1f00) &&
2504                     !(data->phy_id & 0xe0e0))
2505                         data->phy_id = mdio_phy_id_c45(data->phy_id >> 8,
2506                                                        data->phy_id & 0x1f);
2507                 /* FALLTHRU */
2508         case SIOCGMIIPHY:
2509                 return mdio_mii_ioctl(&pi->phy.mdio, data, cmd);
2510         case SIOCCHIOCTL:
2511                 return cxgb_extension_ioctl(dev, req->ifr_data);
2512         default:
2513                 return -EOPNOTSUPP;
2514         }
2515 }
2516
2517 static int cxgb_change_mtu(struct net_device *dev, int new_mtu)
2518 {
2519         struct port_info *pi = netdev_priv(dev);
2520         struct adapter *adapter = pi->adapter;
2521         int ret;
2522
2523         if (new_mtu < 81)       /* accommodate SACK */
2524                 return -EINVAL;
2525         if ((ret = t3_mac_set_mtu(&pi->mac, new_mtu)))
2526                 return ret;
2527         dev->mtu = new_mtu;
2528         init_port_mtus(adapter);
2529         if (adapter->params.rev == 0 && offload_running(adapter))
2530                 t3_load_mtus(adapter, adapter->params.mtus,
2531                              adapter->params.a_wnd, adapter->params.b_wnd,
2532                              adapter->port[0]->mtu);
2533         return 0;
2534 }
2535
2536 static int cxgb_set_mac_addr(struct net_device *dev, void *p)
2537 {
2538         struct port_info *pi = netdev_priv(dev);
2539         struct adapter *adapter = pi->adapter;
2540         struct sockaddr *addr = p;
2541
2542         if (!is_valid_ether_addr(addr->sa_data))
2543                 return -EINVAL;
2544
2545         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2546         t3_mac_set_address(&pi->mac, LAN_MAC_IDX, dev->dev_addr);
2547         if (offload_running(adapter))
2548                 write_smt_entry(adapter, pi->port_id);
2549         return 0;
2550 }
2551
2552 /**
2553  * t3_synchronize_rx - wait for current Rx processing on a port to complete
2554  * @adap: the adapter
2555  * @p: the port
2556  *
2557  * Ensures that current Rx processing on any of the queues associated with
2558  * the given port completes before returning.  We do this by acquiring and
2559  * releasing the locks of the response queues associated with the port.
2560  */
2561 static void t3_synchronize_rx(struct adapter *adap, const struct port_info *p)
2562 {
2563         int i;
2564
2565         for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
2566                 struct sge_rspq *q = &adap->sge.qs[i].rspq;
2567
2568                 spin_lock_irq(&q->lock);
2569                 spin_unlock_irq(&q->lock);
2570         }
2571 }
2572
2573 static void vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2574 {
2575         struct port_info *pi = netdev_priv(dev);
2576         struct adapter *adapter = pi->adapter;
2577
2578         pi->vlan_grp = grp;
2579         if (adapter->params.rev > 0)
2580                 t3_set_vlan_accel(adapter, 1 << pi->port_id, grp != NULL);
2581         else {
2582                 /* single control for all ports */
2583                 unsigned int i, have_vlans = 0;
2584                 for_each_port(adapter, i)
2585                     have_vlans |= adap2pinfo(adapter, i)->vlan_grp != NULL;
2586
2587                 t3_set_vlan_accel(adapter, 1, have_vlans);
2588         }
2589         t3_synchronize_rx(adapter, pi);
2590 }
2591
2592 #ifdef CONFIG_NET_POLL_CONTROLLER
2593 static void cxgb_netpoll(struct net_device *dev)
2594 {
2595         struct port_info *pi = netdev_priv(dev);
2596         struct adapter *adapter = pi->adapter;
2597         int qidx;
2598
2599         for (qidx = pi->first_qset; qidx < pi->first_qset + pi->nqsets; qidx++) {
2600                 struct sge_qset *qs = &adapter->sge.qs[qidx];
2601                 void *source;
2602
2603                 if (adapter->flags & USING_MSIX)
2604                         source = qs;
2605                 else
2606                         source = adapter;
2607
2608                 t3_intr_handler(adapter, qs->rspq.polling) (0, source);
2609         }
2610 }
2611 #endif
2612
2613 /*
2614  * Periodic accumulation of MAC statistics.
2615  */
2616 static void mac_stats_update(struct adapter *adapter)
2617 {
2618         int i;
2619
2620         for_each_port(adapter, i) {
2621                 struct net_device *dev = adapter->port[i];
2622                 struct port_info *p = netdev_priv(dev);
2623
2624                 if (netif_running(dev)) {
2625                         spin_lock(&adapter->stats_lock);
2626                         t3_mac_update_stats(&p->mac);
2627                         spin_unlock(&adapter->stats_lock);
2628                 }
2629         }
2630 }
2631
2632 static void check_link_status(struct adapter *adapter)
2633 {
2634         int i;
2635
2636         for_each_port(adapter, i) {
2637                 struct net_device *dev = adapter->port[i];
2638                 struct port_info *p = netdev_priv(dev);
2639                 int link_fault;
2640
2641                 spin_lock_irq(&adapter->work_lock);
2642                 link_fault = p->link_fault;
2643                 spin_unlock_irq(&adapter->work_lock);
2644
2645                 if (link_fault) {
2646                         t3_link_fault(adapter, i);
2647                         continue;
2648                 }
2649
2650                 if (!(p->phy.caps & SUPPORTED_IRQ) && netif_running(dev)) {
2651                         t3_xgm_intr_disable(adapter, i);
2652                         t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
2653
2654                         t3_link_changed(adapter, i);
2655                         t3_xgm_intr_enable(adapter, i);
2656                 }
2657         }
2658 }
2659
2660 static void check_t3b2_mac(struct adapter *adapter)
2661 {
2662         int i;
2663
2664         if (!rtnl_trylock())    /* synchronize with ifdown */
2665                 return;
2666
2667         for_each_port(adapter, i) {
2668                 struct net_device *dev = adapter->port[i];
2669                 struct port_info *p = netdev_priv(dev);
2670                 int status;
2671
2672                 if (!netif_running(dev))
2673                         continue;
2674
2675                 status = 0;
2676                 if (netif_running(dev) && netif_carrier_ok(dev))
2677                         status = t3b2_mac_watchdog_task(&p->mac);
2678                 if (status == 1)
2679                         p->mac.stats.num_toggled++;
2680                 else if (status == 2) {
2681                         struct cmac *mac = &p->mac;
2682
2683                         t3_mac_set_mtu(mac, dev->mtu);
2684                         t3_mac_set_address(mac, LAN_MAC_IDX, dev->dev_addr);
2685                         cxgb_set_rxmode(dev);
2686                         t3_link_start(&p->phy, mac, &p->link_config);
2687                         t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
2688                         t3_port_intr_enable(adapter, p->port_id);
2689                         p->mac.stats.num_resets++;
2690                 }
2691         }
2692         rtnl_unlock();
2693 }
2694
2695
2696 static void t3_adap_check_task(struct work_struct *work)
2697 {
2698         struct adapter *adapter = container_of(work, struct adapter,
2699                                                adap_check_task.work);
2700         const struct adapter_params *p = &adapter->params;
2701         int port;
2702         unsigned int v, status, reset;
2703
2704         adapter->check_task_cnt++;
2705
2706         check_link_status(adapter);
2707
2708         /* Accumulate MAC stats if needed */
2709         if (!p->linkpoll_period ||
2710             (adapter->check_task_cnt * p->linkpoll_period) / 10 >=
2711             p->stats_update_period) {
2712                 mac_stats_update(adapter);
2713                 adapter->check_task_cnt = 0;
2714         }
2715
2716         if (p->rev == T3_REV_B2)
2717                 check_t3b2_mac(adapter);
2718
2719         /*
2720          * Scan the XGMAC's to check for various conditions which we want to
2721          * monitor in a periodic polling manner rather than via an interrupt
2722          * condition.  This is used for conditions which would otherwise flood
2723          * the system with interrupts and we only really need to know that the
2724          * conditions are "happening" ...  For each condition we count the
2725          * detection of the condition and reset it for the next polling loop.
2726          */
2727         for_each_port(adapter, port) {
2728                 struct cmac *mac =  &adap2pinfo(adapter, port)->mac;
2729                 u32 cause;
2730
2731                 cause = t3_read_reg(adapter, A_XGM_INT_CAUSE + mac->offset);
2732                 reset = 0;
2733                 if (cause & F_RXFIFO_OVERFLOW) {
2734                         mac->stats.rx_fifo_ovfl++;
2735                         reset |= F_RXFIFO_OVERFLOW;
2736                 }
2737
2738                 t3_write_reg(adapter, A_XGM_INT_CAUSE + mac->offset, reset);
2739         }
2740
2741         /*
2742          * We do the same as above for FL_EMPTY interrupts.
2743          */
2744         status = t3_read_reg(adapter, A_SG_INT_CAUSE);
2745         reset = 0;
2746
2747         if (status & F_FLEMPTY) {
2748                 struct sge_qset *qs = &adapter->sge.qs[0];
2749                 int i = 0;
2750
2751                 reset |= F_FLEMPTY;
2752
2753                 v = (t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS) >> S_FL0EMPTY) &
2754                     0xffff;
2755
2756                 while (v) {
2757                         qs->fl[i].empty += (v & 1);
2758                         if (i)
2759                                 qs++;
2760                         i ^= 1;
2761                         v >>= 1;
2762                 }
2763         }
2764
2765         t3_write_reg(adapter, A_SG_INT_CAUSE, reset);
2766
2767         /* Schedule the next check update if any port is active. */
2768         spin_lock_irq(&adapter->work_lock);
2769         if (adapter->open_device_map & PORT_MASK)
2770                 schedule_chk_task(adapter);
2771         spin_unlock_irq(&adapter->work_lock);
2772 }
2773
2774 static void db_full_task(struct work_struct *work)
2775 {
2776         struct adapter *adapter = container_of(work, struct adapter,
2777                                                db_full_task);
2778
2779         cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_FULL, 0);
2780 }
2781
2782 static void db_empty_task(struct work_struct *work)
2783 {
2784         struct adapter *adapter = container_of(work, struct adapter,
2785                                                db_empty_task);
2786
2787         cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_EMPTY, 0);
2788 }
2789
2790 static void db_drop_task(struct work_struct *work)
2791 {
2792         struct adapter *adapter = container_of(work, struct adapter,
2793                                                db_drop_task);
2794         unsigned long delay = 1000;
2795         unsigned short r;
2796
2797         cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_DROP, 0);
2798
2799         /*
2800          * Sleep a while before ringing the driver qset dbs.
2801          * The delay is between 1000-2023 usecs.
2802          */
2803         get_random_bytes(&r, 2);
2804         delay += r & 1023;
2805         set_current_state(TASK_UNINTERRUPTIBLE);
2806         schedule_timeout(usecs_to_jiffies(delay));
2807         ring_dbs(adapter);
2808 }
2809
2810 /*
2811  * Processes external (PHY) interrupts in process context.
2812  */
2813 static void ext_intr_task(struct work_struct *work)
2814 {
2815         struct adapter *adapter = container_of(work, struct adapter,
2816                                                ext_intr_handler_task);
2817         int i;
2818
2819         /* Disable link fault interrupts */
2820         for_each_port(adapter, i) {
2821                 struct net_device *dev = adapter->port[i];
2822                 struct port_info *p = netdev_priv(dev);
2823
2824                 t3_xgm_intr_disable(adapter, i);
2825                 t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
2826         }
2827
2828         /* Re-enable link fault interrupts */
2829         t3_phy_intr_handler(adapter);
2830
2831         for_each_port(adapter, i)
2832                 t3_xgm_intr_enable(adapter, i);
2833
2834         /* Now reenable external interrupts */
2835         spin_lock_irq(&adapter->work_lock);
2836         if (adapter->slow_intr_mask) {
2837                 adapter->slow_intr_mask |= F_T3DBG;
2838                 t3_write_reg(adapter, A_PL_INT_CAUSE0, F_T3DBG);
2839                 t3_write_reg(adapter, A_PL_INT_ENABLE0,
2840                              adapter->slow_intr_mask);
2841         }
2842         spin_unlock_irq(&adapter->work_lock);
2843 }
2844
2845 /*
2846  * Interrupt-context handler for external (PHY) interrupts.
2847  */
2848 void t3_os_ext_intr_handler(struct adapter *adapter)
2849 {
2850         /*
2851          * Schedule a task to handle external interrupts as they may be slow
2852          * and we use a mutex to protect MDIO registers.  We disable PHY
2853          * interrupts in the meantime and let the task reenable them when
2854          * it's done.
2855          */
2856         spin_lock(&adapter->work_lock);
2857         if (adapter->slow_intr_mask) {
2858                 adapter->slow_intr_mask &= ~F_T3DBG;
2859                 t3_write_reg(adapter, A_PL_INT_ENABLE0,
2860                              adapter->slow_intr_mask);
2861                 queue_work(cxgb3_wq, &adapter->ext_intr_handler_task);
2862         }
2863         spin_unlock(&adapter->work_lock);
2864 }
2865
2866 void t3_os_link_fault_handler(struct adapter *adapter, int port_id)
2867 {
2868         struct net_device *netdev = adapter->port[port_id];
2869         struct port_info *pi = netdev_priv(netdev);
2870
2871         spin_lock(&adapter->work_lock);
2872         pi->link_fault = 1;
2873         spin_unlock(&adapter->work_lock);
2874 }
2875
2876 static int t3_adapter_error(struct adapter *adapter, int reset, int on_wq)
2877 {
2878         int i, ret = 0;
2879
2880         if (is_offload(adapter) &&
2881             test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2882                 cxgb3_event_notify(&adapter->tdev, OFFLOAD_STATUS_DOWN, 0);
2883                 offload_close(&adapter->tdev);
2884         }
2885
2886         /* Stop all ports */
2887         for_each_port(adapter, i) {
2888                 struct net_device *netdev = adapter->port[i];
2889
2890                 if (netif_running(netdev))
2891                         __cxgb_close(netdev, on_wq);
2892         }
2893
2894         /* Stop SGE timers */
2895         t3_stop_sge_timers(adapter);
2896
2897         adapter->flags &= ~FULL_INIT_DONE;
2898
2899         if (reset)
2900                 ret = t3_reset_adapter(adapter);
2901
2902         pci_disable_device(adapter->pdev);
2903
2904         return ret;
2905 }
2906
2907 static int t3_reenable_adapter(struct adapter *adapter)
2908 {
2909         if (pci_enable_device(adapter->pdev)) {
2910                 dev_err(&adapter->pdev->dev,
2911                         "Cannot re-enable PCI device after reset.\n");
2912                 goto err;
2913         }
2914         pci_set_master(adapter->pdev);
2915         pci_restore_state(adapter->pdev);
2916         pci_save_state(adapter->pdev);
2917
2918         /* Free sge resources */
2919         t3_free_sge_resources(adapter);
2920
2921         if (t3_replay_prep_adapter(adapter))
2922                 goto err;
2923
2924         return 0;
2925 err:
2926         return -1;
2927 }
2928
2929 static void t3_resume_ports(struct adapter *adapter)
2930 {
2931         int i;
2932
2933         /* Restart the ports */
2934         for_each_port(adapter, i) {
2935                 struct net_device *netdev = adapter->port[i];
2936
2937                 if (netif_running(netdev)) {
2938                         if (cxgb_open(netdev)) {
2939                                 dev_err(&adapter->pdev->dev,
2940                                         "can't bring device back up"
2941                                         " after reset\n");
2942                                 continue;
2943                         }
2944                 }
2945         }
2946
2947         if (is_offload(adapter) && !ofld_disable)
2948                 cxgb3_event_notify(&adapter->tdev, OFFLOAD_STATUS_UP, 0);
2949 }
2950
2951 /*
2952  * processes a fatal error.
2953  * Bring the ports down, reset the chip, bring the ports back up.
2954  */
2955 static void fatal_error_task(struct work_struct *work)
2956 {
2957         struct adapter *adapter = container_of(work, struct adapter,
2958                                                fatal_error_handler_task);
2959         int err = 0;
2960
2961         rtnl_lock();
2962         err = t3_adapter_error(adapter, 1, 1);
2963         if (!err)
2964                 err = t3_reenable_adapter(adapter);
2965         if (!err)
2966                 t3_resume_ports(adapter);
2967
2968         CH_ALERT(adapter, "adapter reset %s\n", err ? "failed" : "succeeded");
2969         rtnl_unlock();
2970 }
2971
2972 void t3_fatal_err(struct adapter *adapter)
2973 {
2974         unsigned int fw_status[4];
2975
2976         if (adapter->flags & FULL_INIT_DONE) {
2977                 t3_sge_stop(adapter);
2978                 t3_write_reg(adapter, A_XGM_TX_CTRL, 0);
2979                 t3_write_reg(adapter, A_XGM_RX_CTRL, 0);
2980                 t3_write_reg(adapter, XGM_REG(A_XGM_TX_CTRL, 1), 0);
2981                 t3_write_reg(adapter, XGM_REG(A_XGM_RX_CTRL, 1), 0);
2982
2983                 spin_lock(&adapter->work_lock);
2984                 t3_intr_disable(adapter);
2985                 queue_work(cxgb3_wq, &adapter->fatal_error_handler_task);
2986                 spin_unlock(&adapter->work_lock);
2987         }
2988         CH_ALERT(adapter, "encountered fatal error, operation suspended\n");
2989         if (!t3_cim_ctl_blk_read(adapter, 0xa0, 4, fw_status))
2990                 CH_ALERT(adapter, "FW status: 0x%x, 0x%x, 0x%x, 0x%x\n",
2991                          fw_status[0], fw_status[1],
2992                          fw_status[2], fw_status[3]);
2993 }
2994
2995 /**
2996  * t3_io_error_detected - called when PCI error is detected
2997  * @pdev: Pointer to PCI device
2998  * @state: The current pci connection state
2999  *
3000  * This function is called after a PCI bus error affecting
3001  * this device has been detected.
3002  */
3003 static pci_ers_result_t t3_io_error_detected(struct pci_dev *pdev,
3004                                              pci_channel_state_t state)
3005 {
3006         struct adapter *adapter = pci_get_drvdata(pdev);
3007         int ret;
3008
3009         if (state == pci_channel_io_perm_failure)
3010                 return PCI_ERS_RESULT_DISCONNECT;
3011
3012         ret = t3_adapter_error(adapter, 0, 0);
3013
3014         /* Request a slot reset. */
3015         return PCI_ERS_RESULT_NEED_RESET;
3016 }
3017
3018 /**
3019  * t3_io_slot_reset - called after the pci bus has been reset.
3020  * @pdev: Pointer to PCI device
3021  *
3022  * Restart the card from scratch, as if from a cold-boot.
3023  */
3024 static pci_ers_result_t t3_io_slot_reset(struct pci_dev *pdev)
3025 {
3026         struct adapter *adapter = pci_get_drvdata(pdev);
3027
3028         if (!t3_reenable_adapter(adapter))
3029                 return PCI_ERS_RESULT_RECOVERED;
3030
3031         return PCI_ERS_RESULT_DISCONNECT;
3032 }
3033
3034 /**
3035  * t3_io_resume - called when traffic can start flowing again.
3036  * @pdev: Pointer to PCI device
3037  *
3038  * This callback is called when the error recovery driver tells us that
3039  * its OK to resume normal operation.
3040  */
3041 static void t3_io_resume(struct pci_dev *pdev)
3042 {
3043         struct adapter *adapter = pci_get_drvdata(pdev);
3044
3045         CH_ALERT(adapter, "adapter recovering, PEX ERR 0x%x\n",
3046                  t3_read_reg(adapter, A_PCIE_PEX_ERR));
3047
3048         t3_resume_ports(adapter);
3049 }
3050
3051 static struct pci_error_handlers t3_err_handler = {
3052         .error_detected = t3_io_error_detected,
3053         .slot_reset = t3_io_slot_reset,
3054         .resume = t3_io_resume,
3055 };
3056
3057 /*
3058  * Set the number of qsets based on the number of CPUs and the number of ports,
3059  * not to exceed the number of available qsets, assuming there are enough qsets
3060  * per port in HW.
3061  */
3062 static void set_nqsets(struct adapter *adap)
3063 {
3064         int i, j = 0;
3065         int num_cpus = num_online_cpus();
3066         int hwports = adap->params.nports;
3067         int nqsets = adap->msix_nvectors - 1;
3068
3069         if (adap->params.rev > 0 && adap->flags & USING_MSIX) {
3070                 if (hwports == 2 &&
3071                     (hwports * nqsets > SGE_QSETS ||
3072                      num_cpus >= nqsets / hwports))
3073                         nqsets /= hwports;
3074                 if (nqsets > num_cpus)
3075                         nqsets = num_cpus;
3076                 if (nqsets < 1 || hwports == 4)
3077                         nqsets = 1;
3078         } else
3079                 nqsets = 1;
3080
3081         for_each_port(adap, i) {
3082                 struct port_info *pi = adap2pinfo(adap, i);
3083
3084                 pi->first_qset = j;
3085                 pi->nqsets = nqsets;
3086                 j = pi->first_qset + nqsets;
3087
3088                 dev_info(&adap->pdev->dev,
3089                          "Port %d using %d queue sets.\n", i, nqsets);
3090         }
3091 }
3092
3093 static int __devinit cxgb_enable_msix(struct adapter *adap)
3094 {
3095         struct msix_entry entries[SGE_QSETS + 1];
3096         int vectors;
3097         int i, err;
3098
3099         vectors = ARRAY_SIZE(entries);
3100         for (i = 0; i < vectors; ++i)
3101                 entries[i].entry = i;
3102
3103         while ((err = pci_enable_msix(adap->pdev, entries, vectors)) > 0)
3104                 vectors = err;
3105
3106         if (err < 0)
3107                 pci_disable_msix(adap->pdev);
3108
3109         if (!err && vectors < (adap->params.nports + 1)) {
3110                 pci_disable_msix(adap->pdev);
3111                 err = -1;
3112         }
3113
3114         if (!err) {
3115                 for (i = 0; i < vectors; ++i)
3116                         adap->msix_info[i].vec = entries[i].vector;
3117                 adap->msix_nvectors = vectors;
3118         }
3119
3120         return err;
3121 }
3122
3123 static void __devinit print_port_info(struct adapter *adap,
3124                                       const struct adapter_info *ai)
3125 {
3126         static const char *pci_variant[] = {
3127                 "PCI", "PCI-X", "PCI-X ECC", "PCI-X 266", "PCI Express"
3128         };
3129
3130         int i;
3131         char buf[80];
3132
3133         if (is_pcie(adap))
3134                 snprintf(buf, sizeof(buf), "%s x%d",
3135                          pci_variant[adap->params.pci.variant],
3136                          adap->params.pci.width);
3137         else
3138                 snprintf(buf, sizeof(buf), "%s %dMHz/%d-bit",
3139                          pci_variant[adap->params.pci.variant],
3140                          adap->params.pci.speed, adap->params.pci.width);
3141
3142         for_each_port(adap, i) {
3143                 struct net_device *dev = adap->port[i];
3144                 const struct port_info *pi = netdev_priv(dev);
3145
3146                 if (!test_bit(i, &adap->registered_device_map))
3147                         continue;
3148                 printk(KERN_INFO "%s: %s %s %sNIC (rev %d) %s%s\n",
3149                        dev->name, ai->desc, pi->phy.desc,
3150                        is_offload(adap) ? "R" : "", adap->params.rev, buf,
3151                        (adap->flags & USING_MSIX) ? " MSI-X" :
3152                        (adap->flags & USING_MSI) ? " MSI" : "");
3153                 if (adap->name == dev->name && adap->params.vpd.mclk)
3154                         printk(KERN_INFO
3155                                "%s: %uMB CM, %uMB PMTX, %uMB PMRX, S/N: %s\n",
3156                                adap->name, t3_mc7_size(&adap->cm) >> 20,
3157                                t3_mc7_size(&adap->pmtx) >> 20,
3158                                t3_mc7_size(&adap->pmrx) >> 20,
3159                                adap->params.vpd.sn);
3160         }
3161 }
3162
3163 static const struct net_device_ops cxgb_netdev_ops = {
3164         .ndo_open               = cxgb_open,
3165         .ndo_stop               = cxgb_close,
3166         .ndo_start_xmit         = t3_eth_xmit,
3167         .ndo_get_stats          = cxgb_get_stats,
3168         .ndo_validate_addr      = eth_validate_addr,
3169         .ndo_set_multicast_list = cxgb_set_rxmode,
3170         .ndo_do_ioctl           = cxgb_ioctl,
3171         .ndo_change_mtu         = cxgb_change_mtu,
3172         .ndo_set_mac_address    = cxgb_set_mac_addr,
3173         .ndo_vlan_rx_register   = vlan_rx_register,
3174 #ifdef CONFIG_NET_POLL_CONTROLLER
3175         .ndo_poll_controller    = cxgb_netpoll,
3176 #endif
3177 };
3178
3179 static void __devinit cxgb3_init_iscsi_mac(struct net_device *dev)
3180 {
3181         struct port_info *pi = netdev_priv(dev);
3182
3183         memcpy(pi->iscsic.mac_addr, dev->dev_addr, ETH_ALEN);
3184         pi->iscsic.mac_addr[3] |= 0x80;
3185 }
3186
3187 static int __devinit init_one(struct pci_dev *pdev,
3188                               const struct pci_device_id *ent)
3189 {
3190         static int version_printed;
3191
3192         int i, err, pci_using_dac = 0;
3193         resource_size_t mmio_start, mmio_len;
3194         const struct adapter_info *ai;
3195         struct adapter *adapter = NULL;
3196         struct port_info *pi;
3197
3198         if (!version_printed) {
3199                 printk(KERN_INFO "%s - version %s\n", DRV_DESC, DRV_VERSION);
3200                 ++version_printed;
3201         }
3202
3203         if (!cxgb3_wq) {
3204                 cxgb3_wq = create_singlethread_workqueue(DRV_NAME);
3205                 if (!cxgb3_wq) {
3206                         printk(KERN_ERR DRV_NAME
3207                                ": cannot initialize work queue\n");
3208                         return -ENOMEM;
3209                 }
3210         }
3211
3212         err = pci_enable_device(pdev);
3213         if (err) {
3214                 dev_err(&pdev->dev, "cannot enable PCI device\n");
3215                 goto out;
3216         }
3217
3218         err = pci_request_regions(pdev, DRV_NAME);
3219         if (err) {
3220                 /* Just info, some other driver may have claimed the device. */
3221                 dev_info(&pdev->dev, "cannot obtain PCI resources\n");
3222                 goto out_disable_device;
3223         }
3224
3225         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
3226                 pci_using_dac = 1;
3227                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3228                 if (err) {
3229                         dev_err(&pdev->dev, "unable to obtain 64-bit DMA for "
3230                                "coherent allocations\n");
3231                         goto out_release_regions;
3232                 }
3233         } else if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) != 0) {
3234                 dev_err(&pdev->dev, "no usable DMA configuration\n");
3235                 goto out_release_regions;
3236         }
3237
3238         pci_set_master(pdev);
3239         pci_save_state(pdev);
3240
3241         mmio_start = pci_resource_start(pdev, 0);
3242         mmio_len = pci_resource_len(pdev, 0);
3243         ai = t3_get_adapter_info(ent->driver_data);
3244
3245         adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
3246         if (!adapter) {
3247                 err = -ENOMEM;
3248                 goto out_release_regions;
3249         }
3250
3251         adapter->nofail_skb =
3252                 alloc_skb(sizeof(struct cpl_set_tcb_field), GFP_KERNEL);
3253         if (!adapter->nofail_skb) {
3254                 dev_err(&pdev->dev, "cannot allocate nofail buffer\n");
3255                 err = -ENOMEM;
3256                 goto out_free_adapter;
3257         }
3258
3259         adapter->regs = ioremap_nocache(mmio_start, mmio_len);
3260         if (!adapter->regs) {
3261                 dev_err(&pdev->dev, "cannot map device registers\n");
3262                 err = -ENOMEM;
3263                 goto out_free_adapter;
3264         }
3265
3266         adapter->pdev = pdev;
3267         adapter->name = pci_name(pdev);
3268         adapter->msg_enable = dflt_msg_enable;
3269         adapter->mmio_len = mmio_len;
3270
3271         mutex_init(&adapter->mdio_lock);
3272         spin_lock_init(&adapter->work_lock);
3273         spin_lock_init(&adapter->stats_lock);
3274
3275         INIT_LIST_HEAD(&adapter->adapter_list);
3276         INIT_WORK(&adapter->ext_intr_handler_task, ext_intr_task);
3277         INIT_WORK(&adapter->fatal_error_handler_task, fatal_error_task);
3278
3279         INIT_WORK(&adapter->db_full_task, db_full_task);
3280         INIT_WORK(&adapter->db_empty_task, db_empty_task);
3281         INIT_WORK(&adapter->db_drop_task, db_drop_task);
3282
3283         INIT_DELAYED_WORK(&adapter->adap_check_task, t3_adap_check_task);
3284
3285         for (i = 0; i < ai->nports0 + ai->nports1; ++i) {
3286                 struct net_device *netdev;
3287
3288                 netdev = alloc_etherdev_mq(sizeof(struct port_info), SGE_QSETS);
3289                 if (!netdev) {
3290                         err = -ENOMEM;
3291                         goto out_free_dev;
3292                 }
3293
3294                 SET_NETDEV_DEV(netdev, &pdev->dev);
3295
3296                 adapter->port[i] = netdev;
3297                 pi = netdev_priv(netdev);
3298                 pi->adapter = adapter;
3299                 pi->rx_offload = T3_RX_CSUM | T3_LRO;
3300                 pi->port_id = i;
3301                 netif_carrier_off(netdev);
3302                 netif_tx_stop_all_queues(netdev);
3303                 netdev->irq = pdev->irq;
3304                 netdev->mem_start = mmio_start;
3305                 netdev->mem_end = mmio_start + mmio_len - 1;
3306                 netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
3307                 netdev->features |= NETIF_F_GRO;
3308                 if (pci_using_dac)
3309                         netdev->features |= NETIF_F_HIGHDMA;
3310
3311                 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
3312                 netdev->netdev_ops = &cxgb_netdev_ops;
3313                 SET_ETHTOOL_OPS(netdev, &cxgb_ethtool_ops);
3314         }
3315
3316         pci_set_drvdata(pdev, adapter);
3317         if (t3_prep_adapter(adapter, ai, 1) < 0) {
3318                 err = -ENODEV;
3319                 goto out_free_dev;
3320         }
3321
3322         /*
3323          * The card is now ready to go.  If any errors occur during device
3324          * registration we do not fail the whole card but rather proceed only
3325          * with the ports we manage to register successfully.  However we must
3326          * register at least one net device.
3327          */
3328         for_each_port(adapter, i) {
3329                 err = register_netdev(adapter->port[i]);
3330                 if (err)
3331                         dev_warn(&pdev->dev,
3332                                  "cannot register net device %s, skipping\n",
3333                                  adapter->port[i]->name);
3334                 else {
3335                         /*
3336                          * Change the name we use for messages to the name of
3337                          * the first successfully registered interface.
3338                          */
3339                         if (!adapter->registered_device_map)
3340                                 adapter->name = adapter->port[i]->name;
3341
3342                         __set_bit(i, &adapter->registered_device_map);
3343                 }
3344         }
3345         if (!adapter->registered_device_map) {
3346                 dev_err(&pdev->dev, "could not register any net devices\n");
3347                 goto out_free_dev;
3348         }
3349
3350         for_each_port(adapter, i)
3351                 cxgb3_init_iscsi_mac(adapter->port[i]);
3352
3353         /* Driver's ready. Reflect it on LEDs */
3354         t3_led_ready(adapter);
3355
3356         if (is_offload(adapter)) {
3357                 __set_bit(OFFLOAD_DEVMAP_BIT, &adapter->registered_device_map);
3358                 cxgb3_adapter_ofld(adapter);
3359         }
3360
3361         /* See what interrupts we'll be using */
3362         if (msi > 1 && cxgb_enable_msix(adapter) == 0)
3363                 adapter->flags |= USING_MSIX;
3364         else if (msi > 0 && pci_enable_msi(pdev) == 0)
3365                 adapter->flags |= USING_MSI;
3366
3367         set_nqsets(adapter);
3368
3369         err = sysfs_create_group(&adapter->port[0]->dev.kobj,
3370                                  &cxgb3_attr_group);
3371
3372         print_port_info(adapter, ai);
3373         return 0;
3374
3375 out_free_dev:
3376         iounmap(adapter->regs);
3377         for (i = ai->nports0 + ai->nports1 - 1; i >= 0; --i)
3378                 if (adapter->port[i])
3379                         free_netdev(adapter->port[i]);
3380
3381 out_free_adapter:
3382         kfree(adapter);
3383
3384 out_release_regions:
3385         pci_release_regions(pdev);
3386 out_disable_device:
3387         pci_disable_device(pdev);
3388         pci_set_drvdata(pdev, NULL);
3389 out:
3390         return err;
3391 }
3392
3393 static void __devexit remove_one(struct pci_dev *pdev)
3394 {
3395         struct adapter *adapter = pci_get_drvdata(pdev);
3396
3397         if (adapter) {
3398                 int i;
3399
3400                 t3_sge_stop(adapter);
3401                 sysfs_remove_group(&adapter->port[0]->dev.kobj,
3402                                    &cxgb3_attr_group);
3403
3404                 if (is_offload(adapter)) {
3405                         cxgb3_adapter_unofld(adapter);
3406                         if (test_bit(OFFLOAD_DEVMAP_BIT,
3407                                      &adapter->open_device_map))
3408                                 offload_close(&adapter->tdev);
3409                 }
3410
3411                 for_each_port(adapter, i)
3412                     if (test_bit(i, &adapter->registered_device_map))
3413                         unregister_netdev(adapter->port[i]);
3414
3415                 t3_stop_sge_timers(adapter);
3416                 t3_free_sge_resources(adapter);
3417                 cxgb_disable_msi(adapter);
3418
3419                 for_each_port(adapter, i)
3420                         if (adapter->port[i])
3421                                 free_netdev(adapter->port[i]);
3422
3423                 iounmap(adapter->regs);
3424                 if (adapter->nofail_skb)
3425                         kfree_skb(adapter->nofail_skb);
3426                 kfree(adapter);
3427                 pci_release_regions(pdev);
3428                 pci_disable_device(pdev);
3429                 pci_set_drvdata(pdev, NULL);
3430         }
3431 }
3432
3433 static struct pci_driver driver = {
3434         .name = DRV_NAME,
3435         .id_table = cxgb3_pci_tbl,
3436         .probe = init_one,
3437         .remove = __devexit_p(remove_one),
3438         .err_handler = &t3_err_handler,
3439 };
3440
3441 static int __init cxgb3_init_module(void)
3442 {
3443         int ret;
3444
3445         cxgb3_offload_init();
3446
3447         ret = pci_register_driver(&driver);
3448         return ret;
3449 }
3450
3451 static void __exit cxgb3_cleanup_module(void)
3452 {
3453         pci_unregister_driver(&driver);
3454         if (cxgb3_wq)
3455                 destroy_workqueue(cxgb3_wq);
3456 }
3457
3458 module_init(cxgb3_init_module);
3459 module_exit(cxgb3_cleanup_module);