drivers/net/chelsio/common.h

   1 /*****************************************************************************
   2  *                                                                           *
   3  * File: common.h                                                            *
   4  * $Revision: 1.21 $                                                         *
   5  * $Date: 2005/06/22 00:43:25 $                                              *
   6  * Description:                                                              *
   7  *  part of the Chelsio 10Gb Ethernet Driver.                                *
   8  *                                                                           *
   9  * This program is free software; you can redistribute it and/or modify      *
  10  * it under the terms of the GNU General Public License, version 2, as       *
  11  * published by the Free Software Foundation.                                *
  12  *                                                                           *
  13  * You should have received a copy of the GNU General Public License along   *
  14  * with this program; if not, write to the Free Software Foundation, Inc.,   *
  15  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.                 *
  16  *                                                                           *
  17  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED    *
  18  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF      *
  19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.                     *
  20  *                                                                           *
  21  * http://www.chelsio.com                                                    *
  22  *                                                                           *
  23  * Copyright (c) 2003 - 2005 Chelsio Communications, Inc.                    *
  24  * All rights reserved.                                                      *
  25  *                                                                           *
  26  * Maintainers: maintainers@chelsio.com                                      *
  27  *                                                                           *
  28  * Authors: Dimitrios Michailidis   <dm@chelsio.com>                         *
  29  *          Tina Yang               <tainay@chelsio.com>                     *
  30  *          Felix Marti             <felix@chelsio.com>                      *
  31  *          Scott Bardone           <sbardone@chelsio.com>                   *
  32  *          Kurt Ottaway            <kottaway@chelsio.com>                   *
  33  *          Frank DiMambro          <frank@chelsio.com>                      *
  34  *                                                                           *
  35  * History:                                                                  *
  36  *                                                                           *
  37  ****************************************************************************/
  38
  39 #ifndef _CXGB_COMMON_H_
  40 #define _CXGB_COMMON_H_
  41
  42 #include <linux/module.h>
  43 #include <linux/netdevice.h>
  44 #include <linux/types.h>
  45 #include <linux/delay.h>
  46 #include <linux/pci.h>
  47 #include <linux/ethtool.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/mdio.h>
  50 #include <linux/crc32.h>
  51 #include <linux/init.h>
  52 #include <asm/io.h>
  53 #include <linux/pci_ids.h>
  54
  55 #define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver"
  56 #define DRV_NAME "cxgb"
  57 #define DRV_VERSION "2.2"
  58 #define PFX      DRV_NAME ": "
  59
  60 #define CH_ERR(fmt, ...)   printk(KERN_ERR PFX fmt, ## __VA_ARGS__)
  61 #define CH_WARN(fmt, ...)  printk(KERN_WARNING PFX fmt, ## __VA_ARGS__)
  62 #define CH_ALERT(fmt, ...) printk(KERN_ALERT PFX fmt, ## __VA_ARGS__)
  63
  64 /*
  65  * More powerful macro that selectively prints messages based on msg_enable.
  66  * For info and debugging messages.
  67  */
  68 #define CH_MSG(adapter, level, category, fmt, ...) do { \
  69         if ((adapter)->msg_enable & NETIF_MSG_##category) \
  70                 printk(KERN_##level PFX "%s: " fmt, (adapter)->name, \
  71                        ## __VA_ARGS__); \
  72 } while (0)
  73
  74 #ifdef DEBUG
  75 # define CH_DBG(adapter, category, fmt, ...) \
  76         CH_MSG(adapter, DEBUG, category, fmt, ## __VA_ARGS__)
  77 #else
  78 # define CH_DBG(fmt, ...)
  79 #endif
  80
  81 #define CH_DEVICE(devid, ssid, idx) \
  82         { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx }
  83
  84 #define SUPPORTED_PAUSE       (1 << 13)
  85 #define SUPPORTED_LOOPBACK    (1 << 15)
  86
  87 #define ADVERTISED_PAUSE      (1 << 13)
  88 #define ADVERTISED_ASYM_PAUSE (1 << 14)
  89
  90 typedef struct adapter adapter_t;
  91
  92 struct t1_rx_mode {
  93        struct net_device *dev;
  94 };
  95
  96 #define t1_rx_mode_promisc(rm)  (rm->dev->flags & IFF_PROMISC)
  97 #define t1_rx_mode_allmulti(rm) (rm->dev->flags & IFF_ALLMULTI)
  98 #define t1_rx_mode_mc_cnt(rm)   (netdev_mc_count(rm->dev))
  99 #define t1_get_netdev(rm)       (rm->dev)
 100
 101 #define MAX_NPORTS 4
 102 #define PORT_MASK ((1 << MAX_NPORTS) - 1)
 103 #define NMTUS      8
 104 #define TCB_SIZE   128
 105
 106 #define SPEED_INVALID 0xffff
 107 #define DUPLEX_INVALID 0xff
 108
 109 enum {
 110         CHBT_BOARD_N110,
 111         CHBT_BOARD_N210,
 112         CHBT_BOARD_7500,
 113         CHBT_BOARD_8000,
 114         CHBT_BOARD_CHT101,
 115         CHBT_BOARD_CHT110,
 116         CHBT_BOARD_CHT210,
 117         CHBT_BOARD_CHT204,
 118         CHBT_BOARD_CHT204V,
 119         CHBT_BOARD_CHT204E,
 120         CHBT_BOARD_CHN204,
 121         CHBT_BOARD_COUGAR,
 122         CHBT_BOARD_6800,
 123         CHBT_BOARD_SIMUL,
 124 };
 125
 126 enum {
 127         CHBT_TERM_FPGA,
 128         CHBT_TERM_T1,
 129         CHBT_TERM_T2,
 130         CHBT_TERM_T3
 131 };
 132
 133 enum {
 134         CHBT_MAC_CHELSIO_A,
 135         CHBT_MAC_IXF1010,
 136         CHBT_MAC_PM3393,
 137         CHBT_MAC_VSC7321,
 138         CHBT_MAC_DUMMY
 139 };
 140
 141 enum {
 142         CHBT_PHY_88E1041,
 143         CHBT_PHY_88E1111,
 144         CHBT_PHY_88X2010,
 145         CHBT_PHY_XPAK,
 146         CHBT_PHY_MY3126,
 147         CHBT_PHY_8244,
 148         CHBT_PHY_DUMMY
 149 };
 150
 151 enum {
 152         PAUSE_RX      = 1 << 0,
 153         PAUSE_TX      = 1 << 1,
 154         PAUSE_AUTONEG = 1 << 2
 155 };
 156
 157 /* Revisions of T1 chip */
 158 enum {
 159         TERM_T1A   = 0,
 160         TERM_T1B   = 1,
 161         TERM_T2    = 3
 162 };
 163
 164 struct sge_params {
 165         unsigned int cmdQ_size[2];
 166         unsigned int freelQ_size[2];
 167         unsigned int large_buf_capacity;
 168         unsigned int rx_coalesce_usecs;
 169         unsigned int last_rx_coalesce_raw;
 170         unsigned int default_rx_coalesce_usecs;
 171         unsigned int sample_interval_usecs;
 172         unsigned int coalesce_enable;
 173         unsigned int polling;
 174 };
 175
 176 struct chelsio_pci_params {
 177         unsigned short speed;
 178         unsigned char  width;
 179         unsigned char  is_pcix;
 180 };
 181
 182 struct tp_params {
 183         unsigned int pm_size;
 184         unsigned int cm_size;
 185         unsigned int pm_rx_base;
 186         unsigned int pm_tx_base;
 187         unsigned int pm_rx_pg_size;
 188         unsigned int pm_tx_pg_size;
 189         unsigned int pm_rx_num_pgs;
 190         unsigned int pm_tx_num_pgs;
 191         unsigned int rx_coalescing_size;
 192         unsigned int use_5tuple_mode;
 193 };
 194
 195 struct mc5_params {
 196         unsigned int mode;       /* selects MC5 width */
 197         unsigned int nservers;   /* size of server region */
 198         unsigned int nroutes;    /* size of routing region */
 199 };
 200
 201 /* Default MC5 region sizes */
 202 #define DEFAULT_SERVER_REGION_LEN 256
 203 #define DEFAULT_RT_REGION_LEN 1024
 204
 205 struct adapter_params {
 206         struct sge_params sge;
 207         struct mc5_params mc5;
 208         struct tp_params  tp;
 209         struct chelsio_pci_params pci;
 210
 211         const struct board_info *brd_info;
 212
 213         unsigned short mtus[NMTUS];
 214         unsigned int   nports;          /* # of ethernet ports */
 215         unsigned int   stats_update_period;
 216         unsigned short chip_revision;
 217         unsigned char  chip_version;
 218         unsigned char  is_asic;
 219         unsigned char  has_msi;
 220 };
 221
 222 struct link_config {
 223         unsigned int   supported;        /* link capabilities */
 224         unsigned int   advertising;      /* advertised capabilities */
 225         unsigned short requested_speed;  /* speed user has requested */
 226         unsigned short speed;            /* actual link speed */
 227         unsigned char  requested_duplex; /* duplex user has requested */
 228         unsigned char  duplex;           /* actual link duplex */
 229         unsigned char  requested_fc;     /* flow control user has requested */
 230         unsigned char  fc;               /* actual link flow control */
 231         unsigned char  autoneg;          /* autonegotiating? */
 232 };
 233
 234 struct cmac;
 235 struct cphy;
 236
 237 struct port_info {
 238         struct net_device *dev;
 239         struct cmac *mac;
 240         struct cphy *phy;
 241         struct link_config link_config;
 242         struct net_device_stats netstats;
 243 };
 244
 245 struct sge;
 246 struct peespi;
 247
 248 struct adapter {
 249         u8 __iomem *regs;
 250         struct pci_dev *pdev;
 251         unsigned long registered_device_map;
 252         unsigned long open_device_map;
 253         unsigned long flags;
 254
 255         const char *name;
 256         int msg_enable;
 257         u32 mmio_len;
 258
 259         struct work_struct ext_intr_handler_task;
 260         struct adapter_params params;
 261
 262         struct vlan_group *vlan_grp;
 263
 264         /* Terminator modules. */
 265         struct sge    *sge;
 266         struct peespi *espi;
 267         struct petp   *tp;
 268
 269         struct napi_struct napi;
 270         struct port_info port[MAX_NPORTS];
 271         struct delayed_work stats_update_task;
 272         struct timer_list stats_update_timer;
 273
 274         spinlock_t tpi_lock;
 275         spinlock_t work_lock;
 276         spinlock_t mac_lock;
 277
 278         /* guards async operations */
 279         spinlock_t async_lock ____cacheline_aligned;
 280         u32 slow_intr_mask;
 281         int t1powersave;
 282 };
 283
 284 enum {                                           /* adapter flags */
 285         FULL_INIT_DONE        = 1 << 0,
 286         TSO_CAPABLE           = 1 << 2,
 287         TCP_CSUM_CAPABLE      = 1 << 3,
 288         UDP_CSUM_CAPABLE      = 1 << 4,
 289         VLAN_ACCEL_CAPABLE    = 1 << 5,
 290         RX_CSUM_ENABLED       = 1 << 6,
 291 };
 292
 293 struct mdio_ops;
 294 struct gmac;
 295 struct gphy;
 296
 297 struct board_info {
 298         unsigned char           board;
 299         unsigned char           port_number;
 300         unsigned long           caps;
 301         unsigned char           chip_term;
 302         unsigned char           chip_mac;
 303         unsigned char           chip_phy;
 304         unsigned int            clock_core;
 305         unsigned int            clock_mc3;
 306         unsigned int            clock_mc4;
 307         unsigned int            espi_nports;
 308         unsigned int            clock_cspi;
 309         unsigned int            clock_elmer0;
 310         unsigned char           mdio_mdien;
 311         unsigned char           mdio_mdiinv;
 312         unsigned char           mdio_mdc;
 313         unsigned char           mdio_phybaseaddr;
 314         const struct gmac      *gmac;
 315         const struct gphy      *gphy;
 316         const struct mdio_ops  *mdio_ops;
 317         const char             *desc;
 318 };
 319
 320 static inline int t1_is_asic(const adapter_t *adapter)
 321 {
 322         return adapter->params.is_asic;
 323 }
 324
 325 extern const struct pci_device_id t1_pci_tbl[];
 326
 327 static inline int adapter_matches_type(const adapter_t *adapter,
 328                                        int version, int revision)
 329 {
 330         return adapter->params.chip_version == version &&
 331                adapter->params.chip_revision == revision;
 332 }
 333
 334 #define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B)
 335 #define is_T2(adap)     adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2)
 336
 337 /* Returns true if an adapter supports VLAN acceleration and TSO */
 338 static inline int vlan_tso_capable(const adapter_t *adapter)
 339 {
 340         return !t1_is_T1B(adapter);
 341 }
 342
 343 #define for_each_port(adapter, iter) \
 344         for (iter = 0; iter < (adapter)->params.nports; ++iter)
 345
 346 #define board_info(adapter) ((adapter)->params.brd_info)
 347 #define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full)
 348
 349 static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
 350 {
 351         return board_info(adap)->clock_core / 1000000;
 352 }
 353
 354 extern int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp);
 355 extern int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
 356 extern int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
 357 extern int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
 358
 359 extern void t1_interrupts_enable(adapter_t *adapter);
 360 extern void t1_interrupts_disable(adapter_t *adapter);
 361 extern void t1_interrupts_clear(adapter_t *adapter);
 362 extern int t1_elmer0_ext_intr_handler(adapter_t *adapter);
 363 extern void t1_elmer0_ext_intr(adapter_t *adapter);
 364 extern int t1_slow_intr_handler(adapter_t *adapter);
 365
 366 extern int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
 367 extern const struct board_info *t1_get_board_info(unsigned int board_id);
 368 extern const struct board_info *t1_get_board_info_from_ids(unsigned int devid,
 369                                                     unsigned short ssid);
 370 extern int t1_seeprom_read(adapter_t *adapter, u32 addr, __le32 *data);
 371 extern int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
 372                      struct adapter_params *p);
 373 extern int t1_init_hw_modules(adapter_t *adapter);
 374 extern int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
 375 extern void t1_free_sw_modules(adapter_t *adapter);
 376 extern void t1_fatal_err(adapter_t *adapter);
 377 extern void t1_link_changed(adapter_t *adapter, int port_id);
 378 extern void t1_link_negotiated(adapter_t *adapter, int port_id, int link_stat,
 379                             int speed, int duplex, int pause);
 380 #endif /* _CXGB_COMMON_H_ */