drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "vmwgfx_kms.h"
  29
  30 /* Might need a hrtimer here? */
  31 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  32
  33 static int vmw_surface_dmabuf_pin(struct vmw_framebuffer *vfb);
  34 static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer *vfb);
  35
  36 void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  37 {
  38         if (du->cursor_surface)
  39                 vmw_surface_unreference(&du->cursor_surface);
  40         if (du->cursor_dmabuf)
  41                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
  42         drm_crtc_cleanup(&du->crtc);
  43         drm_encoder_cleanup(&du->encoder);
  44         drm_connector_cleanup(&du->connector);
  45 }
  46
  47 /*
  48  * Display Unit Cursor functions
  49  */
  50
  51 int vmw_cursor_update_image(struct vmw_private *dev_priv,
  52                             u32 *image, u32 width, u32 height,
  53                             u32 hotspotX, u32 hotspotY)
  54 {
  55         struct {
  56                 u32 cmd;
  57                 SVGAFifoCmdDefineAlphaCursor cursor;
  58         } *cmd;
  59         u32 image_size = width * height * 4;
  60         u32 cmd_size = sizeof(*cmd) + image_size;
  61
  62         if (!image)
  63                 return -EINVAL;
  64
  65         cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  66         if (unlikely(cmd == NULL)) {
  67                 DRM_ERROR("Fifo reserve failed.\n");
  68                 return -ENOMEM;
  69         }
  70
  71         memset(cmd, 0, sizeof(*cmd));
  72
  73         memcpy(&cmd[1], image, image_size);
  74
  75         cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  76         cmd->cursor.id = cpu_to_le32(0);
  77         cmd->cursor.width = cpu_to_le32(width);
  78         cmd->cursor.height = cpu_to_le32(height);
  79         cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  80         cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  81
  82         vmw_fifo_commit(dev_priv, cmd_size);
  83
  84         return 0;
  85 }
  86
  87 void vmw_cursor_update_position(struct vmw_private *dev_priv,
  88                                 bool show, int x, int y)
  89 {
  90         __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  91         uint32_t count;
  92
  93         iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  94         iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  95         iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  96         count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  97         iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  98 }
  99
 100 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
 101                            uint32_t handle, uint32_t width, uint32_t height)
 102 {
 103         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 104         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 105         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 106         struct vmw_surface *surface = NULL;
 107         struct vmw_dma_buffer *dmabuf = NULL;
 108         int ret;
 109
 110         if (handle) {
 111                 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
 112                                                      handle, &surface);
 113                 if (!ret) {
 114                         if (!surface->snooper.image) {
 115                                 DRM_ERROR("surface not suitable for cursor\n");
 116                                 return -EINVAL;
 117                         }
 118                 } else {
 119                         ret = vmw_user_dmabuf_lookup(tfile,
 120                                                      handle, &dmabuf);
 121                         if (ret) {
 122                                 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
 123                                 return -EINVAL;
 124                         }
 125                 }
 126         }
 127
 128         /* takedown old cursor */
 129         if (du->cursor_surface) {
 130                 du->cursor_surface->snooper.crtc = NULL;
 131                 vmw_surface_unreference(&du->cursor_surface);
 132         }
 133         if (du->cursor_dmabuf)
 134                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
 135
 136         /* setup new image */
 137         if (surface) {
 138                 /* vmw_user_surface_lookup takes one reference */
 139                 du->cursor_surface = surface;
 140
 141                 du->cursor_surface->snooper.crtc = crtc;
 142                 du->cursor_age = du->cursor_surface->snooper.age;
 143                 vmw_cursor_update_image(dev_priv, surface->snooper.image,
 144                                         64, 64, du->hotspot_x, du->hotspot_y);
 145         } else if (dmabuf) {
 146                 struct ttm_bo_kmap_obj map;
 147                 unsigned long kmap_offset;
 148                 unsigned long kmap_num;
 149                 void *virtual;
 150                 bool dummy;
 151
 152                 /* vmw_user_surface_lookup takes one reference */
 153                 du->cursor_dmabuf = dmabuf;
 154
 155                 kmap_offset = 0;
 156                 kmap_num = (64*64*4) >> PAGE_SHIFT;
 157
 158                 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
 159                 if (unlikely(ret != 0)) {
 160                         DRM_ERROR("reserve failed\n");
 161                         return -EINVAL;
 162                 }
 163
 164                 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
 165                 if (unlikely(ret != 0))
 166                         goto err_unreserve;
 167
 168                 virtual = ttm_kmap_obj_virtual(&map, &dummy);
 169                 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
 170                                         du->hotspot_x, du->hotspot_y);
 171
 172                 ttm_bo_kunmap(&map);
 173 err_unreserve:
 174                 ttm_bo_unreserve(&dmabuf->base);
 175
 176         } else {
 177                 vmw_cursor_update_position(dev_priv, false, 0, 0);
 178                 return 0;
 179         }
 180
 181         vmw_cursor_update_position(dev_priv, true, du->cursor_x, du->cursor_y);
 182
 183         return 0;
 184 }
 185
 186 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
 187 {
 188         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 189         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 190         bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
 191
 192         du->cursor_x = x + crtc->x;
 193         du->cursor_y = y + crtc->y;
 194
 195         vmw_cursor_update_position(dev_priv, shown,
 196                                    du->cursor_x, du->cursor_y);
 197
 198         return 0;
 199 }
 200
 201 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
 202                           struct ttm_object_file *tfile,
 203                           struct ttm_buffer_object *bo,
 204                           SVGA3dCmdHeader *header)
 205 {
 206         struct ttm_bo_kmap_obj map;
 207         unsigned long kmap_offset;
 208         unsigned long kmap_num;
 209         SVGA3dCopyBox *box;
 210         unsigned box_count;
 211         void *virtual;
 212         bool dummy;
 213         struct vmw_dma_cmd {
 214                 SVGA3dCmdHeader header;
 215                 SVGA3dCmdSurfaceDMA dma;
 216         } *cmd;
 217         int ret;
 218
 219         cmd = container_of(header, struct vmw_dma_cmd, header);
 220
 221         /* No snooper installed */
 222         if (!srf->snooper.image)
 223                 return;
 224
 225         if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
 226                 DRM_ERROR("face and mipmap for cursors should never != 0\n");
 227                 return;
 228         }
 229
 230         if (cmd->header.size < 64) {
 231                 DRM_ERROR("at least one full copy box must be given\n");
 232                 return;
 233         }
 234
 235         box = (SVGA3dCopyBox *)&cmd[1];
 236         box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
 237                         sizeof(SVGA3dCopyBox);
 238
 239         if (cmd->dma.guest.pitch != (64 * 4) ||
 240             cmd->dma.guest.ptr.offset % PAGE_SIZE ||
 241             box->x != 0    || box->y != 0    || box->z != 0    ||
 242             box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
 243             box->w != 64   || box->h != 64   || box->d != 1    ||
 244             box_count != 1) {
 245                 /* TODO handle none page aligned offsets */
 246                 /* TODO handle partial uploads and pitch != 256 */
 247                 /* TODO handle more then one copy (size != 64) */
 248                 DRM_ERROR("lazy programer, cant handle wierd stuff\n");
 249                 return;
 250         }
 251
 252         kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
 253         kmap_num = (64*64*4) >> PAGE_SHIFT;
 254
 255         ret = ttm_bo_reserve(bo, true, false, false, 0);
 256         if (unlikely(ret != 0)) {
 257                 DRM_ERROR("reserve failed\n");
 258                 return;
 259         }
 260
 261         ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
 262         if (unlikely(ret != 0))
 263                 goto err_unreserve;
 264
 265         virtual = ttm_kmap_obj_virtual(&map, &dummy);
 266
 267         memcpy(srf->snooper.image, virtual, 64*64*4);
 268         srf->snooper.age++;
 269
 270         /* we can't call this function from this function since execbuf has
 271          * reserved fifo space.
 272          *
 273          * if (srf->snooper.crtc)
 274          *      vmw_ldu_crtc_cursor_update_image(dev_priv,
 275          *                                       srf->snooper.image, 64, 64,
 276          *                                       du->hotspot_x, du->hotspot_y);
 277          */
 278
 279         ttm_bo_kunmap(&map);
 280 err_unreserve:
 281         ttm_bo_unreserve(bo);
 282 }
 283
 284 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
 285 {
 286         struct drm_device *dev = dev_priv->dev;
 287         struct vmw_display_unit *du;
 288         struct drm_crtc *crtc;
 289
 290         mutex_lock(&dev->mode_config.mutex);
 291
 292         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 293                 du = vmw_crtc_to_du(crtc);
 294                 if (!du->cursor_surface ||
 295                     du->cursor_age == du->cursor_surface->snooper.age)
 296                         continue;
 297
 298                 du->cursor_age = du->cursor_surface->snooper.age;
 299                 vmw_cursor_update_image(dev_priv,
 300                                         du->cursor_surface->snooper.image,
 301                                         64, 64, du->hotspot_x, du->hotspot_y);
 302         }
 303
 304         mutex_unlock(&dev->mode_config.mutex);
 305 }
 306
 307 /*
 308  * Generic framebuffer code
 309  */
 310
 311 int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
 312                                   struct drm_file *file_priv,
 313                                   unsigned int *handle)
 314 {
 315         if (handle)
 316                 handle = 0;
 317
 318         return 0;
 319 }
 320
 321 /*
 322  * Surface framebuffer code
 323  */
 324
 325 #define vmw_framebuffer_to_vfbs(x) \
 326         container_of(x, struct vmw_framebuffer_surface, base.base)
 327
 328 struct vmw_framebuffer_surface {
 329         struct vmw_framebuffer base;
 330         struct vmw_surface *surface;
 331         struct vmw_dma_buffer *buffer;
 332         struct delayed_work d_work;
 333         struct mutex work_lock;
 334         bool present_fs;
 335 };
 336
 337 void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
 338 {
 339         struct vmw_framebuffer_surface *vfb =
 340                 vmw_framebuffer_to_vfbs(framebuffer);
 341
 342         cancel_delayed_work_sync(&vfb->d_work);
 343         drm_framebuffer_cleanup(framebuffer);
 344         vmw_surface_unreference(&vfb->surface);
 345
 346         kfree(framebuffer);
 347 }
 348
 349 static void vmw_framebuffer_present_fs_callback(struct work_struct *work)
 350 {
 351         struct delayed_work *d_work =
 352                 container_of(work, struct delayed_work, work);
 353         struct vmw_framebuffer_surface *vfbs =
 354                 container_of(d_work, struct vmw_framebuffer_surface, d_work);
 355         struct vmw_surface *surf = vfbs->surface;
 356         struct drm_framebuffer *framebuffer = &vfbs->base.base;
 357         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 358
 359         struct {
 360                 SVGA3dCmdHeader header;
 361                 SVGA3dCmdPresent body;
 362                 SVGA3dCopyRect cr;
 363         } *cmd;
 364
 365         mutex_lock(&vfbs->work_lock);
 366         if (!vfbs->present_fs)
 367                 goto out_unlock;
 368
 369         cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
 370         if (unlikely(cmd == NULL))
 371                 goto out_resched;
 372
 373         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
 374         cmd->header.size = cpu_to_le32(sizeof(cmd->body) + sizeof(cmd->cr));
 375         cmd->body.sid = cpu_to_le32(surf->res.id);
 376         cmd->cr.x = cpu_to_le32(0);
 377         cmd->cr.y = cpu_to_le32(0);
 378         cmd->cr.srcx = cmd->cr.x;
 379         cmd->cr.srcy = cmd->cr.y;
 380         cmd->cr.w = cpu_to_le32(framebuffer->width);
 381         cmd->cr.h = cpu_to_le32(framebuffer->height);
 382         vfbs->present_fs = false;
 383         vmw_fifo_commit(dev_priv, sizeof(*cmd));
 384 out_resched:
 385         /**
 386          * Will not re-add if already pending.
 387          */
 388         schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
 389 out_unlock:
 390         mutex_unlock(&vfbs->work_lock);
 391 }
 392
 393
 394 int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
 395                                   unsigned flags, unsigned color,
 396                                   struct drm_clip_rect *clips,
 397                                   unsigned num_clips)
 398 {
 399         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 400         struct vmw_framebuffer_surface *vfbs =
 401                 vmw_framebuffer_to_vfbs(framebuffer);
 402         struct vmw_surface *surf = vfbs->surface;
 403         struct drm_clip_rect norect;
 404         SVGA3dCopyRect *cr;
 405         int i, inc = 1;
 406
 407         struct {
 408                 SVGA3dCmdHeader header;
 409                 SVGA3dCmdPresent body;
 410                 SVGA3dCopyRect cr;
 411         } *cmd;
 412
 413         if (!num_clips ||
 414             !(dev_priv->fifo.capabilities &
 415               SVGA_FIFO_CAP_SCREEN_OBJECT)) {
 416                 int ret;
 417
 418                 mutex_lock(&vfbs->work_lock);
 419                 vfbs->present_fs = true;
 420                 ret = schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
 421                 mutex_unlock(&vfbs->work_lock);
 422                 if (ret) {
 423                         /**
 424                          * No work pending, Force immediate present.
 425                          */
 426                         vmw_framebuffer_present_fs_callback(&vfbs->d_work.work);
 427                 }
 428                 return 0;
 429         }
 430
 431         if (!num_clips) {
 432                 num_clips = 1;
 433                 clips = &norect;
 434                 norect.x1 = norect.y1 = 0;
 435                 norect.x2 = framebuffer->width;
 436                 norect.y2 = framebuffer->height;
 437         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 438                 num_clips /= 2;
 439                 inc = 2; /* skip source rects */
 440         }
 441
 442         cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
 443         if (unlikely(cmd == NULL)) {
 444                 DRM_ERROR("Fifo reserve failed.\n");
 445                 return -ENOMEM;
 446         }
 447
 448         memset(cmd, 0, sizeof(*cmd));
 449
 450         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
 451         cmd->header.size = cpu_to_le32(sizeof(cmd->body) + num_clips * sizeof(cmd->cr));
 452         cmd->body.sid = cpu_to_le32(surf->res.id);
 453
 454         for (i = 0, cr = &cmd->cr; i < num_clips; i++, cr++, clips += inc) {
 455                 cr->x = cpu_to_le16(clips->x1);
 456                 cr->y = cpu_to_le16(clips->y1);
 457                 cr->srcx = cr->x;
 458                 cr->srcy = cr->y;
 459                 cr->w = cpu_to_le16(clips->x2 - clips->x1);
 460                 cr->h = cpu_to_le16(clips->y2 - clips->y1);
 461         }
 462
 463         vmw_fifo_commit(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
 464
 465         return 0;
 466 }
 467
 468 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
 469         .destroy = vmw_framebuffer_surface_destroy,
 470         .dirty = vmw_framebuffer_surface_dirty,
 471         .create_handle = vmw_framebuffer_create_handle,
 472 };
 473
 474 int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
 475                                     struct vmw_surface *surface,
 476                                     struct vmw_framebuffer **out,
 477                                     unsigned width, unsigned height)
 478
 479 {
 480         struct drm_device *dev = dev_priv->dev;
 481         struct vmw_framebuffer_surface *vfbs;
 482         int ret;
 483
 484         vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
 485         if (!vfbs) {
 486                 ret = -ENOMEM;
 487                 goto out_err1;
 488         }
 489
 490         ret = drm_framebuffer_init(dev, &vfbs->base.base,
 491                                    &vmw_framebuffer_surface_funcs);
 492         if (ret)
 493                 goto out_err2;
 494
 495         if (!vmw_surface_reference(surface)) {
 496                 DRM_ERROR("failed to reference surface %p\n", surface);
 497                 goto out_err3;
 498         }
 499
 500         /* XXX get the first 3 from the surface info */
 501         vfbs->base.base.bits_per_pixel = 32;
 502         vfbs->base.base.pitch = width * 32 / 4;
 503         vfbs->base.base.depth = 24;
 504         vfbs->base.base.width = width;
 505         vfbs->base.base.height = height;
 506         vfbs->base.pin = &vmw_surface_dmabuf_pin;
 507         vfbs->base.unpin = &vmw_surface_dmabuf_unpin;
 508         vfbs->surface = surface;
 509         mutex_init(&vfbs->work_lock);
 510         INIT_DELAYED_WORK(&vfbs->d_work, &vmw_framebuffer_present_fs_callback);
 511         *out = &vfbs->base;
 512
 513         return 0;
 514
 515 out_err3:
 516         drm_framebuffer_cleanup(&vfbs->base.base);
 517 out_err2:
 518         kfree(vfbs);
 519 out_err1:
 520         return ret;
 521 }
 522
 523 /*
 524  * Dmabuf framebuffer code
 525  */
 526
 527 #define vmw_framebuffer_to_vfbd(x) \
 528         container_of(x, struct vmw_framebuffer_dmabuf, base.base)
 529
 530 struct vmw_framebuffer_dmabuf {
 531         struct vmw_framebuffer base;
 532         struct vmw_dma_buffer *buffer;
 533 };
 534
 535 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
 536 {
 537         struct vmw_framebuffer_dmabuf *vfbd =
 538                 vmw_framebuffer_to_vfbd(framebuffer);
 539
 540         drm_framebuffer_cleanup(framebuffer);
 541         vmw_dmabuf_unreference(&vfbd->buffer);
 542
 543         kfree(vfbd);
 544 }
 545
 546 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
 547                                  unsigned flags, unsigned color,
 548                                  struct drm_clip_rect *clips,
 549                                  unsigned num_clips)
 550 {
 551         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 552         struct drm_clip_rect norect;
 553         struct {
 554                 uint32_t header;
 555                 SVGAFifoCmdUpdate body;
 556         } *cmd;
 557         int i, increment = 1;
 558
 559         if (!num_clips) {
 560                 num_clips = 1;
 561                 clips = &norect;
 562                 norect.x1 = norect.y1 = 0;
 563                 norect.x2 = framebuffer->width;
 564                 norect.y2 = framebuffer->height;
 565         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 566                 num_clips /= 2;
 567                 increment = 2;
 568         }
 569
 570         cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
 571         if (unlikely(cmd == NULL)) {
 572                 DRM_ERROR("Fifo reserve failed.\n");
 573                 return -ENOMEM;
 574         }
 575
 576         for (i = 0; i < num_clips; i++, clips += increment) {
 577                 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
 578                 cmd[i].body.x = cpu_to_le32(clips->x1);
 579                 cmd[i].body.y = cpu_to_le32(clips->y1);
 580                 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
 581                 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
 582         }
 583
 584         vmw_fifo_commit(dev_priv, sizeof(*cmd) * num_clips);
 585
 586         return 0;
 587 }
 588
 589 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
 590         .destroy = vmw_framebuffer_dmabuf_destroy,
 591         .dirty = vmw_framebuffer_dmabuf_dirty,
 592         .create_handle = vmw_framebuffer_create_handle,
 593 };
 594
 595 static int vmw_surface_dmabuf_pin(struct vmw_framebuffer *vfb)
 596 {
 597         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 598         struct vmw_framebuffer_surface *vfbs =
 599                 vmw_framebuffer_to_vfbs(&vfb->base);
 600         unsigned long size = vfbs->base.base.pitch * vfbs->base.base.height;
 601         int ret;
 602
 603         vfbs->buffer = kzalloc(sizeof(*vfbs->buffer), GFP_KERNEL);
 604         if (unlikely(vfbs->buffer == NULL))
 605                 return -ENOMEM;
 606
 607         vmw_overlay_pause_all(dev_priv);
 608         ret = vmw_dmabuf_init(dev_priv, vfbs->buffer, size,
 609                                &vmw_vram_ne_placement,
 610                                false, &vmw_dmabuf_bo_free);
 611         vmw_overlay_resume_all(dev_priv);
 612
 613         return ret;
 614 }
 615
 616 static int vmw_surface_dmabuf_unpin(struct vmw_framebuffer *vfb)
 617 {
 618         struct ttm_buffer_object *bo;
 619         struct vmw_framebuffer_surface *vfbs =
 620                 vmw_framebuffer_to_vfbs(&vfb->base);
 621
 622         bo = &vfbs->buffer->base;
 623         ttm_bo_unref(&bo);
 624         vfbs->buffer = NULL;
 625
 626         return 0;
 627 }
 628
 629 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
 630 {
 631         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 632         struct vmw_framebuffer_dmabuf *vfbd =
 633                 vmw_framebuffer_to_vfbd(&vfb->base);
 634         int ret;
 635
 636
 637         vmw_overlay_pause_all(dev_priv);
 638
 639         ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer);
 640
 641         vmw_overlay_resume_all(dev_priv);
 642
 643         return 0;
 644 }
 645
 646 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
 647 {
 648         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 649         struct vmw_framebuffer_dmabuf *vfbd =
 650                 vmw_framebuffer_to_vfbd(&vfb->base);
 651
 652         if (!vfbd->buffer) {
 653                 WARN_ON(!vfbd->buffer);
 654                 return 0;
 655         }
 656
 657         return vmw_dmabuf_from_vram(dev_priv, vfbd->buffer);
 658 }
 659
 660 int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
 661                                    struct vmw_dma_buffer *dmabuf,
 662                                    struct vmw_framebuffer **out,
 663                                    unsigned width, unsigned height)
 664
 665 {
 666         struct drm_device *dev = dev_priv->dev;
 667         struct vmw_framebuffer_dmabuf *vfbd;
 668         int ret;
 669
 670         vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
 671         if (!vfbd) {
 672                 ret = -ENOMEM;
 673                 goto out_err1;
 674         }
 675
 676         ret = drm_framebuffer_init(dev, &vfbd->base.base,
 677                                    &vmw_framebuffer_dmabuf_funcs);
 678         if (ret)
 679                 goto out_err2;
 680
 681         if (!vmw_dmabuf_reference(dmabuf)) {
 682                 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
 683                 goto out_err3;
 684         }
 685
 686         /* XXX get the first 3 from the surface info */
 687         vfbd->base.base.bits_per_pixel = 32;
 688         vfbd->base.base.pitch = width * vfbd->base.base.bits_per_pixel / 8;
 689         vfbd->base.base.depth = 24;
 690         vfbd->base.base.width = width;
 691         vfbd->base.base.height = height;
 692         vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
 693         vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
 694         vfbd->buffer = dmabuf;
 695         *out = &vfbd->base;
 696
 697         return 0;
 698
 699 out_err3:
 700         drm_framebuffer_cleanup(&vfbd->base.base);
 701 out_err2:
 702         kfree(vfbd);
 703 out_err1:
 704         return ret;
 705 }
 706
 707 /*
 708  * Generic Kernel modesetting functions
 709  */
 710
 711 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
 712                                                  struct drm_file *file_priv,
 713                                                  struct drm_mode_fb_cmd *mode_cmd)
 714 {
 715         struct vmw_private *dev_priv = vmw_priv(dev);
 716         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 717         struct vmw_framebuffer *vfb = NULL;
 718         struct vmw_surface *surface = NULL;
 719         struct vmw_dma_buffer *bo = NULL;
 720         int ret;
 721
 722         ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
 723                                              mode_cmd->handle, &surface);
 724         if (ret)
 725                 goto try_dmabuf;
 726
 727         if (!surface->scanout)
 728                 goto err_not_scanout;
 729
 730         ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
 731                                               mode_cmd->width, mode_cmd->height);
 732
 733         /* vmw_user_surface_lookup takes one ref so does new_fb */
 734         vmw_surface_unreference(&surface);
 735
 736         if (ret) {
 737                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
 738                 return NULL;
 739         }
 740         return &vfb->base;
 741
 742 try_dmabuf:
 743         DRM_INFO("%s: trying buffer\n", __func__);
 744
 745         ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
 746         if (ret) {
 747                 DRM_ERROR("failed to find buffer: %i\n", ret);
 748                 return NULL;
 749         }
 750
 751         ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
 752                                              mode_cmd->width, mode_cmd->height);
 753
 754         /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
 755         vmw_dmabuf_unreference(&bo);
 756
 757         if (ret) {
 758                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
 759                 return NULL;
 760         }
 761
 762         return &vfb->base;
 763
 764 err_not_scanout:
 765         DRM_ERROR("surface not marked as scanout\n");
 766         /* vmw_user_surface_lookup takes one ref */
 767         vmw_surface_unreference(&surface);
 768
 769         return NULL;
 770 }
 771
 772 static struct drm_mode_config_funcs vmw_kms_funcs = {
 773         .fb_create = vmw_kms_fb_create,
 774 };
 775
 776 int vmw_kms_init(struct vmw_private *dev_priv)
 777 {
 778         struct drm_device *dev = dev_priv->dev;
 779         int ret;
 780
 781         drm_mode_config_init(dev);
 782         dev->mode_config.funcs = &vmw_kms_funcs;
 783         dev->mode_config.min_width = 1;
 784         dev->mode_config.min_height = 1;
 785         /* assumed largest fb size */
 786         dev->mode_config.max_width = 8192;
 787         dev->mode_config.max_height = 8192;
 788
 789         ret = vmw_kms_init_legacy_display_system(dev_priv);
 790
 791         return 0;
 792 }
 793
 794 int vmw_kms_close(struct vmw_private *dev_priv)
 795 {
 796         /*
 797          * Docs says we should take the lock before calling this function
 798          * but since it destroys encoders and our destructor calls
 799          * drm_encoder_cleanup which takes the lock we deadlock.
 800          */
 801         drm_mode_config_cleanup(dev_priv->dev);
 802         vmw_kms_close_legacy_display_system(dev_priv);
 803         return 0;
 804 }
 805
 806 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
 807                                 struct drm_file *file_priv)
 808 {
 809         struct drm_vmw_cursor_bypass_arg *arg = data;
 810         struct vmw_display_unit *du;
 811         struct drm_mode_object *obj;
 812         struct drm_crtc *crtc;
 813         int ret = 0;
 814
 815
 816         mutex_lock(&dev->mode_config.mutex);
 817         if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
 818
 819                 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 820                         du = vmw_crtc_to_du(crtc);
 821                         du->hotspot_x = arg->xhot;
 822                         du->hotspot_y = arg->yhot;
 823                 }
 824
 825                 mutex_unlock(&dev->mode_config.mutex);
 826                 return 0;
 827         }
 828
 829         obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
 830         if (!obj) {
 831                 ret = -EINVAL;
 832                 goto out;
 833         }
 834
 835         crtc = obj_to_crtc(obj);
 836         du = vmw_crtc_to_du(crtc);
 837
 838         du->hotspot_x = arg->xhot;
 839         du->hotspot_y = arg->yhot;
 840
 841 out:
 842         mutex_unlock(&dev->mode_config.mutex);
 843
 844         return ret;
 845 }
 846
 847 void vmw_kms_write_svga(struct vmw_private *vmw_priv,
 848                         unsigned width, unsigned height, unsigned pitch,
 849                         unsigned bbp, unsigned depth)
 850 {
 851         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
 852                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
 853         else if (vmw_fifo_have_pitchlock(vmw_priv))
 854                 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
 855         vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
 856         vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
 857         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bbp);
 858         vmw_write(vmw_priv, SVGA_REG_DEPTH, depth);
 859         vmw_write(vmw_priv, SVGA_REG_RED_MASK, 0x00ff0000);
 860         vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
 861         vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
 862 }
 863
 864 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
 865 {
 866         vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
 867         vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
 868         vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
 869         vmw_priv->vga_depth = vmw_read(vmw_priv, SVGA_REG_DEPTH);
 870         vmw_priv->vga_pseudo = vmw_read(vmw_priv, SVGA_REG_PSEUDOCOLOR);
 871         vmw_priv->vga_red_mask = vmw_read(vmw_priv, SVGA_REG_RED_MASK);
 872         vmw_priv->vga_green_mask = vmw_read(vmw_priv, SVGA_REG_GREEN_MASK);
 873         vmw_priv->vga_blue_mask = vmw_read(vmw_priv, SVGA_REG_BLUE_MASK);
 874         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
 875                 vmw_priv->vga_pitchlock =
 876                         vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
 877         else if (vmw_fifo_have_pitchlock(vmw_priv))
 878                 vmw_priv->vga_pitchlock =
 879                         ioread32(vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
 880
 881         return 0;
 882 }
 883
 884 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
 885 {
 886         vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
 887         vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
 888         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
 889         vmw_write(vmw_priv, SVGA_REG_DEPTH, vmw_priv->vga_depth);
 890         vmw_write(vmw_priv, SVGA_REG_PSEUDOCOLOR, vmw_priv->vga_pseudo);
 891         vmw_write(vmw_priv, SVGA_REG_RED_MASK, vmw_priv->vga_red_mask);
 892         vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, vmw_priv->vga_green_mask);
 893         vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, vmw_priv->vga_blue_mask);
 894         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
 895                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
 896                           vmw_priv->vga_pitchlock);
 897         else if (vmw_fifo_have_pitchlock(vmw_priv))
 898                 iowrite32(vmw_priv->vga_pitchlock,
 899                           vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
 900
 901         return 0;
 902 }