2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
32 #include <ttm/ttm_bo_api.h>
33 #include <ttm/ttm_bo_driver.h>
34 #include <ttm/ttm_placement.h>
35 #include <ttm/ttm_module.h>
37 #include <drm/radeon_drm.h>
38 #include <linux/seq_file.h>
39 #include "radeon_reg.h"
42 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
44 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
46 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
48 struct radeon_mman *mman;
49 struct radeon_device *rdev;
51 mman = container_of(bdev, struct radeon_mman, bdev);
52 rdev = container_of(mman, struct radeon_device, mman);
60 static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref)
62 return ttm_mem_global_init(ref->object);
65 static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref)
67 ttm_mem_global_release(ref->object);
70 static int radeon_ttm_global_init(struct radeon_device *rdev)
72 struct ttm_global_reference *global_ref;
75 rdev->mman.mem_global_referenced = false;
76 global_ref = &rdev->mman.mem_global_ref;
77 global_ref->global_type = TTM_GLOBAL_TTM_MEM;
78 global_ref->size = sizeof(struct ttm_mem_global);
79 global_ref->init = &radeon_ttm_mem_global_init;
80 global_ref->release = &radeon_ttm_mem_global_release;
81 r = ttm_global_item_ref(global_ref);
83 DRM_ERROR("Failed setting up TTM memory accounting "
88 rdev->mman.bo_global_ref.mem_glob =
89 rdev->mman.mem_global_ref.object;
90 global_ref = &rdev->mman.bo_global_ref.ref;
91 global_ref->global_type = TTM_GLOBAL_TTM_BO;
92 global_ref->size = sizeof(struct ttm_bo_global);
93 global_ref->init = &ttm_bo_global_init;
94 global_ref->release = &ttm_bo_global_release;
95 r = ttm_global_item_ref(global_ref);
97 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
98 ttm_global_item_unref(&rdev->mman.mem_global_ref);
102 rdev->mman.mem_global_referenced = true;
106 static void radeon_ttm_global_fini(struct radeon_device *rdev)
108 if (rdev->mman.mem_global_referenced) {
109 ttm_global_item_unref(&rdev->mman.bo_global_ref.ref);
110 ttm_global_item_unref(&rdev->mman.mem_global_ref);
111 rdev->mman.mem_global_referenced = false;
115 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
117 static struct ttm_backend*
118 radeon_create_ttm_backend_entry(struct ttm_bo_device *bdev)
120 struct radeon_device *rdev;
122 rdev = radeon_get_rdev(bdev);
124 if (rdev->flags & RADEON_IS_AGP) {
125 return ttm_agp_backend_init(bdev, rdev->ddev->agp->bridge);
129 return radeon_ttm_backend_create(rdev);
133 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
138 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
139 struct ttm_mem_type_manager *man)
141 struct radeon_device *rdev;
143 rdev = radeon_get_rdev(bdev);
148 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
149 man->available_caching = TTM_PL_MASK_CACHING;
150 man->default_caching = TTM_PL_FLAG_CACHED;
153 man->gpu_offset = rdev->mc.gtt_location;
154 man->available_caching = TTM_PL_MASK_CACHING;
155 man->default_caching = TTM_PL_FLAG_CACHED;
156 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
158 if (rdev->flags & RADEON_IS_AGP) {
159 if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
160 DRM_ERROR("AGP is not enabled for memory type %u\n",
164 man->io_offset = rdev->mc.agp_base;
165 man->io_size = rdev->mc.gtt_size;
167 if (!rdev->ddev->agp->cant_use_aperture)
168 man->flags = TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
169 TTM_MEMTYPE_FLAG_MAPPABLE;
170 man->available_caching = TTM_PL_FLAG_UNCACHED |
172 man->default_caching = TTM_PL_FLAG_WC;
182 /* "On-card" video ram */
183 man->gpu_offset = rdev->mc.vram_location;
184 man->flags = TTM_MEMTYPE_FLAG_FIXED |
185 TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
186 TTM_MEMTYPE_FLAG_MAPPABLE;
187 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
188 man->default_caching = TTM_PL_FLAG_WC;
190 man->io_offset = rdev->mc.aper_base;
191 man->io_size = rdev->mc.aper_size;
194 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
200 static void radeon_evict_flags(struct ttm_buffer_object *bo,
201 struct ttm_placement *placement)
203 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
204 switch (bo->mem.mem_type) {
206 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
210 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
214 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
219 static void radeon_move_null(struct ttm_buffer_object *bo,
220 struct ttm_mem_reg *new_mem)
222 struct ttm_mem_reg *old_mem = &bo->mem;
224 BUG_ON(old_mem->mm_node != NULL);
226 new_mem->mm_node = NULL;
229 static int radeon_move_blit(struct ttm_buffer_object *bo,
230 bool evict, int no_wait,
231 struct ttm_mem_reg *new_mem,
232 struct ttm_mem_reg *old_mem)
234 struct radeon_device *rdev;
235 uint64_t old_start, new_start;
236 struct radeon_fence *fence;
239 rdev = radeon_get_rdev(bo->bdev);
240 r = radeon_fence_create(rdev, &fence);
244 old_start = old_mem->mm_node->start << PAGE_SHIFT;
245 new_start = new_mem->mm_node->start << PAGE_SHIFT;
247 switch (old_mem->mem_type) {
249 old_start += rdev->mc.vram_location;
252 old_start += rdev->mc.gtt_location;
255 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
258 switch (new_mem->mem_type) {
260 new_start += rdev->mc.vram_location;
263 new_start += rdev->mc.gtt_location;
266 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
269 if (!rdev->cp.ready) {
270 DRM_ERROR("Trying to move memory with CP turned off.\n");
273 r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
274 /* FIXME: handle copy error */
275 r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
276 evict, no_wait, new_mem);
277 radeon_fence_unref(&fence);
281 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
282 bool evict, bool interruptible, bool no_wait,
283 struct ttm_mem_reg *new_mem)
285 struct radeon_device *rdev;
286 struct ttm_mem_reg *old_mem = &bo->mem;
287 struct ttm_mem_reg tmp_mem;
289 struct ttm_placement placement;
292 rdev = radeon_get_rdev(bo->bdev);
294 tmp_mem.mm_node = NULL;
297 placement.num_placement = 1;
298 placement.placement = &placements;
299 placement.num_busy_placement = 1;
300 placement.busy_placement = &placements;
301 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
302 r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
303 interruptible, no_wait);
308 r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
313 r = ttm_tt_bind(bo->ttm, &tmp_mem);
317 r = radeon_move_blit(bo, true, no_wait, &tmp_mem, old_mem);
321 r = ttm_bo_move_ttm(bo, true, no_wait, new_mem);
323 if (tmp_mem.mm_node) {
324 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
326 spin_lock(&glob->lru_lock);
327 drm_mm_put_block(tmp_mem.mm_node);
328 spin_unlock(&glob->lru_lock);
334 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
335 bool evict, bool interruptible, bool no_wait,
336 struct ttm_mem_reg *new_mem)
338 struct radeon_device *rdev;
339 struct ttm_mem_reg *old_mem = &bo->mem;
340 struct ttm_mem_reg tmp_mem;
341 struct ttm_placement placement;
345 rdev = radeon_get_rdev(bo->bdev);
347 tmp_mem.mm_node = NULL;
350 placement.num_placement = 1;
351 placement.placement = &placements;
352 placement.num_busy_placement = 1;
353 placement.busy_placement = &placements;
354 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
355 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait);
359 r = ttm_bo_move_ttm(bo, true, no_wait, &tmp_mem);
363 r = radeon_move_blit(bo, true, no_wait, new_mem, old_mem);
368 if (tmp_mem.mm_node) {
369 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
371 spin_lock(&glob->lru_lock);
372 drm_mm_put_block(tmp_mem.mm_node);
373 spin_unlock(&glob->lru_lock);
379 static int radeon_bo_move(struct ttm_buffer_object *bo,
380 bool evict, bool interruptible, bool no_wait,
381 struct ttm_mem_reg *new_mem)
383 struct radeon_device *rdev;
384 struct ttm_mem_reg *old_mem = &bo->mem;
387 rdev = radeon_get_rdev(bo->bdev);
388 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
389 radeon_move_null(bo, new_mem);
392 if ((old_mem->mem_type == TTM_PL_TT &&
393 new_mem->mem_type == TTM_PL_SYSTEM) ||
394 (old_mem->mem_type == TTM_PL_SYSTEM &&
395 new_mem->mem_type == TTM_PL_TT)) {
396 /* bind is enought */
397 radeon_move_null(bo, new_mem);
400 if (!rdev->cp.ready || rdev->asic->copy == NULL) {
405 if (old_mem->mem_type == TTM_PL_VRAM &&
406 new_mem->mem_type == TTM_PL_SYSTEM) {
407 r = radeon_move_vram_ram(bo, evict, interruptible,
409 } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
410 new_mem->mem_type == TTM_PL_VRAM) {
411 r = radeon_move_ram_vram(bo, evict, interruptible,
414 r = radeon_move_blit(bo, evict, no_wait, new_mem, old_mem);
419 r = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
425 static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
426 bool lazy, bool interruptible)
428 return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
431 static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
436 static void radeon_sync_obj_unref(void **sync_obj)
438 radeon_fence_unref((struct radeon_fence **)sync_obj);
441 static void *radeon_sync_obj_ref(void *sync_obj)
443 return radeon_fence_ref((struct radeon_fence *)sync_obj);
446 static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
448 return radeon_fence_signaled((struct radeon_fence *)sync_obj);
451 static struct ttm_bo_driver radeon_bo_driver = {
452 .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
453 .invalidate_caches = &radeon_invalidate_caches,
454 .init_mem_type = &radeon_init_mem_type,
455 .evict_flags = &radeon_evict_flags,
456 .move = &radeon_bo_move,
457 .verify_access = &radeon_verify_access,
458 .sync_obj_signaled = &radeon_sync_obj_signaled,
459 .sync_obj_wait = &radeon_sync_obj_wait,
460 .sync_obj_flush = &radeon_sync_obj_flush,
461 .sync_obj_unref = &radeon_sync_obj_unref,
462 .sync_obj_ref = &radeon_sync_obj_ref,
463 .move_notify = &radeon_bo_move_notify,
464 .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
467 int radeon_ttm_init(struct radeon_device *rdev)
471 r = radeon_ttm_global_init(rdev);
475 /* No others user of address space so set it to 0 */
476 r = ttm_bo_device_init(&rdev->mman.bdev,
477 rdev->mman.bo_global_ref.ref.object,
478 &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
481 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
484 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
485 rdev->mc.real_vram_size >> PAGE_SHIFT);
487 DRM_ERROR("Failed initializing VRAM heap.\n");
490 r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
491 RADEON_GEM_DOMAIN_VRAM,
492 &rdev->stollen_vga_memory);
496 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
499 r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
500 radeon_bo_unreserve(rdev->stollen_vga_memory);
502 radeon_bo_unref(&rdev->stollen_vga_memory);
505 DRM_INFO("radeon: %uM of VRAM memory ready\n",
506 (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
507 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
508 rdev->mc.gtt_size >> PAGE_SHIFT);
510 DRM_ERROR("Failed initializing GTT heap.\n");
513 DRM_INFO("radeon: %uM of GTT memory ready.\n",
514 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
515 if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
516 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
519 r = radeon_ttm_debugfs_init(rdev);
521 DRM_ERROR("Failed to init debugfs\n");
527 void radeon_ttm_fini(struct radeon_device *rdev)
531 if (rdev->stollen_vga_memory) {
532 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
534 radeon_bo_unpin(rdev->stollen_vga_memory);
535 radeon_bo_unreserve(rdev->stollen_vga_memory);
537 radeon_bo_unref(&rdev->stollen_vga_memory);
539 ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
540 ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
541 ttm_bo_device_release(&rdev->mman.bdev);
542 radeon_gart_fini(rdev);
543 radeon_ttm_global_fini(rdev);
544 DRM_INFO("radeon: ttm finalized\n");
547 static struct vm_operations_struct radeon_ttm_vm_ops;
548 static const struct vm_operations_struct *ttm_vm_ops = NULL;
550 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
552 struct ttm_buffer_object *bo;
555 bo = (struct ttm_buffer_object *)vma->vm_private_data;
557 return VM_FAULT_NOPAGE;
559 r = ttm_vm_ops->fault(vma, vmf);
563 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
565 struct drm_file *file_priv;
566 struct radeon_device *rdev;
569 if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
570 return drm_mmap(filp, vma);
573 file_priv = (struct drm_file *)filp->private_data;
574 rdev = file_priv->minor->dev->dev_private;
578 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
579 if (unlikely(r != 0)) {
582 if (unlikely(ttm_vm_ops == NULL)) {
583 ttm_vm_ops = vma->vm_ops;
584 radeon_ttm_vm_ops = *ttm_vm_ops;
585 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
587 vma->vm_ops = &radeon_ttm_vm_ops;
593 * TTM backend functions.
595 struct radeon_ttm_backend {
596 struct ttm_backend backend;
597 struct radeon_device *rdev;
598 unsigned long num_pages;
600 struct page *dummy_read_page;
606 static int radeon_ttm_backend_populate(struct ttm_backend *backend,
607 unsigned long num_pages,
609 struct page *dummy_read_page)
611 struct radeon_ttm_backend *gtt;
613 gtt = container_of(backend, struct radeon_ttm_backend, backend);
615 gtt->num_pages = num_pages;
616 gtt->dummy_read_page = dummy_read_page;
617 gtt->populated = true;
621 static void radeon_ttm_backend_clear(struct ttm_backend *backend)
623 struct radeon_ttm_backend *gtt;
625 gtt = container_of(backend, struct radeon_ttm_backend, backend);
628 gtt->dummy_read_page = NULL;
629 gtt->populated = false;
634 static int radeon_ttm_backend_bind(struct ttm_backend *backend,
635 struct ttm_mem_reg *bo_mem)
637 struct radeon_ttm_backend *gtt;
640 gtt = container_of(backend, struct radeon_ttm_backend, backend);
641 gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
642 if (!gtt->num_pages) {
643 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
645 r = radeon_gart_bind(gtt->rdev, gtt->offset,
646 gtt->num_pages, gtt->pages);
648 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
649 gtt->num_pages, gtt->offset);
656 static int radeon_ttm_backend_unbind(struct ttm_backend *backend)
658 struct radeon_ttm_backend *gtt;
660 gtt = container_of(backend, struct radeon_ttm_backend, backend);
661 radeon_gart_unbind(gtt->rdev, gtt->offset, gtt->num_pages);
666 static void radeon_ttm_backend_destroy(struct ttm_backend *backend)
668 struct radeon_ttm_backend *gtt;
670 gtt = container_of(backend, struct radeon_ttm_backend, backend);
672 radeon_ttm_backend_unbind(backend);
677 static struct ttm_backend_func radeon_backend_func = {
678 .populate = &radeon_ttm_backend_populate,
679 .clear = &radeon_ttm_backend_clear,
680 .bind = &radeon_ttm_backend_bind,
681 .unbind = &radeon_ttm_backend_unbind,
682 .destroy = &radeon_ttm_backend_destroy,
685 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
687 struct radeon_ttm_backend *gtt;
689 gtt = kzalloc(sizeof(struct radeon_ttm_backend), GFP_KERNEL);
693 gtt->backend.bdev = &rdev->mman.bdev;
694 gtt->backend.flags = 0;
695 gtt->backend.func = &radeon_backend_func;
699 gtt->dummy_read_page = NULL;
700 gtt->populated = false;
702 return >t->backend;
705 #define RADEON_DEBUGFS_MEM_TYPES 2
707 #if defined(CONFIG_DEBUG_FS)
708 static int radeon_mm_dump_table(struct seq_file *m, void *data)
710 struct drm_info_node *node = (struct drm_info_node *)m->private;
711 struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
712 struct drm_device *dev = node->minor->dev;
713 struct radeon_device *rdev = dev->dev_private;
715 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
717 spin_lock(&glob->lru_lock);
718 ret = drm_mm_dump_table(m, mm);
719 spin_unlock(&glob->lru_lock);
724 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
726 #if defined(CONFIG_DEBUG_FS)
727 static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES];
728 static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES][32];
731 for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
733 sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
735 sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
736 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
737 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
738 radeon_mem_types_list[i].driver_features = 0;
740 radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
742 radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
745 return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES);