2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
36 #include <drm_dp_helper.h>
37 #include <linux/i2c.h>
38 #include <linux/i2c-id.h>
39 #include <linux/i2c-algo-bit.h>
40 #include "radeon_fixed.h"
45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
48 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
50 enum radeon_rmx_type {
69 /* radeon gpio-based i2c
70 * 1. "mask" reg and bits
71 * grabs the gpio pins for software use
76 * 3. "en" reg and bits
77 * sets the pin direction
83 struct radeon_i2c_bus_rec {
89 /* can be used with hw i2c engine */
91 /* uses multi-media i2c engine */
94 uint32_t mask_clk_reg;
95 uint32_t mask_data_reg;
102 uint32_t mask_clk_mask;
103 uint32_t mask_data_mask;
105 uint32_t a_data_mask;
106 uint32_t en_clk_mask;
107 uint32_t en_data_mask;
109 uint32_t y_data_mask;
112 struct radeon_tmds_pll {
117 #define RADEON_MAX_BIOS_CONNECTOR 16
120 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
121 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
122 #define RADEON_PLL_USE_REF_DIV (1 << 2)
123 #define RADEON_PLL_LEGACY (1 << 3)
124 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
125 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
126 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
127 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
128 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
129 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
130 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
131 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
132 #define RADEON_PLL_USE_POST_DIV (1 << 12)
133 #define RADEON_PLL_IS_LCD (1 << 13)
136 enum radeon_pll_algo {
142 /* reference frequency */
143 uint32_t reference_freq;
146 uint32_t reference_div;
149 /* pll in/out limits */
152 uint32_t pll_out_min;
153 uint32_t pll_out_max;
154 uint32_t lcd_pll_out_min;
155 uint32_t lcd_pll_out_max;
159 uint32_t min_ref_div;
160 uint32_t max_ref_div;
161 uint32_t min_post_div;
162 uint32_t max_post_div;
163 uint32_t min_feedback_div;
164 uint32_t max_feedback_div;
165 uint32_t min_frac_feedback_div;
166 uint32_t max_frac_feedback_div;
168 /* flags for the current clock */
174 enum radeon_pll_algo algo;
177 struct radeon_i2c_chan {
178 struct i2c_adapter adapter;
179 struct drm_device *dev;
181 struct i2c_algo_bit_data bit;
182 struct i2c_algo_dp_aux_data dp;
184 struct radeon_i2c_bus_rec rec;
187 /* mostly for macs, but really any system without connector tables */
188 enum radeon_connector_table {
192 CT_POWERBOOK_EXTERNAL,
193 CT_POWERBOOK_INTERNAL,
201 enum radeon_dvo_chip {
206 struct radeon_kernel_fbdev;
208 struct radeon_mode_info {
209 struct atom_context *atom_context;
210 struct card_info *atom_card_info;
211 enum radeon_connector_table connector_table;
212 bool mode_config_initialized;
213 struct radeon_crtc *crtcs[6];
214 /* DVI-I properties */
215 struct drm_property *coherent_mode_property;
216 /* DAC enable load detect */
217 struct drm_property *load_detect_property;
218 /* TV standard load detect */
219 struct drm_property *tv_std_property;
220 /* legacy TMDS PLL detect */
221 struct drm_property *tmds_pll_property;
222 /* hardcoded DFP edid from BIOS */
223 struct edid *bios_hardcoded_edid;
225 /* pointer to fbdev info structure */
226 struct radeon_kernel_fbdev *rfbdev;
229 #define MAX_H_CODE_TIMING_LEN 32
230 #define MAX_V_CODE_TIMING_LEN 32
232 /* need to store these as reading
233 back code tables is excessive */
234 struct radeon_tv_regs {
236 uint32_t timing_cntl;
240 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
241 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
245 struct drm_crtc base;
247 u16 lut_r[256], lut_g[256], lut_b[256];
250 uint32_t crtc_offset;
251 struct drm_gem_object *cursor_bo;
252 uint64_t cursor_addr;
255 uint32_t legacy_display_base_addr;
256 uint32_t legacy_cursor_offset;
257 enum radeon_rmx_type rmx_type;
260 struct drm_display_mode native_mode;
264 struct radeon_encoder_primary_dac {
265 /* legacy primary dac */
266 uint32_t ps2_pdac_adj;
269 struct radeon_encoder_lvds {
271 uint16_t panel_vcc_delay;
272 uint8_t panel_pwr_delay;
273 uint8_t panel_digon_delay;
274 uint8_t panel_blon_delay;
275 uint16_t panel_ref_divider;
276 uint8_t panel_post_divider;
277 uint16_t panel_fb_divider;
278 bool use_bios_dividers;
279 uint32_t lvds_gen_cntl;
281 struct drm_display_mode native_mode;
284 struct radeon_encoder_tv_dac {
286 uint32_t ps2_tvdac_adj;
287 uint32_t ntsc_tvdac_adj;
288 uint32_t pal_tvdac_adj;
293 int supported_tv_stds;
295 enum radeon_tv_std tv_std;
296 struct radeon_tv_regs tv;
299 struct radeon_encoder_int_tmds {
300 /* legacy int tmds */
301 struct radeon_tmds_pll tmds_pll[4];
304 struct radeon_encoder_ext_tmds {
306 struct radeon_i2c_chan *i2c_bus;
308 enum radeon_dvo_chip dvo_chip;
311 /* spread spectrum */
312 struct radeon_atom_ss {
321 struct radeon_encoder_atom_dig {
324 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
327 uint16_t panel_pwr_delay;
328 enum radeon_pll_algo pll_algo;
329 struct radeon_atom_ss *ss;
331 struct drm_display_mode native_mode;
334 struct radeon_encoder_atom_dac {
335 enum radeon_tv_std tv_std;
338 struct radeon_encoder {
339 struct drm_encoder base;
342 uint32_t active_device;
344 uint32_t pixel_clock;
345 enum radeon_rmx_type rmx_type;
346 struct drm_display_mode native_mode;
349 int hdmi_config_offset;
350 int hdmi_audio_workaround;
351 int hdmi_buffer_status;
354 struct radeon_connector_atom_dig {
355 uint32_t igp_lane_info;
358 struct radeon_i2c_chan *dp_i2c_bus;
365 struct radeon_gpio_rec {
383 enum radeon_hpd_id hpd;
385 struct radeon_gpio_rec gpio;
388 struct radeon_connector {
389 struct drm_connector base;
390 uint32_t connector_id;
392 struct radeon_i2c_chan *ddc_bus;
393 /* some systems have a an hdmi and vga port with a shared ddc line */
396 /* we need to mind the EDID between detect
397 and get modes due to analog/digital/tvencoder */
400 bool dac_load_detect;
401 uint16_t connector_object_id;
402 struct radeon_hpd hpd;
405 struct radeon_framebuffer {
406 struct drm_framebuffer base;
407 struct drm_gem_object *obj;
410 extern enum radeon_tv_std
411 radeon_combios_get_tv_info(struct radeon_device *rdev);
412 extern enum radeon_tv_std
413 radeon_atombios_get_tv_info(struct radeon_device *rdev);
415 extern void radeon_connector_hotplug(struct drm_connector *connector);
416 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
417 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
418 struct drm_display_mode *mode);
419 extern void radeon_dp_set_link_config(struct drm_connector *connector,
420 struct drm_display_mode *mode);
421 extern void dp_link_train(struct drm_encoder *encoder,
422 struct drm_connector *connector);
423 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
424 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
425 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
426 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
427 int action, uint8_t lane_num,
429 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
430 uint8_t write_byte, uint8_t *read_byte);
432 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
433 struct radeon_i2c_bus_rec *rec,
435 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
436 struct radeon_i2c_bus_rec *rec,
438 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
439 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
443 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
447 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
448 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
450 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
452 extern void radeon_compute_pll(struct radeon_pll *pll,
454 uint32_t *dot_clock_p,
456 uint32_t *frac_fb_div_p,
458 uint32_t *post_div_p);
460 extern void radeon_setup_encoder_clones(struct drm_device *dev);
462 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
463 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
464 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
465 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
466 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
467 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
468 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
469 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
470 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
472 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
473 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
474 struct drm_framebuffer *old_fb);
475 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
476 struct drm_display_mode *mode,
477 struct drm_display_mode *adjusted_mode,
479 struct drm_framebuffer *old_fb);
480 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
482 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
483 struct drm_framebuffer *old_fb);
485 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
486 struct drm_file *file_priv,
490 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
493 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
495 radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
496 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
497 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
498 extern struct radeon_encoder_atom_dig *
499 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
500 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
501 struct radeon_encoder_int_tmds *tmds);
502 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
503 struct radeon_encoder_int_tmds *tmds);
504 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
505 struct radeon_encoder_int_tmds *tmds);
506 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
507 struct radeon_encoder_ext_tmds *tmds);
508 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
509 struct radeon_encoder_ext_tmds *tmds);
510 extern struct radeon_encoder_primary_dac *
511 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
512 extern struct radeon_encoder_tv_dac *
513 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
514 extern struct radeon_encoder_lvds *
515 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
516 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
517 extern struct radeon_encoder_tv_dac *
518 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
519 extern struct radeon_encoder_primary_dac *
520 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
521 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
522 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
523 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
524 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
525 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
526 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
527 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
528 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
530 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
532 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
534 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
536 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
537 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
538 u16 blue, int regno);
539 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
540 u16 *blue, int regno);
541 void radeon_framebuffer_init(struct drm_device *dev,
542 struct radeon_framebuffer *rfb,
543 struct drm_mode_fb_cmd *mode_cmd,
544 struct drm_gem_object *obj);
546 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
547 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
548 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
549 void radeon_atombios_init_crtc(struct drm_device *dev,
550 struct radeon_crtc *radeon_crtc);
551 void radeon_legacy_init_crtc(struct drm_device *dev,
552 struct radeon_crtc *radeon_crtc);
554 void radeon_get_clock_info(struct drm_device *dev);
556 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
557 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
559 void radeon_enc_destroy(struct drm_encoder *encoder);
560 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
561 void radeon_combios_asic_init(struct drm_device *dev);
562 extern int radeon_static_clocks_init(struct drm_device *dev);
563 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
564 struct drm_display_mode *mode,
565 struct drm_display_mode *adjusted_mode);
566 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
569 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
570 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
571 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
572 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
573 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
574 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
575 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
576 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
577 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
578 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
579 struct drm_display_mode *mode,
580 struct drm_display_mode *adjusted_mode);
583 int radeon_fbdev_init(struct radeon_device *rdev);
584 void radeon_fbdev_fini(struct radeon_device *rdev);
585 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
586 int radeon_fbdev_total_size(struct radeon_device *rdev);
587 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
588 void radeonfb_hotplug(struct drm_device *dev);