2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <linux/perf_event.h>
44 #include <trace/events/kvm.h>
46 #define CREATE_TRACE_POINTS
49 #include <asm/debugreg.h>
50 #include <asm/uaccess.h>
56 #define MAX_IO_MSRS 256
57 #define CR0_RESERVED_BITS \
58 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
59 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
60 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
61 #define CR4_RESERVED_BITS \
62 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
63 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
64 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
65 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
67 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
77 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
79 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
87 struct kvm_cpuid_entry2 __user *entries);
89 struct kvm_x86_ops *kvm_x86_ops;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
95 #define KVM_NR_SHARED_MSRS 16
97 struct kvm_shared_msrs_global {
99 u32 msrs[KVM_NR_SHARED_MSRS];
102 struct kvm_shared_msrs {
103 struct user_return_notifier urn;
105 struct kvm_shared_msr_values {
108 } values[KVM_NR_SHARED_MSRS];
111 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
112 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
114 struct kvm_stats_debugfs_item debugfs_entries[] = {
115 { "pf_fixed", VCPU_STAT(pf_fixed) },
116 { "pf_guest", VCPU_STAT(pf_guest) },
117 { "tlb_flush", VCPU_STAT(tlb_flush) },
118 { "invlpg", VCPU_STAT(invlpg) },
119 { "exits", VCPU_STAT(exits) },
120 { "io_exits", VCPU_STAT(io_exits) },
121 { "mmio_exits", VCPU_STAT(mmio_exits) },
122 { "signal_exits", VCPU_STAT(signal_exits) },
123 { "irq_window", VCPU_STAT(irq_window_exits) },
124 { "nmi_window", VCPU_STAT(nmi_window_exits) },
125 { "halt_exits", VCPU_STAT(halt_exits) },
126 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
127 { "hypercalls", VCPU_STAT(hypercalls) },
128 { "request_irq", VCPU_STAT(request_irq_exits) },
129 { "irq_exits", VCPU_STAT(irq_exits) },
130 { "host_state_reload", VCPU_STAT(host_state_reload) },
131 { "efer_reload", VCPU_STAT(efer_reload) },
132 { "fpu_reload", VCPU_STAT(fpu_reload) },
133 { "insn_emulation", VCPU_STAT(insn_emulation) },
134 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
135 { "irq_injections", VCPU_STAT(irq_injections) },
136 { "nmi_injections", VCPU_STAT(nmi_injections) },
137 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
138 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
139 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
140 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
141 { "mmu_flooded", VM_STAT(mmu_flooded) },
142 { "mmu_recycled", VM_STAT(mmu_recycled) },
143 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
144 { "mmu_unsync", VM_STAT(mmu_unsync) },
145 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
146 { "largepages", VM_STAT(lpages) },
150 static void kvm_on_user_return(struct user_return_notifier *urn)
153 struct kvm_shared_msrs *locals
154 = container_of(urn, struct kvm_shared_msrs, urn);
155 struct kvm_shared_msr_values *values;
157 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
158 values = &locals->values[slot];
159 if (values->host != values->curr) {
160 wrmsrl(shared_msrs_global.msrs[slot], values->host);
161 values->curr = values->host;
164 locals->registered = false;
165 user_return_notifier_unregister(urn);
168 static void shared_msr_update(unsigned slot, u32 msr)
170 struct kvm_shared_msrs *smsr;
173 smsr = &__get_cpu_var(shared_msrs);
174 /* only read, and nobody should modify it at this time,
175 * so don't need lock */
176 if (slot >= shared_msrs_global.nr) {
177 printk(KERN_ERR "kvm: invalid MSR slot!");
180 rdmsrl_safe(msr, &value);
181 smsr->values[slot].host = value;
182 smsr->values[slot].curr = value;
185 void kvm_define_shared_msr(unsigned slot, u32 msr)
187 if (slot >= shared_msrs_global.nr)
188 shared_msrs_global.nr = slot + 1;
189 shared_msrs_global.msrs[slot] = msr;
190 /* we need ensured the shared_msr_global have been updated */
193 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
195 static void kvm_shared_msr_cpu_online(void)
199 for (i = 0; i < shared_msrs_global.nr; ++i)
200 shared_msr_update(i, shared_msrs_global.msrs[i]);
203 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
205 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
207 if (((value ^ smsr->values[slot].curr) & mask) == 0)
209 smsr->values[slot].curr = value;
210 wrmsrl(shared_msrs_global.msrs[slot], value);
211 if (!smsr->registered) {
212 smsr->urn.on_user_return = kvm_on_user_return;
213 user_return_notifier_register(&smsr->urn);
214 smsr->registered = true;
217 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
219 static void drop_user_return_notifiers(void *ignore)
221 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
223 if (smsr->registered)
224 kvm_on_user_return(&smsr->urn);
227 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
229 if (irqchip_in_kernel(vcpu->kvm))
230 return vcpu->arch.apic_base;
232 return vcpu->arch.apic_base;
234 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
236 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
238 /* TODO: reserve bits check */
239 if (irqchip_in_kernel(vcpu->kvm))
240 kvm_lapic_set_base(vcpu, data);
242 vcpu->arch.apic_base = data;
244 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
246 #define EXCPT_BENIGN 0
247 #define EXCPT_CONTRIBUTORY 1
250 static int exception_class(int vector)
260 return EXCPT_CONTRIBUTORY;
267 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
268 unsigned nr, bool has_error, u32 error_code)
273 if (!vcpu->arch.exception.pending) {
275 vcpu->arch.exception.pending = true;
276 vcpu->arch.exception.has_error_code = has_error;
277 vcpu->arch.exception.nr = nr;
278 vcpu->arch.exception.error_code = error_code;
282 /* to check exception */
283 prev_nr = vcpu->arch.exception.nr;
284 if (prev_nr == DF_VECTOR) {
285 /* triple fault -> shutdown */
286 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
289 class1 = exception_class(prev_nr);
290 class2 = exception_class(nr);
291 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
292 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
293 /* generate double fault per SDM Table 5-5 */
294 vcpu->arch.exception.pending = true;
295 vcpu->arch.exception.has_error_code = true;
296 vcpu->arch.exception.nr = DF_VECTOR;
297 vcpu->arch.exception.error_code = 0;
299 /* replace previous exception with a new one in a hope
300 that instruction re-execution will regenerate lost
305 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
307 kvm_multiple_exception(vcpu, nr, false, 0);
309 EXPORT_SYMBOL_GPL(kvm_queue_exception);
311 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
314 ++vcpu->stat.pf_guest;
315 vcpu->arch.cr2 = addr;
316 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
319 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
321 vcpu->arch.nmi_pending = 1;
323 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
325 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
327 kvm_multiple_exception(vcpu, nr, true, error_code);
329 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
332 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
333 * a #GP and return false.
335 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
337 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
339 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
342 EXPORT_SYMBOL_GPL(kvm_require_cpl);
345 * Load the pae pdptrs. Return true is they are all valid.
347 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
349 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
350 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
353 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
355 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
356 offset * sizeof(u64), sizeof(pdpte));
361 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
362 if (is_present_gpte(pdpte[i]) &&
363 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
370 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
371 __set_bit(VCPU_EXREG_PDPTR,
372 (unsigned long *)&vcpu->arch.regs_avail);
373 __set_bit(VCPU_EXREG_PDPTR,
374 (unsigned long *)&vcpu->arch.regs_dirty);
379 EXPORT_SYMBOL_GPL(load_pdptrs);
381 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
383 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
387 if (is_long_mode(vcpu) || !is_pae(vcpu))
390 if (!test_bit(VCPU_EXREG_PDPTR,
391 (unsigned long *)&vcpu->arch.regs_avail))
394 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
397 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
403 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
408 if (cr0 & 0xffffffff00000000UL) {
409 kvm_inject_gp(vcpu, 0);
414 cr0 &= ~CR0_RESERVED_BITS;
416 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
417 kvm_inject_gp(vcpu, 0);
421 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
422 kvm_inject_gp(vcpu, 0);
426 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
428 if ((vcpu->arch.efer & EFER_LME)) {
432 kvm_inject_gp(vcpu, 0);
435 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
437 kvm_inject_gp(vcpu, 0);
443 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
444 kvm_inject_gp(vcpu, 0);
450 kvm_x86_ops->set_cr0(vcpu, cr0);
452 kvm_mmu_reset_context(vcpu);
455 EXPORT_SYMBOL_GPL(kvm_set_cr0);
457 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
459 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f));
461 EXPORT_SYMBOL_GPL(kvm_lmsw);
463 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
465 unsigned long old_cr4 = kvm_read_cr4(vcpu);
466 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
468 if (cr4 & CR4_RESERVED_BITS) {
469 kvm_inject_gp(vcpu, 0);
473 if (is_long_mode(vcpu)) {
474 if (!(cr4 & X86_CR4_PAE)) {
475 kvm_inject_gp(vcpu, 0);
478 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
479 && ((cr4 ^ old_cr4) & pdptr_bits)
480 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
481 kvm_inject_gp(vcpu, 0);
485 if (cr4 & X86_CR4_VMXE) {
486 kvm_inject_gp(vcpu, 0);
489 kvm_x86_ops->set_cr4(vcpu, cr4);
490 vcpu->arch.cr4 = cr4;
491 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
492 kvm_mmu_reset_context(vcpu);
494 EXPORT_SYMBOL_GPL(kvm_set_cr4);
496 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
498 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
499 kvm_mmu_sync_roots(vcpu);
500 kvm_mmu_flush_tlb(vcpu);
504 if (is_long_mode(vcpu)) {
505 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
506 kvm_inject_gp(vcpu, 0);
511 if (cr3 & CR3_PAE_RESERVED_BITS) {
512 kvm_inject_gp(vcpu, 0);
515 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
516 kvm_inject_gp(vcpu, 0);
521 * We don't check reserved bits in nonpae mode, because
522 * this isn't enforced, and VMware depends on this.
527 * Does the new cr3 value map to physical memory? (Note, we
528 * catch an invalid cr3 even in real-mode, because it would
529 * cause trouble later on when we turn on paging anyway.)
531 * A real CPU would silently accept an invalid cr3 and would
532 * attempt to use it - with largely undefined (and often hard
533 * to debug) behavior on the guest side.
535 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
536 kvm_inject_gp(vcpu, 0);
538 vcpu->arch.cr3 = cr3;
539 vcpu->arch.mmu.new_cr3(vcpu);
542 EXPORT_SYMBOL_GPL(kvm_set_cr3);
544 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
546 if (cr8 & CR8_RESERVED_BITS) {
547 kvm_inject_gp(vcpu, 0);
550 if (irqchip_in_kernel(vcpu->kvm))
551 kvm_lapic_set_tpr(vcpu, cr8);
553 vcpu->arch.cr8 = cr8;
555 EXPORT_SYMBOL_GPL(kvm_set_cr8);
557 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
559 if (irqchip_in_kernel(vcpu->kvm))
560 return kvm_lapic_get_cr8(vcpu);
562 return vcpu->arch.cr8;
564 EXPORT_SYMBOL_GPL(kvm_get_cr8);
566 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
570 vcpu->arch.db[dr] = val;
571 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
572 vcpu->arch.eff_db[dr] = val;
575 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
576 kvm_queue_exception(vcpu, UD_VECTOR);
581 if (val & 0xffffffff00000000ULL) {
582 kvm_inject_gp(vcpu, 0);
585 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
588 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
589 kvm_queue_exception(vcpu, UD_VECTOR);
594 if (val & 0xffffffff00000000ULL) {
595 kvm_inject_gp(vcpu, 0);
598 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
599 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
600 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
601 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
608 EXPORT_SYMBOL_GPL(kvm_set_dr);
610 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
614 *val = vcpu->arch.db[dr];
617 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
618 kvm_queue_exception(vcpu, UD_VECTOR);
623 *val = vcpu->arch.dr6;
626 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
627 kvm_queue_exception(vcpu, UD_VECTOR);
632 *val = vcpu->arch.dr7;
638 EXPORT_SYMBOL_GPL(kvm_get_dr);
640 static inline u32 bit(int bitno)
642 return 1 << (bitno & 31);
646 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
647 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
649 * This list is modified at module load time to reflect the
650 * capabilities of the host cpu. This capabilities test skips MSRs that are
651 * kvm-specific. Those are put in the beginning of the list.
654 #define KVM_SAVE_MSRS_BEGIN 5
655 static u32 msrs_to_save[] = {
656 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
657 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
658 HV_X64_MSR_APIC_ASSIST_PAGE,
659 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
662 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
664 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
667 static unsigned num_msrs_to_save;
669 static u32 emulated_msrs[] = {
670 MSR_IA32_MISC_ENABLE,
673 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
675 if (efer & efer_reserved_bits) {
676 kvm_inject_gp(vcpu, 0);
681 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) {
682 kvm_inject_gp(vcpu, 0);
686 if (efer & EFER_FFXSR) {
687 struct kvm_cpuid_entry2 *feat;
689 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
690 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
691 kvm_inject_gp(vcpu, 0);
696 if (efer & EFER_SVME) {
697 struct kvm_cpuid_entry2 *feat;
699 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
700 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
701 kvm_inject_gp(vcpu, 0);
706 kvm_x86_ops->set_efer(vcpu, efer);
709 efer |= vcpu->arch.efer & EFER_LMA;
711 vcpu->arch.efer = efer;
713 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
714 kvm_mmu_reset_context(vcpu);
717 void kvm_enable_efer_bits(u64 mask)
719 efer_reserved_bits &= ~mask;
721 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
725 * Writes msr value into into the appropriate "register".
726 * Returns 0 on success, non-0 otherwise.
727 * Assumes vcpu_load() was already called.
729 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
731 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
735 * Adapt set_msr() to msr_io()'s calling convention
737 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
739 return kvm_set_msr(vcpu, index, *data);
742 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
745 struct pvclock_wall_clock wc;
746 struct timespec boot;
753 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
756 * The guest calculates current wall clock time by adding
757 * system time (updated by kvm_write_guest_time below) to the
758 * wall clock specified here. guest system time equals host
759 * system time for us, thus we must fill in host boot time here.
763 wc.sec = boot.tv_sec;
764 wc.nsec = boot.tv_nsec;
765 wc.version = version;
767 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
770 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
773 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
775 uint32_t quotient, remainder;
777 /* Don't try to replace with do_div(), this one calculates
778 * "(dividend << 32) / divisor" */
780 : "=a" (quotient), "=d" (remainder)
781 : "0" (0), "1" (dividend), "r" (divisor) );
785 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
787 uint64_t nsecs = 1000000000LL;
792 tps64 = tsc_khz * 1000LL;
793 while (tps64 > nsecs*2) {
798 tps32 = (uint32_t)tps64;
799 while (tps32 <= (uint32_t)nsecs) {
804 hv_clock->tsc_shift = shift;
805 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
807 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
808 __func__, tsc_khz, hv_clock->tsc_shift,
809 hv_clock->tsc_to_system_mul);
812 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
814 static void kvm_write_guest_time(struct kvm_vcpu *v)
818 struct kvm_vcpu_arch *vcpu = &v->arch;
820 unsigned long this_tsc_khz;
822 if ((!vcpu->time_page))
825 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
826 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
827 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
828 vcpu->hv_clock_tsc_khz = this_tsc_khz;
830 put_cpu_var(cpu_tsc_khz);
832 /* Keep irq disabled to prevent changes to the clock */
833 local_irq_save(flags);
834 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
836 monotonic_to_bootbased(&ts);
837 local_irq_restore(flags);
839 /* With all the info we got, fill in the values */
841 vcpu->hv_clock.system_time = ts.tv_nsec +
842 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
845 * The interface expects us to write an even number signaling that the
846 * update is finished. Since the guest won't see the intermediate
847 * state, we just increase by 2 at the end.
849 vcpu->hv_clock.version += 2;
851 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
853 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
854 sizeof(vcpu->hv_clock));
856 kunmap_atomic(shared_kaddr, KM_USER0);
858 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
861 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
863 struct kvm_vcpu_arch *vcpu = &v->arch;
865 if (!vcpu->time_page)
867 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
871 static bool msr_mtrr_valid(unsigned msr)
874 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
875 case MSR_MTRRfix64K_00000:
876 case MSR_MTRRfix16K_80000:
877 case MSR_MTRRfix16K_A0000:
878 case MSR_MTRRfix4K_C0000:
879 case MSR_MTRRfix4K_C8000:
880 case MSR_MTRRfix4K_D0000:
881 case MSR_MTRRfix4K_D8000:
882 case MSR_MTRRfix4K_E0000:
883 case MSR_MTRRfix4K_E8000:
884 case MSR_MTRRfix4K_F0000:
885 case MSR_MTRRfix4K_F8000:
886 case MSR_MTRRdefType:
887 case MSR_IA32_CR_PAT:
895 static bool valid_pat_type(unsigned t)
897 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
900 static bool valid_mtrr_type(unsigned t)
902 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
905 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
909 if (!msr_mtrr_valid(msr))
912 if (msr == MSR_IA32_CR_PAT) {
913 for (i = 0; i < 8; i++)
914 if (!valid_pat_type((data >> (i * 8)) & 0xff))
917 } else if (msr == MSR_MTRRdefType) {
920 return valid_mtrr_type(data & 0xff);
921 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
922 for (i = 0; i < 8 ; i++)
923 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
929 return valid_mtrr_type(data & 0xff);
932 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
934 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
936 if (!mtrr_valid(vcpu, msr, data))
939 if (msr == MSR_MTRRdefType) {
940 vcpu->arch.mtrr_state.def_type = data;
941 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
942 } else if (msr == MSR_MTRRfix64K_00000)
944 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
945 p[1 + msr - MSR_MTRRfix16K_80000] = data;
946 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
947 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
948 else if (msr == MSR_IA32_CR_PAT)
949 vcpu->arch.pat = data;
950 else { /* Variable MTRRs */
951 int idx, is_mtrr_mask;
954 idx = (msr - 0x200) / 2;
955 is_mtrr_mask = msr - 0x200 - 2 * idx;
958 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
961 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
965 kvm_mmu_reset_context(vcpu);
969 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
971 u64 mcg_cap = vcpu->arch.mcg_cap;
972 unsigned bank_num = mcg_cap & 0xff;
975 case MSR_IA32_MCG_STATUS:
976 vcpu->arch.mcg_status = data;
978 case MSR_IA32_MCG_CTL:
979 if (!(mcg_cap & MCG_CTL_P))
981 if (data != 0 && data != ~(u64)0)
983 vcpu->arch.mcg_ctl = data;
986 if (msr >= MSR_IA32_MC0_CTL &&
987 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
988 u32 offset = msr - MSR_IA32_MC0_CTL;
989 /* only 0 or all 1s can be written to IA32_MCi_CTL
990 * some Linux kernels though clear bit 10 in bank 4 to
991 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
992 * this to avoid an uncatched #GP in the guest
994 if ((offset & 0x3) == 0 &&
995 data != 0 && (data | (1 << 10)) != ~(u64)0)
997 vcpu->arch.mce_banks[offset] = data;
1005 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1007 struct kvm *kvm = vcpu->kvm;
1008 int lm = is_long_mode(vcpu);
1009 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1010 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1011 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1012 : kvm->arch.xen_hvm_config.blob_size_32;
1013 u32 page_num = data & ~PAGE_MASK;
1014 u64 page_addr = data & PAGE_MASK;
1019 if (page_num >= blob_size)
1022 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1026 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1028 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1037 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1039 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1042 static bool kvm_hv_msr_partition_wide(u32 msr)
1046 case HV_X64_MSR_GUEST_OS_ID:
1047 case HV_X64_MSR_HYPERCALL:
1055 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1057 struct kvm *kvm = vcpu->kvm;
1060 case HV_X64_MSR_GUEST_OS_ID:
1061 kvm->arch.hv_guest_os_id = data;
1062 /* setting guest os id to zero disables hypercall page */
1063 if (!kvm->arch.hv_guest_os_id)
1064 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1066 case HV_X64_MSR_HYPERCALL: {
1071 /* if guest os id is not set hypercall should remain disabled */
1072 if (!kvm->arch.hv_guest_os_id)
1074 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1075 kvm->arch.hv_hypercall = data;
1078 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1079 addr = gfn_to_hva(kvm, gfn);
1080 if (kvm_is_error_hva(addr))
1082 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1083 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1084 if (copy_to_user((void __user *)addr, instructions, 4))
1086 kvm->arch.hv_hypercall = data;
1090 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1091 "data 0x%llx\n", msr, data);
1097 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1100 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1103 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1104 vcpu->arch.hv_vapic = data;
1107 addr = gfn_to_hva(vcpu->kvm, data >>
1108 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1109 if (kvm_is_error_hva(addr))
1111 if (clear_user((void __user *)addr, PAGE_SIZE))
1113 vcpu->arch.hv_vapic = data;
1116 case HV_X64_MSR_EOI:
1117 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1118 case HV_X64_MSR_ICR:
1119 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1120 case HV_X64_MSR_TPR:
1121 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1123 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1124 "data 0x%llx\n", msr, data);
1131 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1135 set_efer(vcpu, data);
1138 data &= ~(u64)0x40; /* ignore flush filter disable */
1139 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1141 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1146 case MSR_FAM10H_MMIO_CONF_BASE:
1148 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1153 case MSR_AMD64_NB_CFG:
1155 case MSR_IA32_DEBUGCTLMSR:
1157 /* We support the non-activated case already */
1159 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1160 /* Values other than LBR and BTF are vendor-specific,
1161 thus reserved and should throw a #GP */
1164 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1167 case MSR_IA32_UCODE_REV:
1168 case MSR_IA32_UCODE_WRITE:
1169 case MSR_VM_HSAVE_PA:
1170 case MSR_AMD64_PATCH_LOADER:
1172 case 0x200 ... 0x2ff:
1173 return set_msr_mtrr(vcpu, msr, data);
1174 case MSR_IA32_APICBASE:
1175 kvm_set_apic_base(vcpu, data);
1177 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1178 return kvm_x2apic_msr_write(vcpu, msr, data);
1179 case MSR_IA32_MISC_ENABLE:
1180 vcpu->arch.ia32_misc_enable_msr = data;
1182 case MSR_KVM_WALL_CLOCK:
1183 vcpu->kvm->arch.wall_clock = data;
1184 kvm_write_wall_clock(vcpu->kvm, data);
1186 case MSR_KVM_SYSTEM_TIME: {
1187 if (vcpu->arch.time_page) {
1188 kvm_release_page_dirty(vcpu->arch.time_page);
1189 vcpu->arch.time_page = NULL;
1192 vcpu->arch.time = data;
1194 /* we verify if the enable bit is set... */
1198 /* ...but clean it before doing the actual write */
1199 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1201 vcpu->arch.time_page =
1202 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1204 if (is_error_page(vcpu->arch.time_page)) {
1205 kvm_release_page_clean(vcpu->arch.time_page);
1206 vcpu->arch.time_page = NULL;
1209 kvm_request_guest_time_update(vcpu);
1212 case MSR_IA32_MCG_CTL:
1213 case MSR_IA32_MCG_STATUS:
1214 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1215 return set_msr_mce(vcpu, msr, data);
1217 /* Performance counters are not protected by a CPUID bit,
1218 * so we should check all of them in the generic path for the sake of
1219 * cross vendor migration.
1220 * Writing a zero into the event select MSRs disables them,
1221 * which we perfectly emulate ;-). Any other value should be at least
1222 * reported, some guests depend on them.
1224 case MSR_P6_EVNTSEL0:
1225 case MSR_P6_EVNTSEL1:
1226 case MSR_K7_EVNTSEL0:
1227 case MSR_K7_EVNTSEL1:
1228 case MSR_K7_EVNTSEL2:
1229 case MSR_K7_EVNTSEL3:
1231 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1232 "0x%x data 0x%llx\n", msr, data);
1234 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1235 * so we ignore writes to make it happy.
1237 case MSR_P6_PERFCTR0:
1238 case MSR_P6_PERFCTR1:
1239 case MSR_K7_PERFCTR0:
1240 case MSR_K7_PERFCTR1:
1241 case MSR_K7_PERFCTR2:
1242 case MSR_K7_PERFCTR3:
1243 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1244 "0x%x data 0x%llx\n", msr, data);
1246 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1247 if (kvm_hv_msr_partition_wide(msr)) {
1249 mutex_lock(&vcpu->kvm->lock);
1250 r = set_msr_hyperv_pw(vcpu, msr, data);
1251 mutex_unlock(&vcpu->kvm->lock);
1254 return set_msr_hyperv(vcpu, msr, data);
1257 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1258 return xen_hvm_config(vcpu, data);
1260 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1264 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1271 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1275 * Reads an msr value (of 'msr_index') into 'pdata'.
1276 * Returns 0 on success, non-0 otherwise.
1277 * Assumes vcpu_load() was already called.
1279 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1281 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1284 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1286 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1288 if (!msr_mtrr_valid(msr))
1291 if (msr == MSR_MTRRdefType)
1292 *pdata = vcpu->arch.mtrr_state.def_type +
1293 (vcpu->arch.mtrr_state.enabled << 10);
1294 else if (msr == MSR_MTRRfix64K_00000)
1296 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1297 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1298 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1299 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1300 else if (msr == MSR_IA32_CR_PAT)
1301 *pdata = vcpu->arch.pat;
1302 else { /* Variable MTRRs */
1303 int idx, is_mtrr_mask;
1306 idx = (msr - 0x200) / 2;
1307 is_mtrr_mask = msr - 0x200 - 2 * idx;
1310 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1313 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1320 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1323 u64 mcg_cap = vcpu->arch.mcg_cap;
1324 unsigned bank_num = mcg_cap & 0xff;
1327 case MSR_IA32_P5_MC_ADDR:
1328 case MSR_IA32_P5_MC_TYPE:
1331 case MSR_IA32_MCG_CAP:
1332 data = vcpu->arch.mcg_cap;
1334 case MSR_IA32_MCG_CTL:
1335 if (!(mcg_cap & MCG_CTL_P))
1337 data = vcpu->arch.mcg_ctl;
1339 case MSR_IA32_MCG_STATUS:
1340 data = vcpu->arch.mcg_status;
1343 if (msr >= MSR_IA32_MC0_CTL &&
1344 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1345 u32 offset = msr - MSR_IA32_MC0_CTL;
1346 data = vcpu->arch.mce_banks[offset];
1355 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1358 struct kvm *kvm = vcpu->kvm;
1361 case HV_X64_MSR_GUEST_OS_ID:
1362 data = kvm->arch.hv_guest_os_id;
1364 case HV_X64_MSR_HYPERCALL:
1365 data = kvm->arch.hv_hypercall;
1368 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1376 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1381 case HV_X64_MSR_VP_INDEX: {
1384 kvm_for_each_vcpu(r, v, vcpu->kvm)
1389 case HV_X64_MSR_EOI:
1390 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1391 case HV_X64_MSR_ICR:
1392 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1393 case HV_X64_MSR_TPR:
1394 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1396 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1403 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1408 case MSR_IA32_PLATFORM_ID:
1409 case MSR_IA32_UCODE_REV:
1410 case MSR_IA32_EBL_CR_POWERON:
1411 case MSR_IA32_DEBUGCTLMSR:
1412 case MSR_IA32_LASTBRANCHFROMIP:
1413 case MSR_IA32_LASTBRANCHTOIP:
1414 case MSR_IA32_LASTINTFROMIP:
1415 case MSR_IA32_LASTINTTOIP:
1418 case MSR_VM_HSAVE_PA:
1419 case MSR_P6_PERFCTR0:
1420 case MSR_P6_PERFCTR1:
1421 case MSR_P6_EVNTSEL0:
1422 case MSR_P6_EVNTSEL1:
1423 case MSR_K7_EVNTSEL0:
1424 case MSR_K7_PERFCTR0:
1425 case MSR_K8_INT_PENDING_MSG:
1426 case MSR_AMD64_NB_CFG:
1427 case MSR_FAM10H_MMIO_CONF_BASE:
1431 data = 0x500 | KVM_NR_VAR_MTRR;
1433 case 0x200 ... 0x2ff:
1434 return get_msr_mtrr(vcpu, msr, pdata);
1435 case 0xcd: /* fsb frequency */
1438 case MSR_IA32_APICBASE:
1439 data = kvm_get_apic_base(vcpu);
1441 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1442 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1444 case MSR_IA32_MISC_ENABLE:
1445 data = vcpu->arch.ia32_misc_enable_msr;
1447 case MSR_IA32_PERF_STATUS:
1448 /* TSC increment by tick */
1450 /* CPU multiplier */
1451 data |= (((uint64_t)4ULL) << 40);
1454 data = vcpu->arch.efer;
1456 case MSR_KVM_WALL_CLOCK:
1457 data = vcpu->kvm->arch.wall_clock;
1459 case MSR_KVM_SYSTEM_TIME:
1460 data = vcpu->arch.time;
1462 case MSR_IA32_P5_MC_ADDR:
1463 case MSR_IA32_P5_MC_TYPE:
1464 case MSR_IA32_MCG_CAP:
1465 case MSR_IA32_MCG_CTL:
1466 case MSR_IA32_MCG_STATUS:
1467 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1468 return get_msr_mce(vcpu, msr, pdata);
1469 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1470 if (kvm_hv_msr_partition_wide(msr)) {
1472 mutex_lock(&vcpu->kvm->lock);
1473 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1474 mutex_unlock(&vcpu->kvm->lock);
1477 return get_msr_hyperv(vcpu, msr, pdata);
1481 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1484 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1492 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1495 * Read or write a bunch of msrs. All parameters are kernel addresses.
1497 * @return number of msrs set successfully.
1499 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1500 struct kvm_msr_entry *entries,
1501 int (*do_msr)(struct kvm_vcpu *vcpu,
1502 unsigned index, u64 *data))
1508 idx = srcu_read_lock(&vcpu->kvm->srcu);
1509 for (i = 0; i < msrs->nmsrs; ++i)
1510 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1512 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1520 * Read or write a bunch of msrs. Parameters are user addresses.
1522 * @return number of msrs set successfully.
1524 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1525 int (*do_msr)(struct kvm_vcpu *vcpu,
1526 unsigned index, u64 *data),
1529 struct kvm_msrs msrs;
1530 struct kvm_msr_entry *entries;
1535 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1539 if (msrs.nmsrs >= MAX_IO_MSRS)
1543 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1544 entries = vmalloc(size);
1549 if (copy_from_user(entries, user_msrs->entries, size))
1552 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1557 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1568 int kvm_dev_ioctl_check_extension(long ext)
1573 case KVM_CAP_IRQCHIP:
1575 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1576 case KVM_CAP_SET_TSS_ADDR:
1577 case KVM_CAP_EXT_CPUID:
1578 case KVM_CAP_CLOCKSOURCE:
1580 case KVM_CAP_NOP_IO_DELAY:
1581 case KVM_CAP_MP_STATE:
1582 case KVM_CAP_SYNC_MMU:
1583 case KVM_CAP_REINJECT_CONTROL:
1584 case KVM_CAP_IRQ_INJECT_STATUS:
1585 case KVM_CAP_ASSIGN_DEV_IRQ:
1587 case KVM_CAP_IOEVENTFD:
1589 case KVM_CAP_PIT_STATE2:
1590 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1591 case KVM_CAP_XEN_HVM:
1592 case KVM_CAP_ADJUST_CLOCK:
1593 case KVM_CAP_VCPU_EVENTS:
1594 case KVM_CAP_HYPERV:
1595 case KVM_CAP_HYPERV_VAPIC:
1596 case KVM_CAP_HYPERV_SPIN:
1597 case KVM_CAP_PCI_SEGMENT:
1598 case KVM_CAP_DEBUGREGS:
1599 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1602 case KVM_CAP_COALESCED_MMIO:
1603 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1606 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1608 case KVM_CAP_NR_VCPUS:
1611 case KVM_CAP_NR_MEMSLOTS:
1612 r = KVM_MEMORY_SLOTS;
1614 case KVM_CAP_PV_MMU: /* obsolete */
1621 r = KVM_MAX_MCE_BANKS;
1631 long kvm_arch_dev_ioctl(struct file *filp,
1632 unsigned int ioctl, unsigned long arg)
1634 void __user *argp = (void __user *)arg;
1638 case KVM_GET_MSR_INDEX_LIST: {
1639 struct kvm_msr_list __user *user_msr_list = argp;
1640 struct kvm_msr_list msr_list;
1644 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1647 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1648 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1651 if (n < msr_list.nmsrs)
1654 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1655 num_msrs_to_save * sizeof(u32)))
1657 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1659 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1664 case KVM_GET_SUPPORTED_CPUID: {
1665 struct kvm_cpuid2 __user *cpuid_arg = argp;
1666 struct kvm_cpuid2 cpuid;
1669 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1671 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1672 cpuid_arg->entries);
1677 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1682 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1685 mce_cap = KVM_MCE_CAP_SUPPORTED;
1687 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1699 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1701 kvm_x86_ops->vcpu_load(vcpu, cpu);
1702 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1703 unsigned long khz = cpufreq_quick_get(cpu);
1706 per_cpu(cpu_tsc_khz, cpu) = khz;
1708 kvm_request_guest_time_update(vcpu);
1711 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1713 kvm_put_guest_fpu(vcpu);
1714 kvm_x86_ops->vcpu_put(vcpu);
1717 static int is_efer_nx(void)
1719 unsigned long long efer = 0;
1721 rdmsrl_safe(MSR_EFER, &efer);
1722 return efer & EFER_NX;
1725 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1728 struct kvm_cpuid_entry2 *e, *entry;
1731 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1732 e = &vcpu->arch.cpuid_entries[i];
1733 if (e->function == 0x80000001) {
1738 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1739 entry->edx &= ~(1 << 20);
1740 printk(KERN_INFO "kvm: guest NX capability removed\n");
1744 /* when an old userspace process fills a new kernel module */
1745 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1746 struct kvm_cpuid *cpuid,
1747 struct kvm_cpuid_entry __user *entries)
1750 struct kvm_cpuid_entry *cpuid_entries;
1753 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1756 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1760 if (copy_from_user(cpuid_entries, entries,
1761 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1763 for (i = 0; i < cpuid->nent; i++) {
1764 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1765 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1766 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1767 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1768 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1769 vcpu->arch.cpuid_entries[i].index = 0;
1770 vcpu->arch.cpuid_entries[i].flags = 0;
1771 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1772 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1773 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1775 vcpu->arch.cpuid_nent = cpuid->nent;
1776 cpuid_fix_nx_cap(vcpu);
1778 kvm_apic_set_version(vcpu);
1779 kvm_x86_ops->cpuid_update(vcpu);
1782 vfree(cpuid_entries);
1787 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1788 struct kvm_cpuid2 *cpuid,
1789 struct kvm_cpuid_entry2 __user *entries)
1794 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1797 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1798 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1800 vcpu->arch.cpuid_nent = cpuid->nent;
1801 kvm_apic_set_version(vcpu);
1802 kvm_x86_ops->cpuid_update(vcpu);
1809 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1810 struct kvm_cpuid2 *cpuid,
1811 struct kvm_cpuid_entry2 __user *entries)
1816 if (cpuid->nent < vcpu->arch.cpuid_nent)
1819 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1820 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1825 cpuid->nent = vcpu->arch.cpuid_nent;
1829 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1832 entry->function = function;
1833 entry->index = index;
1834 cpuid_count(entry->function, entry->index,
1835 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1839 #define F(x) bit(X86_FEATURE_##x)
1841 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1842 u32 index, int *nent, int maxnent)
1844 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1845 #ifdef CONFIG_X86_64
1846 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1848 unsigned f_lm = F(LM);
1850 unsigned f_gbpages = 0;
1853 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1856 const u32 kvm_supported_word0_x86_features =
1857 F(FPU) | F(VME) | F(DE) | F(PSE) |
1858 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1859 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1860 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1861 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1862 0 /* Reserved, DS, ACPI */ | F(MMX) |
1863 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1864 0 /* HTT, TM, Reserved, PBE */;
1865 /* cpuid 0x80000001.edx */
1866 const u32 kvm_supported_word1_x86_features =
1867 F(FPU) | F(VME) | F(DE) | F(PSE) |
1868 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1869 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1870 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1871 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1872 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1873 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1874 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1876 const u32 kvm_supported_word4_x86_features =
1877 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1878 0 /* DS-CPL, VMX, SMX, EST */ |
1879 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1880 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1881 0 /* Reserved, DCA */ | F(XMM4_1) |
1882 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1883 0 /* Reserved, XSAVE, OSXSAVE */;
1884 /* cpuid 0x80000001.ecx */
1885 const u32 kvm_supported_word6_x86_features =
1886 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1887 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1888 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1889 0 /* SKINIT */ | 0 /* WDT */;
1891 /* all calls to cpuid_count() should be made on the same cpu */
1893 do_cpuid_1_ent(entry, function, index);
1898 entry->eax = min(entry->eax, (u32)0xb);
1901 entry->edx &= kvm_supported_word0_x86_features;
1902 entry->ecx &= kvm_supported_word4_x86_features;
1903 /* we support x2apic emulation even if host does not support
1904 * it since we emulate x2apic in software */
1905 entry->ecx |= F(X2APIC);
1907 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1908 * may return different values. This forces us to get_cpu() before
1909 * issuing the first command, and also to emulate this annoying behavior
1910 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1912 int t, times = entry->eax & 0xff;
1914 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1915 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1916 for (t = 1; t < times && *nent < maxnent; ++t) {
1917 do_cpuid_1_ent(&entry[t], function, 0);
1918 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1923 /* function 4 and 0xb have additional index. */
1927 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1928 /* read more entries until cache_type is zero */
1929 for (i = 1; *nent < maxnent; ++i) {
1930 cache_type = entry[i - 1].eax & 0x1f;
1933 do_cpuid_1_ent(&entry[i], function, i);
1935 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1943 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1944 /* read more entries until level_type is zero */
1945 for (i = 1; *nent < maxnent; ++i) {
1946 level_type = entry[i - 1].ecx & 0xff00;
1949 do_cpuid_1_ent(&entry[i], function, i);
1951 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1957 entry->eax = min(entry->eax, 0x8000001a);
1960 entry->edx &= kvm_supported_word1_x86_features;
1961 entry->ecx &= kvm_supported_word6_x86_features;
1969 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1970 struct kvm_cpuid_entry2 __user *entries)
1972 struct kvm_cpuid_entry2 *cpuid_entries;
1973 int limit, nent = 0, r = -E2BIG;
1976 if (cpuid->nent < 1)
1978 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1979 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1981 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1985 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1986 limit = cpuid_entries[0].eax;
1987 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1988 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1989 &nent, cpuid->nent);
1991 if (nent >= cpuid->nent)
1994 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1995 limit = cpuid_entries[nent - 1].eax;
1996 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1997 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1998 &nent, cpuid->nent);
2000 if (nent >= cpuid->nent)
2004 if (copy_to_user(entries, cpuid_entries,
2005 nent * sizeof(struct kvm_cpuid_entry2)))
2011 vfree(cpuid_entries);
2016 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2017 struct kvm_lapic_state *s)
2020 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2026 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2027 struct kvm_lapic_state *s)
2030 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2031 kvm_apic_post_state_restore(vcpu);
2032 update_cr8_intercept(vcpu);
2038 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2039 struct kvm_interrupt *irq)
2041 if (irq->irq < 0 || irq->irq >= 256)
2043 if (irqchip_in_kernel(vcpu->kvm))
2047 kvm_queue_interrupt(vcpu, irq->irq, false);
2054 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2057 kvm_inject_nmi(vcpu);
2063 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2064 struct kvm_tpr_access_ctl *tac)
2068 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2072 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2076 unsigned bank_num = mcg_cap & 0xff, bank;
2079 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2081 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2084 vcpu->arch.mcg_cap = mcg_cap;
2085 /* Init IA32_MCG_CTL to all 1s */
2086 if (mcg_cap & MCG_CTL_P)
2087 vcpu->arch.mcg_ctl = ~(u64)0;
2088 /* Init IA32_MCi_CTL to all 1s */
2089 for (bank = 0; bank < bank_num; bank++)
2090 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2095 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2096 struct kvm_x86_mce *mce)
2098 u64 mcg_cap = vcpu->arch.mcg_cap;
2099 unsigned bank_num = mcg_cap & 0xff;
2100 u64 *banks = vcpu->arch.mce_banks;
2102 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2105 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2106 * reporting is disabled
2108 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2109 vcpu->arch.mcg_ctl != ~(u64)0)
2111 banks += 4 * mce->bank;
2113 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2114 * reporting is disabled for the bank
2116 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2118 if (mce->status & MCI_STATUS_UC) {
2119 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2120 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2121 printk(KERN_DEBUG "kvm: set_mce: "
2122 "injects mce exception while "
2123 "previous one is in progress!\n");
2124 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2127 if (banks[1] & MCI_STATUS_VAL)
2128 mce->status |= MCI_STATUS_OVER;
2129 banks[2] = mce->addr;
2130 banks[3] = mce->misc;
2131 vcpu->arch.mcg_status = mce->mcg_status;
2132 banks[1] = mce->status;
2133 kvm_queue_exception(vcpu, MC_VECTOR);
2134 } else if (!(banks[1] & MCI_STATUS_VAL)
2135 || !(banks[1] & MCI_STATUS_UC)) {
2136 if (banks[1] & MCI_STATUS_VAL)
2137 mce->status |= MCI_STATUS_OVER;
2138 banks[2] = mce->addr;
2139 banks[3] = mce->misc;
2140 banks[1] = mce->status;
2142 banks[1] |= MCI_STATUS_OVER;
2146 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2147 struct kvm_vcpu_events *events)
2151 events->exception.injected =
2152 vcpu->arch.exception.pending &&
2153 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2154 events->exception.nr = vcpu->arch.exception.nr;
2155 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2156 events->exception.error_code = vcpu->arch.exception.error_code;
2158 events->interrupt.injected =
2159 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2160 events->interrupt.nr = vcpu->arch.interrupt.nr;
2161 events->interrupt.soft = 0;
2162 events->interrupt.shadow =
2163 kvm_x86_ops->get_interrupt_shadow(vcpu,
2164 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2166 events->nmi.injected = vcpu->arch.nmi_injected;
2167 events->nmi.pending = vcpu->arch.nmi_pending;
2168 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2170 events->sipi_vector = vcpu->arch.sipi_vector;
2172 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2173 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2174 | KVM_VCPUEVENT_VALID_SHADOW);
2179 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2180 struct kvm_vcpu_events *events)
2182 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2183 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2184 | KVM_VCPUEVENT_VALID_SHADOW))
2189 vcpu->arch.exception.pending = events->exception.injected;
2190 vcpu->arch.exception.nr = events->exception.nr;
2191 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2192 vcpu->arch.exception.error_code = events->exception.error_code;
2194 vcpu->arch.interrupt.pending = events->interrupt.injected;
2195 vcpu->arch.interrupt.nr = events->interrupt.nr;
2196 vcpu->arch.interrupt.soft = events->interrupt.soft;
2197 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2198 kvm_pic_clear_isr_ack(vcpu->kvm);
2199 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2200 kvm_x86_ops->set_interrupt_shadow(vcpu,
2201 events->interrupt.shadow);
2203 vcpu->arch.nmi_injected = events->nmi.injected;
2204 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2205 vcpu->arch.nmi_pending = events->nmi.pending;
2206 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2208 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2209 vcpu->arch.sipi_vector = events->sipi_vector;
2216 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2217 struct kvm_debugregs *dbgregs)
2221 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2222 dbgregs->dr6 = vcpu->arch.dr6;
2223 dbgregs->dr7 = vcpu->arch.dr7;
2229 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2230 struct kvm_debugregs *dbgregs)
2237 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2238 vcpu->arch.dr6 = dbgregs->dr6;
2239 vcpu->arch.dr7 = dbgregs->dr7;
2246 long kvm_arch_vcpu_ioctl(struct file *filp,
2247 unsigned int ioctl, unsigned long arg)
2249 struct kvm_vcpu *vcpu = filp->private_data;
2250 void __user *argp = (void __user *)arg;
2252 struct kvm_lapic_state *lapic = NULL;
2255 case KVM_GET_LAPIC: {
2257 if (!vcpu->arch.apic)
2259 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2264 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2268 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2273 case KVM_SET_LAPIC: {
2275 if (!vcpu->arch.apic)
2277 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2282 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2284 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2290 case KVM_INTERRUPT: {
2291 struct kvm_interrupt irq;
2294 if (copy_from_user(&irq, argp, sizeof irq))
2296 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2303 r = kvm_vcpu_ioctl_nmi(vcpu);
2309 case KVM_SET_CPUID: {
2310 struct kvm_cpuid __user *cpuid_arg = argp;
2311 struct kvm_cpuid cpuid;
2314 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2316 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2321 case KVM_SET_CPUID2: {
2322 struct kvm_cpuid2 __user *cpuid_arg = argp;
2323 struct kvm_cpuid2 cpuid;
2326 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2328 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2329 cpuid_arg->entries);
2334 case KVM_GET_CPUID2: {
2335 struct kvm_cpuid2 __user *cpuid_arg = argp;
2336 struct kvm_cpuid2 cpuid;
2339 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2341 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2342 cpuid_arg->entries);
2346 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2352 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2355 r = msr_io(vcpu, argp, do_set_msr, 0);
2357 case KVM_TPR_ACCESS_REPORTING: {
2358 struct kvm_tpr_access_ctl tac;
2361 if (copy_from_user(&tac, argp, sizeof tac))
2363 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2367 if (copy_to_user(argp, &tac, sizeof tac))
2372 case KVM_SET_VAPIC_ADDR: {
2373 struct kvm_vapic_addr va;
2376 if (!irqchip_in_kernel(vcpu->kvm))
2379 if (copy_from_user(&va, argp, sizeof va))
2382 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2385 case KVM_X86_SETUP_MCE: {
2389 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2391 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2394 case KVM_X86_SET_MCE: {
2395 struct kvm_x86_mce mce;
2398 if (copy_from_user(&mce, argp, sizeof mce))
2400 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2403 case KVM_GET_VCPU_EVENTS: {
2404 struct kvm_vcpu_events events;
2406 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2409 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2414 case KVM_SET_VCPU_EVENTS: {
2415 struct kvm_vcpu_events events;
2418 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2421 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2424 case KVM_GET_DEBUGREGS: {
2425 struct kvm_debugregs dbgregs;
2427 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2430 if (copy_to_user(argp, &dbgregs,
2431 sizeof(struct kvm_debugregs)))
2436 case KVM_SET_DEBUGREGS: {
2437 struct kvm_debugregs dbgregs;
2440 if (copy_from_user(&dbgregs, argp,
2441 sizeof(struct kvm_debugregs)))
2444 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2455 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2459 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2461 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2465 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2468 kvm->arch.ept_identity_map_addr = ident_addr;
2472 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2473 u32 kvm_nr_mmu_pages)
2475 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2478 mutex_lock(&kvm->slots_lock);
2479 spin_lock(&kvm->mmu_lock);
2481 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2482 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2484 spin_unlock(&kvm->mmu_lock);
2485 mutex_unlock(&kvm->slots_lock);
2489 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2491 return kvm->arch.n_alloc_mmu_pages;
2494 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2497 struct kvm_mem_alias *alias;
2498 struct kvm_mem_aliases *aliases;
2500 aliases = rcu_dereference(kvm->arch.aliases);
2502 for (i = 0; i < aliases->naliases; ++i) {
2503 alias = &aliases->aliases[i];
2504 if (alias->flags & KVM_ALIAS_INVALID)
2506 if (gfn >= alias->base_gfn
2507 && gfn < alias->base_gfn + alias->npages)
2508 return alias->target_gfn + gfn - alias->base_gfn;
2513 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2516 struct kvm_mem_alias *alias;
2517 struct kvm_mem_aliases *aliases;
2519 aliases = rcu_dereference(kvm->arch.aliases);
2521 for (i = 0; i < aliases->naliases; ++i) {
2522 alias = &aliases->aliases[i];
2523 if (gfn >= alias->base_gfn
2524 && gfn < alias->base_gfn + alias->npages)
2525 return alias->target_gfn + gfn - alias->base_gfn;
2531 * Set a new alias region. Aliases map a portion of physical memory into
2532 * another portion. This is useful for memory windows, for example the PC
2535 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2536 struct kvm_memory_alias *alias)
2539 struct kvm_mem_alias *p;
2540 struct kvm_mem_aliases *aliases, *old_aliases;
2543 /* General sanity checks */
2544 if (alias->memory_size & (PAGE_SIZE - 1))
2546 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2548 if (alias->slot >= KVM_ALIAS_SLOTS)
2550 if (alias->guest_phys_addr + alias->memory_size
2551 < alias->guest_phys_addr)
2553 if (alias->target_phys_addr + alias->memory_size
2554 < alias->target_phys_addr)
2558 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2562 mutex_lock(&kvm->slots_lock);
2564 /* invalidate any gfn reference in case of deletion/shrinking */
2565 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2566 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2567 old_aliases = kvm->arch.aliases;
2568 rcu_assign_pointer(kvm->arch.aliases, aliases);
2569 synchronize_srcu_expedited(&kvm->srcu);
2570 kvm_mmu_zap_all(kvm);
2574 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2578 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2580 p = &aliases->aliases[alias->slot];
2581 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2582 p->npages = alias->memory_size >> PAGE_SHIFT;
2583 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2584 p->flags &= ~(KVM_ALIAS_INVALID);
2586 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2587 if (aliases->aliases[n - 1].npages)
2589 aliases->naliases = n;
2591 old_aliases = kvm->arch.aliases;
2592 rcu_assign_pointer(kvm->arch.aliases, aliases);
2593 synchronize_srcu_expedited(&kvm->srcu);
2598 mutex_unlock(&kvm->slots_lock);
2603 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2608 switch (chip->chip_id) {
2609 case KVM_IRQCHIP_PIC_MASTER:
2610 memcpy(&chip->chip.pic,
2611 &pic_irqchip(kvm)->pics[0],
2612 sizeof(struct kvm_pic_state));
2614 case KVM_IRQCHIP_PIC_SLAVE:
2615 memcpy(&chip->chip.pic,
2616 &pic_irqchip(kvm)->pics[1],
2617 sizeof(struct kvm_pic_state));
2619 case KVM_IRQCHIP_IOAPIC:
2620 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2629 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2634 switch (chip->chip_id) {
2635 case KVM_IRQCHIP_PIC_MASTER:
2636 raw_spin_lock(&pic_irqchip(kvm)->lock);
2637 memcpy(&pic_irqchip(kvm)->pics[0],
2639 sizeof(struct kvm_pic_state));
2640 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2642 case KVM_IRQCHIP_PIC_SLAVE:
2643 raw_spin_lock(&pic_irqchip(kvm)->lock);
2644 memcpy(&pic_irqchip(kvm)->pics[1],
2646 sizeof(struct kvm_pic_state));
2647 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2649 case KVM_IRQCHIP_IOAPIC:
2650 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2656 kvm_pic_update_irq(pic_irqchip(kvm));
2660 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2664 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2665 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2666 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2670 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2674 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2675 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2676 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2677 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2681 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2685 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2686 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2687 sizeof(ps->channels));
2688 ps->flags = kvm->arch.vpit->pit_state.flags;
2689 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2693 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2695 int r = 0, start = 0;
2696 u32 prev_legacy, cur_legacy;
2697 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2698 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2699 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2700 if (!prev_legacy && cur_legacy)
2702 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2703 sizeof(kvm->arch.vpit->pit_state.channels));
2704 kvm->arch.vpit->pit_state.flags = ps->flags;
2705 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2706 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2710 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2711 struct kvm_reinject_control *control)
2713 if (!kvm->arch.vpit)
2715 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2716 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2717 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2722 * Get (and clear) the dirty memory log for a memory slot.
2724 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2725 struct kvm_dirty_log *log)
2728 struct kvm_memory_slot *memslot;
2730 unsigned long is_dirty = 0;
2731 unsigned long *dirty_bitmap = NULL;
2733 mutex_lock(&kvm->slots_lock);
2736 if (log->slot >= KVM_MEMORY_SLOTS)
2739 memslot = &kvm->memslots->memslots[log->slot];
2741 if (!memslot->dirty_bitmap)
2744 n = kvm_dirty_bitmap_bytes(memslot);
2747 dirty_bitmap = vmalloc(n);
2750 memset(dirty_bitmap, 0, n);
2752 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2753 is_dirty = memslot->dirty_bitmap[i];
2755 /* If nothing is dirty, don't bother messing with page tables. */
2757 struct kvm_memslots *slots, *old_slots;
2759 spin_lock(&kvm->mmu_lock);
2760 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2761 spin_unlock(&kvm->mmu_lock);
2763 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2767 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2768 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2770 old_slots = kvm->memslots;
2771 rcu_assign_pointer(kvm->memslots, slots);
2772 synchronize_srcu_expedited(&kvm->srcu);
2773 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2778 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2781 vfree(dirty_bitmap);
2783 mutex_unlock(&kvm->slots_lock);
2787 long kvm_arch_vm_ioctl(struct file *filp,
2788 unsigned int ioctl, unsigned long arg)
2790 struct kvm *kvm = filp->private_data;
2791 void __user *argp = (void __user *)arg;
2794 * This union makes it completely explicit to gcc-3.x
2795 * that these two variables' stack usage should be
2796 * combined, not added together.
2799 struct kvm_pit_state ps;
2800 struct kvm_pit_state2 ps2;
2801 struct kvm_memory_alias alias;
2802 struct kvm_pit_config pit_config;
2806 case KVM_SET_TSS_ADDR:
2807 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2811 case KVM_SET_IDENTITY_MAP_ADDR: {
2815 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2817 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2822 case KVM_SET_MEMORY_REGION: {
2823 struct kvm_memory_region kvm_mem;
2824 struct kvm_userspace_memory_region kvm_userspace_mem;
2827 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2829 kvm_userspace_mem.slot = kvm_mem.slot;
2830 kvm_userspace_mem.flags = kvm_mem.flags;
2831 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2832 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2833 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2838 case KVM_SET_NR_MMU_PAGES:
2839 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2843 case KVM_GET_NR_MMU_PAGES:
2844 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2846 case KVM_SET_MEMORY_ALIAS:
2848 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2850 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2854 case KVM_CREATE_IRQCHIP: {
2855 struct kvm_pic *vpic;
2857 mutex_lock(&kvm->lock);
2860 goto create_irqchip_unlock;
2862 vpic = kvm_create_pic(kvm);
2864 r = kvm_ioapic_init(kvm);
2866 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
2869 goto create_irqchip_unlock;
2872 goto create_irqchip_unlock;
2874 kvm->arch.vpic = vpic;
2876 r = kvm_setup_default_irq_routing(kvm);
2878 mutex_lock(&kvm->irq_lock);
2879 kvm_ioapic_destroy(kvm);
2880 kvm_destroy_pic(kvm);
2881 mutex_unlock(&kvm->irq_lock);
2883 create_irqchip_unlock:
2884 mutex_unlock(&kvm->lock);
2887 case KVM_CREATE_PIT:
2888 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2890 case KVM_CREATE_PIT2:
2892 if (copy_from_user(&u.pit_config, argp,
2893 sizeof(struct kvm_pit_config)))
2896 mutex_lock(&kvm->slots_lock);
2899 goto create_pit_unlock;
2901 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2905 mutex_unlock(&kvm->slots_lock);
2907 case KVM_IRQ_LINE_STATUS:
2908 case KVM_IRQ_LINE: {
2909 struct kvm_irq_level irq_event;
2912 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2915 if (irqchip_in_kernel(kvm)) {
2917 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2918 irq_event.irq, irq_event.level);
2919 if (ioctl == KVM_IRQ_LINE_STATUS) {
2921 irq_event.status = status;
2922 if (copy_to_user(argp, &irq_event,
2930 case KVM_GET_IRQCHIP: {
2931 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2932 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2938 if (copy_from_user(chip, argp, sizeof *chip))
2939 goto get_irqchip_out;
2941 if (!irqchip_in_kernel(kvm))
2942 goto get_irqchip_out;
2943 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2945 goto get_irqchip_out;
2947 if (copy_to_user(argp, chip, sizeof *chip))
2948 goto get_irqchip_out;
2956 case KVM_SET_IRQCHIP: {
2957 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2958 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2964 if (copy_from_user(chip, argp, sizeof *chip))
2965 goto set_irqchip_out;
2967 if (!irqchip_in_kernel(kvm))
2968 goto set_irqchip_out;
2969 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2971 goto set_irqchip_out;
2981 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2984 if (!kvm->arch.vpit)
2986 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2990 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2997 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3000 if (!kvm->arch.vpit)
3002 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3008 case KVM_GET_PIT2: {
3010 if (!kvm->arch.vpit)
3012 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3016 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3021 case KVM_SET_PIT2: {
3023 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3026 if (!kvm->arch.vpit)
3028 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3034 case KVM_REINJECT_CONTROL: {
3035 struct kvm_reinject_control control;
3037 if (copy_from_user(&control, argp, sizeof(control)))
3039 r = kvm_vm_ioctl_reinject(kvm, &control);
3045 case KVM_XEN_HVM_CONFIG: {
3047 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3048 sizeof(struct kvm_xen_hvm_config)))
3051 if (kvm->arch.xen_hvm_config.flags)
3056 case KVM_SET_CLOCK: {
3057 struct timespec now;
3058 struct kvm_clock_data user_ns;
3063 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3072 now_ns = timespec_to_ns(&now);
3073 delta = user_ns.clock - now_ns;
3074 kvm->arch.kvmclock_offset = delta;
3077 case KVM_GET_CLOCK: {
3078 struct timespec now;
3079 struct kvm_clock_data user_ns;
3083 now_ns = timespec_to_ns(&now);
3084 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3088 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3101 static void kvm_init_msr_list(void)
3106 /* skip the first msrs in the list. KVM-specific */
3107 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3108 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3111 msrs_to_save[j] = msrs_to_save[i];
3114 num_msrs_to_save = j;
3117 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3120 if (vcpu->arch.apic &&
3121 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3124 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3127 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3129 if (vcpu->arch.apic &&
3130 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3133 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3136 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3137 struct kvm_segment *var, int seg)
3139 kvm_x86_ops->set_segment(vcpu, var, seg);
3142 void kvm_get_segment(struct kvm_vcpu *vcpu,
3143 struct kvm_segment *var, int seg)
3145 kvm_x86_ops->get_segment(vcpu, var, seg);
3148 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3150 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3151 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3154 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3156 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3157 access |= PFERR_FETCH_MASK;
3158 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3161 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3163 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3164 access |= PFERR_WRITE_MASK;
3165 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3168 /* uses this to access any guest's mapped memory without checking CPL */
3169 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3171 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3174 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3175 struct kvm_vcpu *vcpu, u32 access,
3179 int r = X86EMUL_CONTINUE;
3182 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3183 unsigned offset = addr & (PAGE_SIZE-1);
3184 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3187 if (gpa == UNMAPPED_GVA) {
3188 r = X86EMUL_PROPAGATE_FAULT;
3191 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3193 r = X86EMUL_UNHANDLEABLE;
3205 /* used for instruction fetching */
3206 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3207 struct kvm_vcpu *vcpu, u32 *error)
3209 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3210 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3211 access | PFERR_FETCH_MASK, error);
3214 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3215 struct kvm_vcpu *vcpu, u32 *error)
3217 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3218 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3222 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3223 struct kvm_vcpu *vcpu, u32 *error)
3225 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3228 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3230 struct kvm_vcpu *vcpu,
3234 int r = X86EMUL_CONTINUE;
3237 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3238 PFERR_WRITE_MASK, error);
3239 unsigned offset = addr & (PAGE_SIZE-1);
3240 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3243 if (gpa == UNMAPPED_GVA) {
3244 r = X86EMUL_PROPAGATE_FAULT;
3247 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3249 r = X86EMUL_UNHANDLEABLE;
3261 static int emulator_read_emulated(unsigned long addr,
3264 struct kvm_vcpu *vcpu)
3269 if (vcpu->mmio_read_completed) {
3270 memcpy(val, vcpu->mmio_data, bytes);
3271 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3272 vcpu->mmio_phys_addr, *(u64 *)val);
3273 vcpu->mmio_read_completed = 0;
3274 return X86EMUL_CONTINUE;
3277 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
3279 if (gpa == UNMAPPED_GVA) {
3280 kvm_inject_page_fault(vcpu, addr, error_code);
3281 return X86EMUL_PROPAGATE_FAULT;
3284 /* For APIC access vmexit */
3285 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3288 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3289 == X86EMUL_CONTINUE)
3290 return X86EMUL_CONTINUE;
3294 * Is this MMIO handled locally?
3296 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3297 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3298 return X86EMUL_CONTINUE;
3301 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3303 vcpu->mmio_needed = 1;
3304 vcpu->mmio_phys_addr = gpa;
3305 vcpu->mmio_size = bytes;
3306 vcpu->mmio_is_write = 0;
3308 return X86EMUL_UNHANDLEABLE;
3311 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3312 const void *val, int bytes)
3316 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3319 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3323 static int emulator_write_emulated_onepage(unsigned long addr,
3326 struct kvm_vcpu *vcpu)
3331 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
3333 if (gpa == UNMAPPED_GVA) {
3334 kvm_inject_page_fault(vcpu, addr, error_code);
3335 return X86EMUL_PROPAGATE_FAULT;
3338 /* For APIC access vmexit */
3339 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3342 if (emulator_write_phys(vcpu, gpa, val, bytes))
3343 return X86EMUL_CONTINUE;
3346 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3348 * Is this MMIO handled locally?
3350 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3351 return X86EMUL_CONTINUE;
3353 vcpu->mmio_needed = 1;
3354 vcpu->mmio_phys_addr = gpa;
3355 vcpu->mmio_size = bytes;
3356 vcpu->mmio_is_write = 1;
3357 memcpy(vcpu->mmio_data, val, bytes);
3359 return X86EMUL_CONTINUE;
3362 int emulator_write_emulated(unsigned long addr,
3365 struct kvm_vcpu *vcpu)
3367 /* Crossing a page boundary? */
3368 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3371 now = -addr & ~PAGE_MASK;
3372 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3373 if (rc != X86EMUL_CONTINUE)
3379 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3381 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3383 #define CMPXCHG_TYPE(t, ptr, old, new) \
3384 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3386 #ifdef CONFIG_X86_64
3387 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3389 # define CMPXCHG64(ptr, old, new) \
3390 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3393 static int emulator_cmpxchg_emulated(unsigned long addr,
3397 struct kvm_vcpu *vcpu)
3404 /* guests cmpxchg8b have to be emulated atomically */
3405 if (bytes > 8 || (bytes & (bytes - 1)))
3408 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3410 if (gpa == UNMAPPED_GVA ||
3411 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3414 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3417 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3419 kaddr = kmap_atomic(page, KM_USER0);
3420 kaddr += offset_in_page(gpa);
3423 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3426 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3429 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3432 exchanged = CMPXCHG64(kaddr, old, new);
3437 kunmap_atomic(kaddr, KM_USER0);
3438 kvm_release_page_dirty(page);
3441 return X86EMUL_CMPXCHG_FAILED;
3443 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3445 return X86EMUL_CONTINUE;
3448 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3450 return emulator_write_emulated(addr, new, bytes, vcpu);
3453 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3455 /* TODO: String I/O for in kernel device */
3458 if (vcpu->arch.pio.in)
3459 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3460 vcpu->arch.pio.size, pd);
3462 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3463 vcpu->arch.pio.port, vcpu->arch.pio.size,
3469 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3470 unsigned int count, struct kvm_vcpu *vcpu)
3472 if (vcpu->arch.pio.count)
3475 trace_kvm_pio(1, port, size, 1);
3477 vcpu->arch.pio.port = port;
3478 vcpu->arch.pio.in = 1;
3479 vcpu->arch.pio.count = count;
3480 vcpu->arch.pio.size = size;
3482 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3484 memcpy(val, vcpu->arch.pio_data, size * count);
3485 vcpu->arch.pio.count = 0;
3489 vcpu->run->exit_reason = KVM_EXIT_IO;
3490 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3491 vcpu->run->io.size = size;
3492 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3493 vcpu->run->io.count = count;
3494 vcpu->run->io.port = port;
3499 static int emulator_pio_out_emulated(int size, unsigned short port,
3500 const void *val, unsigned int count,
3501 struct kvm_vcpu *vcpu)
3503 trace_kvm_pio(0, port, size, 1);
3505 vcpu->arch.pio.port = port;
3506 vcpu->arch.pio.in = 0;
3507 vcpu->arch.pio.count = count;
3508 vcpu->arch.pio.size = size;
3510 memcpy(vcpu->arch.pio_data, val, size * count);
3512 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3513 vcpu->arch.pio.count = 0;
3517 vcpu->run->exit_reason = KVM_EXIT_IO;
3518 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3519 vcpu->run->io.size = size;
3520 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3521 vcpu->run->io.count = count;
3522 vcpu->run->io.port = port;
3527 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3529 return kvm_x86_ops->get_segment_base(vcpu, seg);
3532 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3534 kvm_mmu_invlpg(vcpu, address);
3535 return X86EMUL_CONTINUE;
3538 int emulate_clts(struct kvm_vcpu *vcpu)
3540 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3541 kvm_x86_ops->fpu_activate(vcpu);
3542 return X86EMUL_CONTINUE;
3545 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3547 return kvm_get_dr(ctxt->vcpu, dr, dest);
3550 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3552 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3554 return kvm_set_dr(ctxt->vcpu, dr, value & mask);
3557 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3560 unsigned long rip = kvm_rip_read(vcpu);
3561 unsigned long rip_linear;
3563 if (!printk_ratelimit())
3566 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3568 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
3570 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3571 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3573 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3575 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3577 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3580 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3582 unsigned long value;
3586 value = kvm_read_cr0(vcpu);
3589 value = vcpu->arch.cr2;
3592 value = vcpu->arch.cr3;
3595 value = kvm_read_cr4(vcpu);
3598 value = kvm_get_cr8(vcpu);
3601 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3608 static void emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3612 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3615 vcpu->arch.cr2 = val;
3618 kvm_set_cr3(vcpu, val);
3621 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3624 kvm_set_cr8(vcpu, val & 0xfUL);
3627 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3631 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3633 return kvm_x86_ops->get_cpl(vcpu);
3636 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3638 kvm_x86_ops->get_gdt(vcpu, dt);
3641 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3642 struct kvm_vcpu *vcpu)
3644 struct kvm_segment var;
3646 kvm_get_segment(vcpu, &var, seg);
3653 set_desc_limit(desc, var.limit);
3654 set_desc_base(desc, (unsigned long)var.base);
3655 desc->type = var.type;
3657 desc->dpl = var.dpl;
3658 desc->p = var.present;
3659 desc->avl = var.avl;
3667 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3668 struct kvm_vcpu *vcpu)
3670 struct kvm_segment var;
3672 /* needed to preserve selector */
3673 kvm_get_segment(vcpu, &var, seg);
3675 var.base = get_desc_base(desc);
3676 var.limit = get_desc_limit(desc);
3678 var.limit = (var.limit << 12) | 0xfff;
3679 var.type = desc->type;
3680 var.present = desc->p;
3681 var.dpl = desc->dpl;
3686 var.avl = desc->avl;
3687 var.present = desc->p;
3688 var.unusable = !var.present;
3691 kvm_set_segment(vcpu, &var, seg);
3695 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3697 struct kvm_segment kvm_seg;
3699 kvm_get_segment(vcpu, &kvm_seg, seg);
3700 return kvm_seg.selector;
3703 static void emulator_set_segment_selector(u16 sel, int seg,
3704 struct kvm_vcpu *vcpu)
3706 struct kvm_segment kvm_seg;
3708 kvm_get_segment(vcpu, &kvm_seg, seg);
3709 kvm_seg.selector = sel;
3710 kvm_set_segment(vcpu, &kvm_seg, seg);
3713 static void emulator_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
3715 kvm_x86_ops->set_rflags(vcpu, rflags);
3718 static struct x86_emulate_ops emulate_ops = {
3719 .read_std = kvm_read_guest_virt_system,
3720 .write_std = kvm_write_guest_virt_system,
3721 .fetch = kvm_fetch_guest_virt,
3722 .read_emulated = emulator_read_emulated,
3723 .write_emulated = emulator_write_emulated,
3724 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3725 .pio_in_emulated = emulator_pio_in_emulated,
3726 .pio_out_emulated = emulator_pio_out_emulated,
3727 .get_cached_descriptor = emulator_get_cached_descriptor,
3728 .set_cached_descriptor = emulator_set_cached_descriptor,
3729 .get_segment_selector = emulator_get_segment_selector,
3730 .set_segment_selector = emulator_set_segment_selector,
3731 .get_gdt = emulator_get_gdt,
3732 .get_cr = emulator_get_cr,
3733 .set_cr = emulator_set_cr,
3734 .cpl = emulator_get_cpl,
3735 .set_rflags = emulator_set_rflags,
3738 static void cache_all_regs(struct kvm_vcpu *vcpu)
3740 kvm_register_read(vcpu, VCPU_REGS_RAX);
3741 kvm_register_read(vcpu, VCPU_REGS_RSP);
3742 kvm_register_read(vcpu, VCPU_REGS_RIP);
3743 vcpu->arch.regs_dirty = ~0;
3746 int emulate_instruction(struct kvm_vcpu *vcpu,
3752 struct decode_cache *c;
3753 struct kvm_run *run = vcpu->run;
3755 kvm_clear_exception_queue(vcpu);
3756 vcpu->arch.mmio_fault_cr2 = cr2;
3758 * TODO: fix emulate.c to use guest_read/write_register
3759 * instead of direct ->regs accesses, can save hundred cycles
3760 * on Intel for instructions that don't read/change RSP, for
3763 cache_all_regs(vcpu);
3765 vcpu->mmio_is_write = 0;
3767 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3769 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3771 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3772 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3773 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3774 vcpu->arch.emulate_ctxt.mode =
3775 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3776 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3777 ? X86EMUL_MODE_VM86 : cs_l
3778 ? X86EMUL_MODE_PROT64 : cs_db
3779 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3781 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3782 trace_kvm_emulate_insn_start(vcpu);
3784 /* Only allow emulation of specific instructions on #UD
3785 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3786 c = &vcpu->arch.emulate_ctxt.decode;
3787 if (emulation_type & EMULTYPE_TRAP_UD) {
3789 return EMULATE_FAIL;
3791 case 0x01: /* VMMCALL */
3792 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3793 return EMULATE_FAIL;
3795 case 0x34: /* sysenter */
3796 case 0x35: /* sysexit */
3797 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3798 return EMULATE_FAIL;
3800 case 0x05: /* syscall */
3801 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3802 return EMULATE_FAIL;
3805 return EMULATE_FAIL;
3808 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3809 return EMULATE_FAIL;
3812 ++vcpu->stat.insn_emulation;
3814 ++vcpu->stat.insn_emulation_fail;
3815 trace_kvm_emulate_insn_failed(vcpu);
3816 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3817 return EMULATE_DONE;
3818 return EMULATE_FAIL;
3822 if (emulation_type & EMULTYPE_SKIP) {
3823 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3824 return EMULATE_DONE;
3828 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3829 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3832 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3834 if (vcpu->arch.pio.count) {
3835 if (!vcpu->arch.pio.in)
3836 vcpu->arch.pio.count = 0;
3837 return EMULATE_DO_MMIO;
3840 if (r || vcpu->mmio_is_write) {
3841 run->exit_reason = KVM_EXIT_MMIO;
3842 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3843 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3844 run->mmio.len = vcpu->mmio_size;
3845 run->mmio.is_write = vcpu->mmio_is_write;
3849 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3851 if (!vcpu->mmio_needed) {
3852 ++vcpu->stat.insn_emulation_fail;
3853 trace_kvm_emulate_insn_failed(vcpu);
3854 kvm_report_emulation_failure(vcpu, "mmio");
3855 return EMULATE_FAIL;
3857 return EMULATE_DO_MMIO;
3860 if (vcpu->mmio_is_write) {
3861 vcpu->mmio_needed = 0;
3862 return EMULATE_DO_MMIO;
3866 if (vcpu->arch.exception.pending)
3867 vcpu->arch.emulate_ctxt.restart = false;
3869 if (vcpu->arch.emulate_ctxt.restart)
3872 return EMULATE_DONE;
3874 EXPORT_SYMBOL_GPL(emulate_instruction);
3876 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
3878 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3879 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
3880 /* do not return to emulator after return from userspace */
3881 vcpu->arch.pio.count = 0;
3884 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
3886 static void bounce_off(void *info)
3891 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3894 struct cpufreq_freqs *freq = data;
3896 struct kvm_vcpu *vcpu;
3897 int i, send_ipi = 0;
3899 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3901 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3903 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3905 spin_lock(&kvm_lock);
3906 list_for_each_entry(kvm, &vm_list, vm_list) {
3907 kvm_for_each_vcpu(i, vcpu, kvm) {
3908 if (vcpu->cpu != freq->cpu)
3910 if (!kvm_request_guest_time_update(vcpu))
3912 if (vcpu->cpu != smp_processor_id())
3916 spin_unlock(&kvm_lock);
3918 if (freq->old < freq->new && send_ipi) {
3920 * We upscale the frequency. Must make the guest
3921 * doesn't see old kvmclock values while running with
3922 * the new frequency, otherwise we risk the guest sees
3923 * time go backwards.
3925 * In case we update the frequency for another cpu
3926 * (which might be in guest context) send an interrupt
3927 * to kick the cpu out of guest context. Next time
3928 * guest context is entered kvmclock will be updated,
3929 * so the guest will not see stale values.
3931 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3936 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3937 .notifier_call = kvmclock_cpufreq_notifier
3940 static void kvm_timer_init(void)
3944 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3945 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3946 CPUFREQ_TRANSITION_NOTIFIER);
3947 for_each_online_cpu(cpu) {
3948 unsigned long khz = cpufreq_get(cpu);
3951 per_cpu(cpu_tsc_khz, cpu) = khz;
3954 for_each_possible_cpu(cpu)
3955 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3959 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
3961 static int kvm_is_in_guest(void)
3963 return percpu_read(current_vcpu) != NULL;
3966 static int kvm_is_user_mode(void)
3969 if (percpu_read(current_vcpu))
3970 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
3971 return user_mode != 0;
3974 static unsigned long kvm_get_guest_ip(void)
3976 unsigned long ip = 0;
3977 if (percpu_read(current_vcpu))
3978 ip = kvm_rip_read(percpu_read(current_vcpu));
3982 static struct perf_guest_info_callbacks kvm_guest_cbs = {
3983 .is_in_guest = kvm_is_in_guest,
3984 .is_user_mode = kvm_is_user_mode,
3985 .get_guest_ip = kvm_get_guest_ip,
3988 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
3990 percpu_write(current_vcpu, vcpu);
3992 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
3994 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
3996 percpu_write(current_vcpu, NULL);
3998 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4000 int kvm_arch_init(void *opaque)
4003 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4006 printk(KERN_ERR "kvm: already loaded the other module\n");
4011 if (!ops->cpu_has_kvm_support()) {
4012 printk(KERN_ERR "kvm: no hardware support\n");
4016 if (ops->disabled_by_bios()) {
4017 printk(KERN_ERR "kvm: disabled by bios\n");
4022 r = kvm_mmu_module_init();
4026 kvm_init_msr_list();
4029 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4030 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4031 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4032 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4036 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4044 void kvm_arch_exit(void)
4046 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4048 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4049 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4050 CPUFREQ_TRANSITION_NOTIFIER);
4052 kvm_mmu_module_exit();
4055 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4057 ++vcpu->stat.halt_exits;
4058 if (irqchip_in_kernel(vcpu->kvm)) {
4059 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4062 vcpu->run->exit_reason = KVM_EXIT_HLT;
4066 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4068 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4071 if (is_long_mode(vcpu))
4074 return a0 | ((gpa_t)a1 << 32);
4077 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4079 u64 param, ingpa, outgpa, ret;
4080 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4081 bool fast, longmode;
4085 * hypercall generates UD from non zero cpl and real mode
4088 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4089 kvm_queue_exception(vcpu, UD_VECTOR);
4093 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4094 longmode = is_long_mode(vcpu) && cs_l == 1;
4097 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4098 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4099 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4100 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4101 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4102 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4104 #ifdef CONFIG_X86_64
4106 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4107 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4108 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4112 code = param & 0xffff;
4113 fast = (param >> 16) & 0x1;
4114 rep_cnt = (param >> 32) & 0xfff;
4115 rep_idx = (param >> 48) & 0xfff;
4117 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4120 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4121 kvm_vcpu_on_spin(vcpu);
4124 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4128 ret = res | (((u64)rep_done & 0xfff) << 32);
4130 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4132 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4133 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4139 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4141 unsigned long nr, a0, a1, a2, a3, ret;
4144 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4145 return kvm_hv_hypercall(vcpu);
4147 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4148 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4149 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4150 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4151 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4153 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4155 if (!is_long_mode(vcpu)) {
4163 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4169 case KVM_HC_VAPIC_POLL_IRQ:
4173 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4180 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4181 ++vcpu->stat.hypercalls;
4184 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4186 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4188 char instruction[3];
4189 unsigned long rip = kvm_rip_read(vcpu);
4192 * Blow out the MMU to ensure that no other VCPU has an active mapping
4193 * to ensure that the updated hypercall appears atomically across all
4196 kvm_mmu_zap_all(vcpu->kvm);
4198 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4200 return emulator_write_emulated(rip, instruction, 3, vcpu);
4203 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4205 struct desc_ptr dt = { limit, base };
4207 kvm_x86_ops->set_gdt(vcpu, &dt);
4210 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4212 struct desc_ptr dt = { limit, base };
4214 kvm_x86_ops->set_idt(vcpu, &dt);
4217 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4219 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4220 int j, nent = vcpu->arch.cpuid_nent;
4222 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4223 /* when no next entry is found, the current entry[i] is reselected */
4224 for (j = i + 1; ; j = (j + 1) % nent) {
4225 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4226 if (ej->function == e->function) {
4227 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4231 return 0; /* silence gcc, even though control never reaches here */
4234 /* find an entry with matching function, matching index (if needed), and that
4235 * should be read next (if it's stateful) */
4236 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4237 u32 function, u32 index)
4239 if (e->function != function)
4241 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4243 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4244 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4249 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4250 u32 function, u32 index)
4253 struct kvm_cpuid_entry2 *best = NULL;
4255 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4256 struct kvm_cpuid_entry2 *e;
4258 e = &vcpu->arch.cpuid_entries[i];
4259 if (is_matching_cpuid_entry(e, function, index)) {
4260 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4261 move_to_next_stateful_cpuid_entry(vcpu, i);
4266 * Both basic or both extended?
4268 if (((e->function ^ function) & 0x80000000) == 0)
4269 if (!best || e->function > best->function)
4274 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4276 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4278 struct kvm_cpuid_entry2 *best;
4280 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4281 if (!best || best->eax < 0x80000008)
4283 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4285 return best->eax & 0xff;
4290 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4292 u32 function, index;
4293 struct kvm_cpuid_entry2 *best;
4295 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4296 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4297 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4298 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4299 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4300 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4301 best = kvm_find_cpuid_entry(vcpu, function, index);
4303 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4304 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4305 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4306 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4308 kvm_x86_ops->skip_emulated_instruction(vcpu);
4309 trace_kvm_cpuid(function,
4310 kvm_register_read(vcpu, VCPU_REGS_RAX),
4311 kvm_register_read(vcpu, VCPU_REGS_RBX),
4312 kvm_register_read(vcpu, VCPU_REGS_RCX),
4313 kvm_register_read(vcpu, VCPU_REGS_RDX));
4315 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4318 * Check if userspace requested an interrupt window, and that the
4319 * interrupt window is open.
4321 * No need to exit to userspace if we already have an interrupt queued.
4323 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4325 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4326 vcpu->run->request_interrupt_window &&
4327 kvm_arch_interrupt_allowed(vcpu));
4330 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4332 struct kvm_run *kvm_run = vcpu->run;
4334 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4335 kvm_run->cr8 = kvm_get_cr8(vcpu);
4336 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4337 if (irqchip_in_kernel(vcpu->kvm))
4338 kvm_run->ready_for_interrupt_injection = 1;
4340 kvm_run->ready_for_interrupt_injection =
4341 kvm_arch_interrupt_allowed(vcpu) &&
4342 !kvm_cpu_has_interrupt(vcpu) &&
4343 !kvm_event_needs_reinjection(vcpu);
4346 static void vapic_enter(struct kvm_vcpu *vcpu)
4348 struct kvm_lapic *apic = vcpu->arch.apic;
4351 if (!apic || !apic->vapic_addr)
4354 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4356 vcpu->arch.apic->vapic_page = page;
4359 static void vapic_exit(struct kvm_vcpu *vcpu)
4361 struct kvm_lapic *apic = vcpu->arch.apic;
4364 if (!apic || !apic->vapic_addr)
4367 idx = srcu_read_lock(&vcpu->kvm->srcu);
4368 kvm_release_page_dirty(apic->vapic_page);
4369 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4370 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4373 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4377 if (!kvm_x86_ops->update_cr8_intercept)
4380 if (!vcpu->arch.apic)
4383 if (!vcpu->arch.apic->vapic_addr)
4384 max_irr = kvm_lapic_find_highest_irr(vcpu);
4391 tpr = kvm_lapic_get_cr8(vcpu);
4393 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4396 static void inject_pending_event(struct kvm_vcpu *vcpu)
4398 /* try to reinject previous events if any */
4399 if (vcpu->arch.exception.pending) {
4400 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4401 vcpu->arch.exception.has_error_code,
4402 vcpu->arch.exception.error_code);
4403 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4404 vcpu->arch.exception.has_error_code,
4405 vcpu->arch.exception.error_code);
4409 if (vcpu->arch.nmi_injected) {
4410 kvm_x86_ops->set_nmi(vcpu);
4414 if (vcpu->arch.interrupt.pending) {
4415 kvm_x86_ops->set_irq(vcpu);
4419 /* try to inject new event if pending */
4420 if (vcpu->arch.nmi_pending) {
4421 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4422 vcpu->arch.nmi_pending = false;
4423 vcpu->arch.nmi_injected = true;
4424 kvm_x86_ops->set_nmi(vcpu);
4426 } else if (kvm_cpu_has_interrupt(vcpu)) {
4427 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4428 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4430 kvm_x86_ops->set_irq(vcpu);
4435 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4438 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4439 vcpu->run->request_interrupt_window;
4442 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4443 kvm_mmu_unload(vcpu);
4445 r = kvm_mmu_reload(vcpu);
4449 if (vcpu->requests) {
4450 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4451 __kvm_migrate_timers(vcpu);
4452 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4453 kvm_write_guest_time(vcpu);
4454 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4455 kvm_mmu_sync_roots(vcpu);
4456 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4457 kvm_x86_ops->tlb_flush(vcpu);
4458 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4460 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4464 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4465 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4469 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4470 vcpu->fpu_active = 0;
4471 kvm_x86_ops->fpu_deactivate(vcpu);
4477 kvm_x86_ops->prepare_guest_switch(vcpu);
4478 if (vcpu->fpu_active)
4479 kvm_load_guest_fpu(vcpu);
4481 local_irq_disable();
4483 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4484 smp_mb__after_clear_bit();
4486 if (vcpu->requests || need_resched() || signal_pending(current)) {
4487 set_bit(KVM_REQ_KICK, &vcpu->requests);
4494 inject_pending_event(vcpu);
4496 /* enable NMI/IRQ window open exits if needed */
4497 if (vcpu->arch.nmi_pending)
4498 kvm_x86_ops->enable_nmi_window(vcpu);
4499 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4500 kvm_x86_ops->enable_irq_window(vcpu);
4502 if (kvm_lapic_enabled(vcpu)) {
4503 update_cr8_intercept(vcpu);
4504 kvm_lapic_sync_to_vapic(vcpu);
4507 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4511 if (unlikely(vcpu->arch.switch_db_regs)) {
4513 set_debugreg(vcpu->arch.eff_db[0], 0);
4514 set_debugreg(vcpu->arch.eff_db[1], 1);
4515 set_debugreg(vcpu->arch.eff_db[2], 2);
4516 set_debugreg(vcpu->arch.eff_db[3], 3);
4519 trace_kvm_entry(vcpu->vcpu_id);
4520 kvm_x86_ops->run(vcpu);
4523 * If the guest has used debug registers, at least dr7
4524 * will be disabled while returning to the host.
4525 * If we don't have active breakpoints in the host, we don't
4526 * care about the messed up debug address registers. But if
4527 * we have some of them active, restore the old state.
4529 if (hw_breakpoint_active())
4530 hw_breakpoint_restore();
4532 set_bit(KVM_REQ_KICK, &vcpu->requests);
4538 * We must have an instruction between local_irq_enable() and
4539 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4540 * the interrupt shadow. The stat.exits increment will do nicely.
4541 * But we need to prevent reordering, hence this barrier():
4549 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4552 * Profile KVM exit RIPs:
4554 if (unlikely(prof_on == KVM_PROFILING)) {
4555 unsigned long rip = kvm_rip_read(vcpu);
4556 profile_hit(KVM_PROFILING, (void *)rip);
4560 kvm_lapic_sync_from_vapic(vcpu);
4562 r = kvm_x86_ops->handle_exit(vcpu);
4568 static int __vcpu_run(struct kvm_vcpu *vcpu)
4571 struct kvm *kvm = vcpu->kvm;
4573 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4574 pr_debug("vcpu %d received sipi with vector # %x\n",
4575 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4576 kvm_lapic_reset(vcpu);
4577 r = kvm_arch_vcpu_reset(vcpu);
4580 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4583 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4588 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4589 r = vcpu_enter_guest(vcpu);
4591 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4592 kvm_vcpu_block(vcpu);
4593 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4594 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4596 switch(vcpu->arch.mp_state) {
4597 case KVM_MP_STATE_HALTED:
4598 vcpu->arch.mp_state =
4599 KVM_MP_STATE_RUNNABLE;
4600 case KVM_MP_STATE_RUNNABLE:
4602 case KVM_MP_STATE_SIPI_RECEIVED:
4613 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4614 if (kvm_cpu_has_pending_timer(vcpu))
4615 kvm_inject_pending_timer_irqs(vcpu);
4617 if (dm_request_for_irq_injection(vcpu)) {
4619 vcpu->run->exit_reason = KVM_EXIT_INTR;
4620 ++vcpu->stat.request_irq_exits;
4622 if (signal_pending(current)) {
4624 vcpu->run->exit_reason = KVM_EXIT_INTR;
4625 ++vcpu->stat.signal_exits;
4627 if (need_resched()) {
4628 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4630 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4634 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4635 post_kvm_run_save(vcpu);
4642 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4649 if (vcpu->sigset_active)
4650 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4652 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4653 kvm_vcpu_block(vcpu);
4654 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4659 /* re-sync apic's tpr */
4660 if (!irqchip_in_kernel(vcpu->kvm))
4661 kvm_set_cr8(vcpu, kvm_run->cr8);
4663 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4664 vcpu->arch.emulate_ctxt.restart) {
4665 if (vcpu->mmio_needed) {
4666 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4667 vcpu->mmio_read_completed = 1;
4668 vcpu->mmio_needed = 0;
4670 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4671 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4672 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4673 if (r == EMULATE_DO_MMIO) {
4678 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4679 kvm_register_write(vcpu, VCPU_REGS_RAX,
4680 kvm_run->hypercall.ret);
4682 r = __vcpu_run(vcpu);
4685 if (vcpu->sigset_active)
4686 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4692 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4696 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4697 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4698 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4699 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4700 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4701 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4702 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4703 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4704 #ifdef CONFIG_X86_64
4705 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4706 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4707 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4708 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4709 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4710 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4711 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4712 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4715 regs->rip = kvm_rip_read(vcpu);
4716 regs->rflags = kvm_get_rflags(vcpu);
4723 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4727 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4728 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4729 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4730 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4731 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4732 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4733 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4734 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4735 #ifdef CONFIG_X86_64
4736 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4737 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4738 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4739 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4740 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4741 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4742 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4743 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4746 kvm_rip_write(vcpu, regs->rip);
4747 kvm_set_rflags(vcpu, regs->rflags);
4749 vcpu->arch.exception.pending = false;
4756 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4758 struct kvm_segment cs;
4760 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4764 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4766 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4767 struct kvm_sregs *sregs)
4773 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4774 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4775 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4776 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4777 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4778 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4780 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4781 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4783 kvm_x86_ops->get_idt(vcpu, &dt);
4784 sregs->idt.limit = dt.size;
4785 sregs->idt.base = dt.address;
4786 kvm_x86_ops->get_gdt(vcpu, &dt);
4787 sregs->gdt.limit = dt.size;
4788 sregs->gdt.base = dt.address;
4790 sregs->cr0 = kvm_read_cr0(vcpu);
4791 sregs->cr2 = vcpu->arch.cr2;
4792 sregs->cr3 = vcpu->arch.cr3;
4793 sregs->cr4 = kvm_read_cr4(vcpu);
4794 sregs->cr8 = kvm_get_cr8(vcpu);
4795 sregs->efer = vcpu->arch.efer;
4796 sregs->apic_base = kvm_get_apic_base(vcpu);
4798 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4800 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4801 set_bit(vcpu->arch.interrupt.nr,
4802 (unsigned long *)sregs->interrupt_bitmap);
4809 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4810 struct kvm_mp_state *mp_state)
4813 mp_state->mp_state = vcpu->arch.mp_state;
4818 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4819 struct kvm_mp_state *mp_state)
4822 vcpu->arch.mp_state = mp_state->mp_state;
4827 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
4828 bool has_error_code, u32 error_code)
4830 int cs_db, cs_l, ret;
4831 cache_all_regs(vcpu);
4833 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4835 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4836 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4837 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4838 vcpu->arch.emulate_ctxt.mode =
4839 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4840 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4841 ? X86EMUL_MODE_VM86 : cs_l
4842 ? X86EMUL_MODE_PROT64 : cs_db
4843 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4845 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
4846 tss_selector, reason, has_error_code,
4850 return EMULATE_FAIL;
4852 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4853 return EMULATE_DONE;
4855 EXPORT_SYMBOL_GPL(kvm_task_switch);
4857 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4858 struct kvm_sregs *sregs)
4860 int mmu_reset_needed = 0;
4861 int pending_vec, max_bits;
4866 dt.size = sregs->idt.limit;
4867 dt.address = sregs->idt.base;
4868 kvm_x86_ops->set_idt(vcpu, &dt);
4869 dt.size = sregs->gdt.limit;
4870 dt.address = sregs->gdt.base;
4871 kvm_x86_ops->set_gdt(vcpu, &dt);
4873 vcpu->arch.cr2 = sregs->cr2;
4874 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4875 vcpu->arch.cr3 = sregs->cr3;
4877 kvm_set_cr8(vcpu, sregs->cr8);
4879 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
4880 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4881 kvm_set_apic_base(vcpu, sregs->apic_base);
4883 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
4884 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4885 vcpu->arch.cr0 = sregs->cr0;
4887 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4888 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4889 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4890 load_pdptrs(vcpu, vcpu->arch.cr3);
4891 mmu_reset_needed = 1;
4894 if (mmu_reset_needed)
4895 kvm_mmu_reset_context(vcpu);
4897 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4898 pending_vec = find_first_bit(
4899 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4900 if (pending_vec < max_bits) {
4901 kvm_queue_interrupt(vcpu, pending_vec, false);
4902 pr_debug("Set back pending irq %d\n", pending_vec);
4903 if (irqchip_in_kernel(vcpu->kvm))
4904 kvm_pic_clear_isr_ack(vcpu->kvm);
4907 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4908 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4909 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4910 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4911 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4912 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4914 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4915 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4917 update_cr8_intercept(vcpu);
4919 /* Older userspace won't unhalt the vcpu on reset. */
4920 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4921 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4923 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4930 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4931 struct kvm_guest_debug *dbg)
4933 unsigned long rflags;
4938 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
4940 if (vcpu->arch.exception.pending)
4942 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4943 kvm_queue_exception(vcpu, DB_VECTOR);
4945 kvm_queue_exception(vcpu, BP_VECTOR);
4949 * Read rflags as long as potentially injected trace flags are still
4952 rflags = kvm_get_rflags(vcpu);
4954 vcpu->guest_debug = dbg->control;
4955 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
4956 vcpu->guest_debug = 0;
4958 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
4959 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4960 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4961 vcpu->arch.switch_db_regs =
4962 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4964 for (i = 0; i < KVM_NR_DB_REGS; i++)
4965 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4966 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4969 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
4970 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
4971 get_segment_base(vcpu, VCPU_SREG_CS);
4974 * Trigger an rflags update that will inject or remove the trace
4977 kvm_set_rflags(vcpu, rflags);
4979 kvm_x86_ops->set_guest_debug(vcpu, dbg);
4990 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4991 * we have asm/x86/processor.h
5002 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5003 #ifdef CONFIG_X86_64
5004 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5006 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5011 * Translate a guest virtual address to a guest physical address.
5013 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5014 struct kvm_translation *tr)
5016 unsigned long vaddr = tr->linear_address;
5021 idx = srcu_read_lock(&vcpu->kvm->srcu);
5022 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5023 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5024 tr->physical_address = gpa;
5025 tr->valid = gpa != UNMAPPED_GVA;
5033 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5035 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5039 memcpy(fpu->fpr, fxsave->st_space, 128);
5040 fpu->fcw = fxsave->cwd;
5041 fpu->fsw = fxsave->swd;
5042 fpu->ftwx = fxsave->twd;
5043 fpu->last_opcode = fxsave->fop;
5044 fpu->last_ip = fxsave->rip;
5045 fpu->last_dp = fxsave->rdp;
5046 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5053 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5055 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5059 memcpy(fxsave->st_space, fpu->fpr, 128);
5060 fxsave->cwd = fpu->fcw;
5061 fxsave->swd = fpu->fsw;
5062 fxsave->twd = fpu->ftwx;
5063 fxsave->fop = fpu->last_opcode;
5064 fxsave->rip = fpu->last_ip;
5065 fxsave->rdp = fpu->last_dp;
5066 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5073 void fx_init(struct kvm_vcpu *vcpu)
5075 unsigned after_mxcsr_mask;
5078 * Touch the fpu the first time in non atomic context as if
5079 * this is the first fpu instruction the exception handler
5080 * will fire before the instruction returns and it'll have to
5081 * allocate ram with GFP_KERNEL.
5084 kvm_fx_save(&vcpu->arch.host_fx_image);
5086 /* Initialize guest FPU by resetting ours and saving into guest's */
5088 kvm_fx_save(&vcpu->arch.host_fx_image);
5090 kvm_fx_save(&vcpu->arch.guest_fx_image);
5091 kvm_fx_restore(&vcpu->arch.host_fx_image);
5094 vcpu->arch.cr0 |= X86_CR0_ET;
5095 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5096 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5097 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5098 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5100 EXPORT_SYMBOL_GPL(fx_init);
5102 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5104 if (vcpu->guest_fpu_loaded)
5107 vcpu->guest_fpu_loaded = 1;
5108 kvm_fx_save(&vcpu->arch.host_fx_image);
5109 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5113 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5115 if (!vcpu->guest_fpu_loaded)
5118 vcpu->guest_fpu_loaded = 0;
5119 kvm_fx_save(&vcpu->arch.guest_fx_image);
5120 kvm_fx_restore(&vcpu->arch.host_fx_image);
5121 ++vcpu->stat.fpu_reload;
5122 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5126 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5128 if (vcpu->arch.time_page) {
5129 kvm_release_page_dirty(vcpu->arch.time_page);
5130 vcpu->arch.time_page = NULL;
5133 kvm_x86_ops->vcpu_free(vcpu);
5136 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5139 return kvm_x86_ops->vcpu_create(kvm, id);
5142 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5146 /* We do fxsave: this must be aligned. */
5147 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5149 vcpu->arch.mtrr_state.have_fixed = 1;
5151 r = kvm_arch_vcpu_reset(vcpu);
5153 r = kvm_mmu_setup(vcpu);
5160 kvm_x86_ops->vcpu_free(vcpu);
5164 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5167 kvm_mmu_unload(vcpu);
5170 kvm_x86_ops->vcpu_free(vcpu);
5173 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5175 vcpu->arch.nmi_pending = false;
5176 vcpu->arch.nmi_injected = false;
5178 vcpu->arch.switch_db_regs = 0;
5179 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5180 vcpu->arch.dr6 = DR6_FIXED_1;
5181 vcpu->arch.dr7 = DR7_FIXED_1;
5183 return kvm_x86_ops->vcpu_reset(vcpu);
5186 int kvm_arch_hardware_enable(void *garbage)
5189 * Since this may be called from a hotplug notifcation,
5190 * we can't get the CPU frequency directly.
5192 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5193 int cpu = raw_smp_processor_id();
5194 per_cpu(cpu_tsc_khz, cpu) = 0;
5197 kvm_shared_msr_cpu_online();
5199 return kvm_x86_ops->hardware_enable(garbage);
5202 void kvm_arch_hardware_disable(void *garbage)
5204 kvm_x86_ops->hardware_disable(garbage);
5205 drop_user_return_notifiers(garbage);
5208 int kvm_arch_hardware_setup(void)
5210 return kvm_x86_ops->hardware_setup();
5213 void kvm_arch_hardware_unsetup(void)
5215 kvm_x86_ops->hardware_unsetup();
5218 void kvm_arch_check_processor_compat(void *rtn)
5220 kvm_x86_ops->check_processor_compatibility(rtn);
5223 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5229 BUG_ON(vcpu->kvm == NULL);
5232 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5233 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5234 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5236 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5238 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5243 vcpu->arch.pio_data = page_address(page);
5245 r = kvm_mmu_create(vcpu);
5247 goto fail_free_pio_data;
5249 if (irqchip_in_kernel(kvm)) {
5250 r = kvm_create_lapic(vcpu);
5252 goto fail_mmu_destroy;
5255 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5257 if (!vcpu->arch.mce_banks) {
5259 goto fail_free_lapic;
5261 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5265 kvm_free_lapic(vcpu);
5267 kvm_mmu_destroy(vcpu);
5269 free_page((unsigned long)vcpu->arch.pio_data);
5274 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5278 kfree(vcpu->arch.mce_banks);
5279 kvm_free_lapic(vcpu);
5280 idx = srcu_read_lock(&vcpu->kvm->srcu);
5281 kvm_mmu_destroy(vcpu);
5282 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5283 free_page((unsigned long)vcpu->arch.pio_data);
5286 struct kvm *kvm_arch_create_vm(void)
5288 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5291 return ERR_PTR(-ENOMEM);
5293 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5294 if (!kvm->arch.aliases) {
5296 return ERR_PTR(-ENOMEM);
5299 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5300 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5302 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5303 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5305 rdtscll(kvm->arch.vm_init_tsc);
5310 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5313 kvm_mmu_unload(vcpu);
5317 static void kvm_free_vcpus(struct kvm *kvm)
5320 struct kvm_vcpu *vcpu;
5323 * Unpin any mmu pages first.
5325 kvm_for_each_vcpu(i, vcpu, kvm)
5326 kvm_unload_vcpu_mmu(vcpu);
5327 kvm_for_each_vcpu(i, vcpu, kvm)
5328 kvm_arch_vcpu_free(vcpu);
5330 mutex_lock(&kvm->lock);
5331 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5332 kvm->vcpus[i] = NULL;
5334 atomic_set(&kvm->online_vcpus, 0);
5335 mutex_unlock(&kvm->lock);
5338 void kvm_arch_sync_events(struct kvm *kvm)
5340 kvm_free_all_assigned_devices(kvm);
5343 void kvm_arch_destroy_vm(struct kvm *kvm)
5345 kvm_iommu_unmap_guest(kvm);
5347 kfree(kvm->arch.vpic);
5348 kfree(kvm->arch.vioapic);
5349 kvm_free_vcpus(kvm);
5350 kvm_free_physmem(kvm);
5351 if (kvm->arch.apic_access_page)
5352 put_page(kvm->arch.apic_access_page);
5353 if (kvm->arch.ept_identity_pagetable)
5354 put_page(kvm->arch.ept_identity_pagetable);
5355 cleanup_srcu_struct(&kvm->srcu);
5356 kfree(kvm->arch.aliases);
5360 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5361 struct kvm_memory_slot *memslot,
5362 struct kvm_memory_slot old,
5363 struct kvm_userspace_memory_region *mem,
5366 int npages = memslot->npages;
5368 /*To keep backward compatibility with older userspace,
5369 *x86 needs to hanlde !user_alloc case.
5372 if (npages && !old.rmap) {
5373 unsigned long userspace_addr;
5375 down_write(¤t->mm->mmap_sem);
5376 userspace_addr = do_mmap(NULL, 0,
5378 PROT_READ | PROT_WRITE,
5379 MAP_PRIVATE | MAP_ANONYMOUS,
5381 up_write(¤t->mm->mmap_sem);
5383 if (IS_ERR((void *)userspace_addr))
5384 return PTR_ERR((void *)userspace_addr);
5386 memslot->userspace_addr = userspace_addr;
5394 void kvm_arch_commit_memory_region(struct kvm *kvm,
5395 struct kvm_userspace_memory_region *mem,
5396 struct kvm_memory_slot old,
5400 int npages = mem->memory_size >> PAGE_SHIFT;
5402 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5405 down_write(¤t->mm->mmap_sem);
5406 ret = do_munmap(current->mm, old.userspace_addr,
5407 old.npages * PAGE_SIZE);
5408 up_write(¤t->mm->mmap_sem);
5411 "kvm_vm_ioctl_set_memory_region: "
5412 "failed to munmap memory\n");
5415 spin_lock(&kvm->mmu_lock);
5416 if (!kvm->arch.n_requested_mmu_pages) {
5417 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5418 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5421 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5422 spin_unlock(&kvm->mmu_lock);
5425 void kvm_arch_flush_shadow(struct kvm *kvm)
5427 kvm_mmu_zap_all(kvm);
5428 kvm_reload_remote_mmus(kvm);
5431 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5433 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5434 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5435 || vcpu->arch.nmi_pending ||
5436 (kvm_arch_interrupt_allowed(vcpu) &&
5437 kvm_cpu_has_interrupt(vcpu));
5440 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5443 int cpu = vcpu->cpu;
5445 if (waitqueue_active(&vcpu->wq)) {
5446 wake_up_interruptible(&vcpu->wq);
5447 ++vcpu->stat.halt_wakeup;
5451 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5452 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5453 smp_send_reschedule(cpu);
5457 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5459 return kvm_x86_ops->interrupt_allowed(vcpu);
5462 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5464 unsigned long current_rip = kvm_rip_read(vcpu) +
5465 get_segment_base(vcpu, VCPU_SREG_CS);
5467 return current_rip == linear_rip;
5469 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5471 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5473 unsigned long rflags;
5475 rflags = kvm_x86_ops->get_rflags(vcpu);
5476 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5477 rflags &= ~X86_EFLAGS_TF;
5480 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5482 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5484 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5485 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5486 rflags |= X86_EFLAGS_TF;
5487 kvm_x86_ops->set_rflags(vcpu, rflags);
5489 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5491 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5492 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5493 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5494 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5495 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5496 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5497 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5498 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5499 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5500 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5501 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5502 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);