2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
74 #if defined(MMU_DEBUG) || defined(AUDIT)
76 module_param(dbg, bool, 0644);
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
83 #define ASSERT(x) do { } while (0)
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
95 #define PT64_LEVEL_BITS 9
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107 #define PT32_LEVEL_BITS 10
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149 #include <trace/events/kvm.h>
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
163 struct kvm_shadow_walk_iterator {
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
191 static inline u64 rsvd_bits(int s, int e)
193 return ((1ULL << (e - s + 1)) - 1) << s;
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
203 void kvm_mmu_set_base_ptes(u64 base_pte)
205 shadow_base_present_pte = base_pte;
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 static int is_cpuid_PSE36(void)
230 static int is_nx(struct kvm_vcpu *vcpu)
232 return vcpu->arch.efer & EFER_NX;
235 static int is_shadow_present_pte(u64 pte)
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
241 static int is_large_pte(u64 pte)
243 return pte & PT_PAGE_SIZE_MASK;
246 static int is_writable_pte(unsigned long pte)
248 return pte & PT_WRITABLE_MASK;
251 static int is_dirty_gpte(unsigned long pte)
253 return pte & PT_DIRTY_MASK;
256 static int is_rmap_spte(u64 pte)
258 return is_shadow_present_pte(pte);
261 static int is_last_spte(u64 pte, int level)
263 if (level == PT_PAGE_TABLE_LEVEL)
265 if (is_large_pte(pte))
270 static pfn_t spte_to_pfn(u64 pte)
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 static gfn_t pse36_gfn_delta(u32 gpte)
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 static void __set_spte(u64 *sptep, u64 spte)
285 set_64bit((unsigned long *)sptep, spte);
287 set_64bit((unsigned long long *)sptep, spte);
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
294 return xchg(sptep, new_spte);
300 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
306 static void update_spte(u64 *sptep, u64 new_spte)
310 if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask)) {
311 __set_spte(sptep, new_spte);
313 old_spte = __xchg_spte(sptep, new_spte);
314 if (old_spte & shadow_accessed_mask)
315 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
319 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
320 struct kmem_cache *base_cache, int min)
324 if (cache->nobjs >= min)
326 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
330 cache->objects[cache->nobjs++] = obj;
335 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
336 struct kmem_cache *cache)
339 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
342 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
347 if (cache->nobjs >= min)
349 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
350 page = alloc_page(GFP_KERNEL);
353 cache->objects[cache->nobjs++] = page_address(page);
358 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
361 free_page((unsigned long)mc->objects[--mc->nobjs]);
364 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
368 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
372 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
376 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
379 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
380 mmu_page_header_cache, 4);
385 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
387 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
388 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
389 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
390 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
391 mmu_page_header_cache);
394 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
400 p = mc->objects[--mc->nobjs];
404 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
406 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
407 sizeof(struct kvm_pte_chain));
410 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
412 kmem_cache_free(pte_chain_cache, pc);
415 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
417 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
418 sizeof(struct kvm_rmap_desc));
421 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
423 kmem_cache_free(rmap_desc_cache, rd);
426 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
428 if (!sp->role.direct)
429 return sp->gfns[index];
431 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
434 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
437 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
439 sp->gfns[index] = gfn;
443 * Return the pointer to the largepage write count for a given
444 * gfn, handling slots that are not large page aligned.
446 static int *slot_largepage_idx(gfn_t gfn,
447 struct kvm_memory_slot *slot,
452 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
453 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
454 return &slot->lpage_info[level - 2][idx].write_count;
457 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
459 struct kvm_memory_slot *slot;
463 slot = gfn_to_memslot(kvm, gfn);
464 for (i = PT_DIRECTORY_LEVEL;
465 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
466 write_count = slot_largepage_idx(gfn, slot, i);
471 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
473 struct kvm_memory_slot *slot;
477 slot = gfn_to_memslot(kvm, gfn);
478 for (i = PT_DIRECTORY_LEVEL;
479 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
480 write_count = slot_largepage_idx(gfn, slot, i);
482 WARN_ON(*write_count < 0);
486 static int has_wrprotected_page(struct kvm *kvm,
490 struct kvm_memory_slot *slot;
493 slot = gfn_to_memslot(kvm, gfn);
495 largepage_idx = slot_largepage_idx(gfn, slot, level);
496 return *largepage_idx;
502 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
504 unsigned long page_size;
507 page_size = kvm_host_page_size(kvm, gfn);
509 for (i = PT_PAGE_TABLE_LEVEL;
510 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
511 if (page_size >= KVM_HPAGE_SIZE(i))
520 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
522 struct kvm_memory_slot *slot;
523 int host_level, level, max_level;
525 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
526 if (slot && slot->dirty_bitmap)
527 return PT_PAGE_TABLE_LEVEL;
529 host_level = host_mapping_level(vcpu->kvm, large_gfn);
531 if (host_level == PT_PAGE_TABLE_LEVEL)
534 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
535 kvm_x86_ops->get_lpage_level() : host_level;
537 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
538 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
545 * Take gfn and return the reverse mapping to it.
548 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
550 struct kvm_memory_slot *slot;
553 slot = gfn_to_memslot(kvm, gfn);
554 if (likely(level == PT_PAGE_TABLE_LEVEL))
555 return &slot->rmap[gfn - slot->base_gfn];
557 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
558 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
560 return &slot->lpage_info[level - 2][idx].rmap_pde;
564 * Reverse mapping data structures:
566 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
567 * that points to page_address(page).
569 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
570 * containing more mappings.
572 * Returns the number of rmap entries before the spte was added or zero if
573 * the spte was not added.
576 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
578 struct kvm_mmu_page *sp;
579 struct kvm_rmap_desc *desc;
580 unsigned long *rmapp;
583 if (!is_rmap_spte(*spte))
585 sp = page_header(__pa(spte));
586 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
587 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
589 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
590 *rmapp = (unsigned long)spte;
591 } else if (!(*rmapp & 1)) {
592 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
593 desc = mmu_alloc_rmap_desc(vcpu);
594 desc->sptes[0] = (u64 *)*rmapp;
595 desc->sptes[1] = spte;
596 *rmapp = (unsigned long)desc | 1;
598 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
599 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
600 while (desc->sptes[RMAP_EXT-1] && desc->more) {
604 if (desc->sptes[RMAP_EXT-1]) {
605 desc->more = mmu_alloc_rmap_desc(vcpu);
608 for (i = 0; desc->sptes[i]; ++i)
610 desc->sptes[i] = spte;
615 static void rmap_desc_remove_entry(unsigned long *rmapp,
616 struct kvm_rmap_desc *desc,
618 struct kvm_rmap_desc *prev_desc)
622 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
624 desc->sptes[i] = desc->sptes[j];
625 desc->sptes[j] = NULL;
628 if (!prev_desc && !desc->more)
629 *rmapp = (unsigned long)desc->sptes[0];
632 prev_desc->more = desc->more;
634 *rmapp = (unsigned long)desc->more | 1;
635 mmu_free_rmap_desc(desc);
638 static void rmap_remove(struct kvm *kvm, u64 *spte)
640 struct kvm_rmap_desc *desc;
641 struct kvm_rmap_desc *prev_desc;
642 struct kvm_mmu_page *sp;
644 unsigned long *rmapp;
647 sp = page_header(__pa(spte));
648 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
649 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
651 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
653 } else if (!(*rmapp & 1)) {
654 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
655 if ((u64 *)*rmapp != spte) {
656 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
662 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
663 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
666 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
667 if (desc->sptes[i] == spte) {
668 rmap_desc_remove_entry(rmapp,
676 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
681 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
686 old_spte = __xchg_spte(sptep, new_spte);
687 if (!is_rmap_spte(old_spte))
689 pfn = spte_to_pfn(old_spte);
690 if (old_spte & shadow_accessed_mask)
691 kvm_set_pfn_accessed(pfn);
692 if (is_writable_pte(old_spte))
693 kvm_set_pfn_dirty(pfn);
694 rmap_remove(kvm, sptep);
697 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
699 struct kvm_rmap_desc *desc;
705 else if (!(*rmapp & 1)) {
707 return (u64 *)*rmapp;
710 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
713 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
714 if (prev_spte == spte)
715 return desc->sptes[i];
716 prev_spte = desc->sptes[i];
723 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
725 unsigned long *rmapp;
727 int i, write_protected = 0;
729 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
731 spte = rmap_next(kvm, rmapp, NULL);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
736 if (is_writable_pte(*spte)) {
737 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
740 spte = rmap_next(kvm, rmapp, spte);
742 if (write_protected) {
745 spte = rmap_next(kvm, rmapp, NULL);
746 pfn = spte_to_pfn(*spte);
747 kvm_set_pfn_dirty(pfn);
750 /* check for huge page mappings */
751 for (i = PT_DIRECTORY_LEVEL;
752 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
753 rmapp = gfn_to_rmap(kvm, gfn, i);
754 spte = rmap_next(kvm, rmapp, NULL);
757 BUG_ON(!(*spte & PT_PRESENT_MASK));
758 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
759 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
760 if (is_writable_pte(*spte)) {
762 shadow_trap_nonpresent_pte);
767 spte = rmap_next(kvm, rmapp, spte);
771 return write_protected;
774 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
778 int need_tlb_flush = 0;
780 while ((spte = rmap_next(kvm, rmapp, NULL))) {
781 BUG_ON(!(*spte & PT_PRESENT_MASK));
782 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
783 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
786 return need_tlb_flush;
789 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
793 u64 *spte, new_spte, old_spte;
794 pte_t *ptep = (pte_t *)data;
797 WARN_ON(pte_huge(*ptep));
798 new_pfn = pte_pfn(*ptep);
799 spte = rmap_next(kvm, rmapp, NULL);
801 BUG_ON(!is_shadow_present_pte(*spte));
802 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
804 if (pte_write(*ptep)) {
805 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
806 spte = rmap_next(kvm, rmapp, NULL);
808 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
809 new_spte |= (u64)new_pfn << PAGE_SHIFT;
811 new_spte &= ~PT_WRITABLE_MASK;
812 new_spte &= ~SPTE_HOST_WRITEABLE;
813 new_spte &= ~shadow_accessed_mask;
814 if (is_writable_pte(*spte))
815 kvm_set_pfn_dirty(spte_to_pfn(*spte));
816 old_spte = __xchg_spte(spte, new_spte);
817 if (is_shadow_present_pte(old_spte)
818 && (old_spte & shadow_accessed_mask))
819 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
820 spte = rmap_next(kvm, rmapp, spte);
824 kvm_flush_remote_tlbs(kvm);
829 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
831 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
837 struct kvm_memslots *slots;
839 slots = kvm_memslots(kvm);
841 for (i = 0; i < slots->nmemslots; i++) {
842 struct kvm_memory_slot *memslot = &slots->memslots[i];
843 unsigned long start = memslot->userspace_addr;
846 end = start + (memslot->npages << PAGE_SHIFT);
847 if (hva >= start && hva < end) {
848 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
850 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
852 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
853 int idx = gfn_offset;
854 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
856 &memslot->lpage_info[j][idx].rmap_pde,
859 trace_kvm_age_page(hva, memslot, ret);
867 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
869 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
872 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
874 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
877 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
884 * Emulate the accessed bit for EPT, by checking if this page has
885 * an EPT mapping, and clearing it if it does. On the next access,
886 * a new EPT mapping will be established.
887 * This has some overhead, but not as much as the cost of swapping
888 * out actively used pages or breaking up actively used hugepages.
890 if (!shadow_accessed_mask)
891 return kvm_unmap_rmapp(kvm, rmapp, data);
893 spte = rmap_next(kvm, rmapp, NULL);
897 BUG_ON(!(_spte & PT_PRESENT_MASK));
898 _young = _spte & PT_ACCESSED_MASK;
901 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
903 spte = rmap_next(kvm, rmapp, spte);
908 #define RMAP_RECYCLE_THRESHOLD 1000
910 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
912 unsigned long *rmapp;
913 struct kvm_mmu_page *sp;
915 sp = page_header(__pa(spte));
917 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
919 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
920 kvm_flush_remote_tlbs(vcpu->kvm);
923 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
925 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
929 static int is_empty_shadow_page(u64 *spt)
934 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
935 if (is_shadow_present_pte(*pos)) {
936 printk(KERN_ERR "%s: %p %llx\n", __func__,
944 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
946 ASSERT(is_empty_shadow_page(sp->spt));
947 hlist_del(&sp->hash_link);
949 __free_page(virt_to_page(sp->spt));
950 if (!sp->role.direct)
951 __free_page(virt_to_page(sp->gfns));
952 kmem_cache_free(mmu_page_header_cache, sp);
953 ++kvm->arch.n_free_mmu_pages;
956 static unsigned kvm_page_table_hashfn(gfn_t gfn)
958 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
961 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
962 u64 *parent_pte, int direct)
964 struct kvm_mmu_page *sp;
966 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
967 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
969 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
971 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
972 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
973 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
975 sp->parent_pte = parent_pte;
976 --vcpu->kvm->arch.n_free_mmu_pages;
980 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
981 struct kvm_mmu_page *sp, u64 *parent_pte)
983 struct kvm_pte_chain *pte_chain;
984 struct hlist_node *node;
989 if (!sp->multimapped) {
990 u64 *old = sp->parent_pte;
993 sp->parent_pte = parent_pte;
997 pte_chain = mmu_alloc_pte_chain(vcpu);
998 INIT_HLIST_HEAD(&sp->parent_ptes);
999 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1000 pte_chain->parent_ptes[0] = old;
1002 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1003 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1005 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1006 if (!pte_chain->parent_ptes[i]) {
1007 pte_chain->parent_ptes[i] = parent_pte;
1011 pte_chain = mmu_alloc_pte_chain(vcpu);
1013 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1014 pte_chain->parent_ptes[0] = parent_pte;
1017 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1020 struct kvm_pte_chain *pte_chain;
1021 struct hlist_node *node;
1024 if (!sp->multimapped) {
1025 BUG_ON(sp->parent_pte != parent_pte);
1026 sp->parent_pte = NULL;
1029 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1030 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1031 if (!pte_chain->parent_ptes[i])
1033 if (pte_chain->parent_ptes[i] != parent_pte)
1035 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1036 && pte_chain->parent_ptes[i + 1]) {
1037 pte_chain->parent_ptes[i]
1038 = pte_chain->parent_ptes[i + 1];
1041 pte_chain->parent_ptes[i] = NULL;
1043 hlist_del(&pte_chain->link);
1044 mmu_free_pte_chain(pte_chain);
1045 if (hlist_empty(&sp->parent_ptes)) {
1046 sp->multimapped = 0;
1047 sp->parent_pte = NULL;
1055 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1057 struct kvm_pte_chain *pte_chain;
1058 struct hlist_node *node;
1059 struct kvm_mmu_page *parent_sp;
1062 if (!sp->multimapped && sp->parent_pte) {
1063 parent_sp = page_header(__pa(sp->parent_pte));
1064 fn(parent_sp, sp->parent_pte);
1068 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1069 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1070 u64 *spte = pte_chain->parent_ptes[i];
1074 parent_sp = page_header(__pa(spte));
1075 fn(parent_sp, spte);
1079 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1080 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1082 mmu_parent_walk(sp, mark_unsync);
1085 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1089 index = spte - sp->spt;
1090 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1092 if (sp->unsync_children++)
1094 kvm_mmu_mark_parents_unsync(sp);
1097 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1098 struct kvm_mmu_page *sp)
1102 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1103 sp->spt[i] = shadow_trap_nonpresent_pte;
1106 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1107 struct kvm_mmu_page *sp, bool clear_unsync)
1112 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1116 #define KVM_PAGE_ARRAY_NR 16
1118 struct kvm_mmu_pages {
1119 struct mmu_page_and_offset {
1120 struct kvm_mmu_page *sp;
1122 } page[KVM_PAGE_ARRAY_NR];
1126 #define for_each_unsync_children(bitmap, idx) \
1127 for (idx = find_first_bit(bitmap, 512); \
1129 idx = find_next_bit(bitmap, 512, idx+1))
1131 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1137 for (i=0; i < pvec->nr; i++)
1138 if (pvec->page[i].sp == sp)
1141 pvec->page[pvec->nr].sp = sp;
1142 pvec->page[pvec->nr].idx = idx;
1144 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1147 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1148 struct kvm_mmu_pages *pvec)
1150 int i, ret, nr_unsync_leaf = 0;
1152 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1153 struct kvm_mmu_page *child;
1154 u64 ent = sp->spt[i];
1156 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1157 goto clear_child_bitmap;
1159 child = page_header(ent & PT64_BASE_ADDR_MASK);
1161 if (child->unsync_children) {
1162 if (mmu_pages_add(pvec, child, i))
1165 ret = __mmu_unsync_walk(child, pvec);
1167 goto clear_child_bitmap;
1169 nr_unsync_leaf += ret;
1172 } else if (child->unsync) {
1174 if (mmu_pages_add(pvec, child, i))
1177 goto clear_child_bitmap;
1182 __clear_bit(i, sp->unsync_child_bitmap);
1183 sp->unsync_children--;
1184 WARN_ON((int)sp->unsync_children < 0);
1188 return nr_unsync_leaf;
1191 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1192 struct kvm_mmu_pages *pvec)
1194 if (!sp->unsync_children)
1197 mmu_pages_add(pvec, sp, 0);
1198 return __mmu_unsync_walk(sp, pvec);
1201 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1203 WARN_ON(!sp->unsync);
1204 trace_kvm_mmu_sync_page(sp);
1206 --kvm->stat.mmu_unsync;
1209 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1210 struct list_head *invalid_list);
1211 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1212 struct list_head *invalid_list);
1214 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1215 hlist_for_each_entry(sp, pos, \
1216 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1217 if ((sp)->gfn != (gfn)) {} else
1219 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1220 hlist_for_each_entry(sp, pos, \
1221 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1222 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1223 (sp)->role.invalid) {} else
1225 /* @sp->gfn should be write-protected at the call site */
1226 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1227 struct list_head *invalid_list, bool clear_unsync)
1229 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1230 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1235 kvm_unlink_unsync_page(vcpu->kvm, sp);
1237 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1238 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1242 kvm_mmu_flush_tlb(vcpu);
1246 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1247 struct kvm_mmu_page *sp)
1249 LIST_HEAD(invalid_list);
1252 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1254 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1259 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1260 struct list_head *invalid_list)
1262 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1265 /* @gfn should be write-protected at the call site */
1266 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1268 struct kvm_mmu_page *s;
1269 struct hlist_node *node;
1270 LIST_HEAD(invalid_list);
1273 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1277 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1278 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1279 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1280 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1283 kvm_unlink_unsync_page(vcpu->kvm, s);
1287 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1289 kvm_mmu_flush_tlb(vcpu);
1292 struct mmu_page_path {
1293 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1294 unsigned int idx[PT64_ROOT_LEVEL-1];
1297 #define for_each_sp(pvec, sp, parents, i) \
1298 for (i = mmu_pages_next(&pvec, &parents, -1), \
1299 sp = pvec.page[i].sp; \
1300 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1301 i = mmu_pages_next(&pvec, &parents, i))
1303 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1304 struct mmu_page_path *parents,
1309 for (n = i+1; n < pvec->nr; n++) {
1310 struct kvm_mmu_page *sp = pvec->page[n].sp;
1312 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1313 parents->idx[0] = pvec->page[n].idx;
1317 parents->parent[sp->role.level-2] = sp;
1318 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1324 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1326 struct kvm_mmu_page *sp;
1327 unsigned int level = 0;
1330 unsigned int idx = parents->idx[level];
1332 sp = parents->parent[level];
1336 --sp->unsync_children;
1337 WARN_ON((int)sp->unsync_children < 0);
1338 __clear_bit(idx, sp->unsync_child_bitmap);
1340 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1343 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1344 struct mmu_page_path *parents,
1345 struct kvm_mmu_pages *pvec)
1347 parents->parent[parent->role.level-1] = NULL;
1351 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1352 struct kvm_mmu_page *parent)
1355 struct kvm_mmu_page *sp;
1356 struct mmu_page_path parents;
1357 struct kvm_mmu_pages pages;
1358 LIST_HEAD(invalid_list);
1360 kvm_mmu_pages_init(parent, &parents, &pages);
1361 while (mmu_unsync_walk(parent, &pages)) {
1364 for_each_sp(pages, sp, parents, i)
1365 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1368 kvm_flush_remote_tlbs(vcpu->kvm);
1370 for_each_sp(pages, sp, parents, i) {
1371 kvm_sync_page(vcpu, sp, &invalid_list);
1372 mmu_pages_clear_parents(&parents);
1374 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1375 cond_resched_lock(&vcpu->kvm->mmu_lock);
1376 kvm_mmu_pages_init(parent, &parents, &pages);
1380 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1388 union kvm_mmu_page_role role;
1390 struct kvm_mmu_page *sp;
1391 struct hlist_node *node;
1392 bool need_sync = false;
1394 role = vcpu->arch.mmu.base_role;
1396 role.direct = direct;
1399 role.access = access;
1400 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1401 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1402 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1403 role.quadrant = quadrant;
1405 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1406 if (!need_sync && sp->unsync)
1409 if (sp->role.word != role.word)
1412 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1415 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1416 if (sp->unsync_children) {
1417 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1418 kvm_mmu_mark_parents_unsync(sp);
1419 } else if (sp->unsync)
1420 kvm_mmu_mark_parents_unsync(sp);
1422 trace_kvm_mmu_get_page(sp, false);
1425 ++vcpu->kvm->stat.mmu_cache_miss;
1426 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1431 hlist_add_head(&sp->hash_link,
1432 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1434 if (rmap_write_protect(vcpu->kvm, gfn))
1435 kvm_flush_remote_tlbs(vcpu->kvm);
1436 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1437 kvm_sync_pages(vcpu, gfn);
1439 account_shadowed(vcpu->kvm, gfn);
1441 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1442 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1444 nonpaging_prefetch_page(vcpu, sp);
1445 trace_kvm_mmu_get_page(sp, true);
1449 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1450 struct kvm_vcpu *vcpu, u64 addr)
1452 iterator->addr = addr;
1453 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1454 iterator->level = vcpu->arch.mmu.shadow_root_level;
1455 if (iterator->level == PT32E_ROOT_LEVEL) {
1456 iterator->shadow_addr
1457 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1458 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1460 if (!iterator->shadow_addr)
1461 iterator->level = 0;
1465 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1467 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1470 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1471 if (is_large_pte(*iterator->sptep))
1474 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1475 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1479 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1481 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1485 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1489 spte = __pa(sp->spt)
1490 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1491 | PT_WRITABLE_MASK | PT_USER_MASK;
1492 __set_spte(sptep, spte);
1495 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1497 if (is_large_pte(*sptep)) {
1498 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1499 kvm_flush_remote_tlbs(vcpu->kvm);
1503 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1504 struct kvm_mmu_page *sp)
1512 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1515 if (is_shadow_present_pte(ent)) {
1516 if (!is_last_spte(ent, sp->role.level)) {
1517 ent &= PT64_BASE_ADDR_MASK;
1518 mmu_page_remove_parent_pte(page_header(ent),
1521 if (is_large_pte(ent))
1523 drop_spte(kvm, &pt[i],
1524 shadow_trap_nonpresent_pte);
1527 pt[i] = shadow_trap_nonpresent_pte;
1531 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1533 mmu_page_remove_parent_pte(sp, parent_pte);
1536 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1539 struct kvm_vcpu *vcpu;
1541 kvm_for_each_vcpu(i, vcpu, kvm)
1542 vcpu->arch.last_pte_updated = NULL;
1545 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1549 while (sp->multimapped || sp->parent_pte) {
1550 if (!sp->multimapped)
1551 parent_pte = sp->parent_pte;
1553 struct kvm_pte_chain *chain;
1555 chain = container_of(sp->parent_ptes.first,
1556 struct kvm_pte_chain, link);
1557 parent_pte = chain->parent_ptes[0];
1559 BUG_ON(!parent_pte);
1560 kvm_mmu_put_page(sp, parent_pte);
1561 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1565 static int mmu_zap_unsync_children(struct kvm *kvm,
1566 struct kvm_mmu_page *parent,
1567 struct list_head *invalid_list)
1570 struct mmu_page_path parents;
1571 struct kvm_mmu_pages pages;
1573 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1576 kvm_mmu_pages_init(parent, &parents, &pages);
1577 while (mmu_unsync_walk(parent, &pages)) {
1578 struct kvm_mmu_page *sp;
1580 for_each_sp(pages, sp, parents, i) {
1581 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1582 mmu_pages_clear_parents(&parents);
1585 kvm_mmu_pages_init(parent, &parents, &pages);
1591 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1592 struct list_head *invalid_list)
1596 trace_kvm_mmu_prepare_zap_page(sp);
1597 ++kvm->stat.mmu_shadow_zapped;
1598 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1599 kvm_mmu_page_unlink_children(kvm, sp);
1600 kvm_mmu_unlink_parents(kvm, sp);
1601 if (!sp->role.invalid && !sp->role.direct)
1602 unaccount_shadowed(kvm, sp->gfn);
1604 kvm_unlink_unsync_page(kvm, sp);
1605 if (!sp->root_count) {
1608 list_move(&sp->link, invalid_list);
1610 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1611 kvm_reload_remote_mmus(kvm);
1614 sp->role.invalid = 1;
1615 kvm_mmu_reset_last_pte_updated(kvm);
1619 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1620 struct list_head *invalid_list)
1622 struct kvm_mmu_page *sp;
1624 if (list_empty(invalid_list))
1627 kvm_flush_remote_tlbs(kvm);
1630 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1631 WARN_ON(!sp->role.invalid || sp->root_count);
1632 kvm_mmu_free_page(kvm, sp);
1633 } while (!list_empty(invalid_list));
1638 * Changing the number of mmu pages allocated to the vm
1639 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1641 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1644 LIST_HEAD(invalid_list);
1646 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1647 used_pages = max(0, used_pages);
1650 * If we set the number of mmu pages to be smaller be than the
1651 * number of actived pages , we must to free some mmu pages before we
1655 if (used_pages > kvm_nr_mmu_pages) {
1656 while (used_pages > kvm_nr_mmu_pages &&
1657 !list_empty(&kvm->arch.active_mmu_pages)) {
1658 struct kvm_mmu_page *page;
1660 page = container_of(kvm->arch.active_mmu_pages.prev,
1661 struct kvm_mmu_page, link);
1662 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1665 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1666 kvm_nr_mmu_pages = used_pages;
1667 kvm->arch.n_free_mmu_pages = 0;
1670 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1671 - kvm->arch.n_alloc_mmu_pages;
1673 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1676 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1678 struct kvm_mmu_page *sp;
1679 struct hlist_node *node;
1680 LIST_HEAD(invalid_list);
1683 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1686 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1687 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1690 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1692 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1696 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1698 struct kvm_mmu_page *sp;
1699 struct hlist_node *node;
1700 LIST_HEAD(invalid_list);
1702 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1703 pgprintk("%s: zap %lx %x\n",
1704 __func__, gfn, sp->role.word);
1705 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1707 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1710 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1712 int slot = memslot_id(kvm, gfn);
1713 struct kvm_mmu_page *sp = page_header(__pa(pte));
1715 __set_bit(slot, sp->slot_bitmap);
1718 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1723 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1726 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1727 if (pt[i] == shadow_notrap_nonpresent_pte)
1728 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1733 * The function is based on mtrr_type_lookup() in
1734 * arch/x86/kernel/cpu/mtrr/generic.c
1736 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1741 u8 prev_match, curr_match;
1742 int num_var_ranges = KVM_NR_VAR_MTRR;
1744 if (!mtrr_state->enabled)
1747 /* Make end inclusive end, instead of exclusive */
1750 /* Look in fixed ranges. Just return the type as per start */
1751 if (mtrr_state->have_fixed && (start < 0x100000)) {
1754 if (start < 0x80000) {
1756 idx += (start >> 16);
1757 return mtrr_state->fixed_ranges[idx];
1758 } else if (start < 0xC0000) {
1760 idx += ((start - 0x80000) >> 14);
1761 return mtrr_state->fixed_ranges[idx];
1762 } else if (start < 0x1000000) {
1764 idx += ((start - 0xC0000) >> 12);
1765 return mtrr_state->fixed_ranges[idx];
1770 * Look in variable ranges
1771 * Look of multiple ranges matching this address and pick type
1772 * as per MTRR precedence
1774 if (!(mtrr_state->enabled & 2))
1775 return mtrr_state->def_type;
1778 for (i = 0; i < num_var_ranges; ++i) {
1779 unsigned short start_state, end_state;
1781 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1784 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1785 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1786 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1787 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1789 start_state = ((start & mask) == (base & mask));
1790 end_state = ((end & mask) == (base & mask));
1791 if (start_state != end_state)
1794 if ((start & mask) != (base & mask))
1797 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1798 if (prev_match == 0xFF) {
1799 prev_match = curr_match;
1803 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1804 curr_match == MTRR_TYPE_UNCACHABLE)
1805 return MTRR_TYPE_UNCACHABLE;
1807 if ((prev_match == MTRR_TYPE_WRBACK &&
1808 curr_match == MTRR_TYPE_WRTHROUGH) ||
1809 (prev_match == MTRR_TYPE_WRTHROUGH &&
1810 curr_match == MTRR_TYPE_WRBACK)) {
1811 prev_match = MTRR_TYPE_WRTHROUGH;
1812 curr_match = MTRR_TYPE_WRTHROUGH;
1815 if (prev_match != curr_match)
1816 return MTRR_TYPE_UNCACHABLE;
1819 if (prev_match != 0xFF)
1822 return mtrr_state->def_type;
1825 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1829 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1830 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1831 if (mtrr == 0xfe || mtrr == 0xff)
1832 mtrr = MTRR_TYPE_WRBACK;
1835 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1837 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1839 trace_kvm_mmu_unsync_page(sp);
1840 ++vcpu->kvm->stat.mmu_unsync;
1843 kvm_mmu_mark_parents_unsync(sp);
1844 mmu_convert_notrap(sp);
1847 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1849 struct kvm_mmu_page *s;
1850 struct hlist_node *node;
1852 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1855 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1856 __kvm_unsync_page(vcpu, s);
1860 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1863 struct kvm_mmu_page *s;
1864 struct hlist_node *node;
1865 bool need_unsync = false;
1867 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1871 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1874 if (!need_unsync && !s->unsync) {
1881 kvm_unsync_pages(vcpu, gfn);
1885 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1886 unsigned pte_access, int user_fault,
1887 int write_fault, int dirty, int level,
1888 gfn_t gfn, pfn_t pfn, bool speculative,
1889 bool can_unsync, bool reset_host_protection)
1895 * We don't set the accessed bit, since we sometimes want to see
1896 * whether the guest actually used the pte (in order to detect
1899 spte = shadow_base_present_pte | shadow_dirty_mask;
1901 spte |= shadow_accessed_mask;
1903 pte_access &= ~ACC_WRITE_MASK;
1904 if (pte_access & ACC_EXEC_MASK)
1905 spte |= shadow_x_mask;
1907 spte |= shadow_nx_mask;
1908 if (pte_access & ACC_USER_MASK)
1909 spte |= shadow_user_mask;
1910 if (level > PT_PAGE_TABLE_LEVEL)
1911 spte |= PT_PAGE_SIZE_MASK;
1913 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1914 kvm_is_mmio_pfn(pfn));
1916 if (reset_host_protection)
1917 spte |= SPTE_HOST_WRITEABLE;
1919 spte |= (u64)pfn << PAGE_SHIFT;
1921 if ((pte_access & ACC_WRITE_MASK)
1922 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1925 if (level > PT_PAGE_TABLE_LEVEL &&
1926 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1928 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1932 spte |= PT_WRITABLE_MASK;
1934 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1935 spte &= ~PT_USER_MASK;
1938 * Optimization: for pte sync, if spte was writable the hash
1939 * lookup is unnecessary (and expensive). Write protection
1940 * is responsibility of mmu_get_page / kvm_sync_page.
1941 * Same reasoning can be applied to dirty page accounting.
1943 if (!can_unsync && is_writable_pte(*sptep))
1946 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1947 pgprintk("%s: found shadow page for %lx, marking ro\n",
1950 pte_access &= ~ACC_WRITE_MASK;
1951 if (is_writable_pte(spte))
1952 spte &= ~PT_WRITABLE_MASK;
1956 if (pte_access & ACC_WRITE_MASK)
1957 mark_page_dirty(vcpu->kvm, gfn);
1960 update_spte(sptep, spte);
1965 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1966 unsigned pt_access, unsigned pte_access,
1967 int user_fault, int write_fault, int dirty,
1968 int *ptwrite, int level, gfn_t gfn,
1969 pfn_t pfn, bool speculative,
1970 bool reset_host_protection)
1972 int was_rmapped = 0;
1973 int was_writable = is_writable_pte(*sptep);
1976 pgprintk("%s: spte %llx access %x write_fault %d"
1977 " user_fault %d gfn %lx\n",
1978 __func__, *sptep, pt_access,
1979 write_fault, user_fault, gfn);
1981 if (is_rmap_spte(*sptep)) {
1983 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1984 * the parent of the now unreachable PTE.
1986 if (level > PT_PAGE_TABLE_LEVEL &&
1987 !is_large_pte(*sptep)) {
1988 struct kvm_mmu_page *child;
1991 child = page_header(pte & PT64_BASE_ADDR_MASK);
1992 mmu_page_remove_parent_pte(child, sptep);
1993 __set_spte(sptep, shadow_trap_nonpresent_pte);
1994 kvm_flush_remote_tlbs(vcpu->kvm);
1995 } else if (pfn != spte_to_pfn(*sptep)) {
1996 pgprintk("hfn old %lx new %lx\n",
1997 spte_to_pfn(*sptep), pfn);
1998 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1999 kvm_flush_remote_tlbs(vcpu->kvm);
2004 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2005 dirty, level, gfn, pfn, speculative, true,
2006 reset_host_protection)) {
2009 kvm_mmu_flush_tlb(vcpu);
2012 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2013 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2014 is_large_pte(*sptep)? "2MB" : "4kB",
2015 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2017 if (!was_rmapped && is_large_pte(*sptep))
2018 ++vcpu->kvm->stat.lpages;
2020 page_header_update_slot(vcpu->kvm, sptep, gfn);
2022 rmap_count = rmap_add(vcpu, sptep, gfn);
2023 kvm_release_pfn_clean(pfn);
2024 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2025 rmap_recycle(vcpu, sptep, gfn);
2028 kvm_release_pfn_dirty(pfn);
2030 kvm_release_pfn_clean(pfn);
2033 vcpu->arch.last_pte_updated = sptep;
2034 vcpu->arch.last_pte_gfn = gfn;
2038 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2042 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2043 int level, gfn_t gfn, pfn_t pfn)
2045 struct kvm_shadow_walk_iterator iterator;
2046 struct kvm_mmu_page *sp;
2050 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2051 if (iterator.level == level) {
2052 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2053 0, write, 1, &pt_write,
2054 level, gfn, pfn, false, true);
2055 ++vcpu->stat.pf_fixed;
2059 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2060 u64 base_addr = iterator.addr;
2062 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2063 pseudo_gfn = base_addr >> PAGE_SHIFT;
2064 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2066 1, ACC_ALL, iterator.sptep);
2068 pgprintk("nonpaging_map: ENOMEM\n");
2069 kvm_release_pfn_clean(pfn);
2073 __set_spte(iterator.sptep,
2075 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2076 | shadow_user_mask | shadow_x_mask);
2082 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2088 /* Touch the page, so send SIGBUS */
2089 hva = (void __user *)gfn_to_hva(kvm, gfn);
2090 r = copy_from_user(buf, hva, 1);
2093 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2095 kvm_release_pfn_clean(pfn);
2096 if (is_hwpoison_pfn(pfn)) {
2097 kvm_send_hwpoison_signal(kvm, gfn);
2099 } else if (is_fault_pfn(pfn))
2105 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2110 unsigned long mmu_seq;
2112 level = mapping_level(vcpu, gfn);
2115 * This path builds a PAE pagetable - so we can map 2mb pages at
2116 * maximum. Therefore check if the level is larger than that.
2118 if (level > PT_DIRECTORY_LEVEL)
2119 level = PT_DIRECTORY_LEVEL;
2121 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2123 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2125 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2128 if (is_error_pfn(pfn))
2129 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2131 spin_lock(&vcpu->kvm->mmu_lock);
2132 if (mmu_notifier_retry(vcpu, mmu_seq))
2134 kvm_mmu_free_some_pages(vcpu);
2135 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2136 spin_unlock(&vcpu->kvm->mmu_lock);
2142 spin_unlock(&vcpu->kvm->mmu_lock);
2143 kvm_release_pfn_clean(pfn);
2148 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2151 struct kvm_mmu_page *sp;
2152 LIST_HEAD(invalid_list);
2154 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2156 spin_lock(&vcpu->kvm->mmu_lock);
2157 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2158 hpa_t root = vcpu->arch.mmu.root_hpa;
2160 sp = page_header(root);
2162 if (!sp->root_count && sp->role.invalid) {
2163 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2164 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2166 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2167 spin_unlock(&vcpu->kvm->mmu_lock);
2170 for (i = 0; i < 4; ++i) {
2171 hpa_t root = vcpu->arch.mmu.pae_root[i];
2174 root &= PT64_BASE_ADDR_MASK;
2175 sp = page_header(root);
2177 if (!sp->root_count && sp->role.invalid)
2178 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2181 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2183 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2184 spin_unlock(&vcpu->kvm->mmu_lock);
2185 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2188 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2192 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2193 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2200 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2204 struct kvm_mmu_page *sp;
2208 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2210 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2211 hpa_t root = vcpu->arch.mmu.root_hpa;
2213 ASSERT(!VALID_PAGE(root));
2214 if (mmu_check_root(vcpu, root_gfn))
2220 spin_lock(&vcpu->kvm->mmu_lock);
2221 kvm_mmu_free_some_pages(vcpu);
2222 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2223 PT64_ROOT_LEVEL, direct,
2225 root = __pa(sp->spt);
2227 spin_unlock(&vcpu->kvm->mmu_lock);
2228 vcpu->arch.mmu.root_hpa = root;
2231 direct = !is_paging(vcpu);
2232 for (i = 0; i < 4; ++i) {
2233 hpa_t root = vcpu->arch.mmu.pae_root[i];
2235 ASSERT(!VALID_PAGE(root));
2236 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2237 pdptr = kvm_pdptr_read(vcpu, i);
2238 if (!is_present_gpte(pdptr)) {
2239 vcpu->arch.mmu.pae_root[i] = 0;
2242 root_gfn = pdptr >> PAGE_SHIFT;
2243 } else if (vcpu->arch.mmu.root_level == 0)
2245 if (mmu_check_root(vcpu, root_gfn))
2251 spin_lock(&vcpu->kvm->mmu_lock);
2252 kvm_mmu_free_some_pages(vcpu);
2253 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2254 PT32_ROOT_LEVEL, direct,
2256 root = __pa(sp->spt);
2258 spin_unlock(&vcpu->kvm->mmu_lock);
2260 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2262 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2266 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2269 struct kvm_mmu_page *sp;
2271 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2273 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2274 hpa_t root = vcpu->arch.mmu.root_hpa;
2275 sp = page_header(root);
2276 mmu_sync_children(vcpu, sp);
2279 for (i = 0; i < 4; ++i) {
2280 hpa_t root = vcpu->arch.mmu.pae_root[i];
2282 if (root && VALID_PAGE(root)) {
2283 root &= PT64_BASE_ADDR_MASK;
2284 sp = page_header(root);
2285 mmu_sync_children(vcpu, sp);
2290 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2292 spin_lock(&vcpu->kvm->mmu_lock);
2293 mmu_sync_roots(vcpu);
2294 spin_unlock(&vcpu->kvm->mmu_lock);
2297 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2298 u32 access, u32 *error)
2305 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2311 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2312 r = mmu_topup_memory_caches(vcpu);
2317 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2319 gfn = gva >> PAGE_SHIFT;
2321 return nonpaging_map(vcpu, gva & PAGE_MASK,
2322 error_code & PFERR_WRITE_MASK, gfn);
2325 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2331 gfn_t gfn = gpa >> PAGE_SHIFT;
2332 unsigned long mmu_seq;
2335 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2337 r = mmu_topup_memory_caches(vcpu);
2341 level = mapping_level(vcpu, gfn);
2343 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2345 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2347 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2348 if (is_error_pfn(pfn))
2349 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2350 spin_lock(&vcpu->kvm->mmu_lock);
2351 if (mmu_notifier_retry(vcpu, mmu_seq))
2353 kvm_mmu_free_some_pages(vcpu);
2354 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2356 spin_unlock(&vcpu->kvm->mmu_lock);
2361 spin_unlock(&vcpu->kvm->mmu_lock);
2362 kvm_release_pfn_clean(pfn);
2366 static void nonpaging_free(struct kvm_vcpu *vcpu)
2368 mmu_free_roots(vcpu);
2371 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2373 struct kvm_mmu *context = &vcpu->arch.mmu;
2375 context->new_cr3 = nonpaging_new_cr3;
2376 context->page_fault = nonpaging_page_fault;
2377 context->gva_to_gpa = nonpaging_gva_to_gpa;
2378 context->free = nonpaging_free;
2379 context->prefetch_page = nonpaging_prefetch_page;
2380 context->sync_page = nonpaging_sync_page;
2381 context->invlpg = nonpaging_invlpg;
2382 context->root_level = 0;
2383 context->shadow_root_level = PT32E_ROOT_LEVEL;
2384 context->root_hpa = INVALID_PAGE;
2388 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2390 ++vcpu->stat.tlb_flush;
2391 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2394 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2396 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2397 mmu_free_roots(vcpu);
2400 static void inject_page_fault(struct kvm_vcpu *vcpu,
2404 kvm_inject_page_fault(vcpu, addr, err_code);
2407 static void paging_free(struct kvm_vcpu *vcpu)
2409 nonpaging_free(vcpu);
2412 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2416 bit7 = (gpte >> 7) & 1;
2417 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2421 #include "paging_tmpl.h"
2425 #include "paging_tmpl.h"
2428 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2430 struct kvm_mmu *context = &vcpu->arch.mmu;
2431 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2432 u64 exb_bit_rsvd = 0;
2435 exb_bit_rsvd = rsvd_bits(63, 63);
2437 case PT32_ROOT_LEVEL:
2438 /* no rsvd bits for 2 level 4K page table entries */
2439 context->rsvd_bits_mask[0][1] = 0;
2440 context->rsvd_bits_mask[0][0] = 0;
2441 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2443 if (!is_pse(vcpu)) {
2444 context->rsvd_bits_mask[1][1] = 0;
2448 if (is_cpuid_PSE36())
2449 /* 36bits PSE 4MB page */
2450 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2452 /* 32 bits PSE 4MB page */
2453 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2455 case PT32E_ROOT_LEVEL:
2456 context->rsvd_bits_mask[0][2] =
2457 rsvd_bits(maxphyaddr, 63) |
2458 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2459 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2460 rsvd_bits(maxphyaddr, 62); /* PDE */
2461 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2462 rsvd_bits(maxphyaddr, 62); /* PTE */
2463 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2464 rsvd_bits(maxphyaddr, 62) |
2465 rsvd_bits(13, 20); /* large page */
2466 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2468 case PT64_ROOT_LEVEL:
2469 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2470 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2471 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2472 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2473 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2474 rsvd_bits(maxphyaddr, 51);
2475 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2476 rsvd_bits(maxphyaddr, 51);
2477 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2478 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2479 rsvd_bits(maxphyaddr, 51) |
2481 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2482 rsvd_bits(maxphyaddr, 51) |
2483 rsvd_bits(13, 20); /* large page */
2484 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2489 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2491 struct kvm_mmu *context = &vcpu->arch.mmu;
2493 ASSERT(is_pae(vcpu));
2494 context->new_cr3 = paging_new_cr3;
2495 context->page_fault = paging64_page_fault;
2496 context->gva_to_gpa = paging64_gva_to_gpa;
2497 context->prefetch_page = paging64_prefetch_page;
2498 context->sync_page = paging64_sync_page;
2499 context->invlpg = paging64_invlpg;
2500 context->free = paging_free;
2501 context->root_level = level;
2502 context->shadow_root_level = level;
2503 context->root_hpa = INVALID_PAGE;
2507 static int paging64_init_context(struct kvm_vcpu *vcpu)
2509 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2510 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2513 static int paging32_init_context(struct kvm_vcpu *vcpu)
2515 struct kvm_mmu *context = &vcpu->arch.mmu;
2517 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2518 context->new_cr3 = paging_new_cr3;
2519 context->page_fault = paging32_page_fault;
2520 context->gva_to_gpa = paging32_gva_to_gpa;
2521 context->free = paging_free;
2522 context->prefetch_page = paging32_prefetch_page;
2523 context->sync_page = paging32_sync_page;
2524 context->invlpg = paging32_invlpg;
2525 context->root_level = PT32_ROOT_LEVEL;
2526 context->shadow_root_level = PT32E_ROOT_LEVEL;
2527 context->root_hpa = INVALID_PAGE;
2531 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2533 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2534 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2537 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2539 struct kvm_mmu *context = &vcpu->arch.mmu;
2541 context->new_cr3 = nonpaging_new_cr3;
2542 context->page_fault = tdp_page_fault;
2543 context->free = nonpaging_free;
2544 context->prefetch_page = nonpaging_prefetch_page;
2545 context->sync_page = nonpaging_sync_page;
2546 context->invlpg = nonpaging_invlpg;
2547 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2548 context->root_hpa = INVALID_PAGE;
2550 if (!is_paging(vcpu)) {
2551 context->gva_to_gpa = nonpaging_gva_to_gpa;
2552 context->root_level = 0;
2553 } else if (is_long_mode(vcpu)) {
2554 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2555 context->gva_to_gpa = paging64_gva_to_gpa;
2556 context->root_level = PT64_ROOT_LEVEL;
2557 } else if (is_pae(vcpu)) {
2558 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2559 context->gva_to_gpa = paging64_gva_to_gpa;
2560 context->root_level = PT32E_ROOT_LEVEL;
2562 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2563 context->gva_to_gpa = paging32_gva_to_gpa;
2564 context->root_level = PT32_ROOT_LEVEL;
2570 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2575 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2577 if (!is_paging(vcpu))
2578 r = nonpaging_init_context(vcpu);
2579 else if (is_long_mode(vcpu))
2580 r = paging64_init_context(vcpu);
2581 else if (is_pae(vcpu))
2582 r = paging32E_init_context(vcpu);
2584 r = paging32_init_context(vcpu);
2586 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2587 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2592 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2594 vcpu->arch.update_pte.pfn = bad_pfn;
2597 return init_kvm_tdp_mmu(vcpu);
2599 return init_kvm_softmmu(vcpu);
2602 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2605 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2606 /* mmu.free() should set root_hpa = INVALID_PAGE */
2607 vcpu->arch.mmu.free(vcpu);
2610 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2612 destroy_kvm_mmu(vcpu);
2613 return init_kvm_mmu(vcpu);
2615 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2617 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2621 r = mmu_topup_memory_caches(vcpu);
2624 r = mmu_alloc_roots(vcpu);
2625 spin_lock(&vcpu->kvm->mmu_lock);
2626 mmu_sync_roots(vcpu);
2627 spin_unlock(&vcpu->kvm->mmu_lock);
2630 /* set_cr3() should ensure TLB has been flushed */
2631 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2635 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2637 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2639 mmu_free_roots(vcpu);
2642 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2643 struct kvm_mmu_page *sp,
2647 struct kvm_mmu_page *child;
2650 if (is_shadow_present_pte(pte)) {
2651 if (is_last_spte(pte, sp->role.level))
2652 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2654 child = page_header(pte & PT64_BASE_ADDR_MASK);
2655 mmu_page_remove_parent_pte(child, spte);
2658 __set_spte(spte, shadow_trap_nonpresent_pte);
2659 if (is_large_pte(pte))
2660 --vcpu->kvm->stat.lpages;
2663 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2664 struct kvm_mmu_page *sp,
2668 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2669 ++vcpu->kvm->stat.mmu_pde_zapped;
2673 ++vcpu->kvm->stat.mmu_pte_updated;
2674 if (!sp->role.cr4_pae)
2675 paging32_update_pte(vcpu, sp, spte, new);
2677 paging64_update_pte(vcpu, sp, spte, new);
2680 static bool need_remote_flush(u64 old, u64 new)
2682 if (!is_shadow_present_pte(old))
2684 if (!is_shadow_present_pte(new))
2686 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2688 old ^= PT64_NX_MASK;
2689 new ^= PT64_NX_MASK;
2690 return (old & ~new & PT64_PERM_MASK) != 0;
2693 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2694 bool remote_flush, bool local_flush)
2700 kvm_flush_remote_tlbs(vcpu->kvm);
2701 else if (local_flush)
2702 kvm_mmu_flush_tlb(vcpu);
2705 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2707 u64 *spte = vcpu->arch.last_pte_updated;
2709 return !!(spte && (*spte & shadow_accessed_mask));
2712 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2718 if (!is_present_gpte(gpte))
2720 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2722 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2724 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2726 if (is_error_pfn(pfn)) {
2727 kvm_release_pfn_clean(pfn);
2730 vcpu->arch.update_pte.gfn = gfn;
2731 vcpu->arch.update_pte.pfn = pfn;
2734 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2736 u64 *spte = vcpu->arch.last_pte_updated;
2739 && vcpu->arch.last_pte_gfn == gfn
2740 && shadow_accessed_mask
2741 && !(*spte & shadow_accessed_mask)
2742 && is_shadow_present_pte(*spte))
2743 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2746 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2747 const u8 *new, int bytes,
2748 bool guest_initiated)
2750 gfn_t gfn = gpa >> PAGE_SHIFT;
2751 struct kvm_mmu_page *sp;
2752 struct hlist_node *node;
2753 LIST_HEAD(invalid_list);
2756 unsigned offset = offset_in_page(gpa);
2758 unsigned page_offset;
2759 unsigned misaligned;
2766 bool remote_flush, local_flush, zap_page;
2768 zap_page = remote_flush = local_flush = false;
2770 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2772 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2775 * Assume that the pte write on a page table of the same type
2776 * as the current vcpu paging mode. This is nearly always true
2777 * (might be false while changing modes). Note it is verified later
2780 if ((is_pae(vcpu) && bytes == 4) || !new) {
2781 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2786 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2789 new = (const u8 *)&gentry;
2794 gentry = *(const u32 *)new;
2797 gentry = *(const u64 *)new;
2804 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2805 spin_lock(&vcpu->kvm->mmu_lock);
2806 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2808 kvm_mmu_access_page(vcpu, gfn);
2809 kvm_mmu_free_some_pages(vcpu);
2810 ++vcpu->kvm->stat.mmu_pte_write;
2811 kvm_mmu_audit(vcpu, "pre pte write");
2812 if (guest_initiated) {
2813 if (gfn == vcpu->arch.last_pt_write_gfn
2814 && !last_updated_pte_accessed(vcpu)) {
2815 ++vcpu->arch.last_pt_write_count;
2816 if (vcpu->arch.last_pt_write_count >= 3)
2819 vcpu->arch.last_pt_write_gfn = gfn;
2820 vcpu->arch.last_pt_write_count = 1;
2821 vcpu->arch.last_pte_updated = NULL;
2825 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2826 pte_size = sp->role.cr4_pae ? 8 : 4;
2827 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2828 misaligned |= bytes < 4;
2829 if (misaligned || flooded) {
2831 * Misaligned accesses are too much trouble to fix
2832 * up; also, they usually indicate a page is not used
2835 * If we're seeing too many writes to a page,
2836 * it may no longer be a page table, or we may be
2837 * forking, in which case it is better to unmap the
2840 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2841 gpa, bytes, sp->role.word);
2842 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2844 ++vcpu->kvm->stat.mmu_flooded;
2847 page_offset = offset;
2848 level = sp->role.level;
2850 if (!sp->role.cr4_pae) {
2851 page_offset <<= 1; /* 32->64 */
2853 * A 32-bit pde maps 4MB while the shadow pdes map
2854 * only 2MB. So we need to double the offset again
2855 * and zap two pdes instead of one.
2857 if (level == PT32_ROOT_LEVEL) {
2858 page_offset &= ~7; /* kill rounding error */
2862 quadrant = page_offset >> PAGE_SHIFT;
2863 page_offset &= ~PAGE_MASK;
2864 if (quadrant != sp->role.quadrant)
2868 spte = &sp->spt[page_offset / sizeof(*spte)];
2871 mmu_pte_write_zap_pte(vcpu, sp, spte);
2873 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2874 if (!remote_flush && need_remote_flush(entry, *spte))
2875 remote_flush = true;
2879 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2880 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2881 kvm_mmu_audit(vcpu, "post pte write");
2882 spin_unlock(&vcpu->kvm->mmu_lock);
2883 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2884 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2885 vcpu->arch.update_pte.pfn = bad_pfn;
2889 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2897 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2899 spin_lock(&vcpu->kvm->mmu_lock);
2900 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2901 spin_unlock(&vcpu->kvm->mmu_lock);
2904 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2906 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2909 LIST_HEAD(invalid_list);
2911 free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2912 while (free_pages < KVM_REFILL_PAGES &&
2913 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2914 struct kvm_mmu_page *sp;
2916 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2917 struct kvm_mmu_page, link);
2918 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2920 ++vcpu->kvm->stat.mmu_recycled;
2922 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2925 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2928 enum emulation_result er;
2930 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2939 r = mmu_topup_memory_caches(vcpu);
2943 er = emulate_instruction(vcpu, cr2, error_code, 0);
2948 case EMULATE_DO_MMIO:
2949 ++vcpu->stat.mmio_exits;
2959 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2961 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2963 vcpu->arch.mmu.invlpg(vcpu, gva);
2964 kvm_mmu_flush_tlb(vcpu);
2965 ++vcpu->stat.invlpg;
2967 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2969 void kvm_enable_tdp(void)
2973 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2975 void kvm_disable_tdp(void)
2977 tdp_enabled = false;
2979 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2981 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2983 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2986 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2994 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2995 * Therefore we need to allocate shadow page tables in the first
2996 * 4GB of memory, which happens to fit the DMA32 zone.
2998 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3002 vcpu->arch.mmu.pae_root = page_address(page);
3003 for (i = 0; i < 4; ++i)
3004 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3009 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3012 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3014 return alloc_mmu_pages(vcpu);
3017 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3020 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3022 return init_kvm_mmu(vcpu);
3025 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3029 destroy_kvm_mmu(vcpu);
3030 free_mmu_pages(vcpu);
3031 mmu_free_memory_caches(vcpu);
3034 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3036 struct kvm_mmu_page *sp;
3038 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3042 if (!test_bit(slot, sp->slot_bitmap))
3046 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3048 if (is_writable_pte(pt[i]))
3049 pt[i] &= ~PT_WRITABLE_MASK;
3051 kvm_flush_remote_tlbs(kvm);
3054 void kvm_mmu_zap_all(struct kvm *kvm)
3056 struct kvm_mmu_page *sp, *node;
3057 LIST_HEAD(invalid_list);
3059 spin_lock(&kvm->mmu_lock);
3061 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3062 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3065 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3066 spin_unlock(&kvm->mmu_lock);
3069 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3070 struct list_head *invalid_list)
3072 struct kvm_mmu_page *page;
3074 page = container_of(kvm->arch.active_mmu_pages.prev,
3075 struct kvm_mmu_page, link);
3076 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3079 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3082 struct kvm *kvm_freed = NULL;
3083 int cache_count = 0;
3085 spin_lock(&kvm_lock);
3087 list_for_each_entry(kvm, &vm_list, vm_list) {
3088 int npages, idx, freed_pages;
3089 LIST_HEAD(invalid_list);
3091 idx = srcu_read_lock(&kvm->srcu);
3092 spin_lock(&kvm->mmu_lock);
3093 npages = kvm->arch.n_alloc_mmu_pages -
3094 kvm->arch.n_free_mmu_pages;
3095 cache_count += npages;
3096 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3097 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3099 cache_count -= freed_pages;
3104 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3105 spin_unlock(&kvm->mmu_lock);
3106 srcu_read_unlock(&kvm->srcu, idx);
3109 list_move_tail(&kvm_freed->vm_list, &vm_list);
3111 spin_unlock(&kvm_lock);
3116 static struct shrinker mmu_shrinker = {
3117 .shrink = mmu_shrink,
3118 .seeks = DEFAULT_SEEKS * 10,
3121 static void mmu_destroy_caches(void)
3123 if (pte_chain_cache)
3124 kmem_cache_destroy(pte_chain_cache);
3125 if (rmap_desc_cache)
3126 kmem_cache_destroy(rmap_desc_cache);
3127 if (mmu_page_header_cache)
3128 kmem_cache_destroy(mmu_page_header_cache);
3131 void kvm_mmu_module_exit(void)
3133 mmu_destroy_caches();
3134 unregister_shrinker(&mmu_shrinker);
3137 int kvm_mmu_module_init(void)
3139 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3140 sizeof(struct kvm_pte_chain),
3142 if (!pte_chain_cache)
3144 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3145 sizeof(struct kvm_rmap_desc),
3147 if (!rmap_desc_cache)
3150 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3151 sizeof(struct kvm_mmu_page),
3153 if (!mmu_page_header_cache)
3156 register_shrinker(&mmu_shrinker);
3161 mmu_destroy_caches();
3166 * Caculate mmu pages needed for kvm.
3168 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3171 unsigned int nr_mmu_pages;
3172 unsigned int nr_pages = 0;
3173 struct kvm_memslots *slots;
3175 slots = kvm_memslots(kvm);
3177 for (i = 0; i < slots->nmemslots; i++)
3178 nr_pages += slots->memslots[i].npages;
3180 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3181 nr_mmu_pages = max(nr_mmu_pages,
3182 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3184 return nr_mmu_pages;
3187 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3190 if (len > buffer->len)
3195 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3200 ret = pv_mmu_peek_buffer(buffer, len);
3205 buffer->processed += len;
3209 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3210 gpa_t addr, gpa_t value)
3215 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3218 r = mmu_topup_memory_caches(vcpu);
3222 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3228 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3230 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3234 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3236 spin_lock(&vcpu->kvm->mmu_lock);
3237 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3238 spin_unlock(&vcpu->kvm->mmu_lock);
3242 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3243 struct kvm_pv_mmu_op_buffer *buffer)
3245 struct kvm_mmu_op_header *header;
3247 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3250 switch (header->op) {
3251 case KVM_MMU_OP_WRITE_PTE: {
3252 struct kvm_mmu_op_write_pte *wpte;
3254 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3257 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3260 case KVM_MMU_OP_FLUSH_TLB: {
3261 struct kvm_mmu_op_flush_tlb *ftlb;
3263 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3266 return kvm_pv_mmu_flush_tlb(vcpu);
3268 case KVM_MMU_OP_RELEASE_PT: {
3269 struct kvm_mmu_op_release_pt *rpt;
3271 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3274 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3280 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3281 gpa_t addr, unsigned long *ret)
3284 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3286 buffer->ptr = buffer->buf;
3287 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3288 buffer->processed = 0;
3290 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3294 while (buffer->len) {
3295 r = kvm_pv_mmu_op_one(vcpu, buffer);
3304 *ret = buffer->processed;
3308 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3310 struct kvm_shadow_walk_iterator iterator;
3313 spin_lock(&vcpu->kvm->mmu_lock);
3314 for_each_shadow_entry(vcpu, addr, iterator) {
3315 sptes[iterator.level-1] = *iterator.sptep;
3317 if (!is_shadow_present_pte(*iterator.sptep))
3320 spin_unlock(&vcpu->kvm->mmu_lock);
3324 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3328 static const char *audit_msg;
3330 static gva_t canonicalize(gva_t gva)
3332 #ifdef CONFIG_X86_64
3333 gva = (long long)(gva << 16) >> 16;
3339 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3341 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3346 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3347 u64 ent = sp->spt[i];
3349 if (is_shadow_present_pte(ent)) {
3350 if (!is_last_spte(ent, sp->role.level)) {
3351 struct kvm_mmu_page *child;
3352 child = page_header(ent & PT64_BASE_ADDR_MASK);
3353 __mmu_spte_walk(kvm, child, fn);
3355 fn(kvm, &sp->spt[i]);
3360 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3363 struct kvm_mmu_page *sp;
3365 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3367 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3368 hpa_t root = vcpu->arch.mmu.root_hpa;
3369 sp = page_header(root);
3370 __mmu_spte_walk(vcpu->kvm, sp, fn);
3373 for (i = 0; i < 4; ++i) {
3374 hpa_t root = vcpu->arch.mmu.pae_root[i];
3376 if (root && VALID_PAGE(root)) {
3377 root &= PT64_BASE_ADDR_MASK;
3378 sp = page_header(root);
3379 __mmu_spte_walk(vcpu->kvm, sp, fn);
3385 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3386 gva_t va, int level)
3388 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3390 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3392 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3395 if (ent == shadow_trap_nonpresent_pte)
3398 va = canonicalize(va);
3399 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3400 audit_mappings_page(vcpu, ent, va, level - 1);
3402 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3403 gfn_t gfn = gpa >> PAGE_SHIFT;
3404 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3405 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3407 if (is_error_pfn(pfn)) {
3408 kvm_release_pfn_clean(pfn);
3412 if (is_shadow_present_pte(ent)
3413 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3414 printk(KERN_ERR "xx audit error: (%s) levels %d"
3415 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3416 audit_msg, vcpu->arch.mmu.root_level,
3418 is_shadow_present_pte(ent));
3419 else if (ent == shadow_notrap_nonpresent_pte
3420 && !is_error_hpa(hpa))
3421 printk(KERN_ERR "audit: (%s) notrap shadow,"
3422 " valid guest gva %lx\n", audit_msg, va);
3423 kvm_release_pfn_clean(pfn);
3429 static void audit_mappings(struct kvm_vcpu *vcpu)
3433 if (vcpu->arch.mmu.root_level == 4)
3434 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3436 for (i = 0; i < 4; ++i)
3437 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3438 audit_mappings_page(vcpu,
3439 vcpu->arch.mmu.pae_root[i],
3444 static int count_rmaps(struct kvm_vcpu *vcpu)
3446 struct kvm *kvm = vcpu->kvm;
3447 struct kvm_memslots *slots;
3451 idx = srcu_read_lock(&kvm->srcu);
3452 slots = kvm_memslots(kvm);
3453 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3454 struct kvm_memory_slot *m = &slots->memslots[i];
3455 struct kvm_rmap_desc *d;
3457 for (j = 0; j < m->npages; ++j) {
3458 unsigned long *rmapp = &m->rmap[j];
3462 if (!(*rmapp & 1)) {
3466 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3468 for (k = 0; k < RMAP_EXT; ++k)
3477 srcu_read_unlock(&kvm->srcu, idx);
3481 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3483 unsigned long *rmapp;
3484 struct kvm_mmu_page *rev_sp;
3487 if (is_writable_pte(*sptep)) {
3488 rev_sp = page_header(__pa(sptep));
3489 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3491 if (!gfn_to_memslot(kvm, gfn)) {
3492 if (!printk_ratelimit())
3494 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3496 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3497 audit_msg, (long int)(sptep - rev_sp->spt),
3503 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3505 if (!printk_ratelimit())
3507 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3515 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3517 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3520 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3522 struct kvm_mmu_page *sp;
3525 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3528 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3531 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3534 if (!(ent & PT_PRESENT_MASK))
3536 if (!is_writable_pte(ent))
3538 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3544 static void audit_rmap(struct kvm_vcpu *vcpu)
3546 check_writable_mappings_rmap(vcpu);
3550 static void audit_write_protection(struct kvm_vcpu *vcpu)
3552 struct kvm_mmu_page *sp;
3553 struct kvm_memory_slot *slot;
3554 unsigned long *rmapp;
3558 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3559 if (sp->role.direct)
3564 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3565 rmapp = &slot->rmap[gfn - slot->base_gfn];
3567 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3569 if (is_writable_pte(*spte))
3570 printk(KERN_ERR "%s: (%s) shadow page has "
3571 "writable mappings: gfn %lx role %x\n",
3572 __func__, audit_msg, sp->gfn,
3574 spte = rmap_next(vcpu->kvm, rmapp, spte);
3579 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3586 audit_write_protection(vcpu);
3587 if (strcmp("pre pte write", audit_msg) != 0)
3588 audit_mappings(vcpu);
3589 audit_writable_sptes_have_rmaps(vcpu);