2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
74 #if defined(MMU_DEBUG) || defined(AUDIT)
76 module_param(dbg, bool, 0644);
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
83 #define ASSERT(x) do { } while (0)
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
95 #define PT64_LEVEL_BITS 9
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107 #define PT32_LEVEL_BITS 10
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149 #include <trace/events/kvm.h>
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
163 struct kvm_shadow_walk_iterator {
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
191 static inline u64 rsvd_bits(int s, int e)
193 return ((1ULL << (e - s + 1)) - 1) << s;
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
203 void kvm_mmu_set_base_ptes(u64 base_pte)
205 shadow_base_present_pte = base_pte;
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 static int is_cpuid_PSE36(void)
230 static int is_nx(struct kvm_vcpu *vcpu)
232 return vcpu->arch.efer & EFER_NX;
235 static int is_shadow_present_pte(u64 pte)
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
241 static int is_large_pte(u64 pte)
243 return pte & PT_PAGE_SIZE_MASK;
246 static int is_writable_pte(unsigned long pte)
248 return pte & PT_WRITABLE_MASK;
251 static int is_dirty_gpte(unsigned long pte)
253 return pte & PT_DIRTY_MASK;
256 static int is_rmap_spte(u64 pte)
258 return is_shadow_present_pte(pte);
261 static int is_last_spte(u64 pte, int level)
263 if (level == PT_PAGE_TABLE_LEVEL)
265 if (is_large_pte(pte))
270 static pfn_t spte_to_pfn(u64 pte)
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 static gfn_t pse36_gfn_delta(u32 gpte)
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 static void __set_spte(u64 *sptep, u64 spte)
285 set_64bit((unsigned long *)sptep, spte);
287 set_64bit((unsigned long long *)sptep, spte);
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
294 return xchg(sptep, new_spte);
300 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
306 static void update_spte(u64 *sptep, u64 new_spte)
310 if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask)) {
311 __set_spte(sptep, new_spte);
313 old_spte = __xchg_spte(sptep, new_spte);
314 if (old_spte & shadow_accessed_mask)
315 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
319 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
320 struct kmem_cache *base_cache, int min)
324 if (cache->nobjs >= min)
326 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
327 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
330 cache->objects[cache->nobjs++] = obj;
335 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
336 struct kmem_cache *cache)
339 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
342 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
347 if (cache->nobjs >= min)
349 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
350 page = alloc_page(GFP_KERNEL);
353 cache->objects[cache->nobjs++] = page_address(page);
358 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
361 free_page((unsigned long)mc->objects[--mc->nobjs]);
364 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
368 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
372 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
376 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
379 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
380 mmu_page_header_cache, 4);
385 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
387 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
388 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
389 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
390 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
391 mmu_page_header_cache);
394 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
400 p = mc->objects[--mc->nobjs];
404 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
406 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
407 sizeof(struct kvm_pte_chain));
410 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
412 kmem_cache_free(pte_chain_cache, pc);
415 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
417 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
418 sizeof(struct kvm_rmap_desc));
421 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
423 kmem_cache_free(rmap_desc_cache, rd);
426 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
428 if (!sp->role.direct)
429 return sp->gfns[index];
431 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
434 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
437 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
439 sp->gfns[index] = gfn;
443 * Return the pointer to the largepage write count for a given
444 * gfn, handling slots that are not large page aligned.
446 static int *slot_largepage_idx(gfn_t gfn,
447 struct kvm_memory_slot *slot,
452 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
453 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
454 return &slot->lpage_info[level - 2][idx].write_count;
457 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
459 struct kvm_memory_slot *slot;
463 slot = gfn_to_memslot(kvm, gfn);
464 for (i = PT_DIRECTORY_LEVEL;
465 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
466 write_count = slot_largepage_idx(gfn, slot, i);
471 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
473 struct kvm_memory_slot *slot;
477 slot = gfn_to_memslot(kvm, gfn);
478 for (i = PT_DIRECTORY_LEVEL;
479 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
480 write_count = slot_largepage_idx(gfn, slot, i);
482 WARN_ON(*write_count < 0);
486 static int has_wrprotected_page(struct kvm *kvm,
490 struct kvm_memory_slot *slot;
493 slot = gfn_to_memslot(kvm, gfn);
495 largepage_idx = slot_largepage_idx(gfn, slot, level);
496 return *largepage_idx;
502 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
504 unsigned long page_size;
507 page_size = kvm_host_page_size(kvm, gfn);
509 for (i = PT_PAGE_TABLE_LEVEL;
510 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
511 if (page_size >= KVM_HPAGE_SIZE(i))
520 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
522 struct kvm_memory_slot *slot;
523 int host_level, level, max_level;
525 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
526 if (slot && slot->dirty_bitmap)
527 return PT_PAGE_TABLE_LEVEL;
529 host_level = host_mapping_level(vcpu->kvm, large_gfn);
531 if (host_level == PT_PAGE_TABLE_LEVEL)
534 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
535 kvm_x86_ops->get_lpage_level() : host_level;
537 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
538 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
545 * Take gfn and return the reverse mapping to it.
548 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
550 struct kvm_memory_slot *slot;
553 slot = gfn_to_memslot(kvm, gfn);
554 if (likely(level == PT_PAGE_TABLE_LEVEL))
555 return &slot->rmap[gfn - slot->base_gfn];
557 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
558 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
560 return &slot->lpage_info[level - 2][idx].rmap_pde;
564 * Reverse mapping data structures:
566 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
567 * that points to page_address(page).
569 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
570 * containing more mappings.
572 * Returns the number of rmap entries before the spte was added or zero if
573 * the spte was not added.
576 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
578 struct kvm_mmu_page *sp;
579 struct kvm_rmap_desc *desc;
580 unsigned long *rmapp;
583 if (!is_rmap_spte(*spte))
585 sp = page_header(__pa(spte));
586 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
587 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
589 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
590 *rmapp = (unsigned long)spte;
591 } else if (!(*rmapp & 1)) {
592 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
593 desc = mmu_alloc_rmap_desc(vcpu);
594 desc->sptes[0] = (u64 *)*rmapp;
595 desc->sptes[1] = spte;
596 *rmapp = (unsigned long)desc | 1;
598 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
599 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
600 while (desc->sptes[RMAP_EXT-1] && desc->more) {
604 if (desc->sptes[RMAP_EXT-1]) {
605 desc->more = mmu_alloc_rmap_desc(vcpu);
608 for (i = 0; desc->sptes[i]; ++i)
610 desc->sptes[i] = spte;
615 static void rmap_desc_remove_entry(unsigned long *rmapp,
616 struct kvm_rmap_desc *desc,
618 struct kvm_rmap_desc *prev_desc)
622 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
624 desc->sptes[i] = desc->sptes[j];
625 desc->sptes[j] = NULL;
628 if (!prev_desc && !desc->more)
629 *rmapp = (unsigned long)desc->sptes[0];
632 prev_desc->more = desc->more;
634 *rmapp = (unsigned long)desc->more | 1;
635 mmu_free_rmap_desc(desc);
638 static void rmap_remove(struct kvm *kvm, u64 *spte)
640 struct kvm_rmap_desc *desc;
641 struct kvm_rmap_desc *prev_desc;
642 struct kvm_mmu_page *sp;
644 unsigned long *rmapp;
647 sp = page_header(__pa(spte));
648 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
649 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
651 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
653 } else if (!(*rmapp & 1)) {
654 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
655 if ((u64 *)*rmapp != spte) {
656 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
662 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
663 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
666 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
667 if (desc->sptes[i] == spte) {
668 rmap_desc_remove_entry(rmapp,
676 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
681 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
686 old_spte = __xchg_spte(sptep, new_spte);
687 if (!is_rmap_spte(old_spte))
689 pfn = spte_to_pfn(old_spte);
690 if (old_spte & shadow_accessed_mask)
691 kvm_set_pfn_accessed(pfn);
692 if (is_writable_pte(old_spte))
693 kvm_set_pfn_dirty(pfn);
694 rmap_remove(kvm, sptep);
697 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
699 struct kvm_rmap_desc *desc;
705 else if (!(*rmapp & 1)) {
707 return (u64 *)*rmapp;
710 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
713 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
714 if (prev_spte == spte)
715 return desc->sptes[i];
716 prev_spte = desc->sptes[i];
723 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
725 unsigned long *rmapp;
727 int i, write_protected = 0;
729 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
731 spte = rmap_next(kvm, rmapp, NULL);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
736 if (is_writable_pte(*spte)) {
737 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
740 spte = rmap_next(kvm, rmapp, spte);
742 if (write_protected) {
745 spte = rmap_next(kvm, rmapp, NULL);
746 pfn = spte_to_pfn(*spte);
747 kvm_set_pfn_dirty(pfn);
750 /* check for huge page mappings */
751 for (i = PT_DIRECTORY_LEVEL;
752 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
753 rmapp = gfn_to_rmap(kvm, gfn, i);
754 spte = rmap_next(kvm, rmapp, NULL);
757 BUG_ON(!(*spte & PT_PRESENT_MASK));
758 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
759 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
760 if (is_writable_pte(*spte)) {
762 shadow_trap_nonpresent_pte);
767 spte = rmap_next(kvm, rmapp, spte);
771 return write_protected;
774 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
778 int need_tlb_flush = 0;
780 while ((spte = rmap_next(kvm, rmapp, NULL))) {
781 BUG_ON(!(*spte & PT_PRESENT_MASK));
782 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
783 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
786 return need_tlb_flush;
789 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
793 u64 *spte, new_spte, old_spte;
794 pte_t *ptep = (pte_t *)data;
797 WARN_ON(pte_huge(*ptep));
798 new_pfn = pte_pfn(*ptep);
799 spte = rmap_next(kvm, rmapp, NULL);
801 BUG_ON(!is_shadow_present_pte(*spte));
802 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
804 if (pte_write(*ptep)) {
805 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
806 spte = rmap_next(kvm, rmapp, NULL);
808 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
809 new_spte |= (u64)new_pfn << PAGE_SHIFT;
811 new_spte &= ~PT_WRITABLE_MASK;
812 new_spte &= ~SPTE_HOST_WRITEABLE;
813 new_spte &= ~shadow_accessed_mask;
814 if (is_writable_pte(*spte))
815 kvm_set_pfn_dirty(spte_to_pfn(*spte));
816 old_spte = __xchg_spte(spte, new_spte);
817 if (is_shadow_present_pte(old_spte)
818 && (old_spte & shadow_accessed_mask))
819 mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
820 spte = rmap_next(kvm, rmapp, spte);
824 kvm_flush_remote_tlbs(kvm);
829 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
831 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
837 struct kvm_memslots *slots;
839 slots = kvm_memslots(kvm);
841 for (i = 0; i < slots->nmemslots; i++) {
842 struct kvm_memory_slot *memslot = &slots->memslots[i];
843 unsigned long start = memslot->userspace_addr;
846 end = start + (memslot->npages << PAGE_SHIFT);
847 if (hva >= start && hva < end) {
848 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
850 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
852 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
853 int idx = gfn_offset;
854 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
856 &memslot->lpage_info[j][idx].rmap_pde,
859 trace_kvm_age_page(hva, memslot, ret);
867 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
869 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
872 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
874 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
877 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
884 * Emulate the accessed bit for EPT, by checking if this page has
885 * an EPT mapping, and clearing it if it does. On the next access,
886 * a new EPT mapping will be established.
887 * This has some overhead, but not as much as the cost of swapping
888 * out actively used pages or breaking up actively used hugepages.
890 if (!shadow_accessed_mask)
891 return kvm_unmap_rmapp(kvm, rmapp, data);
893 spte = rmap_next(kvm, rmapp, NULL);
897 BUG_ON(!(_spte & PT_PRESENT_MASK));
898 _young = _spte & PT_ACCESSED_MASK;
901 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
903 spte = rmap_next(kvm, rmapp, spte);
908 #define RMAP_RECYCLE_THRESHOLD 1000
910 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
912 unsigned long *rmapp;
913 struct kvm_mmu_page *sp;
915 sp = page_header(__pa(spte));
917 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
919 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
920 kvm_flush_remote_tlbs(vcpu->kvm);
923 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
925 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
929 static int is_empty_shadow_page(u64 *spt)
934 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
935 if (is_shadow_present_pte(*pos)) {
936 printk(KERN_ERR "%s: %p %llx\n", __func__,
944 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
946 ASSERT(is_empty_shadow_page(sp->spt));
947 hlist_del(&sp->hash_link);
949 __free_page(virt_to_page(sp->spt));
950 if (!sp->role.direct)
951 __free_page(virt_to_page(sp->gfns));
952 kmem_cache_free(mmu_page_header_cache, sp);
953 ++kvm->arch.n_free_mmu_pages;
956 static unsigned kvm_page_table_hashfn(gfn_t gfn)
958 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
961 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
962 u64 *parent_pte, int direct)
964 struct kvm_mmu_page *sp;
966 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
967 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
969 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
971 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
972 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
973 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
975 sp->parent_pte = parent_pte;
976 --vcpu->kvm->arch.n_free_mmu_pages;
980 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
981 struct kvm_mmu_page *sp, u64 *parent_pte)
983 struct kvm_pte_chain *pte_chain;
984 struct hlist_node *node;
989 if (!sp->multimapped) {
990 u64 *old = sp->parent_pte;
993 sp->parent_pte = parent_pte;
997 pte_chain = mmu_alloc_pte_chain(vcpu);
998 INIT_HLIST_HEAD(&sp->parent_ptes);
999 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1000 pte_chain->parent_ptes[0] = old;
1002 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1003 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1005 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1006 if (!pte_chain->parent_ptes[i]) {
1007 pte_chain->parent_ptes[i] = parent_pte;
1011 pte_chain = mmu_alloc_pte_chain(vcpu);
1013 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1014 pte_chain->parent_ptes[0] = parent_pte;
1017 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1020 struct kvm_pte_chain *pte_chain;
1021 struct hlist_node *node;
1024 if (!sp->multimapped) {
1025 BUG_ON(sp->parent_pte != parent_pte);
1026 sp->parent_pte = NULL;
1029 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1030 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1031 if (!pte_chain->parent_ptes[i])
1033 if (pte_chain->parent_ptes[i] != parent_pte)
1035 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1036 && pte_chain->parent_ptes[i + 1]) {
1037 pte_chain->parent_ptes[i]
1038 = pte_chain->parent_ptes[i + 1];
1041 pte_chain->parent_ptes[i] = NULL;
1043 hlist_del(&pte_chain->link);
1044 mmu_free_pte_chain(pte_chain);
1045 if (hlist_empty(&sp->parent_ptes)) {
1046 sp->multimapped = 0;
1047 sp->parent_pte = NULL;
1055 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1057 struct kvm_pte_chain *pte_chain;
1058 struct hlist_node *node;
1059 struct kvm_mmu_page *parent_sp;
1062 if (!sp->multimapped && sp->parent_pte) {
1063 parent_sp = page_header(__pa(sp->parent_pte));
1064 fn(parent_sp, sp->parent_pte);
1068 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1069 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1070 u64 *spte = pte_chain->parent_ptes[i];
1074 parent_sp = page_header(__pa(spte));
1075 fn(parent_sp, spte);
1079 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1080 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1082 mmu_parent_walk(sp, mark_unsync);
1085 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1089 index = spte - sp->spt;
1090 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1092 if (sp->unsync_children++)
1094 kvm_mmu_mark_parents_unsync(sp);
1097 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1098 struct kvm_mmu_page *sp)
1102 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1103 sp->spt[i] = shadow_trap_nonpresent_pte;
1106 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1107 struct kvm_mmu_page *sp, bool clear_unsync)
1112 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1116 #define KVM_PAGE_ARRAY_NR 16
1118 struct kvm_mmu_pages {
1119 struct mmu_page_and_offset {
1120 struct kvm_mmu_page *sp;
1122 } page[KVM_PAGE_ARRAY_NR];
1126 #define for_each_unsync_children(bitmap, idx) \
1127 for (idx = find_first_bit(bitmap, 512); \
1129 idx = find_next_bit(bitmap, 512, idx+1))
1131 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1137 for (i=0; i < pvec->nr; i++)
1138 if (pvec->page[i].sp == sp)
1141 pvec->page[pvec->nr].sp = sp;
1142 pvec->page[pvec->nr].idx = idx;
1144 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1147 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1148 struct kvm_mmu_pages *pvec)
1150 int i, ret, nr_unsync_leaf = 0;
1152 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1153 struct kvm_mmu_page *child;
1154 u64 ent = sp->spt[i];
1156 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1157 goto clear_child_bitmap;
1159 child = page_header(ent & PT64_BASE_ADDR_MASK);
1161 if (child->unsync_children) {
1162 if (mmu_pages_add(pvec, child, i))
1165 ret = __mmu_unsync_walk(child, pvec);
1167 goto clear_child_bitmap;
1169 nr_unsync_leaf += ret;
1172 } else if (child->unsync) {
1174 if (mmu_pages_add(pvec, child, i))
1177 goto clear_child_bitmap;
1182 __clear_bit(i, sp->unsync_child_bitmap);
1183 sp->unsync_children--;
1184 WARN_ON((int)sp->unsync_children < 0);
1188 return nr_unsync_leaf;
1191 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1192 struct kvm_mmu_pages *pvec)
1194 if (!sp->unsync_children)
1197 mmu_pages_add(pvec, sp, 0);
1198 return __mmu_unsync_walk(sp, pvec);
1201 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1203 WARN_ON(!sp->unsync);
1204 trace_kvm_mmu_sync_page(sp);
1206 --kvm->stat.mmu_unsync;
1209 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1210 struct list_head *invalid_list);
1211 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1212 struct list_head *invalid_list);
1214 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1215 hlist_for_each_entry(sp, pos, \
1216 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1217 if ((sp)->gfn != (gfn)) {} else
1219 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1220 hlist_for_each_entry(sp, pos, \
1221 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1222 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1223 (sp)->role.invalid) {} else
1225 /* @sp->gfn should be write-protected at the call site */
1226 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1227 struct list_head *invalid_list, bool clear_unsync)
1229 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1230 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1235 kvm_unlink_unsync_page(vcpu->kvm, sp);
1237 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1238 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1242 kvm_mmu_flush_tlb(vcpu);
1246 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1247 struct kvm_mmu_page *sp)
1249 LIST_HEAD(invalid_list);
1252 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1254 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1259 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1260 struct list_head *invalid_list)
1262 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1265 /* @gfn should be write-protected at the call site */
1266 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1268 struct kvm_mmu_page *s;
1269 struct hlist_node *node;
1270 LIST_HEAD(invalid_list);
1273 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1277 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1278 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1279 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1280 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1283 kvm_unlink_unsync_page(vcpu->kvm, s);
1287 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1289 kvm_mmu_flush_tlb(vcpu);
1292 struct mmu_page_path {
1293 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1294 unsigned int idx[PT64_ROOT_LEVEL-1];
1297 #define for_each_sp(pvec, sp, parents, i) \
1298 for (i = mmu_pages_next(&pvec, &parents, -1), \
1299 sp = pvec.page[i].sp; \
1300 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1301 i = mmu_pages_next(&pvec, &parents, i))
1303 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1304 struct mmu_page_path *parents,
1309 for (n = i+1; n < pvec->nr; n++) {
1310 struct kvm_mmu_page *sp = pvec->page[n].sp;
1312 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1313 parents->idx[0] = pvec->page[n].idx;
1317 parents->parent[sp->role.level-2] = sp;
1318 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1324 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1326 struct kvm_mmu_page *sp;
1327 unsigned int level = 0;
1330 unsigned int idx = parents->idx[level];
1332 sp = parents->parent[level];
1336 --sp->unsync_children;
1337 WARN_ON((int)sp->unsync_children < 0);
1338 __clear_bit(idx, sp->unsync_child_bitmap);
1340 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1343 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1344 struct mmu_page_path *parents,
1345 struct kvm_mmu_pages *pvec)
1347 parents->parent[parent->role.level-1] = NULL;
1351 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1352 struct kvm_mmu_page *parent)
1355 struct kvm_mmu_page *sp;
1356 struct mmu_page_path parents;
1357 struct kvm_mmu_pages pages;
1358 LIST_HEAD(invalid_list);
1360 kvm_mmu_pages_init(parent, &parents, &pages);
1361 while (mmu_unsync_walk(parent, &pages)) {
1364 for_each_sp(pages, sp, parents, i)
1365 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1368 kvm_flush_remote_tlbs(vcpu->kvm);
1370 for_each_sp(pages, sp, parents, i) {
1371 kvm_sync_page(vcpu, sp, &invalid_list);
1372 mmu_pages_clear_parents(&parents);
1374 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1375 cond_resched_lock(&vcpu->kvm->mmu_lock);
1376 kvm_mmu_pages_init(parent, &parents, &pages);
1380 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1388 union kvm_mmu_page_role role;
1390 struct kvm_mmu_page *sp;
1391 struct hlist_node *node;
1392 bool need_sync = false;
1394 role = vcpu->arch.mmu.base_role;
1396 role.direct = direct;
1399 role.access = access;
1400 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1401 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1402 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1403 role.quadrant = quadrant;
1405 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1406 if (!need_sync && sp->unsync)
1409 if (sp->role.word != role.word)
1412 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1415 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1416 if (sp->unsync_children) {
1417 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1418 kvm_mmu_mark_parents_unsync(sp);
1419 } else if (sp->unsync)
1420 kvm_mmu_mark_parents_unsync(sp);
1422 trace_kvm_mmu_get_page(sp, false);
1425 ++vcpu->kvm->stat.mmu_cache_miss;
1426 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1431 hlist_add_head(&sp->hash_link,
1432 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1434 if (rmap_write_protect(vcpu->kvm, gfn))
1435 kvm_flush_remote_tlbs(vcpu->kvm);
1436 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1437 kvm_sync_pages(vcpu, gfn);
1439 account_shadowed(vcpu->kvm, gfn);
1441 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1442 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1444 nonpaging_prefetch_page(vcpu, sp);
1445 trace_kvm_mmu_get_page(sp, true);
1449 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1450 struct kvm_vcpu *vcpu, u64 addr)
1452 iterator->addr = addr;
1453 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1454 iterator->level = vcpu->arch.mmu.shadow_root_level;
1455 if (iterator->level == PT32E_ROOT_LEVEL) {
1456 iterator->shadow_addr
1457 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1458 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1460 if (!iterator->shadow_addr)
1461 iterator->level = 0;
1465 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1467 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1470 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1471 if (is_large_pte(*iterator->sptep))
1474 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1475 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1479 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1481 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1485 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1489 spte = __pa(sp->spt)
1490 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1491 | PT_WRITABLE_MASK | PT_USER_MASK;
1492 __set_spte(sptep, spte);
1495 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1497 if (is_large_pte(*sptep)) {
1498 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1499 kvm_flush_remote_tlbs(vcpu->kvm);
1503 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1504 unsigned direct_access)
1506 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1507 struct kvm_mmu_page *child;
1510 * For the direct sp, if the guest pte's dirty bit
1511 * changed form clean to dirty, it will corrupt the
1512 * sp's access: allow writable in the read-only sp,
1513 * so we should update the spte at this point to get
1514 * a new sp with the correct access.
1516 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1517 if (child->role.access == direct_access)
1520 mmu_page_remove_parent_pte(child, sptep);
1521 __set_spte(sptep, shadow_trap_nonpresent_pte);
1522 kvm_flush_remote_tlbs(vcpu->kvm);
1526 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1527 struct kvm_mmu_page *sp)
1535 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1538 if (is_shadow_present_pte(ent)) {
1539 if (!is_last_spte(ent, sp->role.level)) {
1540 ent &= PT64_BASE_ADDR_MASK;
1541 mmu_page_remove_parent_pte(page_header(ent),
1544 if (is_large_pte(ent))
1546 drop_spte(kvm, &pt[i],
1547 shadow_trap_nonpresent_pte);
1550 pt[i] = shadow_trap_nonpresent_pte;
1554 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1556 mmu_page_remove_parent_pte(sp, parent_pte);
1559 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1562 struct kvm_vcpu *vcpu;
1564 kvm_for_each_vcpu(i, vcpu, kvm)
1565 vcpu->arch.last_pte_updated = NULL;
1568 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1572 while (sp->multimapped || sp->parent_pte) {
1573 if (!sp->multimapped)
1574 parent_pte = sp->parent_pte;
1576 struct kvm_pte_chain *chain;
1578 chain = container_of(sp->parent_ptes.first,
1579 struct kvm_pte_chain, link);
1580 parent_pte = chain->parent_ptes[0];
1582 BUG_ON(!parent_pte);
1583 kvm_mmu_put_page(sp, parent_pte);
1584 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1588 static int mmu_zap_unsync_children(struct kvm *kvm,
1589 struct kvm_mmu_page *parent,
1590 struct list_head *invalid_list)
1593 struct mmu_page_path parents;
1594 struct kvm_mmu_pages pages;
1596 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1599 kvm_mmu_pages_init(parent, &parents, &pages);
1600 while (mmu_unsync_walk(parent, &pages)) {
1601 struct kvm_mmu_page *sp;
1603 for_each_sp(pages, sp, parents, i) {
1604 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1605 mmu_pages_clear_parents(&parents);
1608 kvm_mmu_pages_init(parent, &parents, &pages);
1614 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1615 struct list_head *invalid_list)
1619 trace_kvm_mmu_prepare_zap_page(sp);
1620 ++kvm->stat.mmu_shadow_zapped;
1621 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1622 kvm_mmu_page_unlink_children(kvm, sp);
1623 kvm_mmu_unlink_parents(kvm, sp);
1624 if (!sp->role.invalid && !sp->role.direct)
1625 unaccount_shadowed(kvm, sp->gfn);
1627 kvm_unlink_unsync_page(kvm, sp);
1628 if (!sp->root_count) {
1631 list_move(&sp->link, invalid_list);
1633 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1634 kvm_reload_remote_mmus(kvm);
1637 sp->role.invalid = 1;
1638 kvm_mmu_reset_last_pte_updated(kvm);
1642 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1643 struct list_head *invalid_list)
1645 struct kvm_mmu_page *sp;
1647 if (list_empty(invalid_list))
1650 kvm_flush_remote_tlbs(kvm);
1653 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1654 WARN_ON(!sp->role.invalid || sp->root_count);
1655 kvm_mmu_free_page(kvm, sp);
1656 } while (!list_empty(invalid_list));
1661 * Changing the number of mmu pages allocated to the vm
1662 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1664 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1667 LIST_HEAD(invalid_list);
1669 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1670 used_pages = max(0, used_pages);
1673 * If we set the number of mmu pages to be smaller be than the
1674 * number of actived pages , we must to free some mmu pages before we
1678 if (used_pages > kvm_nr_mmu_pages) {
1679 while (used_pages > kvm_nr_mmu_pages &&
1680 !list_empty(&kvm->arch.active_mmu_pages)) {
1681 struct kvm_mmu_page *page;
1683 page = container_of(kvm->arch.active_mmu_pages.prev,
1684 struct kvm_mmu_page, link);
1685 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1688 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1689 kvm_nr_mmu_pages = used_pages;
1690 kvm->arch.n_free_mmu_pages = 0;
1693 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1694 - kvm->arch.n_alloc_mmu_pages;
1696 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1699 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1701 struct kvm_mmu_page *sp;
1702 struct hlist_node *node;
1703 LIST_HEAD(invalid_list);
1706 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1709 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1710 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1713 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1715 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1719 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1721 struct kvm_mmu_page *sp;
1722 struct hlist_node *node;
1723 LIST_HEAD(invalid_list);
1725 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1726 pgprintk("%s: zap %lx %x\n",
1727 __func__, gfn, sp->role.word);
1728 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1730 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1733 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1735 int slot = memslot_id(kvm, gfn);
1736 struct kvm_mmu_page *sp = page_header(__pa(pte));
1738 __set_bit(slot, sp->slot_bitmap);
1741 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1746 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1749 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1750 if (pt[i] == shadow_notrap_nonpresent_pte)
1751 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1756 * The function is based on mtrr_type_lookup() in
1757 * arch/x86/kernel/cpu/mtrr/generic.c
1759 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1764 u8 prev_match, curr_match;
1765 int num_var_ranges = KVM_NR_VAR_MTRR;
1767 if (!mtrr_state->enabled)
1770 /* Make end inclusive end, instead of exclusive */
1773 /* Look in fixed ranges. Just return the type as per start */
1774 if (mtrr_state->have_fixed && (start < 0x100000)) {
1777 if (start < 0x80000) {
1779 idx += (start >> 16);
1780 return mtrr_state->fixed_ranges[idx];
1781 } else if (start < 0xC0000) {
1783 idx += ((start - 0x80000) >> 14);
1784 return mtrr_state->fixed_ranges[idx];
1785 } else if (start < 0x1000000) {
1787 idx += ((start - 0xC0000) >> 12);
1788 return mtrr_state->fixed_ranges[idx];
1793 * Look in variable ranges
1794 * Look of multiple ranges matching this address and pick type
1795 * as per MTRR precedence
1797 if (!(mtrr_state->enabled & 2))
1798 return mtrr_state->def_type;
1801 for (i = 0; i < num_var_ranges; ++i) {
1802 unsigned short start_state, end_state;
1804 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1807 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1808 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1809 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1810 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1812 start_state = ((start & mask) == (base & mask));
1813 end_state = ((end & mask) == (base & mask));
1814 if (start_state != end_state)
1817 if ((start & mask) != (base & mask))
1820 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1821 if (prev_match == 0xFF) {
1822 prev_match = curr_match;
1826 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1827 curr_match == MTRR_TYPE_UNCACHABLE)
1828 return MTRR_TYPE_UNCACHABLE;
1830 if ((prev_match == MTRR_TYPE_WRBACK &&
1831 curr_match == MTRR_TYPE_WRTHROUGH) ||
1832 (prev_match == MTRR_TYPE_WRTHROUGH &&
1833 curr_match == MTRR_TYPE_WRBACK)) {
1834 prev_match = MTRR_TYPE_WRTHROUGH;
1835 curr_match = MTRR_TYPE_WRTHROUGH;
1838 if (prev_match != curr_match)
1839 return MTRR_TYPE_UNCACHABLE;
1842 if (prev_match != 0xFF)
1845 return mtrr_state->def_type;
1848 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1852 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1853 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1854 if (mtrr == 0xfe || mtrr == 0xff)
1855 mtrr = MTRR_TYPE_WRBACK;
1858 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1860 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1862 trace_kvm_mmu_unsync_page(sp);
1863 ++vcpu->kvm->stat.mmu_unsync;
1866 kvm_mmu_mark_parents_unsync(sp);
1867 mmu_convert_notrap(sp);
1870 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1872 struct kvm_mmu_page *s;
1873 struct hlist_node *node;
1875 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1878 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1879 __kvm_unsync_page(vcpu, s);
1883 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1886 struct kvm_mmu_page *s;
1887 struct hlist_node *node;
1888 bool need_unsync = false;
1890 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1894 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1897 if (!need_unsync && !s->unsync) {
1904 kvm_unsync_pages(vcpu, gfn);
1908 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1909 unsigned pte_access, int user_fault,
1910 int write_fault, int dirty, int level,
1911 gfn_t gfn, pfn_t pfn, bool speculative,
1912 bool can_unsync, bool reset_host_protection)
1918 * We don't set the accessed bit, since we sometimes want to see
1919 * whether the guest actually used the pte (in order to detect
1922 spte = shadow_base_present_pte | shadow_dirty_mask;
1924 spte |= shadow_accessed_mask;
1926 pte_access &= ~ACC_WRITE_MASK;
1927 if (pte_access & ACC_EXEC_MASK)
1928 spte |= shadow_x_mask;
1930 spte |= shadow_nx_mask;
1931 if (pte_access & ACC_USER_MASK)
1932 spte |= shadow_user_mask;
1933 if (level > PT_PAGE_TABLE_LEVEL)
1934 spte |= PT_PAGE_SIZE_MASK;
1936 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1937 kvm_is_mmio_pfn(pfn));
1939 if (reset_host_protection)
1940 spte |= SPTE_HOST_WRITEABLE;
1942 spte |= (u64)pfn << PAGE_SHIFT;
1944 if ((pte_access & ACC_WRITE_MASK)
1945 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1948 if (level > PT_PAGE_TABLE_LEVEL &&
1949 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1951 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1955 spte |= PT_WRITABLE_MASK;
1957 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1958 spte &= ~PT_USER_MASK;
1961 * Optimization: for pte sync, if spte was writable the hash
1962 * lookup is unnecessary (and expensive). Write protection
1963 * is responsibility of mmu_get_page / kvm_sync_page.
1964 * Same reasoning can be applied to dirty page accounting.
1966 if (!can_unsync && is_writable_pte(*sptep))
1969 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1970 pgprintk("%s: found shadow page for %lx, marking ro\n",
1973 pte_access &= ~ACC_WRITE_MASK;
1974 if (is_writable_pte(spte))
1975 spte &= ~PT_WRITABLE_MASK;
1979 if (pte_access & ACC_WRITE_MASK)
1980 mark_page_dirty(vcpu->kvm, gfn);
1983 update_spte(sptep, spte);
1988 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1989 unsigned pt_access, unsigned pte_access,
1990 int user_fault, int write_fault, int dirty,
1991 int *ptwrite, int level, gfn_t gfn,
1992 pfn_t pfn, bool speculative,
1993 bool reset_host_protection)
1995 int was_rmapped = 0;
1996 int was_writable = is_writable_pte(*sptep);
1999 pgprintk("%s: spte %llx access %x write_fault %d"
2000 " user_fault %d gfn %lx\n",
2001 __func__, *sptep, pt_access,
2002 write_fault, user_fault, gfn);
2004 if (is_rmap_spte(*sptep)) {
2006 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2007 * the parent of the now unreachable PTE.
2009 if (level > PT_PAGE_TABLE_LEVEL &&
2010 !is_large_pte(*sptep)) {
2011 struct kvm_mmu_page *child;
2014 child = page_header(pte & PT64_BASE_ADDR_MASK);
2015 mmu_page_remove_parent_pte(child, sptep);
2016 __set_spte(sptep, shadow_trap_nonpresent_pte);
2017 kvm_flush_remote_tlbs(vcpu->kvm);
2018 } else if (pfn != spte_to_pfn(*sptep)) {
2019 pgprintk("hfn old %lx new %lx\n",
2020 spte_to_pfn(*sptep), pfn);
2021 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2022 kvm_flush_remote_tlbs(vcpu->kvm);
2027 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2028 dirty, level, gfn, pfn, speculative, true,
2029 reset_host_protection)) {
2032 kvm_mmu_flush_tlb(vcpu);
2035 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2036 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2037 is_large_pte(*sptep)? "2MB" : "4kB",
2038 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2040 if (!was_rmapped && is_large_pte(*sptep))
2041 ++vcpu->kvm->stat.lpages;
2043 page_header_update_slot(vcpu->kvm, sptep, gfn);
2045 rmap_count = rmap_add(vcpu, sptep, gfn);
2046 kvm_release_pfn_clean(pfn);
2047 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2048 rmap_recycle(vcpu, sptep, gfn);
2051 kvm_release_pfn_dirty(pfn);
2053 kvm_release_pfn_clean(pfn);
2056 vcpu->arch.last_pte_updated = sptep;
2057 vcpu->arch.last_pte_gfn = gfn;
2061 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2065 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2066 int level, gfn_t gfn, pfn_t pfn)
2068 struct kvm_shadow_walk_iterator iterator;
2069 struct kvm_mmu_page *sp;
2073 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2074 if (iterator.level == level) {
2075 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2076 0, write, 1, &pt_write,
2077 level, gfn, pfn, false, true);
2078 ++vcpu->stat.pf_fixed;
2082 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2083 u64 base_addr = iterator.addr;
2085 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2086 pseudo_gfn = base_addr >> PAGE_SHIFT;
2087 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2089 1, ACC_ALL, iterator.sptep);
2091 pgprintk("nonpaging_map: ENOMEM\n");
2092 kvm_release_pfn_clean(pfn);
2096 __set_spte(iterator.sptep,
2098 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2099 | shadow_user_mask | shadow_x_mask);
2105 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2111 /* Touch the page, so send SIGBUS */
2112 hva = (void __user *)gfn_to_hva(kvm, gfn);
2113 r = copy_from_user(buf, hva, 1);
2116 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2118 kvm_release_pfn_clean(pfn);
2119 if (is_hwpoison_pfn(pfn)) {
2120 kvm_send_hwpoison_signal(kvm, gfn);
2122 } else if (is_fault_pfn(pfn))
2128 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2133 unsigned long mmu_seq;
2135 level = mapping_level(vcpu, gfn);
2138 * This path builds a PAE pagetable - so we can map 2mb pages at
2139 * maximum. Therefore check if the level is larger than that.
2141 if (level > PT_DIRECTORY_LEVEL)
2142 level = PT_DIRECTORY_LEVEL;
2144 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2146 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2148 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2151 if (is_error_pfn(pfn))
2152 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2154 spin_lock(&vcpu->kvm->mmu_lock);
2155 if (mmu_notifier_retry(vcpu, mmu_seq))
2157 kvm_mmu_free_some_pages(vcpu);
2158 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2159 spin_unlock(&vcpu->kvm->mmu_lock);
2165 spin_unlock(&vcpu->kvm->mmu_lock);
2166 kvm_release_pfn_clean(pfn);
2171 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2174 struct kvm_mmu_page *sp;
2175 LIST_HEAD(invalid_list);
2177 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2179 spin_lock(&vcpu->kvm->mmu_lock);
2180 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2181 hpa_t root = vcpu->arch.mmu.root_hpa;
2183 sp = page_header(root);
2185 if (!sp->root_count && sp->role.invalid) {
2186 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2187 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2189 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2190 spin_unlock(&vcpu->kvm->mmu_lock);
2193 for (i = 0; i < 4; ++i) {
2194 hpa_t root = vcpu->arch.mmu.pae_root[i];
2197 root &= PT64_BASE_ADDR_MASK;
2198 sp = page_header(root);
2200 if (!sp->root_count && sp->role.invalid)
2201 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2204 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2206 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2207 spin_unlock(&vcpu->kvm->mmu_lock);
2208 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2211 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2215 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2216 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2223 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2227 struct kvm_mmu_page *sp;
2231 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2233 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2234 hpa_t root = vcpu->arch.mmu.root_hpa;
2236 ASSERT(!VALID_PAGE(root));
2237 if (mmu_check_root(vcpu, root_gfn))
2243 spin_lock(&vcpu->kvm->mmu_lock);
2244 kvm_mmu_free_some_pages(vcpu);
2245 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2246 PT64_ROOT_LEVEL, direct,
2248 root = __pa(sp->spt);
2250 spin_unlock(&vcpu->kvm->mmu_lock);
2251 vcpu->arch.mmu.root_hpa = root;
2254 direct = !is_paging(vcpu);
2255 for (i = 0; i < 4; ++i) {
2256 hpa_t root = vcpu->arch.mmu.pae_root[i];
2258 ASSERT(!VALID_PAGE(root));
2259 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2260 pdptr = kvm_pdptr_read(vcpu, i);
2261 if (!is_present_gpte(pdptr)) {
2262 vcpu->arch.mmu.pae_root[i] = 0;
2265 root_gfn = pdptr >> PAGE_SHIFT;
2266 } else if (vcpu->arch.mmu.root_level == 0)
2268 if (mmu_check_root(vcpu, root_gfn))
2274 spin_lock(&vcpu->kvm->mmu_lock);
2275 kvm_mmu_free_some_pages(vcpu);
2276 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2277 PT32_ROOT_LEVEL, direct,
2279 root = __pa(sp->spt);
2281 spin_unlock(&vcpu->kvm->mmu_lock);
2283 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2285 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2289 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2292 struct kvm_mmu_page *sp;
2294 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2296 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2297 hpa_t root = vcpu->arch.mmu.root_hpa;
2298 sp = page_header(root);
2299 mmu_sync_children(vcpu, sp);
2302 for (i = 0; i < 4; ++i) {
2303 hpa_t root = vcpu->arch.mmu.pae_root[i];
2305 if (root && VALID_PAGE(root)) {
2306 root &= PT64_BASE_ADDR_MASK;
2307 sp = page_header(root);
2308 mmu_sync_children(vcpu, sp);
2313 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2315 spin_lock(&vcpu->kvm->mmu_lock);
2316 mmu_sync_roots(vcpu);
2317 spin_unlock(&vcpu->kvm->mmu_lock);
2320 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2321 u32 access, u32 *error)
2328 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2334 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2335 r = mmu_topup_memory_caches(vcpu);
2340 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2342 gfn = gva >> PAGE_SHIFT;
2344 return nonpaging_map(vcpu, gva & PAGE_MASK,
2345 error_code & PFERR_WRITE_MASK, gfn);
2348 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2354 gfn_t gfn = gpa >> PAGE_SHIFT;
2355 unsigned long mmu_seq;
2358 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2360 r = mmu_topup_memory_caches(vcpu);
2364 level = mapping_level(vcpu, gfn);
2366 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2368 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2370 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2371 if (is_error_pfn(pfn))
2372 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2373 spin_lock(&vcpu->kvm->mmu_lock);
2374 if (mmu_notifier_retry(vcpu, mmu_seq))
2376 kvm_mmu_free_some_pages(vcpu);
2377 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2379 spin_unlock(&vcpu->kvm->mmu_lock);
2384 spin_unlock(&vcpu->kvm->mmu_lock);
2385 kvm_release_pfn_clean(pfn);
2389 static void nonpaging_free(struct kvm_vcpu *vcpu)
2391 mmu_free_roots(vcpu);
2394 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2396 struct kvm_mmu *context = &vcpu->arch.mmu;
2398 context->new_cr3 = nonpaging_new_cr3;
2399 context->page_fault = nonpaging_page_fault;
2400 context->gva_to_gpa = nonpaging_gva_to_gpa;
2401 context->free = nonpaging_free;
2402 context->prefetch_page = nonpaging_prefetch_page;
2403 context->sync_page = nonpaging_sync_page;
2404 context->invlpg = nonpaging_invlpg;
2405 context->root_level = 0;
2406 context->shadow_root_level = PT32E_ROOT_LEVEL;
2407 context->root_hpa = INVALID_PAGE;
2411 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2413 ++vcpu->stat.tlb_flush;
2414 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2417 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2419 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2420 mmu_free_roots(vcpu);
2423 static void inject_page_fault(struct kvm_vcpu *vcpu,
2427 kvm_inject_page_fault(vcpu, addr, err_code);
2430 static void paging_free(struct kvm_vcpu *vcpu)
2432 nonpaging_free(vcpu);
2435 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2439 bit7 = (gpte >> 7) & 1;
2440 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2444 #include "paging_tmpl.h"
2448 #include "paging_tmpl.h"
2451 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2453 struct kvm_mmu *context = &vcpu->arch.mmu;
2454 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2455 u64 exb_bit_rsvd = 0;
2458 exb_bit_rsvd = rsvd_bits(63, 63);
2460 case PT32_ROOT_LEVEL:
2461 /* no rsvd bits for 2 level 4K page table entries */
2462 context->rsvd_bits_mask[0][1] = 0;
2463 context->rsvd_bits_mask[0][0] = 0;
2464 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2466 if (!is_pse(vcpu)) {
2467 context->rsvd_bits_mask[1][1] = 0;
2471 if (is_cpuid_PSE36())
2472 /* 36bits PSE 4MB page */
2473 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2475 /* 32 bits PSE 4MB page */
2476 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2478 case PT32E_ROOT_LEVEL:
2479 context->rsvd_bits_mask[0][2] =
2480 rsvd_bits(maxphyaddr, 63) |
2481 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2482 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2483 rsvd_bits(maxphyaddr, 62); /* PDE */
2484 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2485 rsvd_bits(maxphyaddr, 62); /* PTE */
2486 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2487 rsvd_bits(maxphyaddr, 62) |
2488 rsvd_bits(13, 20); /* large page */
2489 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2491 case PT64_ROOT_LEVEL:
2492 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2493 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2494 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2495 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2496 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2497 rsvd_bits(maxphyaddr, 51);
2498 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2499 rsvd_bits(maxphyaddr, 51);
2500 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2501 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2502 rsvd_bits(maxphyaddr, 51) |
2504 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2505 rsvd_bits(maxphyaddr, 51) |
2506 rsvd_bits(13, 20); /* large page */
2507 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2512 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2514 struct kvm_mmu *context = &vcpu->arch.mmu;
2516 ASSERT(is_pae(vcpu));
2517 context->new_cr3 = paging_new_cr3;
2518 context->page_fault = paging64_page_fault;
2519 context->gva_to_gpa = paging64_gva_to_gpa;
2520 context->prefetch_page = paging64_prefetch_page;
2521 context->sync_page = paging64_sync_page;
2522 context->invlpg = paging64_invlpg;
2523 context->free = paging_free;
2524 context->root_level = level;
2525 context->shadow_root_level = level;
2526 context->root_hpa = INVALID_PAGE;
2530 static int paging64_init_context(struct kvm_vcpu *vcpu)
2532 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2533 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2536 static int paging32_init_context(struct kvm_vcpu *vcpu)
2538 struct kvm_mmu *context = &vcpu->arch.mmu;
2540 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2541 context->new_cr3 = paging_new_cr3;
2542 context->page_fault = paging32_page_fault;
2543 context->gva_to_gpa = paging32_gva_to_gpa;
2544 context->free = paging_free;
2545 context->prefetch_page = paging32_prefetch_page;
2546 context->sync_page = paging32_sync_page;
2547 context->invlpg = paging32_invlpg;
2548 context->root_level = PT32_ROOT_LEVEL;
2549 context->shadow_root_level = PT32E_ROOT_LEVEL;
2550 context->root_hpa = INVALID_PAGE;
2554 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2556 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2557 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2560 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2562 struct kvm_mmu *context = &vcpu->arch.mmu;
2564 context->new_cr3 = nonpaging_new_cr3;
2565 context->page_fault = tdp_page_fault;
2566 context->free = nonpaging_free;
2567 context->prefetch_page = nonpaging_prefetch_page;
2568 context->sync_page = nonpaging_sync_page;
2569 context->invlpg = nonpaging_invlpg;
2570 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2571 context->root_hpa = INVALID_PAGE;
2573 if (!is_paging(vcpu)) {
2574 context->gva_to_gpa = nonpaging_gva_to_gpa;
2575 context->root_level = 0;
2576 } else if (is_long_mode(vcpu)) {
2577 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2578 context->gva_to_gpa = paging64_gva_to_gpa;
2579 context->root_level = PT64_ROOT_LEVEL;
2580 } else if (is_pae(vcpu)) {
2581 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2582 context->gva_to_gpa = paging64_gva_to_gpa;
2583 context->root_level = PT32E_ROOT_LEVEL;
2585 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2586 context->gva_to_gpa = paging32_gva_to_gpa;
2587 context->root_level = PT32_ROOT_LEVEL;
2593 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2598 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2600 if (!is_paging(vcpu))
2601 r = nonpaging_init_context(vcpu);
2602 else if (is_long_mode(vcpu))
2603 r = paging64_init_context(vcpu);
2604 else if (is_pae(vcpu))
2605 r = paging32E_init_context(vcpu);
2607 r = paging32_init_context(vcpu);
2609 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2610 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2615 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2617 vcpu->arch.update_pte.pfn = bad_pfn;
2620 return init_kvm_tdp_mmu(vcpu);
2622 return init_kvm_softmmu(vcpu);
2625 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2628 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2629 /* mmu.free() should set root_hpa = INVALID_PAGE */
2630 vcpu->arch.mmu.free(vcpu);
2633 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2635 destroy_kvm_mmu(vcpu);
2636 return init_kvm_mmu(vcpu);
2638 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2640 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2644 r = mmu_topup_memory_caches(vcpu);
2647 r = mmu_alloc_roots(vcpu);
2648 spin_lock(&vcpu->kvm->mmu_lock);
2649 mmu_sync_roots(vcpu);
2650 spin_unlock(&vcpu->kvm->mmu_lock);
2653 /* set_cr3() should ensure TLB has been flushed */
2654 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2658 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2660 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2662 mmu_free_roots(vcpu);
2665 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2666 struct kvm_mmu_page *sp,
2670 struct kvm_mmu_page *child;
2673 if (is_shadow_present_pte(pte)) {
2674 if (is_last_spte(pte, sp->role.level))
2675 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2677 child = page_header(pte & PT64_BASE_ADDR_MASK);
2678 mmu_page_remove_parent_pte(child, spte);
2681 __set_spte(spte, shadow_trap_nonpresent_pte);
2682 if (is_large_pte(pte))
2683 --vcpu->kvm->stat.lpages;
2686 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2687 struct kvm_mmu_page *sp,
2691 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2692 ++vcpu->kvm->stat.mmu_pde_zapped;
2696 ++vcpu->kvm->stat.mmu_pte_updated;
2697 if (!sp->role.cr4_pae)
2698 paging32_update_pte(vcpu, sp, spte, new);
2700 paging64_update_pte(vcpu, sp, spte, new);
2703 static bool need_remote_flush(u64 old, u64 new)
2705 if (!is_shadow_present_pte(old))
2707 if (!is_shadow_present_pte(new))
2709 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2711 old ^= PT64_NX_MASK;
2712 new ^= PT64_NX_MASK;
2713 return (old & ~new & PT64_PERM_MASK) != 0;
2716 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2717 bool remote_flush, bool local_flush)
2723 kvm_flush_remote_tlbs(vcpu->kvm);
2724 else if (local_flush)
2725 kvm_mmu_flush_tlb(vcpu);
2728 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2730 u64 *spte = vcpu->arch.last_pte_updated;
2732 return !!(spte && (*spte & shadow_accessed_mask));
2735 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2741 if (!is_present_gpte(gpte))
2743 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2745 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2747 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2749 if (is_error_pfn(pfn)) {
2750 kvm_release_pfn_clean(pfn);
2753 vcpu->arch.update_pte.gfn = gfn;
2754 vcpu->arch.update_pte.pfn = pfn;
2757 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2759 u64 *spte = vcpu->arch.last_pte_updated;
2762 && vcpu->arch.last_pte_gfn == gfn
2763 && shadow_accessed_mask
2764 && !(*spte & shadow_accessed_mask)
2765 && is_shadow_present_pte(*spte))
2766 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2769 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2770 const u8 *new, int bytes,
2771 bool guest_initiated)
2773 gfn_t gfn = gpa >> PAGE_SHIFT;
2774 struct kvm_mmu_page *sp;
2775 struct hlist_node *node;
2776 LIST_HEAD(invalid_list);
2779 unsigned offset = offset_in_page(gpa);
2781 unsigned page_offset;
2782 unsigned misaligned;
2789 bool remote_flush, local_flush, zap_page;
2791 zap_page = remote_flush = local_flush = false;
2793 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2795 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2798 * Assume that the pte write on a page table of the same type
2799 * as the current vcpu paging mode. This is nearly always true
2800 * (might be false while changing modes). Note it is verified later
2803 if ((is_pae(vcpu) && bytes == 4) || !new) {
2804 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2809 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2812 new = (const u8 *)&gentry;
2817 gentry = *(const u32 *)new;
2820 gentry = *(const u64 *)new;
2827 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2828 spin_lock(&vcpu->kvm->mmu_lock);
2829 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2831 kvm_mmu_access_page(vcpu, gfn);
2832 kvm_mmu_free_some_pages(vcpu);
2833 ++vcpu->kvm->stat.mmu_pte_write;
2834 kvm_mmu_audit(vcpu, "pre pte write");
2835 if (guest_initiated) {
2836 if (gfn == vcpu->arch.last_pt_write_gfn
2837 && !last_updated_pte_accessed(vcpu)) {
2838 ++vcpu->arch.last_pt_write_count;
2839 if (vcpu->arch.last_pt_write_count >= 3)
2842 vcpu->arch.last_pt_write_gfn = gfn;
2843 vcpu->arch.last_pt_write_count = 1;
2844 vcpu->arch.last_pte_updated = NULL;
2848 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2849 pte_size = sp->role.cr4_pae ? 8 : 4;
2850 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2851 misaligned |= bytes < 4;
2852 if (misaligned || flooded) {
2854 * Misaligned accesses are too much trouble to fix
2855 * up; also, they usually indicate a page is not used
2858 * If we're seeing too many writes to a page,
2859 * it may no longer be a page table, or we may be
2860 * forking, in which case it is better to unmap the
2863 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2864 gpa, bytes, sp->role.word);
2865 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2867 ++vcpu->kvm->stat.mmu_flooded;
2870 page_offset = offset;
2871 level = sp->role.level;
2873 if (!sp->role.cr4_pae) {
2874 page_offset <<= 1; /* 32->64 */
2876 * A 32-bit pde maps 4MB while the shadow pdes map
2877 * only 2MB. So we need to double the offset again
2878 * and zap two pdes instead of one.
2880 if (level == PT32_ROOT_LEVEL) {
2881 page_offset &= ~7; /* kill rounding error */
2885 quadrant = page_offset >> PAGE_SHIFT;
2886 page_offset &= ~PAGE_MASK;
2887 if (quadrant != sp->role.quadrant)
2891 spte = &sp->spt[page_offset / sizeof(*spte)];
2894 mmu_pte_write_zap_pte(vcpu, sp, spte);
2896 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2897 if (!remote_flush && need_remote_flush(entry, *spte))
2898 remote_flush = true;
2902 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2903 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2904 kvm_mmu_audit(vcpu, "post pte write");
2905 spin_unlock(&vcpu->kvm->mmu_lock);
2906 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2907 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2908 vcpu->arch.update_pte.pfn = bad_pfn;
2912 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2920 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2922 spin_lock(&vcpu->kvm->mmu_lock);
2923 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2924 spin_unlock(&vcpu->kvm->mmu_lock);
2927 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2929 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2932 LIST_HEAD(invalid_list);
2934 free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2935 while (free_pages < KVM_REFILL_PAGES &&
2936 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2937 struct kvm_mmu_page *sp;
2939 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2940 struct kvm_mmu_page, link);
2941 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2943 ++vcpu->kvm->stat.mmu_recycled;
2945 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2948 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2951 enum emulation_result er;
2953 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2962 r = mmu_topup_memory_caches(vcpu);
2966 er = emulate_instruction(vcpu, cr2, error_code, 0);
2971 case EMULATE_DO_MMIO:
2972 ++vcpu->stat.mmio_exits;
2982 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2984 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2986 vcpu->arch.mmu.invlpg(vcpu, gva);
2987 kvm_mmu_flush_tlb(vcpu);
2988 ++vcpu->stat.invlpg;
2990 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2992 void kvm_enable_tdp(void)
2996 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2998 void kvm_disable_tdp(void)
3000 tdp_enabled = false;
3002 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3004 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3006 free_page((unsigned long)vcpu->arch.mmu.pae_root);
3009 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3017 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3018 * Therefore we need to allocate shadow page tables in the first
3019 * 4GB of memory, which happens to fit the DMA32 zone.
3021 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3025 vcpu->arch.mmu.pae_root = page_address(page);
3026 for (i = 0; i < 4; ++i)
3027 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3032 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3035 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3037 return alloc_mmu_pages(vcpu);
3040 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3043 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3045 return init_kvm_mmu(vcpu);
3048 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3052 destroy_kvm_mmu(vcpu);
3053 free_mmu_pages(vcpu);
3054 mmu_free_memory_caches(vcpu);
3057 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3059 struct kvm_mmu_page *sp;
3061 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3065 if (!test_bit(slot, sp->slot_bitmap))
3069 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3071 if (is_writable_pte(pt[i]))
3072 pt[i] &= ~PT_WRITABLE_MASK;
3074 kvm_flush_remote_tlbs(kvm);
3077 void kvm_mmu_zap_all(struct kvm *kvm)
3079 struct kvm_mmu_page *sp, *node;
3080 LIST_HEAD(invalid_list);
3082 spin_lock(&kvm->mmu_lock);
3084 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3085 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3088 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3089 spin_unlock(&kvm->mmu_lock);
3092 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3093 struct list_head *invalid_list)
3095 struct kvm_mmu_page *page;
3097 page = container_of(kvm->arch.active_mmu_pages.prev,
3098 struct kvm_mmu_page, link);
3099 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3102 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3105 struct kvm *kvm_freed = NULL;
3106 int cache_count = 0;
3108 spin_lock(&kvm_lock);
3110 list_for_each_entry(kvm, &vm_list, vm_list) {
3111 int npages, idx, freed_pages;
3112 LIST_HEAD(invalid_list);
3114 idx = srcu_read_lock(&kvm->srcu);
3115 spin_lock(&kvm->mmu_lock);
3116 npages = kvm->arch.n_alloc_mmu_pages -
3117 kvm->arch.n_free_mmu_pages;
3118 cache_count += npages;
3119 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3120 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3122 cache_count -= freed_pages;
3127 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3128 spin_unlock(&kvm->mmu_lock);
3129 srcu_read_unlock(&kvm->srcu, idx);
3132 list_move_tail(&kvm_freed->vm_list, &vm_list);
3134 spin_unlock(&kvm_lock);
3139 static struct shrinker mmu_shrinker = {
3140 .shrink = mmu_shrink,
3141 .seeks = DEFAULT_SEEKS * 10,
3144 static void mmu_destroy_caches(void)
3146 if (pte_chain_cache)
3147 kmem_cache_destroy(pte_chain_cache);
3148 if (rmap_desc_cache)
3149 kmem_cache_destroy(rmap_desc_cache);
3150 if (mmu_page_header_cache)
3151 kmem_cache_destroy(mmu_page_header_cache);
3154 void kvm_mmu_module_exit(void)
3156 mmu_destroy_caches();
3157 unregister_shrinker(&mmu_shrinker);
3160 int kvm_mmu_module_init(void)
3162 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3163 sizeof(struct kvm_pte_chain),
3165 if (!pte_chain_cache)
3167 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3168 sizeof(struct kvm_rmap_desc),
3170 if (!rmap_desc_cache)
3173 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3174 sizeof(struct kvm_mmu_page),
3176 if (!mmu_page_header_cache)
3179 register_shrinker(&mmu_shrinker);
3184 mmu_destroy_caches();
3189 * Caculate mmu pages needed for kvm.
3191 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3194 unsigned int nr_mmu_pages;
3195 unsigned int nr_pages = 0;
3196 struct kvm_memslots *slots;
3198 slots = kvm_memslots(kvm);
3200 for (i = 0; i < slots->nmemslots; i++)
3201 nr_pages += slots->memslots[i].npages;
3203 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3204 nr_mmu_pages = max(nr_mmu_pages,
3205 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3207 return nr_mmu_pages;
3210 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3213 if (len > buffer->len)
3218 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3223 ret = pv_mmu_peek_buffer(buffer, len);
3228 buffer->processed += len;
3232 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3233 gpa_t addr, gpa_t value)
3238 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3241 r = mmu_topup_memory_caches(vcpu);
3245 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3251 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3253 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3257 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3259 spin_lock(&vcpu->kvm->mmu_lock);
3260 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3261 spin_unlock(&vcpu->kvm->mmu_lock);
3265 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3266 struct kvm_pv_mmu_op_buffer *buffer)
3268 struct kvm_mmu_op_header *header;
3270 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3273 switch (header->op) {
3274 case KVM_MMU_OP_WRITE_PTE: {
3275 struct kvm_mmu_op_write_pte *wpte;
3277 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3280 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3283 case KVM_MMU_OP_FLUSH_TLB: {
3284 struct kvm_mmu_op_flush_tlb *ftlb;
3286 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3289 return kvm_pv_mmu_flush_tlb(vcpu);
3291 case KVM_MMU_OP_RELEASE_PT: {
3292 struct kvm_mmu_op_release_pt *rpt;
3294 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3297 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3303 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3304 gpa_t addr, unsigned long *ret)
3307 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3309 buffer->ptr = buffer->buf;
3310 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3311 buffer->processed = 0;
3313 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3317 while (buffer->len) {
3318 r = kvm_pv_mmu_op_one(vcpu, buffer);
3327 *ret = buffer->processed;
3331 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3333 struct kvm_shadow_walk_iterator iterator;
3336 spin_lock(&vcpu->kvm->mmu_lock);
3337 for_each_shadow_entry(vcpu, addr, iterator) {
3338 sptes[iterator.level-1] = *iterator.sptep;
3340 if (!is_shadow_present_pte(*iterator.sptep))
3343 spin_unlock(&vcpu->kvm->mmu_lock);
3347 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3351 static const char *audit_msg;
3353 static gva_t canonicalize(gva_t gva)
3355 #ifdef CONFIG_X86_64
3356 gva = (long long)(gva << 16) >> 16;
3362 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3364 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3369 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3370 u64 ent = sp->spt[i];
3372 if (is_shadow_present_pte(ent)) {
3373 if (!is_last_spte(ent, sp->role.level)) {
3374 struct kvm_mmu_page *child;
3375 child = page_header(ent & PT64_BASE_ADDR_MASK);
3376 __mmu_spte_walk(kvm, child, fn);
3378 fn(kvm, &sp->spt[i]);
3383 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3386 struct kvm_mmu_page *sp;
3388 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3390 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3391 hpa_t root = vcpu->arch.mmu.root_hpa;
3392 sp = page_header(root);
3393 __mmu_spte_walk(vcpu->kvm, sp, fn);
3396 for (i = 0; i < 4; ++i) {
3397 hpa_t root = vcpu->arch.mmu.pae_root[i];
3399 if (root && VALID_PAGE(root)) {
3400 root &= PT64_BASE_ADDR_MASK;
3401 sp = page_header(root);
3402 __mmu_spte_walk(vcpu->kvm, sp, fn);
3408 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3409 gva_t va, int level)
3411 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3413 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3415 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3418 if (ent == shadow_trap_nonpresent_pte)
3421 va = canonicalize(va);
3422 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3423 audit_mappings_page(vcpu, ent, va, level - 1);
3425 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3426 gfn_t gfn = gpa >> PAGE_SHIFT;
3427 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3428 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3430 if (is_error_pfn(pfn)) {
3431 kvm_release_pfn_clean(pfn);
3435 if (is_shadow_present_pte(ent)
3436 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3437 printk(KERN_ERR "xx audit error: (%s) levels %d"
3438 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3439 audit_msg, vcpu->arch.mmu.root_level,
3441 is_shadow_present_pte(ent));
3442 else if (ent == shadow_notrap_nonpresent_pte
3443 && !is_error_hpa(hpa))
3444 printk(KERN_ERR "audit: (%s) notrap shadow,"
3445 " valid guest gva %lx\n", audit_msg, va);
3446 kvm_release_pfn_clean(pfn);
3452 static void audit_mappings(struct kvm_vcpu *vcpu)
3456 if (vcpu->arch.mmu.root_level == 4)
3457 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3459 for (i = 0; i < 4; ++i)
3460 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3461 audit_mappings_page(vcpu,
3462 vcpu->arch.mmu.pae_root[i],
3467 static int count_rmaps(struct kvm_vcpu *vcpu)
3469 struct kvm *kvm = vcpu->kvm;
3470 struct kvm_memslots *slots;
3474 idx = srcu_read_lock(&kvm->srcu);
3475 slots = kvm_memslots(kvm);
3476 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3477 struct kvm_memory_slot *m = &slots->memslots[i];
3478 struct kvm_rmap_desc *d;
3480 for (j = 0; j < m->npages; ++j) {
3481 unsigned long *rmapp = &m->rmap[j];
3485 if (!(*rmapp & 1)) {
3489 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3491 for (k = 0; k < RMAP_EXT; ++k)
3500 srcu_read_unlock(&kvm->srcu, idx);
3504 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3506 unsigned long *rmapp;
3507 struct kvm_mmu_page *rev_sp;
3510 if (is_writable_pte(*sptep)) {
3511 rev_sp = page_header(__pa(sptep));
3512 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3514 if (!gfn_to_memslot(kvm, gfn)) {
3515 if (!printk_ratelimit())
3517 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3519 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3520 audit_msg, (long int)(sptep - rev_sp->spt),
3526 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3528 if (!printk_ratelimit())
3530 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3538 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3540 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3543 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3545 struct kvm_mmu_page *sp;
3548 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3551 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3554 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3557 if (!(ent & PT_PRESENT_MASK))
3559 if (!is_writable_pte(ent))
3561 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3567 static void audit_rmap(struct kvm_vcpu *vcpu)
3569 check_writable_mappings_rmap(vcpu);
3573 static void audit_write_protection(struct kvm_vcpu *vcpu)
3575 struct kvm_mmu_page *sp;
3576 struct kvm_memory_slot *slot;
3577 unsigned long *rmapp;
3581 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3582 if (sp->role.direct)
3587 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3588 rmapp = &slot->rmap[gfn - slot->base_gfn];
3590 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3592 if (is_writable_pte(*spte))
3593 printk(KERN_ERR "%s: (%s) shadow page has "
3594 "writable mappings: gfn %lx role %x\n",
3595 __func__, audit_msg, sp->gfn,
3597 spte = rmap_next(vcpu->kvm, rmapp, spte);
3602 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3609 audit_write_protection(vcpu);
3610 if (strcmp("pre pte write", audit_msg) != 0)
3611 audit_mappings(vcpu);
3612 audit_writable_sptes_have_rmaps(vcpu);