arch/x86/include/asm/paravirt.h

   1 #ifndef _ASM_X86_PARAVIRT_H
   2 #define _ASM_X86_PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/pgtable_types.h>
   8 #include <asm/asm.h>
   9
  10 /* Bitmask of what can be clobbered: usually at least eax. */
  11 #define CLBR_NONE 0
  12 #define CLBR_EAX  (1 << 0)
  13 #define CLBR_ECX  (1 << 1)
  14 #define CLBR_EDX  (1 << 2)
  15 #define CLBR_EDI  (1 << 3)
  16
  17 #ifdef CONFIG_X86_32
  18 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
  19 #define CLBR_ANY  ((1 << 4) - 1)
  20
  21 #define CLBR_ARG_REGS   (CLBR_EAX | CLBR_EDX | CLBR_ECX)
  22 #define CLBR_RET_REG    (CLBR_EAX | CLBR_EDX)
  23 #define CLBR_SCRATCH    (0)
  24 #else
  25 #define CLBR_RAX  CLBR_EAX
  26 #define CLBR_RCX  CLBR_ECX
  27 #define CLBR_RDX  CLBR_EDX
  28 #define CLBR_RDI  CLBR_EDI
  29 #define CLBR_RSI  (1 << 4)
  30 #define CLBR_R8   (1 << 5)
  31 #define CLBR_R9   (1 << 6)
  32 #define CLBR_R10  (1 << 7)
  33 #define CLBR_R11  (1 << 8)
  34
  35 #define CLBR_ANY  ((1 << 9) - 1)
  36
  37 #define CLBR_ARG_REGS   (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
  38                          CLBR_RCX | CLBR_R8 | CLBR_R9)
  39 #define CLBR_RET_REG    (CLBR_RAX)
  40 #define CLBR_SCRATCH    (CLBR_R10 | CLBR_R11)
  41
  42 #include <asm/desc_defs.h>
  43 #endif /* X86_64 */
  44
  45 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
  46
  47 #ifndef __ASSEMBLY__
  48 #include <linux/types.h>
  49 #include <linux/cpumask.h>
  50 #include <asm/kmap_types.h>
  51 #include <asm/desc_defs.h>
  52
  53 struct page;
  54 struct thread_struct;
  55 struct desc_ptr;
  56 struct tss_struct;
  57 struct mm_struct;
  58 struct desc_struct;
  59 struct task_struct;
  60
  61 /*
  62  * Wrapper type for pointers to code which uses the non-standard
  63  * calling convention.  See PV_CALL_SAVE_REGS_THUNK below.
  64  */
  65 struct paravirt_callee_save {
  66         void *func;
  67 };
  68
  69 /* general info */
  70 struct pv_info {
  71         unsigned int kernel_rpl;
  72         int shared_kernel_pmd;
  73         int paravirt_enabled;
  74         const char *name;
  75 };
  76
  77 struct pv_init_ops {
  78         /*
  79          * Patch may replace one of the defined code sequences with
  80          * arbitrary code, subject to the same register constraints.
  81          * This generally means the code is not free to clobber any
  82          * registers other than EAX.  The patch function should return
  83          * the number of bytes of code generated, as we nop pad the
  84          * rest in generic code.
  85          */
  86         unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
  87                           unsigned long addr, unsigned len);
  88
  89         /* Basic arch-specific setup */
  90         void (*arch_setup)(void);
  91         char *(*memory_setup)(void);
  92         void (*post_allocator_init)(void);
  93
  94         /* Print a banner to identify the environment */
  95         void (*banner)(void);
  96 };
  97
  98
  99 struct pv_lazy_ops {
 100         /* Set deferred update mode, used for batching operations. */
 101         void (*enter)(void);
 102         void (*leave)(void);
 103 };
 104
 105 struct pv_time_ops {
 106         void (*time_init)(void);
 107
 108         /* Set and set time of day */
 109         unsigned long (*get_wallclock)(void);
 110         int (*set_wallclock)(unsigned long);
 111
 112         unsigned long long (*sched_clock)(void);
 113         unsigned long (*get_tsc_khz)(void);
 114 };
 115
 116 struct pv_cpu_ops {
 117         /* hooks for various privileged instructions */
 118         unsigned long (*get_debugreg)(int regno);
 119         void (*set_debugreg)(int regno, unsigned long value);
 120
 121         void (*clts)(void);
 122
 123         unsigned long (*read_cr0)(void);
 124         void (*write_cr0)(unsigned long);
 125
 126         unsigned long (*read_cr4_safe)(void);
 127         unsigned long (*read_cr4)(void);
 128         void (*write_cr4)(unsigned long);
 129
 130 #ifdef CONFIG_X86_64
 131         unsigned long (*read_cr8)(void);
 132         void (*write_cr8)(unsigned long);
 133 #endif
 134
 135         /* Segment descriptor handling */
 136         void (*load_tr_desc)(void);
 137         void (*load_gdt)(const struct desc_ptr *);
 138         void (*load_idt)(const struct desc_ptr *);
 139         void (*store_gdt)(struct desc_ptr *);
 140         void (*store_idt)(struct desc_ptr *);
 141         void (*set_ldt)(const void *desc, unsigned entries);
 142         unsigned long (*store_tr)(void);
 143         void (*load_tls)(struct thread_struct *t, unsigned int cpu);
 144 #ifdef CONFIG_X86_64
 145         void (*load_gs_index)(unsigned int idx);
 146 #endif
 147         void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
 148                                 const void *desc);
 149         void (*write_gdt_entry)(struct desc_struct *,
 150                                 int entrynum, const void *desc, int size);
 151         void (*write_idt_entry)(gate_desc *,
 152                                 int entrynum, const gate_desc *gate);
 153         void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
 154         void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
 155
 156         void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
 157
 158         void (*set_iopl_mask)(unsigned mask);
 159
 160         void (*wbinvd)(void);
 161         void (*io_delay)(void);
 162
 163         /* cpuid emulation, mostly so that caps bits can be disabled */
 164         void (*cpuid)(unsigned int *eax, unsigned int *ebx,
 165                       unsigned int *ecx, unsigned int *edx);
 166
 167         /* MSR, PMC and TSR operations.
 168            err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
 169         u64 (*read_msr_amd)(unsigned int msr, int *err);
 170         u64 (*read_msr)(unsigned int msr, int *err);
 171         int (*rdmsr_regs)(u32 *regs);
 172         int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
 173         int (*wrmsr_regs)(u32 *regs);
 174
 175         u64 (*read_tsc)(void);
 176         u64 (*read_pmc)(int counter);
 177         unsigned long long (*read_tscp)(unsigned int *aux);
 178
 179         /*
 180          * Atomically enable interrupts and return to userspace.  This
 181          * is only ever used to return to 32-bit processes; in a
 182          * 64-bit kernel, it's used for 32-on-64 compat processes, but
 183          * never native 64-bit processes.  (Jump, not call.)
 184          */
 185         void (*irq_enable_sysexit)(void);
 186
 187         /*
 188          * Switch to usermode gs and return to 64-bit usermode using
 189          * sysret.  Only used in 64-bit kernels to return to 64-bit
 190          * processes.  Usermode register state, including %rsp, must
 191          * already be restored.
 192          */
 193         void (*usergs_sysret64)(void);
 194
 195         /*
 196          * Switch to usermode gs and return to 32-bit usermode using
 197          * sysret.  Used to return to 32-on-64 compat processes.
 198          * Other usermode register state, including %esp, must already
 199          * be restored.
 200          */
 201         void (*usergs_sysret32)(void);
 202
 203         /* Normal iret.  Jump to this with the standard iret stack
 204            frame set up. */
 205         void (*iret)(void);
 206
 207         void (*swapgs)(void);
 208
 209         void (*start_context_switch)(struct task_struct *prev);
 210         void (*end_context_switch)(struct task_struct *next);
 211 };
 212
 213 struct pv_irq_ops {
 214         void (*init_IRQ)(void);
 215
 216         /*
 217          * Get/set interrupt state.  save_fl and restore_fl are only
 218          * expected to use X86_EFLAGS_IF; all other bits
 219          * returned from save_fl are undefined, and may be ignored by
 220          * restore_fl.
 221          *
 222          * NOTE: These functions callers expect the callee to preserve
 223          * more registers than the standard C calling convention.
 224          */
 225         struct paravirt_callee_save save_fl;
 226         struct paravirt_callee_save restore_fl;
 227         struct paravirt_callee_save irq_disable;
 228         struct paravirt_callee_save irq_enable;
 229
 230         void (*safe_halt)(void);
 231         void (*halt)(void);
 232
 233 #ifdef CONFIG_X86_64
 234         void (*adjust_exception_frame)(void);
 235 #endif
 236 };
 237
 238 struct pv_apic_ops {
 239 #ifdef CONFIG_X86_LOCAL_APIC
 240         void (*setup_boot_clock)(void);
 241         void (*setup_secondary_clock)(void);
 242
 243         void (*startup_ipi_hook)(int phys_apicid,
 244                                  unsigned long start_eip,
 245                                  unsigned long start_esp);
 246 #endif
 247 };
 248
 249 struct pv_mmu_ops {
 250         /*
 251          * Called before/after init_mm pagetable setup. setup_start
 252          * may reset %cr3, and may pre-install parts of the pagetable;
 253          * pagetable setup is expected to preserve any existing
 254          * mapping.
 255          */
 256         void (*pagetable_setup_start)(pgd_t *pgd_base);
 257         void (*pagetable_setup_done)(pgd_t *pgd_base);
 258
 259         unsigned long (*read_cr2)(void);
 260         void (*write_cr2)(unsigned long);
 261
 262         unsigned long (*read_cr3)(void);
 263         void (*write_cr3)(unsigned long);
 264
 265         /*
 266          * Hooks for intercepting the creation/use/destruction of an
 267          * mm_struct.
 268          */
 269         void (*activate_mm)(struct mm_struct *prev,
 270                             struct mm_struct *next);
 271         void (*dup_mmap)(struct mm_struct *oldmm,
 272                          struct mm_struct *mm);
 273         void (*exit_mmap)(struct mm_struct *mm);
 274
 275
 276         /* TLB operations */
 277         void (*flush_tlb_user)(void);
 278         void (*flush_tlb_kernel)(void);
 279         void (*flush_tlb_single)(unsigned long addr);
 280         void (*flush_tlb_others)(const struct cpumask *cpus,
 281                                  struct mm_struct *mm,
 282                                  unsigned long va);
 283
 284         /* Hooks for allocating and freeing a pagetable top-level */
 285         int  (*pgd_alloc)(struct mm_struct *mm);
 286         void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
 287
 288         /*
 289          * Hooks for allocating/releasing pagetable pages when they're
 290          * attached to a pagetable
 291          */
 292         void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
 293         void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
 294         void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
 295         void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
 296         void (*release_pte)(unsigned long pfn);
 297         void (*release_pmd)(unsigned long pfn);
 298         void (*release_pud)(unsigned long pfn);
 299
 300         /* Pagetable manipulation functions */
 301         void (*set_pte)(pte_t *ptep, pte_t pteval);
 302         void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
 303                            pte_t *ptep, pte_t pteval);
 304         void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
 305         void (*pte_update)(struct mm_struct *mm, unsigned long addr,
 306                            pte_t *ptep);
 307         void (*pte_update_defer)(struct mm_struct *mm,
 308                                  unsigned long addr, pte_t *ptep);
 309
 310         pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
 311                                         pte_t *ptep);
 312         void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
 313                                         pte_t *ptep, pte_t pte);
 314
 315         struct paravirt_callee_save pte_val;
 316         struct paravirt_callee_save make_pte;
 317
 318         struct paravirt_callee_save pgd_val;
 319         struct paravirt_callee_save make_pgd;
 320
 321 #if PAGETABLE_LEVELS >= 3
 322 #ifdef CONFIG_X86_PAE
 323         void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
 324         void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
 325                           pte_t *ptep);
 326         void (*pmd_clear)(pmd_t *pmdp);
 327
 328 #endif  /* CONFIG_X86_PAE */
 329
 330         void (*set_pud)(pud_t *pudp, pud_t pudval);
 331
 332         struct paravirt_callee_save pmd_val;
 333         struct paravirt_callee_save make_pmd;
 334
 335 #if PAGETABLE_LEVELS == 4
 336         struct paravirt_callee_save pud_val;
 337         struct paravirt_callee_save make_pud;
 338
 339         void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
 340 #endif  /* PAGETABLE_LEVELS == 4 */
 341 #endif  /* PAGETABLE_LEVELS >= 3 */
 342
 343 #ifdef CONFIG_HIGHPTE
 344         void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
 345 #endif
 346
 347         struct pv_lazy_ops lazy_mode;
 348
 349         /* dom0 ops */
 350
 351         /* Sometimes the physical address is a pfn, and sometimes its
 352            an mfn.  We can tell which is which from the index. */
 353         void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
 354                            phys_addr_t phys, pgprot_t flags);
 355 };
 356
 357 struct raw_spinlock;
 358 struct pv_lock_ops {
 359         int (*spin_is_locked)(struct raw_spinlock *lock);
 360         int (*spin_is_contended)(struct raw_spinlock *lock);
 361         void (*spin_lock)(struct raw_spinlock *lock);
 362         void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
 363         int (*spin_trylock)(struct raw_spinlock *lock);
 364         void (*spin_unlock)(struct raw_spinlock *lock);
 365 };
 366
 367 /* This contains all the paravirt structures: we get a convenient
 368  * number for each function using the offset which we use to indicate
 369  * what to patch. */
 370 struct paravirt_patch_template {
 371         struct pv_init_ops pv_init_ops;
 372         struct pv_time_ops pv_time_ops;
 373         struct pv_cpu_ops pv_cpu_ops;
 374         struct pv_irq_ops pv_irq_ops;
 375         struct pv_apic_ops pv_apic_ops;
 376         struct pv_mmu_ops pv_mmu_ops;
 377         struct pv_lock_ops pv_lock_ops;
 378 };
 379
 380 extern struct pv_info pv_info;
 381 extern struct pv_init_ops pv_init_ops;
 382 extern struct pv_time_ops pv_time_ops;
 383 extern struct pv_cpu_ops pv_cpu_ops;
 384 extern struct pv_irq_ops pv_irq_ops;
 385 extern struct pv_apic_ops pv_apic_ops;
 386 extern struct pv_mmu_ops pv_mmu_ops;
 387 extern struct pv_lock_ops pv_lock_ops;
 388
 389 #define PARAVIRT_PATCH(x)                                       \
 390         (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
 391
 392 #define paravirt_type(op)                               \
 393         [paravirt_typenum] "i" (PARAVIRT_PATCH(op)),    \
 394         [paravirt_opptr] "i" (&(op))
 395 #define paravirt_clobber(clobber)               \
 396         [paravirt_clobber] "i" (clobber)
 397
 398 /*
 399  * Generate some code, and mark it as patchable by the
 400  * apply_paravirt() alternate instruction patcher.
 401  */
 402 #define _paravirt_alt(insn_string, type, clobber)       \
 403         "771:\n\t" insn_string "\n" "772:\n"            \
 404         ".pushsection .parainstructions,\"a\"\n"        \
 405         _ASM_ALIGN "\n"                                 \
 406         _ASM_PTR " 771b\n"                              \
 407         "  .byte " type "\n"                            \
 408         "  .byte 772b-771b\n"                           \
 409         "  .short " clobber "\n"                        \
 410         ".popsection\n"
 411
 412 /* Generate patchable code, with the default asm parameters. */
 413 #define paravirt_alt(insn_string)                                       \
 414         _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
 415
 416 /* Simple instruction patching code. */
 417 #define DEF_NATIVE(ops, name, code)                                     \
 418         extern const char start_##ops##_##name[], end_##ops##_##name[]; \
 419         asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
 420
 421 unsigned paravirt_patch_nop(void);
 422 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
 423 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
 424 unsigned paravirt_patch_ignore(unsigned len);
 425 unsigned paravirt_patch_call(void *insnbuf,
 426                              const void *target, u16 tgt_clobbers,
 427                              unsigned long addr, u16 site_clobbers,
 428                              unsigned len);
 429 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
 430                             unsigned long addr, unsigned len);
 431 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
 432                                 unsigned long addr, unsigned len);
 433
 434 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
 435                               const char *start, const char *end);
 436
 437 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 438                       unsigned long addr, unsigned len);
 439
 440 int paravirt_disable_iospace(void);
 441
 442 /*
 443  * This generates an indirect call based on the operation type number.
 444  * The type number, computed in PARAVIRT_PATCH, is derived from the
 445  * offset into the paravirt_patch_template structure, and can therefore be
 446  * freely converted back into a structure offset.
 447  */
 448 #define PARAVIRT_CALL   "call *%c[paravirt_opptr];"
 449
 450 /*
 451  * These macros are intended to wrap calls through one of the paravirt
 452  * ops structs, so that they can be later identified and patched at
 453  * runtime.
 454  *
 455  * Normally, a call to a pv_op function is a simple indirect call:
 456  * (pv_op_struct.operations)(args...).
 457  *
 458  * Unfortunately, this is a relatively slow operation for modern CPUs,
 459  * because it cannot necessarily determine what the destination
 460  * address is.  In this case, the address is a runtime constant, so at
 461  * the very least we can patch the call to e a simple direct call, or
 462  * ideally, patch an inline implementation into the callsite.  (Direct
 463  * calls are essentially free, because the call and return addresses
 464  * are completely predictable.)
 465  *
 466  * For i386, these macros rely on the standard gcc "regparm(3)" calling
 467  * convention, in which the first three arguments are placed in %eax,
 468  * %edx, %ecx (in that order), and the remaining arguments are placed
 469  * on the stack.  All caller-save registers (eax,edx,ecx) are expected
 470  * to be modified (either clobbered or used for return values).
 471  * X86_64, on the other hand, already specifies a register-based calling
 472  * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
 473  * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
 474  * special handling for dealing with 4 arguments, unlike i386.
 475  * However, x86_64 also have to clobber all caller saved registers, which
 476  * unfortunately, are quite a bit (r8 - r11)
 477  *
 478  * The call instruction itself is marked by placing its start address
 479  * and size into the .parainstructions section, so that
 480  * apply_paravirt() in arch/i386/kernel/alternative.c can do the
 481  * appropriate patching under the control of the backend pv_init_ops
 482  * implementation.
 483  *
 484  * Unfortunately there's no way to get gcc to generate the args setup
 485  * for the call, and then allow the call itself to be generated by an
 486  * inline asm.  Because of this, we must do the complete arg setup and
 487  * return value handling from within these macros.  This is fairly
 488  * cumbersome.
 489  *
 490  * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
 491  * It could be extended to more arguments, but there would be little
 492  * to be gained from that.  For each number of arguments, there are
 493  * the two VCALL and CALL variants for void and non-void functions.
 494  *
 495  * When there is a return value, the invoker of the macro must specify
 496  * the return type.  The macro then uses sizeof() on that type to
 497  * determine whether its a 32 or 64 bit value, and places the return
 498  * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
 499  * 64-bit). For x86_64 machines, it just returns at %rax regardless of
 500  * the return value size.
 501  *
 502  * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
 503  * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
 504  * in low,high order
 505  *
 506  * Small structures are passed and returned in registers.  The macro
 507  * calling convention can't directly deal with this, so the wrapper
 508  * functions must do this.
 509  *
 510  * These PVOP_* macros are only defined within this header.  This
 511  * means that all uses must be wrapped in inline functions.  This also
 512  * makes sure the incoming and outgoing types are always correct.
 513  */
 514 #ifdef CONFIG_X86_32
 515 #define PVOP_VCALL_ARGS                         \
 516         unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
 517 #define PVOP_CALL_ARGS                  PVOP_VCALL_ARGS
 518
 519 #define PVOP_CALL_ARG1(x)               "a" ((unsigned long)(x))
 520 #define PVOP_CALL_ARG2(x)               "d" ((unsigned long)(x))
 521 #define PVOP_CALL_ARG3(x)               "c" ((unsigned long)(x))
 522
 523 #define PVOP_VCALL_CLOBBERS             "=a" (__eax), "=d" (__edx),     \
 524                                         "=c" (__ecx)
 525 #define PVOP_CALL_CLOBBERS              PVOP_VCALL_CLOBBERS
 526
 527 #define PVOP_VCALLEE_CLOBBERS           "=a" (__eax), "=d" (__edx)
 528 #define PVOP_CALLEE_CLOBBERS            PVOP_VCALLEE_CLOBBERS
 529
 530 #define EXTRA_CLOBBERS
 531 #define VEXTRA_CLOBBERS
 532 #else  /* CONFIG_X86_64 */
 533 #define PVOP_VCALL_ARGS                                 \
 534         unsigned long __edi = __edi, __esi = __esi,     \
 535                 __edx = __edx, __ecx = __ecx
 536 #define PVOP_CALL_ARGS          PVOP_VCALL_ARGS, __eax
 537
 538 #define PVOP_CALL_ARG1(x)               "D" ((unsigned long)(x))
 539 #define PVOP_CALL_ARG2(x)               "S" ((unsigned long)(x))
 540 #define PVOP_CALL_ARG3(x)               "d" ((unsigned long)(x))
 541 #define PVOP_CALL_ARG4(x)               "c" ((unsigned long)(x))
 542
 543 #define PVOP_VCALL_CLOBBERS     "=D" (__edi),                           \
 544                                 "=S" (__esi), "=d" (__edx),             \
 545                                 "=c" (__ecx)
 546 #define PVOP_CALL_CLOBBERS      PVOP_VCALL_CLOBBERS, "=a" (__eax)
 547
 548 #define PVOP_VCALLEE_CLOBBERS   "=a" (__eax)
 549 #define PVOP_CALLEE_CLOBBERS    PVOP_VCALLEE_CLOBBERS
 550
 551 #define EXTRA_CLOBBERS   , "r8", "r9", "r10", "r11"
 552 #define VEXTRA_CLOBBERS  , "rax", "r8", "r9", "r10", "r11"
 553 #endif  /* CONFIG_X86_32 */
 554
 555 #ifdef CONFIG_PARAVIRT_DEBUG
 556 #define PVOP_TEST_NULL(op)      BUG_ON(op == NULL)
 557 #else
 558 #define PVOP_TEST_NULL(op)      ((void)op)
 559 #endif
 560
 561 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr,         \
 562                       pre, post, ...)                                   \
 563         ({                                                              \
 564                 rettype __ret;                                          \
 565                 PVOP_CALL_ARGS;                                         \
 566                 PVOP_TEST_NULL(op);                                     \
 567                 /* This is 32-bit specific, but is okay in 64-bit */    \
 568                 /* since this condition will never hold */              \
 569                 if (sizeof(rettype) > sizeof(unsigned long)) {          \
 570                         asm volatile(pre                                \
 571                                      paravirt_alt(PARAVIRT_CALL)        \
 572                                      post                               \
 573                                      : call_clbr                        \
 574                                      : paravirt_type(op),               \
 575                                        paravirt_clobber(clbr),          \
 576                                        ##__VA_ARGS__                    \
 577                                      : "memory", "cc" extra_clbr);      \
 578                         __ret = (rettype)((((u64)__edx) << 32) | __eax); \
 579                 } else {                                                \
 580                         asm volatile(pre                                \
 581                                      paravirt_alt(PARAVIRT_CALL)        \
 582                                      post                               \
 583                                      : call_clbr                        \
 584                                      : paravirt_type(op),               \
 585                                        paravirt_clobber(clbr),          \
 586                                        ##__VA_ARGS__                    \
 587                                      : "memory", "cc" extra_clbr);      \
 588                         __ret = (rettype)__eax;                         \
 589                 }                                                       \
 590                 __ret;                                                  \
 591         })
 592
 593 #define __PVOP_CALL(rettype, op, pre, post, ...)                        \
 594         ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS,        \
 595                       EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
 596
 597 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...)                  \
 598         ____PVOP_CALL(rettype, op.func, CLBR_RET_REG,                   \
 599                       PVOP_CALLEE_CLOBBERS, ,                           \
 600                       pre, post, ##__VA_ARGS__)
 601
 602
 603 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
 604         ({                                                              \
 605                 PVOP_VCALL_ARGS;                                        \
 606                 PVOP_TEST_NULL(op);                                     \
 607                 asm volatile(pre                                        \
 608                              paravirt_alt(PARAVIRT_CALL)                \
 609                              post                                       \
 610                              : call_clbr                                \
 611                              : paravirt_type(op),                       \
 612                                paravirt_clobber(clbr),                  \
 613                                ##__VA_ARGS__                            \
 614                              : "memory", "cc" extra_clbr);              \
 615         })
 616
 617 #define __PVOP_VCALL(op, pre, post, ...)                                \
 618         ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS,               \
 619                        VEXTRA_CLOBBERS,                                 \
 620                        pre, post, ##__VA_ARGS__)
 621
 622 #define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...)                 \
 623         ____PVOP_CALL(rettype, op.func, CLBR_RET_REG,                   \
 624                       PVOP_VCALLEE_CLOBBERS, ,                          \
 625                       pre, post, ##__VA_ARGS__)
 626
 627
 628
 629 #define PVOP_CALL0(rettype, op)                                         \
 630         __PVOP_CALL(rettype, op, "", "")
 631 #define PVOP_VCALL0(op)                                                 \
 632         __PVOP_VCALL(op, "", "")
 633
 634 #define PVOP_CALLEE0(rettype, op)                                       \
 635         __PVOP_CALLEESAVE(rettype, op, "", "")
 636 #define PVOP_VCALLEE0(op)                                               \
 637         __PVOP_VCALLEESAVE(op, "", "")
 638
 639
 640 #define PVOP_CALL1(rettype, op, arg1)                                   \
 641         __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
 642 #define PVOP_VCALL1(op, arg1)                                           \
 643         __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
 644
 645 #define PVOP_CALLEE1(rettype, op, arg1)                                 \
 646         __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
 647 #define PVOP_VCALLEE1(op, arg1)                                         \
 648         __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
 649
 650
 651 #define PVOP_CALL2(rettype, op, arg1, arg2)                             \
 652         __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),          \
 653                     PVOP_CALL_ARG2(arg2))
 654 #define PVOP_VCALL2(op, arg1, arg2)                                     \
 655         __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),                  \
 656                      PVOP_CALL_ARG2(arg2))
 657
 658 #define PVOP_CALLEE2(rettype, op, arg1, arg2)                           \
 659         __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1),    \
 660                           PVOP_CALL_ARG2(arg2))
 661 #define PVOP_VCALLEE2(op, arg1, arg2)                                   \
 662         __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1),            \
 663                            PVOP_CALL_ARG2(arg2))
 664
 665
 666 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3)                       \
 667         __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),          \
 668                     PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
 669 #define PVOP_VCALL3(op, arg1, arg2, arg3)                               \
 670         __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),                  \
 671                      PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
 672
 673 /* This is the only difference in x86_64. We can make it much simpler */
 674 #ifdef CONFIG_X86_32
 675 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 676         __PVOP_CALL(rettype, op,                                        \
 677                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 678                     PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),         \
 679                     PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
 680 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 681         __PVOP_VCALL(op,                                                \
 682                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 683                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 684                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 685 #else
 686 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 687         __PVOP_CALL(rettype, op, "", "",                                \
 688                     PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),         \
 689                     PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
 690 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 691         __PVOP_VCALL(op, "", "",                                        \
 692                      PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),        \
 693                      PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
 694 #endif
 695
 696 static inline int paravirt_enabled(void)
 697 {
 698         return pv_info.paravirt_enabled;
 699 }
 700
 701 static inline void load_sp0(struct tss_struct *tss,
 702                              struct thread_struct *thread)
 703 {
 704         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
 705 }
 706
 707 #define ARCH_SETUP                      pv_init_ops.arch_setup();
 708 static inline unsigned long get_wallclock(void)
 709 {
 710         return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
 711 }
 712
 713 static inline int set_wallclock(unsigned long nowtime)
 714 {
 715         return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
 716 }
 717
 718 static inline void (*choose_time_init(void))(void)
 719 {
 720         return pv_time_ops.time_init;
 721 }
 722
 723 /* The paravirtualized CPUID instruction. */
 724 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
 725                            unsigned int *ecx, unsigned int *edx)
 726 {
 727         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
 728 }
 729
 730 /*
 731  * These special macros can be used to get or set a debugging register
 732  */
 733 static inline unsigned long paravirt_get_debugreg(int reg)
 734 {
 735         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
 736 }
 737 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
 738 static inline void set_debugreg(unsigned long val, int reg)
 739 {
 740         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
 741 }
 742
 743 static inline void clts(void)
 744 {
 745         PVOP_VCALL0(pv_cpu_ops.clts);
 746 }
 747
 748 static inline unsigned long read_cr0(void)
 749 {
 750         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
 751 }
 752
 753 static inline void write_cr0(unsigned long x)
 754 {
 755         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
 756 }
 757
 758 static inline unsigned long read_cr2(void)
 759 {
 760         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
 761 }
 762
 763 static inline void write_cr2(unsigned long x)
 764 {
 765         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
 766 }
 767
 768 static inline unsigned long read_cr3(void)
 769 {
 770         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
 771 }
 772
 773 static inline void write_cr3(unsigned long x)
 774 {
 775         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
 776 }
 777
 778 static inline unsigned long read_cr4(void)
 779 {
 780         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
 781 }
 782 static inline unsigned long read_cr4_safe(void)
 783 {
 784         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
 785 }
 786
 787 static inline void write_cr4(unsigned long x)
 788 {
 789         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
 790 }
 791
 792 #ifdef CONFIG_X86_64
 793 static inline unsigned long read_cr8(void)
 794 {
 795         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 796 }
 797
 798 static inline void write_cr8(unsigned long x)
 799 {
 800         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 801 }
 802 #endif
 803
 804 static inline void raw_safe_halt(void)
 805 {
 806         PVOP_VCALL0(pv_irq_ops.safe_halt);
 807 }
 808
 809 static inline void halt(void)
 810 {
 811         PVOP_VCALL0(pv_irq_ops.safe_halt);
 812 }
 813
 814 static inline void wbinvd(void)
 815 {
 816         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 817 }
 818
 819 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 820
 821 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 822 {
 823         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 824 }
 825
 826 static inline int paravirt_rdmsr_regs(u32 *regs)
 827 {
 828         return PVOP_CALL1(int, pv_cpu_ops.rdmsr_regs, regs);
 829 }
 830
 831 static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
 832 {
 833         return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
 834 }
 835 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 836 {
 837         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 838 }
 839
 840 static inline int paravirt_wrmsr_regs(u32 *regs)
 841 {
 842         return PVOP_CALL1(int, pv_cpu_ops.wrmsr_regs, regs);
 843 }
 844
 845 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 846 #define rdmsr(msr, val1, val2)                  \
 847 do {                                            \
 848         int _err;                               \
 849         u64 _l = paravirt_read_msr(msr, &_err); \
 850         val1 = (u32)_l;                         \
 851         val2 = _l >> 32;                        \
 852 } while (0)
 853
 854 #define wrmsr(msr, val1, val2)                  \
 855 do {                                            \
 856         paravirt_write_msr(msr, val1, val2);    \
 857 } while (0)
 858
 859 #define rdmsrl(msr, val)                        \
 860 do {                                            \
 861         int _err;                               \
 862         val = paravirt_read_msr(msr, &_err);    \
 863 } while (0)
 864
 865 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
 866 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 867
 868 /* rdmsr with exception handling */
 869 #define rdmsr_safe(msr, a, b)                   \
 870 ({                                              \
 871         int _err;                               \
 872         u64 _l = paravirt_read_msr(msr, &_err); \
 873         (*a) = (u32)_l;                         \
 874         (*b) = _l >> 32;                        \
 875         _err;                                   \
 876 })
 877
 878 #define rdmsr_safe_regs(regs)   paravirt_rdmsr_regs(regs)
 879 #define wrmsr_safe_regs(regs)   paravirt_wrmsr_regs(regs)
 880
 881 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 882 {
 883         int err;
 884
 885         *p = paravirt_read_msr(msr, &err);
 886         return err;
 887 }
 888 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
 889 {
 890         int err;
 891
 892         *p = paravirt_read_msr_amd(msr, &err);
 893         return err;
 894 }
 895
 896 static inline u64 paravirt_read_tsc(void)
 897 {
 898         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
 899 }
 900
 901 #define rdtscl(low)                             \
 902 do {                                            \
 903         u64 _l = paravirt_read_tsc();           \
 904         low = (int)_l;                          \
 905 } while (0)
 906
 907 #define rdtscll(val) (val = paravirt_read_tsc())
 908
 909 static inline unsigned long long paravirt_sched_clock(void)
 910 {
 911         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 912 }
 913 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
 914
 915 static inline unsigned long long paravirt_read_pmc(int counter)
 916 {
 917         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 918 }
 919
 920 #define rdpmc(counter, low, high)               \
 921 do {                                            \
 922         u64 _l = paravirt_read_pmc(counter);    \
 923         low = (u32)_l;                          \
 924         high = _l >> 32;                        \
 925 } while (0)
 926
 927 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
 928 {
 929         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
 930 }
 931
 932 #define rdtscp(low, high, aux)                          \
 933 do {                                                    \
 934         int __aux;                                      \
 935         unsigned long __val = paravirt_rdtscp(&__aux);  \
 936         (low) = (u32)__val;                             \
 937         (high) = (u32)(__val >> 32);                    \
 938         (aux) = __aux;                                  \
 939 } while (0)
 940
 941 #define rdtscpll(val, aux)                              \
 942 do {                                                    \
 943         unsigned long __aux;                            \
 944         val = paravirt_rdtscp(&__aux);                  \
 945         (aux) = __aux;                                  \
 946 } while (0)
 947
 948 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 949 {
 950         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
 951 }
 952
 953 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 954 {
 955         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
 956 }
 957
 958 static inline void load_TR_desc(void)
 959 {
 960         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 961 }
 962 static inline void load_gdt(const struct desc_ptr *dtr)
 963 {
 964         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 965 }
 966 static inline void load_idt(const struct desc_ptr *dtr)
 967 {
 968         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 969 }
 970 static inline void set_ldt(const void *addr, unsigned entries)
 971 {
 972         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 973 }
 974 static inline void store_gdt(struct desc_ptr *dtr)
 975 {
 976         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
 977 }
 978 static inline void store_idt(struct desc_ptr *dtr)
 979 {
 980         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 981 }
 982 static inline unsigned long paravirt_store_tr(void)
 983 {
 984         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 985 }
 986 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 987 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 988 {
 989         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 990 }
 991
 992 #ifdef CONFIG_X86_64
 993 static inline void load_gs_index(unsigned int gs)
 994 {
 995         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 996 }
 997 #endif
 998
 999 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
1000                                    const void *desc)
1001 {
1002         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
1003 }
1004
1005 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
1006                                    void *desc, int type)
1007 {
1008         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
1009 }
1010
1011 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
1012 {
1013         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
1014 }
1015 static inline void set_iopl_mask(unsigned mask)
1016 {
1017         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
1018 }
1019
1020 /* The paravirtualized I/O functions */
1021 static inline void slow_down_io(void)
1022 {
1023         pv_cpu_ops.io_delay();
1024 #ifdef REALLY_SLOW_IO
1025         pv_cpu_ops.io_delay();
1026         pv_cpu_ops.io_delay();
1027         pv_cpu_ops.io_delay();
1028 #endif
1029 }
1030
1031 #ifdef CONFIG_X86_LOCAL_APIC
1032 static inline void setup_boot_clock(void)
1033 {
1034         PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
1035 }
1036
1037 static inline void setup_secondary_clock(void)
1038 {
1039         PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
1040 }
1041 #endif
1042
1043 static inline void paravirt_post_allocator_init(void)
1044 {
1045         if (pv_init_ops.post_allocator_init)
1046                 (*pv_init_ops.post_allocator_init)();
1047 }
1048
1049 static inline void paravirt_pagetable_setup_start(pgd_t *base)
1050 {
1051         (*pv_mmu_ops.pagetable_setup_start)(base);
1052 }
1053
1054 static inline void paravirt_pagetable_setup_done(pgd_t *base)
1055 {
1056         (*pv_mmu_ops.pagetable_setup_done)(base);
1057 }
1058
1059 #ifdef CONFIG_SMP
1060 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
1061                                     unsigned long start_esp)
1062 {
1063         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
1064                     phys_apicid, start_eip, start_esp);
1065 }
1066 #endif
1067
1068 static inline void paravirt_activate_mm(struct mm_struct *prev,
1069                                         struct mm_struct *next)
1070 {
1071         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
1072 }
1073
1074 static inline void arch_dup_mmap(struct mm_struct *oldmm,
1075                                  struct mm_struct *mm)
1076 {
1077         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
1078 }
1079
1080 static inline void arch_exit_mmap(struct mm_struct *mm)
1081 {
1082         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
1083 }
1084
1085 static inline void __flush_tlb(void)
1086 {
1087         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
1088 }
1089 static inline void __flush_tlb_global(void)
1090 {
1091         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
1092 }
1093 static inline void __flush_tlb_single(unsigned long addr)
1094 {
1095         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
1096 }
1097
1098 static inline void flush_tlb_others(const struct cpumask *cpumask,
1099                                     struct mm_struct *mm,
1100                                     unsigned long va)
1101 {
1102         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
1103 }
1104
1105 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
1106 {
1107         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
1108 }
1109
1110 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1111 {
1112         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
1113 }
1114
1115 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1116 {
1117         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
1118 }
1119 static inline void paravirt_release_pte(unsigned long pfn)
1120 {
1121         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
1122 }
1123
1124 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1125 {
1126         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1127 }
1128
1129 static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
1130                                             unsigned long start, unsigned long count)
1131 {
1132         PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1133 }
1134 static inline void paravirt_release_pmd(unsigned long pfn)
1135 {
1136         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1137 }
1138
1139 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1140 {
1141         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1142 }
1143 static inline void paravirt_release_pud(unsigned long pfn)
1144 {
1145         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1146 }
1147
1148 #ifdef CONFIG_HIGHPTE
1149 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1150 {
1151         unsigned long ret;
1152         ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1153         return (void *)ret;
1154 }
1155 #endif
1156
1157 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1158                               pte_t *ptep)
1159 {
1160         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1161 }
1162
1163 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1164                                     pte_t *ptep)
1165 {
1166         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1167 }
1168
1169 static inline pte_t __pte(pteval_t val)
1170 {
1171         pteval_t ret;
1172
1173         if (sizeof(pteval_t) > sizeof(long))
1174                 ret = PVOP_CALLEE2(pteval_t,
1175                                    pv_mmu_ops.make_pte,
1176                                    val, (u64)val >> 32);
1177         else
1178                 ret = PVOP_CALLEE1(pteval_t,
1179                                    pv_mmu_ops.make_pte,
1180                                    val);
1181
1182         return (pte_t) { .pte = ret };
1183 }
1184
1185 static inline pteval_t pte_val(pte_t pte)
1186 {
1187         pteval_t ret;
1188
1189         if (sizeof(pteval_t) > sizeof(long))
1190                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
1191                                    pte.pte, (u64)pte.pte >> 32);
1192         else
1193                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
1194                                    pte.pte);
1195
1196         return ret;
1197 }
1198
1199 static inline pgd_t __pgd(pgdval_t val)
1200 {
1201         pgdval_t ret;
1202
1203         if (sizeof(pgdval_t) > sizeof(long))
1204                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
1205                                    val, (u64)val >> 32);
1206         else
1207                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
1208                                    val);
1209
1210         return (pgd_t) { ret };
1211 }
1212
1213 static inline pgdval_t pgd_val(pgd_t pgd)
1214 {
1215         pgdval_t ret;
1216
1217         if (sizeof(pgdval_t) > sizeof(long))
1218                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
1219                                     pgd.pgd, (u64)pgd.pgd >> 32);
1220         else
1221                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
1222                                     pgd.pgd);
1223
1224         return ret;
1225 }
1226
1227 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1228 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1229                                            pte_t *ptep)
1230 {
1231         pteval_t ret;
1232
1233         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1234                          mm, addr, ptep);
1235
1236         return (pte_t) { .pte = ret };
1237 }
1238
1239 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1240                                            pte_t *ptep, pte_t pte)
1241 {
1242         if (sizeof(pteval_t) > sizeof(long))
1243                 /* 5 arg words */
1244                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1245         else
1246                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1247                             mm, addr, ptep, pte.pte);
1248 }
1249
1250 static inline void set_pte(pte_t *ptep, pte_t pte)
1251 {
1252         if (sizeof(pteval_t) > sizeof(long))
1253                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1254                             pte.pte, (u64)pte.pte >> 32);
1255         else
1256                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1257                             pte.pte);
1258 }
1259
1260 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1261                               pte_t *ptep, pte_t pte)
1262 {
1263         if (sizeof(pteval_t) > sizeof(long))
1264                 /* 5 arg words */
1265                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1266         else
1267                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1268 }
1269
1270 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1271 {
1272         pmdval_t val = native_pmd_val(pmd);
1273
1274         if (sizeof(pmdval_t) > sizeof(long))
1275                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1276         else
1277                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1278 }
1279
1280 #if PAGETABLE_LEVELS >= 3
1281 static inline pmd_t __pmd(pmdval_t val)
1282 {
1283         pmdval_t ret;
1284
1285         if (sizeof(pmdval_t) > sizeof(long))
1286                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
1287                                    val, (u64)val >> 32);
1288         else
1289                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
1290                                    val);
1291
1292         return (pmd_t) { ret };
1293 }
1294
1295 static inline pmdval_t pmd_val(pmd_t pmd)
1296 {
1297         pmdval_t ret;
1298
1299         if (sizeof(pmdval_t) > sizeof(long))
1300                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
1301                                     pmd.pmd, (u64)pmd.pmd >> 32);
1302         else
1303                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
1304                                     pmd.pmd);
1305
1306         return ret;
1307 }
1308
1309 static inline void set_pud(pud_t *pudp, pud_t pud)
1310 {
1311         pudval_t val = native_pud_val(pud);
1312
1313         if (sizeof(pudval_t) > sizeof(long))
1314                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1315                             val, (u64)val >> 32);
1316         else
1317                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1318                             val);
1319 }
1320 #if PAGETABLE_LEVELS == 4
1321 static inline pud_t __pud(pudval_t val)
1322 {
1323         pudval_t ret;
1324
1325         if (sizeof(pudval_t) > sizeof(long))
1326                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
1327                                    val, (u64)val >> 32);
1328         else
1329                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
1330                                    val);
1331
1332         return (pud_t) { ret };
1333 }
1334
1335 static inline pudval_t pud_val(pud_t pud)
1336 {
1337         pudval_t ret;
1338
1339         if (sizeof(pudval_t) > sizeof(long))
1340                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
1341                                     pud.pud, (u64)pud.pud >> 32);
1342         else
1343                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
1344                                     pud.pud);
1345
1346         return ret;
1347 }
1348
1349 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1350 {
1351         pgdval_t val = native_pgd_val(pgd);
1352
1353         if (sizeof(pgdval_t) > sizeof(long))
1354                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1355                             val, (u64)val >> 32);
1356         else
1357                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1358                             val);
1359 }
1360
1361 static inline void pgd_clear(pgd_t *pgdp)
1362 {
1363         set_pgd(pgdp, __pgd(0));
1364 }
1365
1366 static inline void pud_clear(pud_t *pudp)
1367 {
1368         set_pud(pudp, __pud(0));
1369 }
1370
1371 #endif  /* PAGETABLE_LEVELS == 4 */
1372
1373 #endif  /* PAGETABLE_LEVELS >= 3 */
1374
1375 #ifdef CONFIG_X86_PAE
1376 /* Special-case pte-setting operations for PAE, which can't update a
1377    64-bit pte atomically */
1378 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1379 {
1380         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1381                     pte.pte, pte.pte >> 32);
1382 }
1383
1384 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1385                              pte_t *ptep)
1386 {
1387         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1388 }
1389
1390 static inline void pmd_clear(pmd_t *pmdp)
1391 {
1392         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1393 }
1394 #else  /* !CONFIG_X86_PAE */
1395 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1396 {
1397         set_pte(ptep, pte);
1398 }
1399
1400 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1401                              pte_t *ptep)
1402 {
1403         set_pte_at(mm, addr, ptep, __pte(0));
1404 }
1405
1406 static inline void pmd_clear(pmd_t *pmdp)
1407 {
1408         set_pmd(pmdp, __pmd(0));
1409 }
1410 #endif  /* CONFIG_X86_PAE */
1411
1412 /* Lazy mode for batching updates / context switch */
1413 enum paravirt_lazy_mode {
1414         PARAVIRT_LAZY_NONE,
1415         PARAVIRT_LAZY_MMU,
1416         PARAVIRT_LAZY_CPU,
1417 };
1418
1419 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1420 void paravirt_start_context_switch(struct task_struct *prev);
1421 void paravirt_end_context_switch(struct task_struct *next);
1422
1423 void paravirt_enter_lazy_mmu(void);
1424 void paravirt_leave_lazy_mmu(void);
1425
1426 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
1427 static inline void arch_start_context_switch(struct task_struct *prev)
1428 {
1429         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
1430 }
1431
1432 static inline void arch_end_context_switch(struct task_struct *next)
1433 {
1434         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
1435 }
1436
1437 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1438 static inline void arch_enter_lazy_mmu_mode(void)
1439 {
1440         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1441 }
1442
1443 static inline void arch_leave_lazy_mmu_mode(void)
1444 {
1445         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1446 }
1447
1448 void arch_flush_lazy_mmu_mode(void);
1449
1450 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1451                                 phys_addr_t phys, pgprot_t flags)
1452 {
1453         pv_mmu_ops.set_fixmap(idx, phys, flags);
1454 }
1455
1456 void _paravirt_nop(void);
1457 u32 _paravirt_ident_32(u32);
1458 u64 _paravirt_ident_64(u64);
1459
1460 #define paravirt_nop    ((void *)_paravirt_nop)
1461
1462 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
1463
1464 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1465 {
1466         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1467 }
1468
1469 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1470 {
1471         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1472 }
1473 #define __raw_spin_is_contended __raw_spin_is_contended
1474
1475 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1476 {
1477         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1478 }
1479
1480 static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
1481                                                   unsigned long flags)
1482 {
1483         PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
1484 }
1485
1486 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1487 {
1488         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1489 }
1490
1491 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1492 {
1493         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1494 }
1495
1496 #endif
1497
1498 /* These all sit in the .parainstructions section to tell us what to patch. */
1499 struct paravirt_patch_site {
1500         u8 *instr;              /* original instructions */
1501         u8 instrtype;           /* type of this instruction */
1502         u8 len;                 /* length of original instruction */
1503         u16 clobbers;           /* what registers you may clobber */
1504 };
1505
1506 extern struct paravirt_patch_site __parainstructions[],
1507         __parainstructions_end[];
1508
1509 #ifdef CONFIG_X86_32
1510 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
1511 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
1512
1513 /* save and restore all caller-save registers, except return value */
1514 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
1515 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
1516
1517 #define PV_FLAGS_ARG "0"
1518 #define PV_EXTRA_CLOBBERS
1519 #define PV_VEXTRA_CLOBBERS
1520 #else
1521 /* save and restore all caller-save registers, except return value */
1522 #define PV_SAVE_ALL_CALLER_REGS                                         \
1523         "push %rcx;"                                                    \
1524         "push %rdx;"                                                    \
1525         "push %rsi;"                                                    \
1526         "push %rdi;"                                                    \
1527         "push %r8;"                                                     \
1528         "push %r9;"                                                     \
1529         "push %r10;"                                                    \
1530         "push %r11;"
1531 #define PV_RESTORE_ALL_CALLER_REGS                                      \
1532         "pop %r11;"                                                     \
1533         "pop %r10;"                                                     \
1534         "pop %r9;"                                                      \
1535         "pop %r8;"                                                      \
1536         "pop %rdi;"                                                     \
1537         "pop %rsi;"                                                     \
1538         "pop %rdx;"                                                     \
1539         "pop %rcx;"
1540
1541 /* We save some registers, but all of them, that's too much. We clobber all
1542  * caller saved registers but the argument parameter */
1543 #define PV_SAVE_REGS "pushq %%rdi;"
1544 #define PV_RESTORE_REGS "popq %%rdi;"
1545 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1546 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1547 #define PV_FLAGS_ARG "D"
1548 #endif
1549
1550 /*
1551  * Generate a thunk around a function which saves all caller-save
1552  * registers except for the return value.  This allows C functions to
1553  * be called from assembler code where fewer than normal registers are
1554  * available.  It may also help code generation around calls from C
1555  * code if the common case doesn't use many registers.
1556  *
1557  * When a callee is wrapped in a thunk, the caller can assume that all
1558  * arg regs and all scratch registers are preserved across the
1559  * call. The return value in rax/eax will not be saved, even for void
1560  * functions.
1561  */
1562 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
1563         extern typeof(func) __raw_callee_save_##func;                   \
1564         static void *__##func##__ __used = func;                        \
1565                                                                         \
1566         asm(".pushsection .text;"                                       \
1567             "__raw_callee_save_" #func ": "                             \
1568             PV_SAVE_ALL_CALLER_REGS                                     \
1569             "call " #func ";"                                           \
1570             PV_RESTORE_ALL_CALLER_REGS                                  \
1571             "ret;"                                                      \
1572             ".popsection")
1573
1574 /* Get a reference to a callee-save function */
1575 #define PV_CALLEE_SAVE(func)                                            \
1576         ((struct paravirt_callee_save) { __raw_callee_save_##func })
1577
1578 /* Promise that "func" already uses the right calling convention */
1579 #define __PV_IS_CALLEE_SAVE(func)                       \
1580         ((struct paravirt_callee_save) { func })
1581
1582 static inline unsigned long __raw_local_save_flags(void)
1583 {
1584         unsigned long f;
1585
1586         asm volatile(paravirt_alt(PARAVIRT_CALL)
1587                      : "=a"(f)
1588                      : paravirt_type(pv_irq_ops.save_fl),
1589                        paravirt_clobber(CLBR_EAX)
1590                      : "memory", "cc");
1591         return f;
1592 }
1593
1594 static inline void raw_local_irq_restore(unsigned long f)
1595 {
1596         asm volatile(paravirt_alt(PARAVIRT_CALL)
1597                      : "=a"(f)
1598                      : PV_FLAGS_ARG(f),
1599                        paravirt_type(pv_irq_ops.restore_fl),
1600                        paravirt_clobber(CLBR_EAX)
1601                      : "memory", "cc");
1602 }
1603
1604 static inline void raw_local_irq_disable(void)
1605 {
1606         asm volatile(paravirt_alt(PARAVIRT_CALL)
1607                      :
1608                      : paravirt_type(pv_irq_ops.irq_disable),
1609                        paravirt_clobber(CLBR_EAX)
1610                      : "memory", "eax", "cc");
1611 }
1612
1613 static inline void raw_local_irq_enable(void)
1614 {
1615         asm volatile(paravirt_alt(PARAVIRT_CALL)
1616                      :
1617                      : paravirt_type(pv_irq_ops.irq_enable),
1618                        paravirt_clobber(CLBR_EAX)
1619                      : "memory", "eax", "cc");
1620 }
1621
1622 static inline unsigned long __raw_local_irq_save(void)
1623 {
1624         unsigned long f;
1625
1626         f = __raw_local_save_flags();
1627         raw_local_irq_disable();
1628         return f;
1629 }
1630
1631
1632 /* Make sure as little as possible of this mess escapes. */
1633 #undef PARAVIRT_CALL
1634 #undef __PVOP_CALL
1635 #undef __PVOP_VCALL
1636 #undef PVOP_VCALL0
1637 #undef PVOP_CALL0
1638 #undef PVOP_VCALL1
1639 #undef PVOP_CALL1
1640 #undef PVOP_VCALL2
1641 #undef PVOP_CALL2
1642 #undef PVOP_VCALL3
1643 #undef PVOP_CALL3
1644 #undef PVOP_VCALL4
1645 #undef PVOP_CALL4
1646
1647 #else  /* __ASSEMBLY__ */
1648
1649 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
1650 771:;                                           \
1651         ops;                                    \
1652 772:;                                           \
1653         .pushsection .parainstructions,"a";     \
1654          .align algn;                           \
1655          word 771b;                             \
1656          .byte ptype;                           \
1657          .byte 772b-771b;                       \
1658          .short clobbers;                       \
1659         .popsection
1660
1661
1662 #define COND_PUSH(set, mask, reg)                       \
1663         .if ((~(set)) & mask); push %reg; .endif
1664 #define COND_POP(set, mask, reg)                        \
1665         .if ((~(set)) & mask); pop %reg; .endif
1666
1667 #ifdef CONFIG_X86_64
1668
1669 #define PV_SAVE_REGS(set)                       \
1670         COND_PUSH(set, CLBR_RAX, rax);          \
1671         COND_PUSH(set, CLBR_RCX, rcx);          \
1672         COND_PUSH(set, CLBR_RDX, rdx);          \
1673         COND_PUSH(set, CLBR_RSI, rsi);          \
1674         COND_PUSH(set, CLBR_RDI, rdi);          \
1675         COND_PUSH(set, CLBR_R8, r8);            \
1676         COND_PUSH(set, CLBR_R9, r9);            \
1677         COND_PUSH(set, CLBR_R10, r10);          \
1678         COND_PUSH(set, CLBR_R11, r11)
1679 #define PV_RESTORE_REGS(set)                    \
1680         COND_POP(set, CLBR_R11, r11);           \
1681         COND_POP(set, CLBR_R10, r10);           \
1682         COND_POP(set, CLBR_R9, r9);             \
1683         COND_POP(set, CLBR_R8, r8);             \
1684         COND_POP(set, CLBR_RDI, rdi);           \
1685         COND_POP(set, CLBR_RSI, rsi);           \
1686         COND_POP(set, CLBR_RDX, rdx);           \
1687         COND_POP(set, CLBR_RCX, rcx);           \
1688         COND_POP(set, CLBR_RAX, rax)
1689
1690 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
1691 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1692 #define PARA_INDIRECT(addr)     *addr(%rip)
1693 #else
1694 #define PV_SAVE_REGS(set)                       \
1695         COND_PUSH(set, CLBR_EAX, eax);          \
1696         COND_PUSH(set, CLBR_EDI, edi);          \
1697         COND_PUSH(set, CLBR_ECX, ecx);          \
1698         COND_PUSH(set, CLBR_EDX, edx)
1699 #define PV_RESTORE_REGS(set)                    \
1700         COND_POP(set, CLBR_EDX, edx);           \
1701         COND_POP(set, CLBR_ECX, ecx);           \
1702         COND_POP(set, CLBR_EDI, edi);           \
1703         COND_POP(set, CLBR_EAX, eax)
1704
1705 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
1706 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1707 #define PARA_INDIRECT(addr)     *%cs:addr
1708 #endif
1709
1710 #define INTERRUPT_RETURN                                                \
1711         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
1712                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1713
1714 #define DISABLE_INTERRUPTS(clobbers)                                    \
1715         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1716                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
1717                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
1718                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1719
1720 #define ENABLE_INTERRUPTS(clobbers)                                     \
1721         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
1722                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
1723                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
1724                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1725
1726 #define USERGS_SYSRET32                                                 \
1727         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
1728                   CLBR_NONE,                                            \
1729                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1730
1731 #ifdef CONFIG_X86_32
1732 #define GET_CR0_INTO_EAX                                \
1733         push %ecx; push %edx;                           \
1734         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1735         pop %edx; pop %ecx
1736
1737 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
1738         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1739                   CLBR_NONE,                                            \
1740                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1741
1742
1743 #else   /* !CONFIG_X86_32 */
1744
1745 /*
1746  * If swapgs is used while the userspace stack is still current,
1747  * there's no way to call a pvop.  The PV replacement *must* be
1748  * inlined, or the swapgs instruction must be trapped and emulated.
1749  */
1750 #define SWAPGS_UNSAFE_STACK                                             \
1751         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1752                   swapgs)
1753
1754 /*
1755  * Note: swapgs is very special, and in practise is either going to be
1756  * implemented with a single "swapgs" instruction or something very
1757  * special.  Either way, we don't need to save any registers for
1758  * it.
1759  */
1760 #define SWAPGS                                                          \
1761         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1762                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
1763                  )
1764
1765 #define GET_CR2_INTO_RCX                                \
1766         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1767         movq %rax, %rcx;                                \
1768         xorq %rax, %rax;
1769
1770 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
1771         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1772                   CLBR_NONE,                                            \
1773                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1774
1775 #define USERGS_SYSRET64                                                 \
1776         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1777                   CLBR_NONE,                                            \
1778                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1779
1780 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1781         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1782                   CLBR_NONE,                                            \
1783                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1784 #endif  /* CONFIG_X86_32 */
1785
1786 #endif /* __ASSEMBLY__ */
1787 #endif /* CONFIG_PARAVIRT */
1788 #endif /* _ASM_X86_PARAVIRT_H */