2 * arch/sh/kernel/setup.c
4 * This file handles the architecture-dependent parts of initialization
6 * Copyright (C) 1999 Niibe Yutaka
7 * Copyright (C) 2002 - 2010 Paul Mundt
9 #include <linux/screen_info.h>
10 #include <linux/ioport.h>
11 #include <linux/init.h>
12 #include <linux/initrd.h>
13 #include <linux/bootmem.h>
14 #include <linux/console.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/utsname.h>
18 #include <linux/nodemask.h>
19 #include <linux/cpu.h>
20 #include <linux/pfn.h>
23 #include <linux/kexec.h>
24 #include <linux/module.h>
25 #include <linux/smp.h>
26 #include <linux/err.h>
27 #include <linux/crash_dump.h>
28 #include <linux/mmzone.h>
29 #include <linux/clk.h>
30 #include <linux/delay.h>
31 #include <linux/platform_device.h>
32 #include <linux/memblock.h>
33 #include <asm/uaccess.h>
37 #include <asm/sections.h>
39 #include <asm/setup.h>
40 #include <asm/clock.h>
42 #include <asm/mmu_context.h>
43 #include <asm/mmzone.h>
46 * Initialize loops_per_jiffy as 10000000 (1000MIPS).
47 * This value will be used at the very early stage of serial setup.
48 * The bigger value means no problem.
50 struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
53 .family = CPU_FAMILY_UNKNOWN,
54 .loops_per_jiffy = 10000000,
55 .phys_bits = MAX_PHYSMEM_BITS,
58 EXPORT_SYMBOL(cpu_data);
61 * The machine vector. First entry in .machvec.init, or clobbered by
62 * sh_mv= on the command line, prior to .machvec.init teardown.
64 struct sh_machine_vector sh_mv = { .mv_name = "generic", };
68 struct screen_info screen_info;
71 extern int root_mountflags;
73 #define RAMDISK_IMAGE_START_MASK 0x07FF
74 #define RAMDISK_PROMPT_FLAG 0x8000
75 #define RAMDISK_LOAD_FLAG 0x4000
77 static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, };
79 static struct resource code_resource = {
80 .name = "Kernel code",
81 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
84 static struct resource data_resource = {
85 .name = "Kernel data",
86 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
89 static struct resource bss_resource = {
91 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
94 unsigned long memory_start;
95 EXPORT_SYMBOL(memory_start);
96 unsigned long memory_end = 0;
97 EXPORT_SYMBOL(memory_end);
98 unsigned long memory_limit = 0;
100 static struct resource mem_resources[MAX_NUMNODES];
102 int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
104 static int __init early_parse_mem(char *p)
109 memory_limit = PAGE_ALIGN(memparse(p, &p));
111 pr_notice("Memory limited to %ldMB\n", memory_limit >> 20);
115 early_param("mem", early_parse_mem);
117 void __init check_for_initrd(void)
119 #ifdef CONFIG_BLK_DEV_INITRD
120 unsigned long start, end;
123 * Check for the rare cases where boot loaders adhere to the boot
126 if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE)
129 start = INITRD_START + __MEMORY_START;
130 end = start + INITRD_SIZE;
132 if (unlikely(end <= start))
134 if (unlikely(start & ~PAGE_MASK)) {
135 pr_err("initrd must be page aligned\n");
139 if (unlikely(start < __MEMORY_START)) {
140 pr_err("initrd start (%08lx) < __MEMORY_START(%x)\n",
141 start, __MEMORY_START);
145 if (unlikely(end > memblock_end_of_DRAM())) {
146 pr_err("initrd extends beyond end of memory "
147 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
148 end, (unsigned long)memblock_end_of_DRAM());
153 * If we got this far inspite of the boot loader's best efforts
154 * to the contrary, assume we actually have a valid initrd and
155 * fix up the root dev.
157 ROOT_DEV = Root_RAM0;
160 * Address sanitization
162 initrd_start = (unsigned long)__va(start);
163 initrd_end = initrd_start + INITRD_SIZE;
165 memblock_reserve(__pa(initrd_start), INITRD_SIZE);
170 pr_info("initrd disabled\n");
171 initrd_start = initrd_end = 0;
175 void __cpuinit calibrate_delay(void)
177 struct clk *clk = clk_get(NULL, "cpu_clk");
180 panic("Need a sane CPU clock definition!");
182 loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ;
184 printk(KERN_INFO "Calibrating delay loop (skipped)... "
185 "%lu.%02lu BogoMIPS PRESET (lpj=%lu)\n",
186 loops_per_jiffy/(500000/HZ),
187 (loops_per_jiffy/(5000/HZ)) % 100,
191 void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
192 unsigned long end_pfn)
194 struct resource *res = &mem_resources[nid];
195 unsigned long start, end;
197 WARN_ON(res->name); /* max one active range per node for now */
199 start = start_pfn << PAGE_SHIFT;
200 end = end_pfn << PAGE_SHIFT;
202 res->name = "System RAM";
205 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
207 if (request_resource(&iomem_resource, res)) {
208 pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
214 * We don't know which RAM region contains kernel data,
215 * so we try it repeatedly and let the resource manager
218 request_resource(res, &code_resource);
219 request_resource(res, &data_resource);
220 request_resource(res, &bss_resource);
223 * Also make sure that there is a PMB mapping that covers this
224 * range before we attempt to activate it, to avoid reset by MMU.
225 * We can hit this path with NUMA or memory hot-add.
227 pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
230 add_active_range(nid, start_pfn, end_pfn);
233 void __init __weak plat_early_device_setup(void)
237 void __init setup_arch(char **cmdline_p)
241 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
243 printk(KERN_NOTICE "Boot params:\n"
244 "... MOUNT_ROOT_RDONLY - %08lx\n"
245 "... RAMDISK_FLAGS - %08lx\n"
246 "... ORIG_ROOT_DEV - %08lx\n"
247 "... LOADER_TYPE - %08lx\n"
248 "... INITRD_START - %08lx\n"
249 "... INITRD_SIZE - %08lx\n",
250 MOUNT_ROOT_RDONLY, RAMDISK_FLAGS,
251 ORIG_ROOT_DEV, LOADER_TYPE,
252 INITRD_START, INITRD_SIZE);
254 #ifdef CONFIG_BLK_DEV_RAM
255 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
256 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
257 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
260 if (!MOUNT_ROOT_RDONLY)
261 root_mountflags &= ~MS_RDONLY;
262 init_mm.start_code = (unsigned long) _text;
263 init_mm.end_code = (unsigned long) _etext;
264 init_mm.end_data = (unsigned long) _edata;
265 init_mm.brk = (unsigned long) _end;
267 code_resource.start = virt_to_phys(_text);
268 code_resource.end = virt_to_phys(_etext)-1;
269 data_resource.start = virt_to_phys(_etext);
270 data_resource.end = virt_to_phys(_edata)-1;
271 bss_resource.start = virt_to_phys(__bss_start);
272 bss_resource.end = virt_to_phys(_ebss)-1;
274 #ifdef CONFIG_CMDLINE_OVERWRITE
275 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
277 strlcpy(command_line, COMMAND_LINE, sizeof(command_line));
278 #ifdef CONFIG_CMDLINE_EXTEND
279 strlcat(command_line, " ", sizeof(command_line));
280 strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
284 /* Save unparsed command line copy for /proc/cmdline */
285 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
286 *cmdline_p = command_line;
290 plat_early_device_setup();
294 /* Let earlyprintk output early console messages */
295 early_platform_driver_probe("earlyprintk", 1, 1);
299 #ifdef CONFIG_DUMMY_CONSOLE
300 conswitchp = &dummy_con;
303 /* Perform the machine specific initialisation */
304 if (likely(sh_mv.mv_setup))
305 sh_mv.mv_setup(cmdline_p);
310 /* processor boot mode configuration */
311 int generic_mode_pins(void)
313 pr_warning("generic_mode_pins(): missing mode pin configuration\n");
317 int test_mode_pin(int pin)
319 return sh_mv.mv_mode_pins() & pin;
322 static const char *cpu_name[] = {
323 [CPU_SH7201] = "SH7201",
324 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
325 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
326 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
327 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
328 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
329 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
330 [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729",
331 [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S",
332 [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751",
333 [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760",
334 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
335 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
336 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
337 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
338 [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757",
339 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
340 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
341 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
342 [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724",
343 [CPU_SH_NONE] = "Unknown"
346 const char *get_cpu_subtype(struct sh_cpuinfo *c)
348 return cpu_name[c->type];
350 EXPORT_SYMBOL(get_cpu_subtype);
352 #ifdef CONFIG_PROC_FS
353 /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
354 static const char *cpu_flags[] = {
355 "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
356 "ptea", "llsc", "l2", "op32", "pteaex", NULL
359 static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
363 seq_printf(m, "cpu flags\t:");
366 seq_printf(m, " %s\n", cpu_flags[0]);
370 for (i = 0; cpu_flags[i]; i++)
371 if ((c->flags & (1 << i)))
372 seq_printf(m, " %s", cpu_flags[i+1]);
377 static void show_cacheinfo(struct seq_file *m, const char *type,
378 struct cache_info info)
380 unsigned int cache_size;
382 cache_size = info.ways * info.sets * info.linesz;
384 seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
385 type, cache_size >> 10, info.ways);
389 * Get CPU information for use by the procfs.
391 static int show_cpuinfo(struct seq_file *m, void *v)
393 struct sh_cpuinfo *c = v;
394 unsigned int cpu = c - cpu_data;
396 if (!cpu_online(cpu))
400 seq_printf(m, "machine\t\t: %s\n", get_system_type());
404 seq_printf(m, "processor\t: %d\n", cpu);
405 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
406 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
407 if (c->cut_major == -1)
408 seq_printf(m, "cut\t\t: unknown\n");
409 else if (c->cut_minor == -1)
410 seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
412 seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
416 seq_printf(m, "cache type\t: ");
419 * Check for what type of cache we have, we support both the
420 * unified cache on the SH-2 and SH-3, as well as the harvard
421 * style cache on the SH-4.
423 if (c->icache.flags & SH_CACHE_COMBINED) {
424 seq_printf(m, "unified\n");
425 show_cacheinfo(m, "cache", c->icache);
427 seq_printf(m, "split (harvard)\n");
428 show_cacheinfo(m, "icache", c->icache);
429 show_cacheinfo(m, "dcache", c->dcache);
432 /* Optional secondary cache */
433 if (c->flags & CPU_HAS_L2_CACHE)
434 show_cacheinfo(m, "scache", c->scache);
436 seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);
438 seq_printf(m, "bogomips\t: %lu.%02lu\n",
439 c->loops_per_jiffy/(500000/HZ),
440 (c->loops_per_jiffy/(5000/HZ)) % 100);
445 static void *c_start(struct seq_file *m, loff_t *pos)
447 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
449 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
452 return c_start(m, pos);
454 static void c_stop(struct seq_file *m, void *v)
457 const struct seq_operations cpuinfo_op = {
461 .show = show_cpuinfo,
463 #endif /* CONFIG_PROC_FS */