2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
23 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
24 select HAVE_GENERIC_DMA_COHERENT
25 select HAVE_KERNEL_GZIP
26 select HAVE_KERNEL_LZO
27 select HAVE_KERNEL_LZMA
28 select HAVE_PERF_EVENTS
29 select PERF_USE_VMALLOC
30 select HAVE_REGS_AND_STACK_ACCESS_API
31 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
33 The ARM series is a line of low-power-consumption RISC chip designs
34 licensed by ARM Ltd and targeted at embedded applications and
35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
36 manufactured, but legacy ARM-based PC hardware remains popular in
37 Europe. There is an ARM Linux project with a web page at
38 <http://www.arm.linux.org.uk/>.
43 config SYS_SUPPORTS_APM_EMULATION
49 config ARCH_USES_GETTIMEOFFSET
53 config GENERIC_CLOCKEVENTS
56 config GENERIC_CLOCKEVENTS_BROADCAST
58 depends on GENERIC_CLOCKEVENTS
63 select GENERIC_ALLOCATOR
74 The Extended Industry Standard Architecture (EISA) bus was
75 developed as an open alternative to the IBM MicroChannel bus.
77 The EISA bus provided some of the features of the IBM MicroChannel
78 bus while maintaining backward compatibility with cards made for
79 the older ISA bus. The EISA bus saw limited use between 1988 and
80 1995 when it was made obsolete by the PCI bus.
82 Say Y here if you are building a kernel for an EISA-based machine.
92 MicroChannel Architecture is found in some IBM PS/2 machines and
93 laptops. It is a bus system similar to PCI or ISA. See
94 <file:Documentation/mca.txt> (and especially the web page given
95 there) before attempting to build an MCA bus kernel.
97 config GENERIC_HARDIRQS
101 config STACKTRACE_SUPPORT
105 config HAVE_LATENCYTOP_SUPPORT
110 config LOCKDEP_SUPPORT
114 config TRACE_IRQFLAGS_SUPPORT
118 config HARDIRQS_SW_RESEND
122 config GENERIC_IRQ_PROBE
126 config GENERIC_LOCKBREAK
129 depends on SMP && PREEMPT
131 config RWSEM_GENERIC_SPINLOCK
135 config RWSEM_XCHGADD_ALGORITHM
138 config ARCH_HAS_ILOG2_U32
141 config ARCH_HAS_ILOG2_U64
144 config ARCH_HAS_CPUFREQ
147 Internal node to signify that the ARCH has CPUFREQ support
148 and that the relevant menu configurations are displayed for
151 config ARCH_HAS_CPU_IDLE_WAIT
154 config GENERIC_HWEIGHT
158 config GENERIC_CALIBRATE_DELAY
162 config ARCH_MAY_HAVE_PC_FDC
168 config NEED_DMA_MAP_STATE
171 config GENERIC_ISA_DMA
180 config GENERIC_HARDIRQS_NO__DO_IRQ
183 config ARM_L1_CACHE_SHIFT_6
186 Setting ARM L1 cache line size to 64 Bytes.
190 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
191 default DRAM_BASE if REMAP_VECTORS_TO_RAM
194 The base address of exception vectors.
196 source "init/Kconfig"
198 source "kernel/Kconfig.freezer"
203 bool "MMU-based Paged Memory Management Support"
206 Select if you want MMU-based virtualised addressing space
207 support by paged memory management. If unsure, say 'Y'.
210 # The "ARM system type" choice list is ordered alphabetically by option
211 # text. Please add new entries in the option alphabetic order.
214 prompt "ARM system type"
215 default ARCH_VERSATILE
218 bool "Agilent AAEC-2000 based"
222 select ARCH_USES_GETTIMEOFFSET
224 This enables support for systems based on the Agilent AAEC-2000
226 config ARCH_INTEGRATOR
227 bool "ARM Ltd. Integrator family"
229 select ARCH_HAS_CPUFREQ
232 select GENERIC_CLOCKEVENTS
233 select PLAT_VERSATILE
235 Support for ARM's Integrator platform.
238 bool "ARM Ltd. RealView family"
242 select GENERIC_CLOCKEVENTS
243 select ARCH_WANT_OPTIONAL_GPIOLIB
244 select PLAT_VERSATILE
245 select ARM_TIMER_SP804
246 select GPIO_PL061 if GPIOLIB
248 This enables support for ARM Ltd RealView boards.
250 config ARCH_VERSATILE
251 bool "ARM Ltd. Versatile family"
256 select GENERIC_CLOCKEVENTS
257 select ARCH_WANT_OPTIONAL_GPIOLIB
258 select PLAT_VERSATILE
259 select ARM_TIMER_SP804
261 This enables support for ARM Ltd Versatile board.
264 bool "ARM Ltd. Versatile Express family"
265 select ARCH_WANT_OPTIONAL_GPIOLIB
267 select ARM_TIMER_SP804
269 select GENERIC_CLOCKEVENTS
272 select PLAT_VERSATILE
274 This enables support for the ARM Ltd Versatile Express boards.
278 select ARCH_REQUIRE_GPIOLIB
281 This enables support for systems based on the Atmel AT91RM9200,
282 AT91SAM9 and AT91CAP9 processors.
285 bool "Broadcom BCMRING"
290 select GENERIC_CLOCKEVENTS
291 select ARCH_WANT_OPTIONAL_GPIOLIB
293 Support for Broadcom's BCMRing platform.
296 bool "Cirrus Logic CLPS711x/EP721x-based"
298 select ARCH_USES_GETTIMEOFFSET
300 Support for Cirrus Logic 711x/721x based boards.
303 bool "Cavium Networks CNS3XXX family"
305 select GENERIC_CLOCKEVENTS
307 select PCI_DOMAINS if PCI
309 Support for Cavium Networks CNS3XXX platform.
312 bool "Cortina Systems Gemini"
314 select ARCH_REQUIRE_GPIOLIB
315 select ARCH_USES_GETTIMEOFFSET
317 Support for the Cortina Systems Gemini family SoCs
324 select ARCH_USES_GETTIMEOFFSET
326 This is an evaluation board for the StrongARM processor available
327 from Digital. It has limited hardware on-board, including an
328 Ethernet interface, two PCMCIA sockets, two serial ports and a
337 select ARCH_REQUIRE_GPIOLIB
338 select ARCH_HAS_HOLES_MEMORYMODEL
339 select ARCH_USES_GETTIMEOFFSET
341 This enables support for the Cirrus EP93xx series of CPUs.
343 config ARCH_FOOTBRIDGE
347 select ARCH_USES_GETTIMEOFFSET
349 Support for systems based on the DC21285 companion chip
350 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
353 bool "Freescale MXC/iMX-based"
354 select GENERIC_CLOCKEVENTS
355 select ARCH_REQUIRE_GPIOLIB
358 Support for Freescale MXC/iMX-based family of processors
361 bool "Freescale STMP3xxx"
364 select ARCH_REQUIRE_GPIOLIB
365 select GENERIC_CLOCKEVENTS
366 select USB_ARCH_HAS_EHCI
368 Support for systems based on the Freescale 3xxx CPUs.
371 bool "Hilscher NetX based"
374 select GENERIC_CLOCKEVENTS
376 This enables support for systems based on the Hilscher NetX Soc
379 bool "Hynix HMS720x-based"
382 select ARCH_USES_GETTIMEOFFSET
384 This enables support for systems based on the Hynix HMS720x
392 select ARCH_SUPPORTS_MSI
395 Support for Intel's IOP13XX (XScale) family of processors.
403 select ARCH_REQUIRE_GPIOLIB
405 Support for Intel's 80219 and IOP32X (XScale) family of
414 select ARCH_REQUIRE_GPIOLIB
416 Support for Intel's IOP33X (XScale) family of processors.
423 select ARCH_USES_GETTIMEOFFSET
425 Support for Intel's IXP23xx (XScale) family of processors.
428 bool "IXP2400/2800-based"
432 select ARCH_USES_GETTIMEOFFSET
434 Support for Intel's IXP2400/2800 (XScale) family of processors.
441 select GENERIC_CLOCKEVENTS
442 select DMABOUNCE if PCI
444 Support for Intel's IXP4XX (XScale) family of processors.
449 select ARCH_REQUIRE_GPIOLIB
450 select GENERIC_CLOCKEVENTS
453 Support for the Marvell Dove SoC 88AP510
456 bool "Marvell Kirkwood"
459 select ARCH_REQUIRE_GPIOLIB
460 select GENERIC_CLOCKEVENTS
463 Support for the following Marvell Kirkwood series SoCs:
464 88F6180, 88F6192 and 88F6281.
467 bool "Marvell Loki (88RC8480)"
469 select GENERIC_CLOCKEVENTS
472 Support for the Marvell Loki (88RC8480) SoC.
477 select ARCH_REQUIRE_GPIOLIB
480 select USB_ARCH_HAS_OHCI
483 select GENERIC_CLOCKEVENTS
485 Support for the NXP LPC32XX family of processors
488 bool "Marvell MV78xx0"
491 select ARCH_REQUIRE_GPIOLIB
492 select GENERIC_CLOCKEVENTS
495 Support for the following Marvell MV78xx0 series SoCs:
503 select ARCH_REQUIRE_GPIOLIB
504 select GENERIC_CLOCKEVENTS
507 Support for the following Marvell Orion 5x series SoCs:
508 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
509 Orion-2 (5281), Orion-1-90 (6183).
512 bool "Marvell PXA168/910/MMP2"
514 select ARCH_REQUIRE_GPIOLIB
516 select GENERIC_CLOCKEVENTS
520 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
523 bool "Micrel/Kendin KS8695"
525 select ARCH_REQUIRE_GPIOLIB
526 select ARCH_USES_GETTIMEOFFSET
528 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
529 System-on-Chip devices.
532 bool "NetSilicon NS9xxx"
535 select GENERIC_CLOCKEVENTS
538 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
541 <http://www.digi.com/products/microprocessors/index.jsp>
544 bool "Nuvoton W90X900 CPU"
546 select ARCH_REQUIRE_GPIOLIB
548 select GENERIC_CLOCKEVENTS
550 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
551 At present, the w90x900 has been renamed nuc900, regarding
552 the ARM series product line, you can login the following
553 link address to know more.
555 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
556 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
559 bool "Nuvoton NUC93X CPU"
563 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
564 low-power and high performance MPEG-4/JPEG multimedia controller chip.
569 select GENERIC_CLOCKEVENTS
573 select ARCH_HAS_BARRIERS if CACHE_L2X0
575 This enables support for NVIDIA Tegra based systems (Tegra APX,
576 Tegra 6xx and Tegra 2 series).
579 bool "Philips Nexperia PNX4008 Mobile"
582 select ARCH_USES_GETTIMEOFFSET
584 This enables support for Philips PNX4008 mobile platform.
587 bool "PXA2xx/PXA3xx-based"
590 select ARCH_HAS_CPUFREQ
592 select ARCH_REQUIRE_GPIOLIB
593 select GENERIC_CLOCKEVENTS
597 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
602 select GENERIC_CLOCKEVENTS
603 select ARCH_REQUIRE_GPIOLIB
605 Support for Qualcomm MSM/QSD based systems. This runs on the
606 apps processor of the MSM/QSD and depends on a shared memory
607 interface to the modem processor which runs the baseband
608 stack and controls some vital subsystems
609 (clock and power control, etc).
612 bool "Renesas SH-Mobile"
614 Support for Renesas's SH-Mobile ARM platforms
621 select ARCH_MAY_HAVE_PC_FDC
622 select HAVE_PATA_PLATFORM
625 select ARCH_SPARSEMEM_ENABLE
626 select ARCH_USES_GETTIMEOFFSET
628 On the Acorn Risc-PC, Linux can support the internal IDE disk and
629 CD-ROM interface, serial and parallel port, and the floppy drive.
635 select ARCH_SPARSEMEM_ENABLE
637 select ARCH_HAS_CPUFREQ
639 select GENERIC_CLOCKEVENTS
642 select ARCH_REQUIRE_GPIOLIB
644 Support for StrongARM 11x0 based boards.
647 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
649 select ARCH_HAS_CPUFREQ
651 select ARCH_USES_GETTIMEOFFSET
652 select HAVE_S3C2410_I2C
654 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
655 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
656 the Samsung SMDK2410 development board (and derivatives).
658 Note, the S3C2416 and the S3C2450 are so close that they even share
659 the same SoC ID code. This means that there is no seperate machine
660 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
663 bool "Samsung S3C64XX"
669 select ARCH_USES_GETTIMEOFFSET
670 select ARCH_HAS_CPUFREQ
671 select ARCH_REQUIRE_GPIOLIB
672 select SAMSUNG_CLKSRC
673 select SAMSUNG_IRQ_VIC_TIMER
674 select SAMSUNG_IRQ_UART
675 select S3C_GPIO_TRACK
676 select S3C_GPIO_PULL_UPDOWN
677 select S3C_GPIO_CFG_S3C24XX
678 select S3C_GPIO_CFG_S3C64XX
680 select USB_ARCH_HAS_OHCI
681 select SAMSUNG_GPIOLIB_4BIT
682 select HAVE_S3C2410_I2C
683 select HAVE_S3C2410_WATCHDOG
685 Samsung S3C64XX series based systems
688 bool "Samsung S5P6440"
692 select HAVE_S3C2410_WATCHDOG
693 select ARCH_USES_GETTIMEOFFSET
694 select HAVE_S3C2410_I2C
697 Samsung S5P6440 CPU based systems
700 bool "Samsung S5P6442"
704 select ARCH_USES_GETTIMEOFFSET
705 select HAVE_S3C2410_WATCHDOG
707 Samsung S5P6442 CPU based systems
710 bool "Samsung S5PC100"
714 select ARM_L1_CACHE_SHIFT_6
715 select ARCH_USES_GETTIMEOFFSET
716 select HAVE_S3C2410_I2C
718 select HAVE_S3C2410_WATCHDOG
720 Samsung S5PC100 series based systems
723 bool "Samsung S5PV210/S5PC110"
727 select ARM_L1_CACHE_SHIFT_6
728 select ARCH_USES_GETTIMEOFFSET
729 select HAVE_S3C2410_I2C
731 select HAVE_S3C2410_WATCHDOG
733 Samsung S5PV210/S5PC110 series based systems
736 bool "Samsung S5PV310/S5PC210"
740 select GENERIC_CLOCKEVENTS
742 Samsung S5PV310 series based systems
751 select ARCH_USES_GETTIMEOFFSET
753 Support for the StrongARM based Digital DNARD machine, also known
754 as "Shark" (<http://www.shark-linux.de/shark.html>).
759 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
760 select ARCH_USES_GETTIMEOFFSET
762 Say Y here for systems based on one of the Sharp LH7A40X
763 System on a Chip processors. These CPUs include an ARM922T
764 core with a wide array of integrated devices for
765 hand-held and low-power applications.
768 bool "ST-Ericsson U300 Series"
774 select GENERIC_CLOCKEVENTS
778 Support for ST-Ericsson U300 series mobile platforms.
781 bool "ST-Ericsson U8500 Series"
784 select GENERIC_CLOCKEVENTS
786 select ARCH_REQUIRE_GPIOLIB
788 Support for ST-Ericsson's Ux500 architecture
791 bool "STMicroelectronics Nomadik"
796 select GENERIC_CLOCKEVENTS
797 select ARCH_REQUIRE_GPIOLIB
799 Support for the Nomadik platform by ST-Ericsson
803 select GENERIC_CLOCKEVENTS
804 select ARCH_REQUIRE_GPIOLIB
808 select GENERIC_ALLOCATOR
809 select ARCH_HAS_HOLES_MEMORYMODEL
811 Support for TI's DaVinci platform.
816 select ARCH_REQUIRE_GPIOLIB
817 select ARCH_HAS_CPUFREQ
818 select GENERIC_CLOCKEVENTS
819 select ARCH_HAS_HOLES_MEMORYMODEL
821 Support for TI's OMAP platform (OMAP1 and OMAP2).
826 select ARCH_REQUIRE_GPIOLIB
828 select GENERIC_CLOCKEVENTS
831 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
836 # This is sorted alphabetically by mach-* pathname. However, plat-*
837 # Kconfigs may be included either alphabetically (according to the
838 # plat- suffix) or along side the corresponding mach-* source.
840 source "arch/arm/mach-aaec2000/Kconfig"
842 source "arch/arm/mach-at91/Kconfig"
844 source "arch/arm/mach-bcmring/Kconfig"
846 source "arch/arm/mach-clps711x/Kconfig"
848 source "arch/arm/mach-cns3xxx/Kconfig"
850 source "arch/arm/mach-davinci/Kconfig"
852 source "arch/arm/mach-dove/Kconfig"
854 source "arch/arm/mach-ep93xx/Kconfig"
856 source "arch/arm/mach-footbridge/Kconfig"
858 source "arch/arm/mach-gemini/Kconfig"
860 source "arch/arm/mach-h720x/Kconfig"
862 source "arch/arm/mach-integrator/Kconfig"
864 source "arch/arm/mach-iop32x/Kconfig"
866 source "arch/arm/mach-iop33x/Kconfig"
868 source "arch/arm/mach-iop13xx/Kconfig"
870 source "arch/arm/mach-ixp4xx/Kconfig"
872 source "arch/arm/mach-ixp2000/Kconfig"
874 source "arch/arm/mach-ixp23xx/Kconfig"
876 source "arch/arm/mach-kirkwood/Kconfig"
878 source "arch/arm/mach-ks8695/Kconfig"
880 source "arch/arm/mach-lh7a40x/Kconfig"
882 source "arch/arm/mach-loki/Kconfig"
884 source "arch/arm/mach-lpc32xx/Kconfig"
886 source "arch/arm/mach-msm/Kconfig"
888 source "arch/arm/mach-mv78xx0/Kconfig"
890 source "arch/arm/plat-mxc/Kconfig"
892 source "arch/arm/mach-netx/Kconfig"
894 source "arch/arm/mach-nomadik/Kconfig"
895 source "arch/arm/plat-nomadik/Kconfig"
897 source "arch/arm/mach-ns9xxx/Kconfig"
899 source "arch/arm/mach-nuc93x/Kconfig"
901 source "arch/arm/plat-omap/Kconfig"
903 source "arch/arm/mach-omap1/Kconfig"
905 source "arch/arm/mach-omap2/Kconfig"
907 source "arch/arm/mach-orion5x/Kconfig"
909 source "arch/arm/mach-pxa/Kconfig"
910 source "arch/arm/plat-pxa/Kconfig"
912 source "arch/arm/mach-mmp/Kconfig"
914 source "arch/arm/mach-realview/Kconfig"
916 source "arch/arm/mach-sa1100/Kconfig"
918 source "arch/arm/plat-samsung/Kconfig"
919 source "arch/arm/plat-s3c24xx/Kconfig"
920 source "arch/arm/plat-s5p/Kconfig"
922 source "arch/arm/plat-spear/Kconfig"
925 source "arch/arm/mach-s3c2400/Kconfig"
926 source "arch/arm/mach-s3c2410/Kconfig"
927 source "arch/arm/mach-s3c2412/Kconfig"
928 source "arch/arm/mach-s3c2416/Kconfig"
929 source "arch/arm/mach-s3c2440/Kconfig"
930 source "arch/arm/mach-s3c2443/Kconfig"
934 source "arch/arm/mach-s3c64xx/Kconfig"
937 source "arch/arm/mach-s5p6440/Kconfig"
939 source "arch/arm/mach-s5p6442/Kconfig"
941 source "arch/arm/mach-s5pc100/Kconfig"
943 source "arch/arm/mach-s5pv210/Kconfig"
945 source "arch/arm/mach-s5pv310/Kconfig"
947 source "arch/arm/mach-shmobile/Kconfig"
949 source "arch/arm/plat-stmp3xxx/Kconfig"
951 source "arch/arm/mach-tegra/Kconfig"
953 source "arch/arm/mach-u300/Kconfig"
955 source "arch/arm/mach-ux500/Kconfig"
957 source "arch/arm/mach-versatile/Kconfig"
959 source "arch/arm/mach-vexpress/Kconfig"
961 source "arch/arm/mach-w90x900/Kconfig"
963 # Definitions to make life easier
969 select GENERIC_CLOCKEVENTS
977 config PLAT_VERSATILE
980 config ARM_TIMER_SP804
983 source arch/arm/mm/Kconfig
986 bool "Enable iWMMXt support"
987 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
988 default y if PXA27x || PXA3xx || ARCH_MMP
990 Enable support for iWMMXt context switching at run time if
991 running on a CPU that supports it.
993 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
996 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1000 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1001 (!ARCH_OMAP3 || OMAP3_EMU)
1006 source "arch/arm/Kconfig-nommu"
1009 config ARM_ERRATA_411920
1010 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1013 Invalidation of the Instruction Cache operation can
1014 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1015 It does not affect the MPCore. This option enables the ARM Ltd.
1016 recommended workaround.
1018 config ARM_ERRATA_430973
1019 bool "ARM errata: Stale prediction on replaced interworking branch"
1022 This option enables the workaround for the 430973 Cortex-A8
1023 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1024 interworking branch is replaced with another code sequence at the
1025 same virtual address, whether due to self-modifying code or virtual
1026 to physical address re-mapping, Cortex-A8 does not recover from the
1027 stale interworking branch prediction. This results in Cortex-A8
1028 executing the new code sequence in the incorrect ARM or Thumb state.
1029 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1030 and also flushes the branch target cache at every context switch.
1031 Note that setting specific bits in the ACTLR register may not be
1032 available in non-secure mode.
1034 config ARM_ERRATA_458693
1035 bool "ARM errata: Processor deadlock when a false hazard is created"
1038 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1039 erratum. For very specific sequences of memory operations, it is
1040 possible for a hazard condition intended for a cache line to instead
1041 be incorrectly associated with a different cache line. This false
1042 hazard might then cause a processor deadlock. The workaround enables
1043 the L1 caching of the NEON accesses and disables the PLD instruction
1044 in the ACTLR register. Note that setting specific bits in the ACTLR
1045 register may not be available in non-secure mode.
1047 config ARM_ERRATA_460075
1048 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1051 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1052 erratum. Any asynchronous access to the L2 cache may encounter a
1053 situation in which recent store transactions to the L2 cache are lost
1054 and overwritten with stale memory contents from external memory. The
1055 workaround disables the write-allocate mode for the L2 cache via the
1056 ACTLR register. Note that setting specific bits in the ACTLR register
1057 may not be available in non-secure mode.
1059 config ARM_ERRATA_742230
1060 bool "ARM errata: DMB operation may be faulty"
1061 depends on CPU_V7 && SMP
1063 This option enables the workaround for the 742230 Cortex-A9
1064 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1065 between two write operations may not ensure the correct visibility
1066 ordering of the two writes. This workaround sets a specific bit in
1067 the diagnostic register of the Cortex-A9 which causes the DMB
1068 instruction to behave as a DSB, ensuring the correct behaviour of
1071 config ARM_ERRATA_742231
1072 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1073 depends on CPU_V7 && SMP
1075 This option enables the workaround for the 742231 Cortex-A9
1076 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1077 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1078 accessing some data located in the same cache line, may get corrupted
1079 data due to bad handling of the address hazard when the line gets
1080 replaced from one of the CPUs at the same time as another CPU is
1081 accessing it. This workaround sets specific bits in the diagnostic
1082 register of the Cortex-A9 which reduces the linefill issuing
1083 capabilities of the processor.
1085 config PL310_ERRATA_588369
1086 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1087 depends on CACHE_L2X0 && ARCH_OMAP4
1089 The PL310 L2 cache controller implements three types of Clean &
1090 Invalidate maintenance operations: by Physical Address
1091 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1092 They are architecturally defined to behave as the execution of a
1093 clean operation followed immediately by an invalidate operation,
1094 both performing to the same memory location. This functionality
1095 is not correctly implemented in PL310 as clean lines are not
1096 invalidated as a result of these operations. Note that this errata
1097 uses Texas Instrument's secure monitor api.
1099 config ARM_ERRATA_720789
1100 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1101 depends on CPU_V7 && SMP
1103 This option enables the workaround for the 720789 Cortex-A9 (prior to
1104 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1105 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1106 As a consequence of this erratum, some TLB entries which should be
1107 invalidated are not, resulting in an incoherency in the system page
1108 tables. The workaround changes the TLB flushing routines to invalidate
1109 entries regardless of the ASID.
1112 source "arch/arm/common/Kconfig"
1122 Find out whether you have ISA slots on your motherboard. ISA is the
1123 name of a bus system, i.e. the way the CPU talks to the other stuff
1124 inside your box. Other bus systems are PCI, EISA, MicroChannel
1125 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1126 newer boards don't support it. If you have ISA, say Y, otherwise N.
1128 # Select ISA DMA controller support
1133 # Select ISA DMA interface
1138 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1140 Find out whether you have a PCI motherboard. PCI is the name of a
1141 bus system, i.e. the way the CPU talks to the other stuff inside
1142 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1143 VESA. If you have PCI, say Y, otherwise N.
1152 # Select the host bridge type
1153 config PCI_HOST_VIA82C505
1155 depends on PCI && ARCH_SHARK
1158 config PCI_HOST_ITE8152
1160 depends on PCI && MACH_ARMCORE
1164 source "drivers/pci/Kconfig"
1166 source "drivers/pcmcia/Kconfig"
1170 menu "Kernel Features"
1172 source "kernel/time/Kconfig"
1175 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1176 depends on EXPERIMENTAL
1177 depends on GENERIC_CLOCKEVENTS
1178 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1179 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1180 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1181 select USE_GENERIC_SMP_HELPERS
1184 This enables support for systems with more than one CPU. If you have
1185 a system with only one CPU, like most personal computers, say N. If
1186 you have a system with more than one CPU, say Y.
1188 If you say N here, the kernel will run on single and multiprocessor
1189 machines, but will use only one CPU of a multiprocessor machine. If
1190 you say Y here, the kernel will run on many, but not all, single
1191 processor machines. On a single processor machine, the kernel will
1192 run faster if you say N here.
1194 See also <file:Documentation/i386/IO-APIC.txt>,
1195 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1196 <http://www.linuxdoc.org/docs.html#howto>.
1198 If you don't know what to do here, say N.
1201 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1202 depends on EXPERIMENTAL
1203 depends on SMP && !XIP && !THUMB2_KERNEL
1206 SMP kernels contain instructions which fail on non-SMP processors.
1207 Enabling this option allows the kernel to modify itself to make
1208 these instructions safe. Disabling it allows about 1K of space
1211 If you don't know what to do here, say Y.
1217 This option enables support for the ARM system coherency unit
1223 This options enables support for the ARM timer and watchdog unit
1226 prompt "Memory split"
1229 Select the desired split between kernel and user memory.
1231 If you are not absolutely sure what you are doing, leave this
1235 bool "3G/1G user/kernel split"
1237 bool "2G/2G user/kernel split"
1239 bool "1G/3G user/kernel split"
1244 default 0x40000000 if VMSPLIT_1G
1245 default 0x80000000 if VMSPLIT_2G
1249 int "Maximum number of CPUs (2-32)"
1255 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1256 depends on SMP && HOTPLUG && EXPERIMENTAL
1258 Say Y here to experiment with turning CPUs off and on. CPUs
1259 can be controlled through /sys/devices/system/cpu.
1262 bool "Use local timer interrupts"
1267 Enable support for local timers on SMP platforms, rather then the
1268 legacy IPI broadcast method. Local timers allows the system
1269 accounting to be spread across the timer interval, preventing a
1270 "thundering herd" at every timer tick.
1272 source kernel/Kconfig.preempt
1276 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
1277 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1278 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1279 default AT91_TIMER_HZ if ARCH_AT91
1280 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1283 config THUMB2_KERNEL
1284 bool "Compile the kernel in Thumb-2 mode"
1285 depends on CPU_V7 && EXPERIMENTAL
1287 select ARM_ASM_UNIFIED
1289 By enabling this option, the kernel will be compiled in
1290 Thumb-2 mode. A compiler/assembler that understand the unified
1291 ARM-Thumb syntax is needed.
1295 config ARM_ASM_UNIFIED
1299 bool "Use the ARM EABI to compile the kernel"
1301 This option allows for the kernel to be compiled using the latest
1302 ARM ABI (aka EABI). This is only useful if you are using a user
1303 space environment that is also compiled with EABI.
1305 Since there are major incompatibilities between the legacy ABI and
1306 EABI, especially with regard to structure member alignment, this
1307 option also changes the kernel syscall calling convention to
1308 disambiguate both ABIs and allow for backward compatibility support
1309 (selected with CONFIG_OABI_COMPAT).
1311 To use this you need GCC version 4.0.0 or later.
1314 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1315 depends on AEABI && EXPERIMENTAL
1318 This option preserves the old syscall interface along with the
1319 new (ARM EABI) one. It also provides a compatibility layer to
1320 intercept syscalls that have structure arguments which layout
1321 in memory differs between the legacy ABI and the new ARM EABI
1322 (only for non "thumb" binaries). This option adds a tiny
1323 overhead to all syscalls and produces a slightly larger kernel.
1324 If you know you'll be using only pure EABI user space then you
1325 can say N here. If this option is not selected and you attempt
1326 to execute a legacy ABI binary then the result will be
1327 UNPREDICTABLE (in fact it can be predicted that it won't work
1328 at all). If in doubt say Y.
1330 config ARCH_HAS_HOLES_MEMORYMODEL
1333 config ARCH_SPARSEMEM_ENABLE
1336 config ARCH_SPARSEMEM_DEFAULT
1337 def_bool ARCH_SPARSEMEM_ENABLE
1339 config ARCH_SELECT_MEMORY_MODEL
1340 def_bool ARCH_SPARSEMEM_ENABLE
1343 bool "High Memory Support (EXPERIMENTAL)"
1344 depends on MMU && EXPERIMENTAL
1346 The address space of ARM processors is only 4 Gigabytes large
1347 and it has to accommodate user address space, kernel address
1348 space as well as some memory mapped IO. That means that, if you
1349 have a large amount of physical memory and/or IO, not all of the
1350 memory can be "permanently mapped" by the kernel. The physical
1351 memory that is not permanently mapped is called "high memory".
1353 Depending on the selected kernel/user memory split, minimum
1354 vmalloc space and actual amount of RAM, you may not need this
1355 option which should result in a slightly faster kernel.
1360 bool "Allocate 2nd-level pagetables from highmem"
1362 depends on !OUTER_CACHE
1364 config HW_PERF_EVENTS
1365 bool "Enable hardware performance counter support for perf events"
1366 depends on PERF_EVENTS && CPU_HAS_PMU
1369 Enable hardware performance counter support for perf events. If
1370 disabled, perf events will use software events only.
1375 This enables support for sparse irqs. This is useful in general
1376 as most CPUs have a fairly sparse array of IRQ vectors, which
1377 the irq_desc then maps directly on to. Systems with a high
1378 number of off-chip IRQs will want to treat this as
1379 experimental until they have been independently verified.
1383 config FORCE_MAX_ZONEORDER
1384 int "Maximum zone order" if ARCH_SHMOBILE
1385 range 11 64 if ARCH_SHMOBILE
1386 default "9" if SA1111
1389 The kernel memory allocator divides physically contiguous memory
1390 blocks into "zones", where each zone is a power of two number of
1391 pages. This option selects the largest power of two that the kernel
1392 keeps in the memory allocator. If you need to allocate very large
1393 blocks of physically contiguous memory, then you may need to
1394 increase this value.
1396 This config option is actually maximum order plus one. For example,
1397 a value of 11 means that the largest free memory block is 2^10 pages.
1400 bool "Timer and CPU usage LEDs"
1401 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1402 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1403 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1404 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1405 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1406 ARCH_AT91 || ARCH_DAVINCI || \
1407 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1409 If you say Y here, the LEDs on your machine will be used
1410 to provide useful information about your current system status.
1412 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1413 be able to select which LEDs are active using the options below. If
1414 you are compiling a kernel for the EBSA-110 or the LART however, the
1415 red LED will simply flash regularly to indicate that the system is
1416 still functional. It is safe to say Y here if you have a CATS
1417 system, but the driver will do nothing.
1420 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1421 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1422 || MACH_OMAP_PERSEUS2
1424 depends on !GENERIC_CLOCKEVENTS
1425 default y if ARCH_EBSA110
1427 If you say Y here, one of the system LEDs (the green one on the
1428 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1429 will flash regularly to indicate that the system is still
1430 operational. This is mainly useful to kernel hackers who are
1431 debugging unstable kernels.
1433 The LART uses the same LED for both Timer LED and CPU usage LED
1434 functions. You may choose to use both, but the Timer LED function
1435 will overrule the CPU usage LED.
1438 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1440 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1441 || MACH_OMAP_PERSEUS2
1444 If you say Y here, the red LED will be used to give a good real
1445 time indication of CPU usage, by lighting whenever the idle task
1446 is not currently executing.
1448 The LART uses the same LED for both Timer LED and CPU usage LED
1449 functions. You may choose to use both, but the Timer LED function
1450 will overrule the CPU usage LED.
1452 config ALIGNMENT_TRAP
1454 depends on CPU_CP15_MMU
1455 default y if !ARCH_EBSA110
1456 select HAVE_PROC_CPU if PROC_FS
1458 ARM processors cannot fetch/store information which is not
1459 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1460 address divisible by 4. On 32-bit ARM processors, these non-aligned
1461 fetch/store instructions will be emulated in software if you say
1462 here, which has a severe performance impact. This is necessary for
1463 correct operation of some network protocols. With an IP-only
1464 configuration it is safe to say N, otherwise say Y.
1466 config UACCESS_WITH_MEMCPY
1467 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1468 depends on MMU && EXPERIMENTAL
1469 default y if CPU_FEROCEON
1471 Implement faster copy_to_user and clear_user methods for CPU
1472 cores where a 8-word STM instruction give significantly higher
1473 memory write throughput than a sequence of individual 32bit stores.
1475 A possible side effect is a slight increase in scheduling latency
1476 between threads sharing the same address space if they invoke
1477 such copy operations with large buffers.
1479 However, if the CPU data cache is using a write-allocate mode,
1480 this option is unlikely to provide any performance gain.
1482 config CC_STACKPROTECTOR
1483 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1485 This option turns on the -fstack-protector GCC feature. This
1486 feature puts, at the beginning of functions, a canary value on
1487 the stack just before the return address, and validates
1488 the value just before actually returning. Stack based buffer
1489 overflows (that need to overwrite this return address) now also
1490 overwrite the canary, which gets detected and the attack is then
1491 neutralized via a kernel panic.
1492 This feature requires gcc version 4.2 or above.
1494 config DEPRECATED_PARAM_STRUCT
1495 bool "Provide old way to pass kernel parameters"
1497 This was deprecated in 2001 and announced to live on for 5 years.
1498 Some old boot loaders still use this way.
1504 # Compressed boot loader in ROM. Yes, we really want to ask about
1505 # TEXT and BSS so we preserve their values in the config files.
1506 config ZBOOT_ROM_TEXT
1507 hex "Compressed ROM boot loader base address"
1510 The physical address at which the ROM-able zImage is to be
1511 placed in the target. Platforms which normally make use of
1512 ROM-able zImage formats normally set this to a suitable
1513 value in their defconfig file.
1515 If ZBOOT_ROM is not enabled, this has no effect.
1517 config ZBOOT_ROM_BSS
1518 hex "Compressed ROM boot loader BSS address"
1521 The base address of an area of read/write memory in the target
1522 for the ROM-able zImage which must be available while the
1523 decompressor is running. It must be large enough to hold the
1524 entire decompressed kernel plus an additional 128 KiB.
1525 Platforms which normally make use of ROM-able zImage formats
1526 normally set this to a suitable value in their defconfig file.
1528 If ZBOOT_ROM is not enabled, this has no effect.
1531 bool "Compressed boot loader in ROM/flash"
1532 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1534 Say Y here if you intend to execute your compressed kernel image
1535 (zImage) directly from ROM or flash. If unsure, say N.
1538 string "Default kernel command string"
1541 On some architectures (EBSA110 and CATS), there is currently no way
1542 for the boot loader to pass arguments to the kernel. For these
1543 architectures, you should supply some command-line options at build
1544 time by entering them here. As a minimum, you should specify the
1545 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1547 config CMDLINE_FORCE
1548 bool "Always use the default kernel command string"
1549 depends on CMDLINE != ""
1551 Always use the default kernel command string, even if the boot
1552 loader passes other arguments to the kernel.
1553 This is useful if you cannot or don't want to change the
1554 command-line options your boot loader passes to the kernel.
1559 bool "Kernel Execute-In-Place from ROM"
1560 depends on !ZBOOT_ROM
1562 Execute-In-Place allows the kernel to run from non-volatile storage
1563 directly addressable by the CPU, such as NOR flash. This saves RAM
1564 space since the text section of the kernel is not loaded from flash
1565 to RAM. Read-write sections, such as the data section and stack,
1566 are still copied to RAM. The XIP kernel is not compressed since
1567 it has to run directly from flash, so it will take more space to
1568 store it. The flash address used to link the kernel object files,
1569 and for storing it, is configuration dependent. Therefore, if you
1570 say Y here, you must know the proper physical address where to
1571 store the kernel image depending on your own flash memory usage.
1573 Also note that the make target becomes "make xipImage" rather than
1574 "make zImage" or "make Image". The final kernel binary to put in
1575 ROM memory will be arch/arm/boot/xipImage.
1579 config XIP_PHYS_ADDR
1580 hex "XIP Kernel Physical Location"
1581 depends on XIP_KERNEL
1582 default "0x00080000"
1584 This is the physical address in your flash memory the kernel will
1585 be linked for and stored to. This address is dependent on your
1589 bool "Kexec system call (EXPERIMENTAL)"
1590 depends on EXPERIMENTAL
1592 kexec is a system call that implements the ability to shutdown your
1593 current kernel, and to start another kernel. It is like a reboot
1594 but it is independent of the system firmware. And like a reboot
1595 you can start any kernel with it, not just Linux.
1597 It is an ongoing process to be certain the hardware in a machine
1598 is properly shutdown, so do not be surprised if this code does not
1599 initially work for you. It may help to enable device hotplugging
1603 bool "Export atags in procfs"
1607 Should the atags used to boot the kernel be exported in an "atags"
1608 file in procfs. Useful with kexec.
1610 config AUTO_ZRELADDR
1611 bool "Auto calculation of the decompressed kernel image address"
1612 depends on !ZBOOT_ROM && !ARCH_U300
1614 ZRELADDR is the physical address where the decompressed kernel
1615 image will be placed. If AUTO_ZRELADDR is selected, the address
1616 will be determined at run-time by masking the current IP with
1617 0xf8000000. This assumes the zImage being placed in the first 128MB
1618 from start of memory.
1622 menu "CPU Power Management"
1626 source "drivers/cpufreq/Kconfig"
1628 config CPU_FREQ_SA1100
1631 config CPU_FREQ_SA1110
1634 config CPU_FREQ_INTEGRATOR
1635 tristate "CPUfreq driver for ARM Integrator CPUs"
1636 depends on ARCH_INTEGRATOR && CPU_FREQ
1639 This enables the CPUfreq driver for ARM Integrator CPUs.
1641 For details, take a look at <file:Documentation/cpu-freq>.
1647 depends on CPU_FREQ && ARCH_PXA && PXA25x
1649 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1651 config CPU_FREQ_S3C64XX
1652 bool "CPUfreq support for Samsung S3C64XX CPUs"
1653 depends on CPU_FREQ && CPU_S3C6410
1658 Internal configuration node for common cpufreq on Samsung SoC
1660 config CPU_FREQ_S3C24XX
1661 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1662 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1665 This enables the CPUfreq driver for the Samsung S3C24XX family
1668 For details, take a look at <file:Documentation/cpu-freq>.
1672 config CPU_FREQ_S3C24XX_PLL
1673 bool "Support CPUfreq changing of PLL frequency"
1674 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1676 Compile in support for changing the PLL frequency from the
1677 S3C24XX series CPUfreq driver. The PLL takes time to settle
1678 after a frequency change, so by default it is not enabled.
1680 This also means that the PLL tables for the selected CPU(s) will
1681 be built which may increase the size of the kernel image.
1683 config CPU_FREQ_S3C24XX_DEBUG
1684 bool "Debug CPUfreq Samsung driver core"
1685 depends on CPU_FREQ_S3C24XX
1687 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1689 config CPU_FREQ_S3C24XX_IODEBUG
1690 bool "Debug CPUfreq Samsung driver IO timing"
1691 depends on CPU_FREQ_S3C24XX
1693 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1695 config CPU_FREQ_S3C24XX_DEBUGFS
1696 bool "Export debugfs for CPUFreq"
1697 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1699 Export status information via debugfs.
1703 source "drivers/cpuidle/Kconfig"
1707 menu "Floating point emulation"
1709 comment "At least one emulation must be selected"
1712 bool "NWFPE math emulation"
1713 depends on !AEABI || OABI_COMPAT
1715 Say Y to include the NWFPE floating point emulator in the kernel.
1716 This is necessary to run most binaries. Linux does not currently
1717 support floating point hardware so you need to say Y here even if
1718 your machine has an FPA or floating point co-processor podule.
1720 You may say N here if you are going to load the Acorn FPEmulator
1721 early in the bootup.
1724 bool "Support extended precision"
1725 depends on FPE_NWFPE
1727 Say Y to include 80-bit support in the kernel floating-point
1728 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1729 Note that gcc does not generate 80-bit operations by default,
1730 so in most cases this option only enlarges the size of the
1731 floating point emulator without any good reason.
1733 You almost surely want to say N here.
1736 bool "FastFPE math emulation (EXPERIMENTAL)"
1737 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1739 Say Y here to include the FAST floating point emulator in the kernel.
1740 This is an experimental much faster emulator which now also has full
1741 precision for the mantissa. It does not support any exceptions.
1742 It is very simple, and approximately 3-6 times faster than NWFPE.
1744 It should be sufficient for most programs. It may be not suitable
1745 for scientific calculations, but you have to check this for yourself.
1746 If you do not feel you need a faster FP emulation you should better
1750 bool "VFP-format floating point maths"
1751 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1753 Say Y to include VFP support code in the kernel. This is needed
1754 if your hardware includes a VFP unit.
1756 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1757 release notes and additional status information.
1759 Say N if your target does not have VFP hardware.
1767 bool "Advanced SIMD (NEON) Extension support"
1768 depends on VFPv3 && CPU_V7
1770 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1775 menu "Userspace binary formats"
1777 source "fs/Kconfig.binfmt"
1780 tristate "RISC OS personality"
1783 Say Y here to include the kernel code necessary if you want to run
1784 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1785 experimental; if this sounds frightening, say N and sleep in peace.
1786 You can also say M here to compile this support as a module (which
1787 will be called arthur).
1791 menu "Power management options"
1793 source "kernel/power/Kconfig"
1795 config ARCH_SUSPEND_POSSIBLE
1800 source "net/Kconfig"
1802 source "drivers/Kconfig"
1806 source "arch/arm/Kconfig.debug"
1808 source "security/Kconfig"
1810 source "crypto/Kconfig"
1812 source "lib/Kconfig"