[net-next-2.6.git] / virt / kvm / irq_comm.c

/*
 * irq_comm.c: Common API for in kernel interrupt controller
 * Copyright (c) 2007, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 *
 * Copyright 2010 Red Hat, Inc. and/or its affilates.
 */

#include <linux/kvm_host.h>
#include <linux/slab.h>
#include <trace/events/kvm.h>

#include <asm/msidef.h>
#ifdef CONFIG_IA64
#include <asm/iosapic.h>
#endif

#include "irq.h"

#include "ioapic.h"

static inline int kvm_irq_line_state(unsigned long *irq_state,
				     int irq_source_id, int level)
{
	/* Logical OR for level trig interrupt */
	if (level)
		set_bit(irq_source_id, irq_state);
	else
		clear_bit(irq_source_id, irq_state);

	return !!(*irq_state);
}

static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
			   struct kvm *kvm, int irq_source_id, int level)
{
#ifdef CONFIG_X86
	struct kvm_pic *pic = pic_irqchip(kvm);
	level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
				   irq_source_id, level);
	return kvm_pic_set_irq(pic, e->irqchip.pin, level);
#else
	return -1;
#endif
}

static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
			      struct kvm *kvm, int irq_source_id, int level)
{
	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
	level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
				   irq_source_id, level);

	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
}

inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
{
#ifdef CONFIG_IA64
	return irq->delivery_mode ==
		(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
#else
	return irq->delivery_mode == APIC_DM_LOWEST;
#endif
}

int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
		struct kvm_lapic_irq *irq)
{
	int i, r = -1;
	struct kvm_vcpu *vcpu, *lowest = NULL;

	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
			kvm_is_dm_lowest_prio(irq))
		printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");

	kvm_for_each_vcpu(i, vcpu, kvm) {
		if (!kvm_apic_present(vcpu))
			continue;

		if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
					irq->dest_id, irq->dest_mode))
			continue;

		if (!kvm_is_dm_lowest_prio(irq)) {
			if (r < 0)
				r = 0;
			r += kvm_apic_set_irq(vcpu, irq);
		} else {
			if (!lowest)
				lowest = vcpu;
			else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
				lowest = vcpu;
		}
	}

	if (lowest)
		r = kvm_apic_set_irq(lowest, irq);

	return r;
}

static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
		       struct kvm *kvm, int irq_source_id, int level)
{
	struct kvm_lapic_irq irq;

	if (!level)
		return -1;

	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);

	irq.dest_id = (e->msi.address_lo &
			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	irq.vector = (e->msi.data &
			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	irq.delivery_mode = e->msi.data & 0x700;
	irq.level = 1;
	irq.shorthand = 0;

	/* TODO Deal with RH bit of MSI message address */
	return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
}

/*
 * Return value:
 *  < 0   Interrupt was ignored (masked or not delivered for other reasons)
 *  = 0   Interrupt was coalesced (previous irq is still pending)
 *  > 0   Number of CPUs interrupt was delivered to
 */
int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
{
	struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS];
	int ret = -1, i = 0;
	struct kvm_irq_routing_table *irq_rt;
	struct hlist_node *n;

	trace_kvm_set_irq(irq, level, irq_source_id);

	/* Not possible to detect if the guest uses the PIC or the
	 * IOAPIC.  So set the bit in both. The guest will ignore
	 * writes to the unused one.
	 */
	rcu_read_lock();
	irq_rt = rcu_dereference(kvm->irq_routing);
	if (irq < irq_rt->nr_rt_entries)
		hlist_for_each_entry(e, n, &irq_rt->map[irq], link)
			irq_set[i++] = *e;
	rcu_read_unlock();

	while(i--) {
		int r;
		r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level);
		if (r < 0)
			continue;

		ret = r + ((ret < 0) ? 0 : ret);
	}

	return ret;
}

void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
{
	struct kvm_irq_ack_notifier *kian;
	struct hlist_node *n;
	int gsi;

	trace_kvm_ack_irq(irqchip, pin);

	rcu_read_lock();
	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
	if (gsi != -1)
		hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
					 link)
			if (kian->gsi == gsi)
				kian->irq_acked(kian);
	rcu_read_unlock();
}

void kvm_register_irq_ack_notifier(struct kvm *kvm,
				   struct kvm_irq_ack_notifier *kian)
{
	mutex_lock(&kvm->irq_lock);
	hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
				    struct kvm_irq_ack_notifier *kian)
{
	mutex_lock(&kvm->irq_lock);
	hlist_del_init_rcu(&kian->link);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();
}

int kvm_request_irq_source_id(struct kvm *kvm)
{
	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	int irq_source_id;

	mutex_lock(&kvm->irq_lock);
	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);

	if (irq_source_id >= BITS_PER_LONG) {
		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
		irq_source_id = -EFAULT;
		goto unlock;
	}

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	set_bit(irq_source_id, bitmap);
unlock:
	mutex_unlock(&kvm->irq_lock);

	return irq_source_id;
}

void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
{
	int i;

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);

	mutex_lock(&kvm->irq_lock);
	if (irq_source_id < 0 ||
	    irq_source_id >= BITS_PER_LONG) {
		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
		goto unlock;
	}
	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	if (!irqchip_in_kernel(kvm))
		goto unlock;

	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
		clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
		if (i >= 16)
			continue;
#ifdef CONFIG_X86
		clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
#endif
	}
unlock:
	mutex_unlock(&kvm->irq_lock);
}

void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
				    struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	kimn->irq = irq;
	hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
				      struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	hlist_del_rcu(&kimn->link);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();
}

void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
{
	struct kvm_irq_mask_notifier *kimn;
	struct hlist_node *n;

	rcu_read_lock();
	hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
		if (kimn->irq == irq)
			kimn->func(kimn, mask);
	rcu_read_unlock();
}

void kvm_free_irq_routing(struct kvm *kvm)
{
	/* Called only during vm destruction. Nobody can use the pointer
	   at this stage */
	kfree(kvm->irq_routing);
}

static int setup_routing_entry(struct kvm_irq_routing_table *rt,
			       struct kvm_kernel_irq_routing_entry *e,
			       const struct kvm_irq_routing_entry *ue)
{
	int r = -EINVAL;
	int delta;
	unsigned max_pin;
	struct kvm_kernel_irq_routing_entry *ei;
	struct hlist_node *n;

	/*
	 * Do not allow GSI to be mapped to the same irqchip more than once.
	 * Allow only one to one mapping between GSI and MSI.
	 */
	hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
		if (ei->type == KVM_IRQ_ROUTING_MSI ||
		    ue->u.irqchip.irqchip == ei->irqchip.irqchip)
			return r;

	e->gsi = ue->gsi;
	e->type = ue->type;
	switch (ue->type) {
	case KVM_IRQ_ROUTING_IRQCHIP:
		delta = 0;
		switch (ue->u.irqchip.irqchip) {
		case KVM_IRQCHIP_PIC_MASTER:
			e->set = kvm_set_pic_irq;
			max_pin = 16;
			break;
		case KVM_IRQCHIP_PIC_SLAVE:
			e->set = kvm_set_pic_irq;
			max_pin = 16;
			delta = 8;
			break;
		case KVM_IRQCHIP_IOAPIC:
			max_pin = KVM_IOAPIC_NUM_PINS;
			e->set = kvm_set_ioapic_irq;
			break;
		default:
			goto out;
		}
		e->irqchip.irqchip = ue->u.irqchip.irqchip;
		e->irqchip.pin = ue->u.irqchip.pin + delta;
		if (e->irqchip.pin >= max_pin)
			goto out;
		rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
		break;
	case KVM_IRQ_ROUTING_MSI:
		e->set = kvm_set_msi;
		e->msi.address_lo = ue->u.msi.address_lo;
		e->msi.address_hi = ue->u.msi.address_hi;
		e->msi.data = ue->u.msi.data;
		break;
	default:
		goto out;
	}

	hlist_add_head(&e->link, &rt->map[e->gsi]);
	r = 0;
out:
	return r;
}


int kvm_set_irq_routing(struct kvm *kvm,
			const struct kvm_irq_routing_entry *ue,
			unsigned nr,
			unsigned flags)
{
	struct kvm_irq_routing_table *new, *old;
	u32 i, j, nr_rt_entries = 0;
	int r;

	for (i = 0; i < nr; ++i) {
		if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
			return -EINVAL;
		nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
	}

	nr_rt_entries += 1;

	new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head))
		      + (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
		      GFP_KERNEL);

	if (!new)
		return -ENOMEM;

	new->rt_entries = (void *)&new->map[nr_rt_entries];

	new->nr_rt_entries = nr_rt_entries;
	for (i = 0; i < 3; i++)
		for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
			new->chip[i][j] = -1;

	for (i = 0; i < nr; ++i) {
		r = -EINVAL;
		if (ue->flags)
			goto out;
		r = setup_routing_entry(new, &new->rt_entries[i], ue);
		if (r)
			goto out;
		++ue;
	}

	mutex_lock(&kvm->irq_lock);
	old = kvm->irq_routing;
	rcu_assign_pointer(kvm->irq_routing, new);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();

	new = old;
	r = 0;

out:
	kfree(new);
	return r;
}

#define IOAPIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)

#ifdef CONFIG_X86
#  define PIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
#else
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq)
#endif

static const struct kvm_irq_routing_entry default_routing[] = {
	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
#ifdef CONFIG_IA64
	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
#endif
};

int kvm_setup_default_irq_routing(struct kvm *kvm)
{
	return kvm_set_irq_routing(kvm, default_routing,
				   ARRAY_SIZE(default_routing), 0);
}
Commit	Line	Data
3de42dc0 XZ	1	/*
	2	* irq_comm.c: Common API for in kernel interrupt controller
	3	* Copyright (c) 2007, Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* You should have received a copy of the GNU General Public License along with
	15	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	16	* Place - Suite 330, Boston, MA 02111-1307 USA.
	17	* Authors:
	18	* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
	19	*
221d059d	20	* Copyright 2010 Red Hat, Inc. and/or its affilates.
3de42dc0 XZ	21	*/
	22
	23	#include <linux/kvm_host.h>
5a0e3ad6	24	#include <linux/slab.h>
229456fc	25	#include <trace/events/kvm.h>
79950e10	26
79950e10	27	#include <asm/msidef.h>
58c2dde1 GN	28	#ifdef CONFIG_IA64
	29	#include <asm/iosapic.h>
	30	#endif
79950e10	31
3de42dc0 XZ	32	#include "irq.h"
	33
	34	#include "ioapic.h"
	35
1a6e4a8c GN	36	static inline int kvm_irq_line_state(unsigned long *irq_state,
	37	int irq_source_id, int level)
	38	{
	39	/* Logical OR for level trig interrupt */
	40	if (level)
	41	set_bit(irq_source_id, irq_state);
	42	else
	43	clear_bit(irq_source_id, irq_state);
	44
	45	return !!(*irq_state);
	46	}
	47
4925663a	48	static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	49	struct kvm *kvm, int irq_source_id, int level)
399ec807 AK	50	{
399ec807 AK	51	#ifdef CONFIG_X86
1a6e4a8c GN	52	struct kvm_pic *pic = pic_irqchip(kvm);
	53	level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
	54	irq_source_id, level);
	55	return kvm_pic_set_irq(pic, e->irqchip.pin, level);
4925663a GN	56	#else
4925663a GN	57	return -1;
399ec807 AK	58	#endif
	59	}
	60
4925663a	61	static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	62	struct kvm *kvm, int irq_source_id, int level)
399ec807	63	{
1a6e4a8c GN	64	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
	65	level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
	66	irq_source_id, level);
	67
	68	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
399ec807 AK	69	}
399ec807 AK	70
58c2dde1	71	inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
116191b6	72	{
58c2dde1 GN	73	#ifdef CONFIG_IA64
	74	return irq->delivery_mode ==
	75	(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
	76	#else
	77	return irq->delivery_mode == APIC_DM_LOWEST;
	78	#endif
	79	}
116191b6	80
58c2dde1 GN	81	int kvm_irq_delivery_to_apic(struct kvm kvm, struct kvm_lapic src,
	82	struct kvm_lapic_irq *irq)
	83	{
	84	int i, r = -1;
	85	struct kvm_vcpu vcpu, lowest = NULL;
	86
	87	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
	88	kvm_is_dm_lowest_prio(irq))
343f94fe GN	89	printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
343f94fe GN	90
988a2cae GN	91	kvm_for_each_vcpu(i, vcpu, kvm) {
988a2cae GN	92	if (!kvm_apic_present(vcpu))
343f94fe GN	93	continue;
343f94fe GN	94
58c2dde1 GN	95	if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
58c2dde1 GN	96	irq->dest_id, irq->dest_mode))
343f94fe GN	97	continue;
343f94fe GN	98
58c2dde1 GN	99	if (!kvm_is_dm_lowest_prio(irq)) {
	100	if (r < 0)
	101	r = 0;
	102	r += kvm_apic_set_irq(vcpu, irq);
e1035715	103	} else {
58c2dde1 GN	104	if (!lowest)
	105	lowest = vcpu;
	106	else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
	107	lowest = vcpu;
e1035715	108	}
343f94fe GN	109	}
343f94fe GN	110
58c2dde1 GN	111	if (lowest)
	112	r = kvm_apic_set_irq(lowest, irq);
	113
	114	return r;
116191b6 SY	115	}
116191b6 SY	116
4925663a	117	static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	118	struct kvm *kvm, int irq_source_id, int level)
79950e10	119	{
58c2dde1	120	struct kvm_lapic_irq irq;
79950e10	121
1a6e4a8c GN	122	if (!level)
	123	return -1;
	124
1000ff8d GN	125	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
1000ff8d GN	126
58c2dde1	127	irq.dest_id = (e->msi.address_lo &
116191b6	128	MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
58c2dde1	129	irq.vector = (e->msi.data &
116191b6	130	MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
58c2dde1 GN	131	irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	132	irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	133	irq.delivery_mode = e->msi.data & 0x700;
	134	irq.level = 1;
	135	irq.shorthand = 0;
116191b6 SY	136
116191b6 SY	137	/* TODO Deal with RH bit of MSI message address */
58c2dde1	138	return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
79950e10 SY	139	}
79950e10 SY	140
680b3648	141	/*
4925663a GN	142	* Return value:
	143	* < 0 Interrupt was ignored (masked or not delivered for other reasons)
	144	* = 0 Interrupt was coalesced (previous irq is still pending)
	145	* > 0 Number of CPUs interrupt was delivered to
	146	*/
46e624b9	147	int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
3de42dc0	148	{
eba0226b GN	149	struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS];
eba0226b GN	150	int ret = -1, i = 0;
46e624b9 GN	151	struct kvm_irq_routing_table *irq_rt;
46e624b9 GN	152	struct hlist_node *n;
79950e10	153
ae8c1c40	154	trace_kvm_set_irq(irq, level, irq_source_id);
229456fc	155
3de42dc0 XZ	156	/* Not possible to detect if the guest uses the PIC or the
	157	* IOAPIC. So set the bit in both. The guest will ignore
	158	* writes to the unused one.
	159	*/
e42bba90 GN	160	rcu_read_lock();
e42bba90 GN	161	irq_rt = rcu_dereference(kvm->irq_routing);
46e624b9	162	if (irq < irq_rt->nr_rt_entries)
eba0226b GN	163	hlist_for_each_entry(e, n, &irq_rt->map[irq], link)
eba0226b GN	164	irq_set[i++] = *e;
e42bba90	165	rcu_read_unlock();
eba0226b GN	166
	167	while(i--) {
	168	int r;
	169	r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level);
	170	if (r < 0)
	171	continue;
	172
	173	ret = r + ((ret < 0) ? 0 : ret);
	174	}
	175
4925663a	176	return ret;
3de42dc0 XZ	177	}
3de42dc0 XZ	178
44882eed	179	void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
3de42dc0 XZ	180	{
	181	struct kvm_irq_ack_notifier *kian;
	182	struct hlist_node *n;
3e71f88b	183	int gsi;
44882eed	184
229456fc MT	185	trace_kvm_ack_irq(irqchip, pin);
229456fc MT	186
e42bba90 GN	187	rcu_read_lock();
e42bba90 GN	188	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
3e71f88b	189	if (gsi != -1)
280aa177 GN	190	hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
280aa177 GN	191	link)
3e71f88b GN	192	if (kian->gsi == gsi)
3e71f88b GN	193	kian->irq_acked(kian);
280aa177	194	rcu_read_unlock();
3de42dc0 XZ	195	}
	196
	197	void kvm_register_irq_ack_notifier(struct kvm *kvm,
	198	struct kvm_irq_ack_notifier *kian)
	199	{
fa40a821	200	mutex_lock(&kvm->irq_lock);
280aa177	201	hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
fa40a821	202	mutex_unlock(&kvm->irq_lock);
3de42dc0 XZ	203	}
3de42dc0 XZ	204
fa40a821 MT	205	void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
fa40a821 MT	206	struct kvm_irq_ack_notifier *kian)
3de42dc0	207	{
fa40a821	208	mutex_lock(&kvm->irq_lock);
280aa177	209	hlist_del_init_rcu(&kian->link);
fa40a821	210	mutex_unlock(&kvm->irq_lock);
280aa177	211	synchronize_rcu();
3de42dc0	212	}
5550af4d	213
5550af4d SY	214	int kvm_request_irq_source_id(struct kvm *kvm)
	215	{
	216	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
fa40a821 MT	217	int irq_source_id;
	218
	219	mutex_lock(&kvm->irq_lock);
cd5a2685	220	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
61552367	221
cd5a2685	222	if (irq_source_id >= BITS_PER_LONG) {
5550af4d	223	printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
0c6ddceb JS	224	irq_source_id = -EFAULT;
0c6ddceb JS	225	goto unlock;
61552367 MM	226	}
	227
	228	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	229	set_bit(irq_source_id, bitmap);
0c6ddceb	230	unlock:
fa40a821	231	mutex_unlock(&kvm->irq_lock);
61552367	232
5550af4d SY	233	return irq_source_id;
	234	}
	235
	236	void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
	237	{
	238	int i;
	239
61552367 MM	240	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
61552367 MM	241
fa40a821	242	mutex_lock(&kvm->irq_lock);
61552367	243	if (irq_source_id < 0 \|\|
cd5a2685	244	irq_source_id >= BITS_PER_LONG) {
5550af4d	245	printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
0c6ddceb	246	goto unlock;
5550af4d	247	}
e50212bb MT	248	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	249	if (!irqchip_in_kernel(kvm))
	250	goto unlock;
	251
1a6e4a8c GN	252	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
	253	clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
	254	if (i >= 16)
	255	continue;
	256	#ifdef CONFIG_X86
	257	clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
	258	#endif
	259	}
0c6ddceb	260	unlock:
fa40a821	261	mutex_unlock(&kvm->irq_lock);
5550af4d	262	}
75858a84 AK	263
	264	void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
	265	struct kvm_irq_mask_notifier *kimn)
	266	{
fa40a821	267	mutex_lock(&kvm->irq_lock);
75858a84	268	kimn->irq = irq;
280aa177	269	hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
fa40a821	270	mutex_unlock(&kvm->irq_lock);
75858a84 AK	271	}
	272
	273	void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
	274	struct kvm_irq_mask_notifier *kimn)
	275	{
fa40a821	276	mutex_lock(&kvm->irq_lock);
280aa177	277	hlist_del_rcu(&kimn->link);
fa40a821	278	mutex_unlock(&kvm->irq_lock);
280aa177	279	synchronize_rcu();
75858a84 AK	280	}
	281
	282	void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
	283	{
	284	struct kvm_irq_mask_notifier *kimn;
	285	struct hlist_node *n;
	286
280aa177 GN	287	rcu_read_lock();
280aa177 GN	288	hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
75858a84 AK	289	if (kimn->irq == irq)
75858a84 AK	290	kimn->func(kimn, mask);
280aa177	291	rcu_read_unlock();
75858a84 AK	292	}
75858a84 AK	293
399ec807 AK	294	void kvm_free_irq_routing(struct kvm *kvm)
399ec807 AK	295	{
e42bba90 GN	296	/* Called only during vm destruction. Nobody can use the pointer
e42bba90 GN	297	at this stage */
46e624b9	298	kfree(kvm->irq_routing);
399ec807 AK	299	}
399ec807 AK	300
46e624b9 GN	301	static int setup_routing_entry(struct kvm_irq_routing_table *rt,
46e624b9 GN	302	struct kvm_kernel_irq_routing_entry *e,
cded19f3	303	const struct kvm_irq_routing_entry *ue)
399ec807 AK	304	{
	305	int r = -EINVAL;
	306	int delta;
d72118ce	307	unsigned max_pin;
46e624b9 GN	308	struct kvm_kernel_irq_routing_entry *ei;
	309	struct hlist_node *n;
	310
	311	/*
	312	* Do not allow GSI to be mapped to the same irqchip more than once.
	313	* Allow only one to one mapping between GSI and MSI.
	314	*/
	315	hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
	316	if (ei->type == KVM_IRQ_ROUTING_MSI \|\|
	317	ue->u.irqchip.irqchip == ei->irqchip.irqchip)
	318	return r;
399ec807 AK	319
399ec807 AK	320	e->gsi = ue->gsi;
5116d8f6	321	e->type = ue->type;
399ec807 AK	322	switch (ue->type) {
	323	case KVM_IRQ_ROUTING_IRQCHIP:
	324	delta = 0;
	325	switch (ue->u.irqchip.irqchip) {
	326	case KVM_IRQCHIP_PIC_MASTER:
	327	e->set = kvm_set_pic_irq;
d72118ce	328	max_pin = 16;
399ec807 AK	329	break;
399ec807 AK	330	case KVM_IRQCHIP_PIC_SLAVE:
4925663a	331	e->set = kvm_set_pic_irq;
d72118ce	332	max_pin = 16;
399ec807 AK	333	delta = 8;
	334	break;
	335	case KVM_IRQCHIP_IOAPIC:
d72118ce	336	max_pin = KVM_IOAPIC_NUM_PINS;
efbc100c	337	e->set = kvm_set_ioapic_irq;
399ec807 AK	338	break;
	339	default:
	340	goto out;
	341	}
	342	e->irqchip.irqchip = ue->u.irqchip.irqchip;
	343	e->irqchip.pin = ue->u.irqchip.pin + delta;
d72118ce	344	if (e->irqchip.pin >= max_pin)
3e71f88b GN	345	goto out;
3e71f88b GN	346	rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
399ec807	347	break;
79950e10 SY	348	case KVM_IRQ_ROUTING_MSI:
	349	e->set = kvm_set_msi;
	350	e->msi.address_lo = ue->u.msi.address_lo;
	351	e->msi.address_hi = ue->u.msi.address_hi;
	352	e->msi.data = ue->u.msi.data;
	353	break;
399ec807 AK	354	default:
	355	goto out;
	356	}
46e624b9 GN	357
46e624b9 GN	358	hlist_add_head(&e->link, &rt->map[e->gsi]);
399ec807 AK	359	r = 0;
	360	out:
	361	return r;
	362	}
	363
	364
	365	int kvm_set_irq_routing(struct kvm *kvm,
	366	const struct kvm_irq_routing_entry *ue,
	367	unsigned nr,
	368	unsigned flags)
	369	{
46e624b9	370	struct kvm_irq_routing_table new, old;
3e71f88b	371	u32 i, j, nr_rt_entries = 0;
399ec807 AK	372	int r;
399ec807 AK	373
46e624b9 GN	374	for (i = 0; i < nr; ++i) {
	375	if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
	376	return -EINVAL;
	377	nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
	378	}
	379
	380	nr_rt_entries += 1;
	381
	382	new = kzalloc(sizeof(new) + (nr_rt_entries sizeof(struct hlist_head))
	383	+ (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
	384	GFP_KERNEL);
	385
	386	if (!new)
	387	return -ENOMEM;
	388
	389	new->rt_entries = (void *)&new->map[nr_rt_entries];
	390
	391	new->nr_rt_entries = nr_rt_entries;
3e71f88b GN	392	for (i = 0; i < 3; i++)
	393	for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
	394	new->chip[i][j] = -1;
46e624b9	395
399ec807 AK	396	for (i = 0; i < nr; ++i) {
399ec807 AK	397	r = -EINVAL;
399ec807 AK	398	if (ue->flags)
399ec807 AK	399	goto out;
46e624b9	400	r = setup_routing_entry(new, &new->rt_entries[i], ue);
399ec807 AK	401	if (r)
	402	goto out;
	403	++ue;
399ec807 AK	404	}
399ec807 AK	405
fa40a821	406	mutex_lock(&kvm->irq_lock);
46e624b9	407	old = kvm->irq_routing;
e42bba90	408	rcu_assign_pointer(kvm->irq_routing, new);
fa40a821	409	mutex_unlock(&kvm->irq_lock);
e42bba90	410	synchronize_rcu();
399ec807	411
46e624b9	412	new = old;
399ec807 AK	413	r = 0;
	414
	415	out:
46e624b9	416	kfree(new);
399ec807 AK	417	return r;
	418	}
	419
	420	#define IOAPIC_ROUTING_ENTRY(irq) \
	421	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	422	.u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
	423	#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
	424
	425	#ifdef CONFIG_X86
399ec807 AK	426	# define PIC_ROUTING_ENTRY(irq) \
	427	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	428	.u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
	429	# define ROUTING_ENTRY2(irq) \
	430	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
	431	#else
	432	# define ROUTING_ENTRY2(irq) \
	433	IOAPIC_ROUTING_ENTRY(irq)
	434	#endif
	435
	436	static const struct kvm_irq_routing_entry default_routing[] = {
	437	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	438	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	439	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	440	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	441	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	442	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	443	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	444	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	445	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	446	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	447	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	448	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
	449	#ifdef CONFIG_IA64
	450	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	451	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	452	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	453	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	454	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	455	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	456	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	457	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	458	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	459	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	460	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	461	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
	462	#endif
	463	};
	464
	465	int kvm_setup_default_irq_routing(struct kvm *kvm)
	466	{
	467	return kvm_set_irq_routing(kvm, default_routing,
	468	ARRAY_SIZE(default_routing), 0);
	469	}