[net-next-2.6.git] / virt / kvm / irq_comm.c

/*
 * irq_comm.c: Common API for in kernel interrupt controller
 * Copyright (c) 2007, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 *
 */

#include <linux/kvm_host.h>
#include <trace/events/kvm.h>

#include <asm/msidef.h>
#ifdef CONFIG_IA64
#include <asm/iosapic.h>
#endif

#include "irq.h"

#include "ioapic.h"

static inline int kvm_irq_line_state(unsigned long *irq_state,
				     int irq_source_id, int level)
{
	/* Logical OR for level trig interrupt */
	if (level)
		set_bit(irq_source_id, irq_state);
	else
		clear_bit(irq_source_id, irq_state);

	return !!(*irq_state);
}

static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
			   struct kvm *kvm, int irq_source_id, int level)
{
#ifdef CONFIG_X86
	struct kvm_pic *pic = pic_irqchip(kvm);
	level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
				   irq_source_id, level);
	return kvm_pic_set_irq(pic, e->irqchip.pin, level);
#else
	return -1;
#endif
}

static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
			      struct kvm *kvm, int irq_source_id, int level)
{
	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
	level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
				   irq_source_id, level);

	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
}

inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
{
#ifdef CONFIG_IA64
	return irq->delivery_mode ==
		(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
#else
	return irq->delivery_mode == APIC_DM_LOWEST;
#endif
}

int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
		struct kvm_lapic_irq *irq)
{
	int i, r = -1;
	struct kvm_vcpu *vcpu, *lowest = NULL;

	WARN_ON(!mutex_is_locked(&kvm->irq_lock));

	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
			kvm_is_dm_lowest_prio(irq))
		printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");

	kvm_for_each_vcpu(i, vcpu, kvm) {
		if (!kvm_apic_present(vcpu))
			continue;

		if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
					irq->dest_id, irq->dest_mode))
			continue;

		if (!kvm_is_dm_lowest_prio(irq)) {
			if (r < 0)
				r = 0;
			r += kvm_apic_set_irq(vcpu, irq);
		} else {
			if (!lowest)
				lowest = vcpu;
			else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
				lowest = vcpu;
		}
	}

	if (lowest)
		r = kvm_apic_set_irq(lowest, irq);

	return r;
}

static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
		       struct kvm *kvm, int irq_source_id, int level)
{
	struct kvm_lapic_irq irq;

	if (!level)
		return -1;

	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);

	irq.dest_id = (e->msi.address_lo &
			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	irq.vector = (e->msi.data &
			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	irq.delivery_mode = e->msi.data & 0x700;
	irq.level = 1;
	irq.shorthand = 0;

	/* TODO Deal with RH bit of MSI message address */
	return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
}

/* This should be called with the kvm->irq_lock mutex held
 * Return value:
 *  < 0   Interrupt was ignored (masked or not delivered for other reasons)
 *  = 0   Interrupt was coalesced (previous irq is still pending)
 *  > 0   Number of CPUs interrupt was delivered to
 */
int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
{
	struct kvm_kernel_irq_routing_entry *e;
	int ret = -1;
	struct kvm_irq_routing_table *irq_rt;
	struct hlist_node *n;

	trace_kvm_set_irq(irq, level, irq_source_id);

	WARN_ON(!mutex_is_locked(&kvm->irq_lock));

	/* Not possible to detect if the guest uses the PIC or the
	 * IOAPIC.  So set the bit in both. The guest will ignore
	 * writes to the unused one.
	 */
	rcu_read_lock();
	irq_rt = rcu_dereference(kvm->irq_routing);
	if (irq < irq_rt->nr_rt_entries)
		hlist_for_each_entry(e, n, &irq_rt->map[irq], link) {
			int r = e->set(e, kvm, irq_source_id, level);
			if (r < 0)
				continue;

			ret = r + ((ret < 0) ? 0 : ret);
		}
	rcu_read_unlock();
	return ret;
}

void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
{
	struct kvm_irq_ack_notifier *kian;
	struct hlist_node *n;
	int gsi;

	trace_kvm_ack_irq(irqchip, pin);

	rcu_read_lock();
	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
	if (gsi != -1)
		hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
					 link)
			if (kian->gsi == gsi)
				kian->irq_acked(kian);
	rcu_read_unlock();
}

void kvm_register_irq_ack_notifier(struct kvm *kvm,
				   struct kvm_irq_ack_notifier *kian)
{
	mutex_lock(&kvm->irq_lock);
	hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
				    struct kvm_irq_ack_notifier *kian)
{
	mutex_lock(&kvm->irq_lock);
	hlist_del_init_rcu(&kian->link);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();
}

int kvm_request_irq_source_id(struct kvm *kvm)
{
	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	int irq_source_id;

	mutex_lock(&kvm->irq_lock);
	irq_source_id = find_first_zero_bit(bitmap,
				sizeof(kvm->arch.irq_sources_bitmap));

	if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
		return -EFAULT;
	}

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	set_bit(irq_source_id, bitmap);
	mutex_unlock(&kvm->irq_lock);

	return irq_source_id;
}

void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
{
	int i;

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);

	mutex_lock(&kvm->irq_lock);
	if (irq_source_id < 0 ||
	    irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
		return;
	}
	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
		clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
		if (i >= 16)
			continue;
#ifdef CONFIG_X86
		clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
#endif
	}
	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
				    struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	kimn->irq = irq;
	hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
				      struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	hlist_del_rcu(&kimn->link);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();
}

void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
{
	struct kvm_irq_mask_notifier *kimn;
	struct hlist_node *n;

	rcu_read_lock();
	hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
		if (kimn->irq == irq)
			kimn->func(kimn, mask);
	rcu_read_unlock();
}

void kvm_free_irq_routing(struct kvm *kvm)
{
	/* Called only during vm destruction. Nobody can use the pointer
	   at this stage */
	kfree(kvm->irq_routing);
}

static int setup_routing_entry(struct kvm_irq_routing_table *rt,
			       struct kvm_kernel_irq_routing_entry *e,
			       const struct kvm_irq_routing_entry *ue)
{
	int r = -EINVAL;
	int delta;
	struct kvm_kernel_irq_routing_entry *ei;
	struct hlist_node *n;

	/*
	 * Do not allow GSI to be mapped to the same irqchip more than once.
	 * Allow only one to one mapping between GSI and MSI.
	 */
	hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
		if (ei->type == KVM_IRQ_ROUTING_MSI ||
		    ue->u.irqchip.irqchip == ei->irqchip.irqchip)
			return r;

	e->gsi = ue->gsi;
	e->type = ue->type;
	switch (ue->type) {
	case KVM_IRQ_ROUTING_IRQCHIP:
		delta = 0;
		switch (ue->u.irqchip.irqchip) {
		case KVM_IRQCHIP_PIC_MASTER:
			e->set = kvm_set_pic_irq;
			break;
		case KVM_IRQCHIP_PIC_SLAVE:
			e->set = kvm_set_pic_irq;
			delta = 8;
			break;
		case KVM_IRQCHIP_IOAPIC:
			e->set = kvm_set_ioapic_irq;
			break;
		default:
			goto out;
		}
		e->irqchip.irqchip = ue->u.irqchip.irqchip;
		e->irqchip.pin = ue->u.irqchip.pin + delta;
		if (e->irqchip.pin >= KVM_IOAPIC_NUM_PINS)
			goto out;
		rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
		break;
	case KVM_IRQ_ROUTING_MSI:
		e->set = kvm_set_msi;
		e->msi.address_lo = ue->u.msi.address_lo;
		e->msi.address_hi = ue->u.msi.address_hi;
		e->msi.data = ue->u.msi.data;
		break;
	default:
		goto out;
	}

	hlist_add_head(&e->link, &rt->map[e->gsi]);
	r = 0;
out:
	return r;
}


int kvm_set_irq_routing(struct kvm *kvm,
			const struct kvm_irq_routing_entry *ue,
			unsigned nr,
			unsigned flags)
{
	struct kvm_irq_routing_table *new, *old;
	u32 i, j, nr_rt_entries = 0;
	int r;

	for (i = 0; i < nr; ++i) {
		if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
			return -EINVAL;
		nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
	}

	nr_rt_entries += 1;

	new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head))
		      + (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
		      GFP_KERNEL);

	if (!new)
		return -ENOMEM;

	new->rt_entries = (void *)&new->map[nr_rt_entries];

	new->nr_rt_entries = nr_rt_entries;
	for (i = 0; i < 3; i++)
		for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
			new->chip[i][j] = -1;

	for (i = 0; i < nr; ++i) {
		r = -EINVAL;
		if (ue->flags)
			goto out;
		r = setup_routing_entry(new, &new->rt_entries[i], ue);
		if (r)
			goto out;
		++ue;
	}

	mutex_lock(&kvm->irq_lock);
	old = kvm->irq_routing;
	rcu_assign_pointer(kvm->irq_routing, new);
	mutex_unlock(&kvm->irq_lock);
	synchronize_rcu();

	new = old;
	r = 0;

out:
	kfree(new);
	return r;
}

#define IOAPIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)

#ifdef CONFIG_X86
#  define PIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
#else
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq)
#endif

static const struct kvm_irq_routing_entry default_routing[] = {
	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
#ifdef CONFIG_IA64
	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
#endif
};

int kvm_setup_default_irq_routing(struct kvm *kvm)
{
	return kvm_set_irq_routing(kvm, default_routing,
				   ARRAY_SIZE(default_routing), 0);
}
Commit	Line	Data
3de42dc0 XZ	1	/*
	2	* irq_comm.c: Common API for in kernel interrupt controller
	3	* Copyright (c) 2007, Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* You should have received a copy of the GNU General Public License along with
	15	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	16	* Place - Suite 330, Boston, MA 02111-1307 USA.
	17	* Authors:
	18	* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
	19	*
	20	*/
	21
	22	#include <linux/kvm_host.h>
229456fc	23	#include <trace/events/kvm.h>
79950e10	24
79950e10	25	#include <asm/msidef.h>
58c2dde1 GN	26	#ifdef CONFIG_IA64
	27	#include <asm/iosapic.h>
	28	#endif
79950e10	29
3de42dc0 XZ	30	#include "irq.h"
	31
	32	#include "ioapic.h"
	33
1a6e4a8c GN	34	static inline int kvm_irq_line_state(unsigned long *irq_state,
	35	int irq_source_id, int level)
	36	{
	37	/* Logical OR for level trig interrupt */
	38	if (level)
	39	set_bit(irq_source_id, irq_state);
	40	else
	41	clear_bit(irq_source_id, irq_state);
	42
	43	return !!(*irq_state);
	44	}
	45
4925663a	46	static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	47	struct kvm *kvm, int irq_source_id, int level)
399ec807 AK	48	{
399ec807 AK	49	#ifdef CONFIG_X86
1a6e4a8c GN	50	struct kvm_pic *pic = pic_irqchip(kvm);
	51	level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
	52	irq_source_id, level);
	53	return kvm_pic_set_irq(pic, e->irqchip.pin, level);
4925663a GN	54	#else
4925663a GN	55	return -1;
399ec807 AK	56	#endif
	57	}
	58
4925663a	59	static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	60	struct kvm *kvm, int irq_source_id, int level)
399ec807	61	{
1a6e4a8c GN	62	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
	63	level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
	64	irq_source_id, level);
	65
	66	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
399ec807 AK	67	}
399ec807 AK	68
58c2dde1	69	inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
116191b6	70	{
58c2dde1 GN	71	#ifdef CONFIG_IA64
	72	return irq->delivery_mode ==
	73	(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
	74	#else
	75	return irq->delivery_mode == APIC_DM_LOWEST;
	76	#endif
	77	}
116191b6	78
58c2dde1 GN	79	int kvm_irq_delivery_to_apic(struct kvm kvm, struct kvm_lapic src,
	80	struct kvm_lapic_irq *irq)
	81	{
	82	int i, r = -1;
	83	struct kvm_vcpu vcpu, lowest = NULL;
	84
fa40a821 MT	85	WARN_ON(!mutex_is_locked(&kvm->irq_lock));
fa40a821 MT	86
58c2dde1 GN	87	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
58c2dde1 GN	88	kvm_is_dm_lowest_prio(irq))
343f94fe GN	89	printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
343f94fe GN	90
988a2cae GN	91	kvm_for_each_vcpu(i, vcpu, kvm) {
988a2cae GN	92	if (!kvm_apic_present(vcpu))
343f94fe GN	93	continue;
343f94fe GN	94
58c2dde1 GN	95	if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
58c2dde1 GN	96	irq->dest_id, irq->dest_mode))
343f94fe GN	97	continue;
343f94fe GN	98
58c2dde1 GN	99	if (!kvm_is_dm_lowest_prio(irq)) {
	100	if (r < 0)
	101	r = 0;
	102	r += kvm_apic_set_irq(vcpu, irq);
e1035715	103	} else {
58c2dde1 GN	104	if (!lowest)
	105	lowest = vcpu;
	106	else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
	107	lowest = vcpu;
e1035715	108	}
343f94fe GN	109	}
343f94fe GN	110
58c2dde1 GN	111	if (lowest)
	112	r = kvm_apic_set_irq(lowest, irq);
	113
	114	return r;
116191b6 SY	115	}
116191b6 SY	116
4925663a	117	static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c	118	struct kvm *kvm, int irq_source_id, int level)
79950e10	119	{
58c2dde1	120	struct kvm_lapic_irq irq;
79950e10	121
1a6e4a8c GN	122	if (!level)
	123	return -1;
	124
1000ff8d GN	125	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
1000ff8d GN	126
58c2dde1	127	irq.dest_id = (e->msi.address_lo &
116191b6	128	MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
58c2dde1	129	irq.vector = (e->msi.data &
116191b6	130	MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
58c2dde1 GN	131	irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	132	irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	133	irq.delivery_mode = e->msi.data & 0x700;
	134	irq.level = 1;
	135	irq.shorthand = 0;
116191b6 SY	136
116191b6 SY	137	/* TODO Deal with RH bit of MSI message address */
58c2dde1	138	return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
79950e10 SY	139	}
79950e10 SY	140
fa40a821	141	/* This should be called with the kvm->irq_lock mutex held
4925663a GN	142	* Return value:
	143	* < 0 Interrupt was ignored (masked or not delivered for other reasons)
	144	* = 0 Interrupt was coalesced (previous irq is still pending)
	145	* > 0 Number of CPUs interrupt was delivered to
	146	*/
46e624b9	147	int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
3de42dc0	148	{
399ec807	149	struct kvm_kernel_irq_routing_entry *e;
4925663a	150	int ret = -1;
46e624b9 GN	151	struct kvm_irq_routing_table *irq_rt;
46e624b9 GN	152	struct hlist_node *n;
79950e10	153
ae8c1c40	154	trace_kvm_set_irq(irq, level, irq_source_id);
229456fc	155
fa40a821 MT	156	WARN_ON(!mutex_is_locked(&kvm->irq_lock));
fa40a821 MT	157
3de42dc0 XZ	158	/* Not possible to detect if the guest uses the PIC or the
	159	* IOAPIC. So set the bit in both. The guest will ignore
	160	* writes to the unused one.
	161	*/
e42bba90 GN	162	rcu_read_lock();
e42bba90 GN	163	irq_rt = rcu_dereference(kvm->irq_routing);
46e624b9 GN	164	if (irq < irq_rt->nr_rt_entries)
46e624b9 GN	165	hlist_for_each_entry(e, n, &irq_rt->map[irq], link) {
1a6e4a8c	166	int r = e->set(e, kvm, irq_source_id, level);
4925663a GN	167	if (r < 0)
	168	continue;
	169
	170	ret = r + ((ret < 0) ? 0 : ret);
	171	}
e42bba90	172	rcu_read_unlock();
4925663a	173	return ret;
3de42dc0 XZ	174	}
3de42dc0 XZ	175
44882eed	176	void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
3de42dc0 XZ	177	{
	178	struct kvm_irq_ack_notifier *kian;
	179	struct hlist_node *n;
3e71f88b	180	int gsi;
44882eed	181
229456fc MT	182	trace_kvm_ack_irq(irqchip, pin);
229456fc MT	183
e42bba90 GN	184	rcu_read_lock();
e42bba90 GN	185	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
3e71f88b	186	if (gsi != -1)
280aa177 GN	187	hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
280aa177 GN	188	link)
3e71f88b GN	189	if (kian->gsi == gsi)
3e71f88b GN	190	kian->irq_acked(kian);
280aa177	191	rcu_read_unlock();
3de42dc0 XZ	192	}
	193
	194	void kvm_register_irq_ack_notifier(struct kvm *kvm,
	195	struct kvm_irq_ack_notifier *kian)
	196	{
fa40a821	197	mutex_lock(&kvm->irq_lock);
280aa177	198	hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
fa40a821	199	mutex_unlock(&kvm->irq_lock);
3de42dc0 XZ	200	}
3de42dc0 XZ	201
fa40a821 MT	202	void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
fa40a821 MT	203	struct kvm_irq_ack_notifier *kian)
3de42dc0	204	{
fa40a821	205	mutex_lock(&kvm->irq_lock);
280aa177	206	hlist_del_init_rcu(&kian->link);
fa40a821	207	mutex_unlock(&kvm->irq_lock);
280aa177	208	synchronize_rcu();
3de42dc0	209	}
5550af4d	210
5550af4d SY	211	int kvm_request_irq_source_id(struct kvm *kvm)
	212	{
	213	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
fa40a821 MT	214	int irq_source_id;
	215
	216	mutex_lock(&kvm->irq_lock);
	217	irq_source_id = find_first_zero_bit(bitmap,
5550af4d	218	sizeof(kvm->arch.irq_sources_bitmap));
61552367	219
5550af4d SY	220	if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
5550af4d SY	221	printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
61552367 MM	222	return -EFAULT;
	223	}
	224
	225	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	226	set_bit(irq_source_id, bitmap);
fa40a821	227	mutex_unlock(&kvm->irq_lock);
61552367	228
5550af4d SY	229	return irq_source_id;
	230	}
	231
	232	void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
	233	{
	234	int i;
	235
61552367 MM	236	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
61552367 MM	237
fa40a821	238	mutex_lock(&kvm->irq_lock);
61552367	239	if (irq_source_id < 0 \|\|
5550af4d SY	240	irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
	241	printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
	242	return;
	243	}
1a6e4a8c GN	244	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
	245	clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
	246	if (i >= 16)
	247	continue;
	248	#ifdef CONFIG_X86
	249	clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
	250	#endif
	251	}
5550af4d	252	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
fa40a821	253	mutex_unlock(&kvm->irq_lock);
5550af4d	254	}
75858a84 AK	255
	256	void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
	257	struct kvm_irq_mask_notifier *kimn)
	258	{
fa40a821	259	mutex_lock(&kvm->irq_lock);
75858a84	260	kimn->irq = irq;
280aa177	261	hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
fa40a821	262	mutex_unlock(&kvm->irq_lock);
75858a84 AK	263	}
	264
	265	void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
	266	struct kvm_irq_mask_notifier *kimn)
	267	{
fa40a821	268	mutex_lock(&kvm->irq_lock);
280aa177	269	hlist_del_rcu(&kimn->link);
fa40a821	270	mutex_unlock(&kvm->irq_lock);
280aa177	271	synchronize_rcu();
75858a84 AK	272	}
	273
	274	void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
	275	{
	276	struct kvm_irq_mask_notifier *kimn;
	277	struct hlist_node *n;
	278
280aa177 GN	279	rcu_read_lock();
280aa177 GN	280	hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
75858a84 AK	281	if (kimn->irq == irq)
75858a84 AK	282	kimn->func(kimn, mask);
280aa177	283	rcu_read_unlock();
75858a84 AK	284	}
75858a84 AK	285
399ec807 AK	286	void kvm_free_irq_routing(struct kvm *kvm)
399ec807 AK	287	{
e42bba90 GN	288	/* Called only during vm destruction. Nobody can use the pointer
e42bba90 GN	289	at this stage */
46e624b9	290	kfree(kvm->irq_routing);
399ec807 AK	291	}
399ec807 AK	292
46e624b9 GN	293	static int setup_routing_entry(struct kvm_irq_routing_table *rt,
46e624b9 GN	294	struct kvm_kernel_irq_routing_entry *e,
cded19f3	295	const struct kvm_irq_routing_entry *ue)
399ec807 AK	296	{
	297	int r = -EINVAL;
	298	int delta;
46e624b9 GN	299	struct kvm_kernel_irq_routing_entry *ei;
	300	struct hlist_node *n;
	301
	302	/*
	303	* Do not allow GSI to be mapped to the same irqchip more than once.
	304	* Allow only one to one mapping between GSI and MSI.
	305	*/
	306	hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
	307	if (ei->type == KVM_IRQ_ROUTING_MSI \|\|
	308	ue->u.irqchip.irqchip == ei->irqchip.irqchip)
	309	return r;
399ec807 AK	310
399ec807 AK	311	e->gsi = ue->gsi;
5116d8f6	312	e->type = ue->type;
399ec807 AK	313	switch (ue->type) {
	314	case KVM_IRQ_ROUTING_IRQCHIP:
	315	delta = 0;
	316	switch (ue->u.irqchip.irqchip) {
	317	case KVM_IRQCHIP_PIC_MASTER:
	318	e->set = kvm_set_pic_irq;
	319	break;
	320	case KVM_IRQCHIP_PIC_SLAVE:
4925663a	321	e->set = kvm_set_pic_irq;
399ec807 AK	322	delta = 8;
	323	break;
	324	case KVM_IRQCHIP_IOAPIC:
efbc100c	325	e->set = kvm_set_ioapic_irq;
399ec807 AK	326	break;
	327	default:
	328	goto out;
	329	}
	330	e->irqchip.irqchip = ue->u.irqchip.irqchip;
	331	e->irqchip.pin = ue->u.irqchip.pin + delta;
3e71f88b GN	332	if (e->irqchip.pin >= KVM_IOAPIC_NUM_PINS)
	333	goto out;
	334	rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
399ec807	335	break;
79950e10 SY	336	case KVM_IRQ_ROUTING_MSI:
	337	e->set = kvm_set_msi;
	338	e->msi.address_lo = ue->u.msi.address_lo;
	339	e->msi.address_hi = ue->u.msi.address_hi;
	340	e->msi.data = ue->u.msi.data;
	341	break;
399ec807 AK	342	default:
	343	goto out;
	344	}
46e624b9 GN	345
46e624b9 GN	346	hlist_add_head(&e->link, &rt->map[e->gsi]);
399ec807 AK	347	r = 0;
	348	out:
	349	return r;
	350	}
	351
	352
	353	int kvm_set_irq_routing(struct kvm *kvm,
	354	const struct kvm_irq_routing_entry *ue,
	355	unsigned nr,
	356	unsigned flags)
	357	{
46e624b9	358	struct kvm_irq_routing_table new, old;
3e71f88b	359	u32 i, j, nr_rt_entries = 0;
399ec807 AK	360	int r;
399ec807 AK	361
46e624b9 GN	362	for (i = 0; i < nr; ++i) {
	363	if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
	364	return -EINVAL;
	365	nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
	366	}
	367
	368	nr_rt_entries += 1;
	369
	370	new = kzalloc(sizeof(new) + (nr_rt_entries sizeof(struct hlist_head))
	371	+ (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
	372	GFP_KERNEL);
	373
	374	if (!new)
	375	return -ENOMEM;
	376
	377	new->rt_entries = (void *)&new->map[nr_rt_entries];
	378
	379	new->nr_rt_entries = nr_rt_entries;
3e71f88b GN	380	for (i = 0; i < 3; i++)
	381	for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
	382	new->chip[i][j] = -1;
46e624b9	383
399ec807 AK	384	for (i = 0; i < nr; ++i) {
399ec807 AK	385	r = -EINVAL;
399ec807 AK	386	if (ue->flags)
399ec807 AK	387	goto out;
46e624b9	388	r = setup_routing_entry(new, &new->rt_entries[i], ue);
399ec807 AK	389	if (r)
	390	goto out;
	391	++ue;
399ec807 AK	392	}
399ec807 AK	393
fa40a821	394	mutex_lock(&kvm->irq_lock);
46e624b9	395	old = kvm->irq_routing;
e42bba90	396	rcu_assign_pointer(kvm->irq_routing, new);
fa40a821	397	mutex_unlock(&kvm->irq_lock);
e42bba90	398	synchronize_rcu();
399ec807	399
46e624b9	400	new = old;
399ec807 AK	401	r = 0;
	402
	403	out:
46e624b9	404	kfree(new);
399ec807 AK	405	return r;
	406	}
	407
	408	#define IOAPIC_ROUTING_ENTRY(irq) \
	409	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	410	.u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
	411	#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
	412
	413	#ifdef CONFIG_X86
399ec807 AK	414	# define PIC_ROUTING_ENTRY(irq) \
	415	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	416	.u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
	417	# define ROUTING_ENTRY2(irq) \
	418	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
	419	#else
	420	# define ROUTING_ENTRY2(irq) \
	421	IOAPIC_ROUTING_ENTRY(irq)
	422	#endif
	423
	424	static const struct kvm_irq_routing_entry default_routing[] = {
	425	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	426	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	427	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	428	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	429	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	430	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	431	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	432	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	433	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	434	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	435	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	436	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
	437	#ifdef CONFIG_IA64
	438	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	439	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	440	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	441	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	442	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	443	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	444	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	445	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	446	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	447	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	448	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	449	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
	450	#endif
	451	};
	452
	453	int kvm_setup_default_irq_routing(struct kvm *kvm)
	454	{
	455	return kvm_set_irq_routing(kvm, default_routing,
	456	ARRAY_SIZE(default_routing), 0);
	457	}