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1da177e4
LT		 1/*
2 * Driver for CS4231 sound chips found on Sparcs.
ae251031 3 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
1da177e4
LT		 4 *
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
9e9abb4f 6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
1da177e4 7 * and also sound/isa/cs423x/cs4231_lib.c which is:
c1017a4c 8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 9 */
10
1da177e4
LT		 11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/delay.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/moduleparam.h>
9e9abb4f
KH		 18#include <linux/irq.h>
19#include <linux/io.h>
ae251031
DM		 20#include <linux/of.h>
21#include <linux/of_device.h>
1da177e4 22
1da177e4
LT		 23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/info.h>
26#include <sound/control.h>
27#include <sound/timer.h>
28#include <sound/initval.h>
29#include <sound/pcm_params.h>
30
1da177e4
LT		 31#ifdef CONFIG_SBUS
32#define SBUS_SUPPORT
1da177e4
LT		 33#endif
34
35#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36#define EBUS_SUPPORT
1da177e4 37#include <linux/pci.h>
aae7fb87 38#include <asm/ebus_dma.h>
1da177e4
LT		 39#endif
40
41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
9e9abb4f
KH		 43/* Enable this card */
44static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
1da177e4
LT		 45
46module_param_array(index, int, NULL, 0444);
47MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48module_param_array(id, charp, NULL, 0444);
49MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50module_param_array(enable, bool, NULL, 0444);
51MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53MODULE_DESCRIPTION("Sun CS4231");
54MODULE_LICENSE("GPL");
55MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
56
5a820fa7 57#ifdef SBUS_SUPPORT
be9b7e8c 58struct sbus_dma_info {
9e9abb4f
KH		 59 spinlock_t lock; /* DMA access lock */
60 int dir;
61 void __iomem *regs;
be9b7e8c 62};
5a820fa7
GC		 63#endif
64
4f3f2f6f 65struct snd_cs4231;
be9b7e8c 66struct cs4231_dma_control {
9e9abb4f
KH		 67 void (*prepare)(struct cs4231_dma_control *dma_cont,
68 int dir);
69 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
70 int (*request)(struct cs4231_dma_control *dma_cont,
71 dma_addr_t bus_addr, size_t len);
72 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
1da177e4 73#ifdef EBUS_SUPPORT
b128254f 74 struct ebus_dma_info ebus_info;
1da177e4 75#endif
5a820fa7 76#ifdef SBUS_SUPPORT
b128254f 77 struct sbus_dma_info sbus_info;
5a820fa7 78#endif
be9b7e8c 79};
b128254f
GC		 80
81struct snd_cs4231 {
9e9abb4f 82 spinlock_t lock; /* registers access lock */
b128254f
GC		 83 void __iomem *port;
84
be9b7e8c
TI		 85 struct cs4231_dma_control p_dma;
86 struct cs4231_dma_control c_dma;
5a820fa7 87
1da177e4
LT		 88 u32 flags;
89#define CS4231_FLAG_EBUS 0x00000001
90#define CS4231_FLAG_PLAYBACK 0x00000002
91#define CS4231_FLAG_CAPTURE 0x00000004
92
be9b7e8c
TI		 93 struct snd_card *card;
94 struct snd_pcm *pcm;
95 struct snd_pcm_substream *playback_substream;
1da177e4 96 unsigned int p_periods_sent;
be9b7e8c 97 struct snd_pcm_substream *capture_substream;
1da177e4 98 unsigned int c_periods_sent;
be9b7e8c 99 struct snd_timer *timer;
1da177e4
LT		 100
101 unsigned short mode;
102#define CS4231_MODE_NONE 0x0000
103#define CS4231_MODE_PLAY 0x0001
104#define CS4231_MODE_RECORD 0x0002
105#define CS4231_MODE_TIMER 0x0004
9e9abb4f
KH		 106#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
107 CS4231_MODE_TIMER)
1da177e4
LT		 108
109 unsigned char image[32]; /* registers image */
110 int mce_bit;
111 int calibrate_mute;
9e9abb4f
KH		 112 struct mutex mce_mutex; /* mutex for mce register */
113 struct mutex open_mutex; /* mutex for ALSA open/close */
1da177e4 114
afc88ad6 115 struct of_device *op;
1da177e4
LT		 116 unsigned int irq[2];
117 unsigned int regs_size;
118 struct snd_cs4231 *next;
b128254f 119};
1da177e4 120
1da177e4
LT		 121/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
122 * now.... -DaveM
123 */
124
125/* IO ports */
7e52f3da 126#include <sound/cs4231-regs.h>
1da177e4
LT		 127
128/* XXX offsets are different than PC ISA chips... */
7e52f3da 129#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
1da177e4
LT		 130
131/* SBUS DMA register defines. */
132
133#define APCCSR 0x10UL /* APC DMA CSR */
134#define APCCVA 0x20UL /* APC Capture DMA Address */
135#define APCCC 0x24UL /* APC Capture Count */
136#define APCCNVA 0x28UL /* APC Capture DMA Next Address */
137#define APCCNC 0x2cUL /* APC Capture Next Count */
138#define APCPVA 0x30UL /* APC Play DMA Address */
139#define APCPC 0x34UL /* APC Play Count */
140#define APCPNVA 0x38UL /* APC Play DMA Next Address */
141#define APCPNC 0x3cUL /* APC Play Next Count */
142
5a820fa7
GC		 143/* Defines for SBUS DMA-routines */
144
145#define APCVA 0x0UL /* APC DMA Address */
146#define APCC 0x4UL /* APC Count */
147#define APCNVA 0x8UL /* APC DMA Next Address */
148#define APCNC 0xcUL /* APC Next Count */
149#define APC_PLAY 0x30UL /* Play registers start at 0x30 */
150#define APC_RECORD 0x20UL /* Record registers start at 0x20 */
151
1da177e4
LT		 152/* APCCSR bits */
153
154#define APC_INT_PENDING 0x800000 /* Interrupt Pending */
155#define APC_PLAY_INT 0x400000 /* Playback interrupt */
156#define APC_CAPT_INT 0x200000 /* Capture interrupt */
157#define APC_GENL_INT 0x100000 /* General interrupt */
158#define APC_XINT_ENA 0x80000 /* General ext int. enable */
159#define APC_XINT_PLAY 0x40000 /* Playback ext intr */
160#define APC_XINT_CAPT 0x20000 /* Capture ext intr */
161#define APC_XINT_GENL 0x10000 /* Error ext intr */
162#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
163#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
164#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
165#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
166#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
167#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
168#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
169#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
170#define APC_PPAUSE 0x80 /* Pause the play DMA */
171#define APC_CPAUSE 0x40 /* Pause the capture DMA */
172#define APC_CDC_RESET 0x20 /* CODEC RESET */
173#define APC_PDMA_READY 0x08 /* Play DMA Go */
174#define APC_CDMA_READY 0x04 /* Capture DMA Go */
175#define APC_CHIP_RESET 0x01 /* Reset the chip */
176
177/* EBUS DMA register offsets */
178
179#define EBDMA_CSR 0x00UL /* Control/Status */
180#define EBDMA_ADDR 0x04UL /* DMA Address */
181#define EBDMA_COUNT 0x08UL /* DMA Count */
182
183/*
184 * Some variables
185 */
186
187static unsigned char freq_bits[14] = {
188 /* 5510 */ 0x00 | CS4231_XTAL2,
189 /* 6620 */ 0x0E | CS4231_XTAL2,
190 /* 8000 */ 0x00 | CS4231_XTAL1,
191 /* 9600 */ 0x0E | CS4231_XTAL1,
192 /* 11025 */ 0x02 | CS4231_XTAL2,
193 /* 16000 */ 0x02 | CS4231_XTAL1,
194 /* 18900 */ 0x04 | CS4231_XTAL2,
195 /* 22050 */ 0x06 | CS4231_XTAL2,
196 /* 27042 */ 0x04 | CS4231_XTAL1,
197 /* 32000 */ 0x06 | CS4231_XTAL1,
198 /* 33075 */ 0x0C | CS4231_XTAL2,
199 /* 37800 */ 0x08 | CS4231_XTAL2,
200 /* 44100 */ 0x0A | CS4231_XTAL2,
201 /* 48000 */ 0x0C | CS4231_XTAL1
202};
203
204static unsigned int rates[14] = {
205 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
206 27042, 32000, 33075, 37800, 44100, 48000
207};
208
be9b7e8c 209static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
c6c2d57b 210 .count = ARRAY_SIZE(rates),
1da177e4
LT		 211 .list = rates,
212};
213
be9b7e8c 214static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
1da177e4
LT		 215{
216 return snd_pcm_hw_constraint_list(runtime, 0,
217 SNDRV_PCM_HW_PARAM_RATE,
218 &hw_constraints_rates);
219}
220
221static unsigned char snd_cs4231_original_image[32] =
222{
223 0x00, /* 00/00 - lic */
224 0x00, /* 01/01 - ric */
225 0x9f, /* 02/02 - la1ic */
226 0x9f, /* 03/03 - ra1ic */
227 0x9f, /* 04/04 - la2ic */
228 0x9f, /* 05/05 - ra2ic */
229 0xbf, /* 06/06 - loc */
230 0xbf, /* 07/07 - roc */
231 0x20, /* 08/08 - pdfr */
232 CS4231_AUTOCALIB, /* 09/09 - ic */
233 0x00, /* 0a/10 - pc */
234 0x00, /* 0b/11 - ti */
235 CS4231_MODE2, /* 0c/12 - mi */
236 0x00, /* 0d/13 - lbc */
237 0x00, /* 0e/14 - pbru */
238 0x00, /* 0f/15 - pbrl */
239 0x80, /* 10/16 - afei */
240 0x01, /* 11/17 - afeii */
241 0x9f, /* 12/18 - llic */
242 0x9f, /* 13/19 - rlic */
243 0x00, /* 14/20 - tlb */
244 0x00, /* 15/21 - thb */
245 0x00, /* 16/22 - la3mic/reserved */
246 0x00, /* 17/23 - ra3mic/reserved */
247 0x00, /* 18/24 - afs */
248 0x00, /* 19/25 - lamoc/version */
249 0x00, /* 1a/26 - mioc */
250 0x00, /* 1b/27 - ramoc/reserved */
251 0x20, /* 1c/28 - cdfr */
252 0x00, /* 1d/29 - res4 */
253 0x00, /* 1e/30 - cbru */
254 0x00, /* 1f/31 - cbrl */
255};
256
be9b7e8c 257static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
1da177e4 258{
c6c2d57b 259 if (cp->flags & CS4231_FLAG_EBUS)
1da177e4 260 return readb(reg_addr);
c6c2d57b 261 else
1da177e4 262 return sbus_readb(reg_addr);
1da177e4
LT		 263}
264
9e9abb4f
KH		 265static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
266 void __iomem *reg_addr)
1da177e4 267{
c6c2d57b 268 if (cp->flags & CS4231_FLAG_EBUS)
1da177e4 269 return writeb(val, reg_addr);
c6c2d57b 270 else
1da177e4 271 return sbus_writeb(val, reg_addr);
1da177e4
LT		 272}
273
274/*
275 * Basic I/O functions
276 */
277
c6c2d57b 278static void snd_cs4231_ready(struct snd_cs4231 *chip)
1da177e4
LT		 279{
280 int timeout;
1da177e4 281
7e52f3da
KH		 282 for (timeout = 250; timeout > 0; timeout--) {
283 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
284 if ((val & CS4231_INIT) == 0)
285 break;
286 udelay(100);
287 }
1da177e4
LT		 288}
289
9e9abb4f
KH		 290static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
291 unsigned char value)
1da177e4 292{
c6c2d57b 293 snd_cs4231_ready(chip);
a131430c 294#ifdef CONFIG_SND_DEBUG
7e52f3da 295 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
c6c2d57b
KH		 296 snd_printdd("out: auto calibration time out - reg = 0x%x, "
297 "value = 0x%x\n",
298 reg, value);
a131430c 299#endif
7e52f3da 300 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
c6c2d57b 301 wmb();
7e52f3da 302 __cs4231_writeb(chip, value, CS4231U(chip, REG));
1da177e4
LT		 303 mb();
304}
305
c6c2d57b
KH		 306static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
307 unsigned char mask, unsigned char value)
1da177e4 308{
c6c2d57b 309 unsigned char tmp = (chip->image[reg] & mask) | value;
1da177e4 310
c6c2d57b
KH		 311 chip->image[reg] = tmp;
312 if (!chip->calibrate_mute)
313 snd_cs4231_dout(chip, reg, tmp);
314}
315
316static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
317 unsigned char value)
318{
319 snd_cs4231_dout(chip, reg, value);
1da177e4
LT		 320 chip->image[reg] = value;
321 mb();
1da177e4
LT		 322}
323
be9b7e8c 324static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
1da177e4 325{
c6c2d57b 326 snd_cs4231_ready(chip);
1da177e4 327#ifdef CONFIG_SND_DEBUG
7e52f3da 328 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
c6c2d57b
KH		 329 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
330 reg);
1da177e4 331#endif
7e52f3da 332 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
1da177e4 333 mb();
7e52f3da 334 return __cs4231_readb(chip, CS4231U(chip, REG));
1da177e4
LT		 335}
336
1da177e4
LT		 337/*
338 * CS4231 detection / MCE routines
339 */
340
be9b7e8c 341static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
1da177e4
LT		 342{
343 int timeout;
344
9e9abb4f 345 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
1da177e4 346 for (timeout = 5; timeout > 0; timeout--)
7e52f3da 347 __cs4231_readb(chip, CS4231U(chip, REGSEL));
a131430c 348
1da177e4 349 /* end of cleanup sequence */
7e52f3da
KH		 350 for (timeout = 500; timeout > 0; timeout--) {
351 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
352 if ((val & CS4231_INIT) == 0)
353 break;
c6c2d57b 354 msleep(1);
7e52f3da 355 }
1da177e4
LT		 356}
357
be9b7e8c 358static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
1da177e4
LT		 359{
360 unsigned long flags;
361 int timeout;
362
363 spin_lock_irqsave(&chip->lock, flags);
c6c2d57b 364 snd_cs4231_ready(chip);
1da177e4 365#ifdef CONFIG_SND_DEBUG
7e52f3da 366 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
a131430c 367 snd_printdd("mce_up - auto calibration time out (0)\n");
1da177e4
LT		 368#endif
369 chip->mce_bit |= CS4231_MCE;
7e52f3da 370 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
1da177e4 371 if (timeout == 0x80)
9e9abb4f
KH		 372 snd_printdd("mce_up [%p]: serious init problem - "
373 "codec still busy\n",
374 chip->port);
1da177e4 375 if (!(timeout & CS4231_MCE))
7e52f3da
KH		 376 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
377 CS4231U(chip, REGSEL));
1da177e4
LT		 378 spin_unlock_irqrestore(&chip->lock, flags);
379}
380
be9b7e8c 381static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
1da177e4 382{
9823adf6
KH		 383 unsigned long flags, timeout;
384 int reg;
1da177e4 385
1da177e4 386 snd_cs4231_busy_wait(chip);
9823adf6 387 spin_lock_irqsave(&chip->lock, flags);
1da177e4 388#ifdef CONFIG_SND_DEBUG
7e52f3da
KH		 389 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
390 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
391 CS4231U(chip, REGSEL));
1da177e4
LT		 392#endif
393 chip->mce_bit &= ~CS4231_MCE;
9823adf6
KH		 394 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
395 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
7e52f3da 396 CS4231U(chip, REGSEL));
9823adf6
KH		 397 if (reg == 0x80)
398 snd_printdd("mce_down [%p]: serious init problem "
399 "- codec still busy\n", chip->port);
400 if ((reg & CS4231_MCE) == 0) {
1da177e4
LT		 401 spin_unlock_irqrestore(&chip->lock, flags);
402 return;
403 }
1da177e4 404
56f91585 405 /*
9823adf6 406 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
56f91585 407 */
9823adf6
KH		 408 timeout = jiffies + msecs_to_jiffies(250);
409 do {
1da177e4 410 spin_unlock_irqrestore(&chip->lock, flags);
b875d650 411 msleep(1);
1da177e4 412 spin_lock_irqsave(&chip->lock, flags);
9823adf6
KH		 413 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
414 reg &= CS4231_CALIB_IN_PROGRESS;
415 } while (reg && time_before(jiffies, timeout));
1da177e4 416 spin_unlock_irqrestore(&chip->lock, flags);
9823adf6
KH		 417
418 if (reg)
419 snd_printk(KERN_ERR
420 "mce_down - auto calibration time out (2)\n");
1da177e4
LT		 421}
422
be9b7e8c
TI		 423static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
424 struct snd_pcm_substream *substream,
425 unsigned int *periods_sent)
1da177e4 426{
be9b7e8c 427 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 428
429 while (1) {
a131430c
CZ		 430 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
431 unsigned int offset = period_size * (*periods_sent);
1da177e4 432
817dd6ee 433 BUG_ON(period_size >= (1 << 24));
1da177e4 434
9e9abb4f
KH		 435 if (dma_cont->request(dma_cont,
436 runtime->dma_addr + offset, period_size))
1da177e4 437 return;
1da177e4
LT		 438 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
439 }
440}
a131430c 441
be9b7e8c
TI		 442static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
443 unsigned int what, int on)
1da177e4 444{
be9b7e8c
TI		 445 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
446 struct cs4231_dma_control *dma_cont;
a131430c 447
5a820fa7 448 if (what & CS4231_PLAYBACK_ENABLE) {
b128254f 449 dma_cont = &chip->p_dma;
a131430c 450 if (on) {
b128254f
GC		 451 dma_cont->prepare(dma_cont, 0);
452 dma_cont->enable(dma_cont, 1);
453 snd_cs4231_advance_dma(dma_cont,
5a820fa7
GC		 454 chip->playback_substream,
455 &chip->p_periods_sent);
a131430c 456 } else {
b128254f 457 dma_cont->enable(dma_cont, 0);
a131430c 458 }
5a820fa7
GC		 459 }
460 if (what & CS4231_RECORD_ENABLE) {
b128254f 461 dma_cont = &chip->c_dma;
a131430c 462 if (on) {
b128254f
GC		 463 dma_cont->prepare(dma_cont, 1);
464 dma_cont->enable(dma_cont, 1);
465 snd_cs4231_advance_dma(dma_cont,
5a820fa7
GC		 466 chip->capture_substream,
467 &chip->c_periods_sent);
a131430c 468 } else {
b128254f 469 dma_cont->enable(dma_cont, 0);
a131430c 470 }
a131430c 471 }
1da177e4
LT		 472}
473
be9b7e8c 474static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 475{
be9b7e8c 476 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 477 int result = 0;
478
479 switch (cmd) {
480 case SNDRV_PCM_TRIGGER_START:
481 case SNDRV_PCM_TRIGGER_STOP:
482 {
483 unsigned int what = 0;
be9b7e8c 484 struct snd_pcm_substream *s;
1da177e4
LT		 485 unsigned long flags;
486
ef991b95 487 snd_pcm_group_for_each_entry(s, substream) {
1da177e4
LT		 488 if (s == chip->playback_substream) {
489 what |= CS4231_PLAYBACK_ENABLE;
490 snd_pcm_trigger_done(s, substream);
491 } else if (s == chip->capture_substream) {
492 what |= CS4231_RECORD_ENABLE;
493 snd_pcm_trigger_done(s, substream);
494 }
495 }
496
1da177e4
LT		 497 spin_lock_irqsave(&chip->lock, flags);
498 if (cmd == SNDRV_PCM_TRIGGER_START) {
a131430c 499 cs4231_dma_trigger(substream, what, 1);
1da177e4 500 chip->image[CS4231_IFACE_CTRL] |= what;
1da177e4 501 } else {
a131430c 502 cs4231_dma_trigger(substream, what, 0);
1da177e4
LT		 503 chip->image[CS4231_IFACE_CTRL] &= ~what;
504 }
505 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
506 chip->image[CS4231_IFACE_CTRL]);
507 spin_unlock_irqrestore(&chip->lock, flags);
508 break;
509 }
510 default:
511 result = -EINVAL;
512 break;
513 }
a131430c 514
1da177e4
LT		 515 return result;
516}
517
518/*
519 * CODEC I/O
520 */
521
522static unsigned char snd_cs4231_get_rate(unsigned int rate)
523{
524 int i;
525
526 for (i = 0; i < 14; i++)
527 if (rate == rates[i])
528 return freq_bits[i];
9e9abb4f 529
1da177e4
LT		 530 return freq_bits[13];
531}
532
9e9abb4f
KH		 533static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
534 int channels)
1da177e4
LT		 535{
536 unsigned char rformat;
537
538 rformat = CS4231_LINEAR_8;
539 switch (format) {
9e9abb4f
KH		 540 case SNDRV_PCM_FORMAT_MU_LAW:
541 rformat = CS4231_ULAW_8;
542 break;
543 case SNDRV_PCM_FORMAT_A_LAW:
544 rformat = CS4231_ALAW_8;
545 break;
546 case SNDRV_PCM_FORMAT_S16_LE:
547 rformat = CS4231_LINEAR_16;
548 break;
549 case SNDRV_PCM_FORMAT_S16_BE:
550 rformat = CS4231_LINEAR_16_BIG;
551 break;
552 case SNDRV_PCM_FORMAT_IMA_ADPCM:
553 rformat = CS4231_ADPCM_16;
554 break;
1da177e4
LT		 555 }
556 if (channels > 1)
557 rformat |= CS4231_STEREO;
1da177e4
LT		 558 return rformat;
559}
560
be9b7e8c 561static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
1da177e4
LT		 562{
563 unsigned long flags;
564
565 mute = mute ? 1 : 0;
566 spin_lock_irqsave(&chip->lock, flags);
567 if (chip->calibrate_mute == mute) {
568 spin_unlock_irqrestore(&chip->lock, flags);
569 return;
570 }
571 if (!mute) {
572 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
573 chip->image[CS4231_LEFT_INPUT]);
574 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
575 chip->image[CS4231_RIGHT_INPUT]);
576 snd_cs4231_dout(chip, CS4231_LOOPBACK,
577 chip->image[CS4231_LOOPBACK]);
578 }
579 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
580 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
581 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
582 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
583 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
584 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
585 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
586 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
587 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
588 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
589 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
590 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
591 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
592 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
593 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
594 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
595 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
596 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
597 chip->calibrate_mute = mute;
598 spin_unlock_irqrestore(&chip->lock, flags);
599}
600
9e9abb4f
KH		 601static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
602 struct snd_pcm_hw_params *params,
1da177e4
LT		 603 unsigned char pdfr)
604{
605 unsigned long flags;
606
12aa7579 607 mutex_lock(&chip->mce_mutex);
1da177e4
LT		 608 snd_cs4231_calibrate_mute(chip, 1);
609
610 snd_cs4231_mce_up(chip);
611
612 spin_lock_irqsave(&chip->lock, flags);
613 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
614 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
615 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
616 pdfr);
617 spin_unlock_irqrestore(&chip->lock, flags);
618
619 snd_cs4231_mce_down(chip);
620
621 snd_cs4231_calibrate_mute(chip, 0);
12aa7579 622 mutex_unlock(&chip->mce_mutex);
1da177e4
LT		 623}
624
9e9abb4f
KH		 625static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
626 struct snd_pcm_hw_params *params,
627 unsigned char cdfr)
1da177e4
LT		 628{
629 unsigned long flags;
630
12aa7579 631 mutex_lock(&chip->mce_mutex);
1da177e4
LT		 632 snd_cs4231_calibrate_mute(chip, 1);
633
634 snd_cs4231_mce_up(chip);
635
636 spin_lock_irqsave(&chip->lock, flags);
637 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
638 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
639 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
640 (cdfr & 0x0f));
641 spin_unlock_irqrestore(&chip->lock, flags);
642 snd_cs4231_mce_down(chip);
643 snd_cs4231_mce_up(chip);
644 spin_lock_irqsave(&chip->lock, flags);
645 }
646 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
647 spin_unlock_irqrestore(&chip->lock, flags);
648
649 snd_cs4231_mce_down(chip);
650
651 snd_cs4231_calibrate_mute(chip, 0);
12aa7579 652 mutex_unlock(&chip->mce_mutex);
1da177e4
LT		 653}
654
655/*
656 * Timer interface
657 */
658
be9b7e8c 659static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
1da177e4 660{
be9b7e8c 661 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 662
663 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
664}
665
be9b7e8c 666static int snd_cs4231_timer_start(struct snd_timer *timer)
1da177e4
LT		 667{
668 unsigned long flags;
669 unsigned int ticks;
be9b7e8c 670 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 671
672 spin_lock_irqsave(&chip->lock, flags);
673 ticks = timer->sticks;
674 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
675 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
676 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
677 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
678 chip->image[CS4231_TIMER_HIGH] =
679 (unsigned char) (ticks >> 8));
680 snd_cs4231_out(chip, CS4231_TIMER_LOW,
681 chip->image[CS4231_TIMER_LOW] =
682 (unsigned char) ticks);
683 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
9e9abb4f
KH		 684 chip->image[CS4231_ALT_FEATURE_1] |
685 CS4231_TIMER_ENABLE);
1da177e4
LT		 686 }
687 spin_unlock_irqrestore(&chip->lock, flags);
688
689 return 0;
690}
691
be9b7e8c 692static int snd_cs4231_timer_stop(struct snd_timer *timer)
1da177e4
LT		 693{
694 unsigned long flags;
be9b7e8c 695 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 696
697 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f 698 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
1da177e4 699 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
9e9abb4f 700 chip->image[CS4231_ALT_FEATURE_1]);
1da177e4
LT		 701 spin_unlock_irqrestore(&chip->lock, flags);
702
703 return 0;
704}
705
be9b7e8c 706static void __init snd_cs4231_init(struct snd_cs4231 *chip)
1da177e4
LT		 707{
708 unsigned long flags;
709
710 snd_cs4231_mce_down(chip);
711
712#ifdef SNDRV_DEBUG_MCE
a131430c 713 snd_printdd("init: (1)\n");
1da177e4
LT		 714#endif
715 snd_cs4231_mce_up(chip);
716 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH		 717 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
718 CS4231_PLAYBACK_PIO |
719 CS4231_RECORD_ENABLE |
720 CS4231_RECORD_PIO |
1da177e4
LT		 721 CS4231_CALIB_MODE);
722 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
723 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
724 spin_unlock_irqrestore(&chip->lock, flags);
725 snd_cs4231_mce_down(chip);
726
727#ifdef SNDRV_DEBUG_MCE
a131430c 728 snd_printdd("init: (2)\n");
1da177e4
LT		 729#endif
730
731 snd_cs4231_mce_up(chip);
732 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH		 733 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
734 chip->image[CS4231_ALT_FEATURE_1]);
1da177e4
LT		 735 spin_unlock_irqrestore(&chip->lock, flags);
736 snd_cs4231_mce_down(chip);
737
738#ifdef SNDRV_DEBUG_MCE
9e9abb4f
KH		 739 snd_printdd("init: (3) - afei = 0x%x\n",
740 chip->image[CS4231_ALT_FEATURE_1]);
1da177e4
LT		 741#endif
742
743 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH		 744 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
745 chip->image[CS4231_ALT_FEATURE_2]);
1da177e4
LT		 746 spin_unlock_irqrestore(&chip->lock, flags);
747
748 snd_cs4231_mce_up(chip);
749 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH		 750 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
751 chip->image[CS4231_PLAYBK_FORMAT]);
1da177e4
LT		 752 spin_unlock_irqrestore(&chip->lock, flags);
753 snd_cs4231_mce_down(chip);
754
755#ifdef SNDRV_DEBUG_MCE
a131430c 756 snd_printdd("init: (4)\n");
1da177e4
LT		 757#endif
758
759 snd_cs4231_mce_up(chip);
760 spin_lock_irqsave(&chip->lock, flags);
761 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
762 spin_unlock_irqrestore(&chip->lock, flags);
763 snd_cs4231_mce_down(chip);
764
765#ifdef SNDRV_DEBUG_MCE
a131430c 766 snd_printdd("init: (5)\n");
1da177e4
LT		 767#endif
768}
769
be9b7e8c 770static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
1da177e4
LT		 771{
772 unsigned long flags;
773
12aa7579 774 mutex_lock(&chip->open_mutex);
1da177e4 775 if ((chip->mode & mode)) {
12aa7579 776 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 777 return -EAGAIN;
778 }
779 if (chip->mode & CS4231_MODE_OPEN) {
780 chip->mode |= mode;
12aa7579 781 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 782 return 0;
783 }
784 /* ok. now enable and ack CODEC IRQ */
785 spin_lock_irqsave(&chip->lock, flags);
786 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
787 CS4231_RECORD_IRQ |
788 CS4231_TIMER_IRQ);
789 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
7e52f3da
KH		 790 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
791 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
1da177e4
LT		 792
793 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
794 CS4231_RECORD_IRQ |
795 CS4231_TIMER_IRQ);
796 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
a131430c 797
1da177e4
LT		 798 spin_unlock_irqrestore(&chip->lock, flags);
799
800 chip->mode = mode;
12aa7579 801 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 802 return 0;
803}
804
be9b7e8c 805static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
1da177e4
LT		 806{
807 unsigned long flags;
808
12aa7579 809 mutex_lock(&chip->open_mutex);
1da177e4
LT		 810 chip->mode &= ~mode;
811 if (chip->mode & CS4231_MODE_OPEN) {
12aa7579 812 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 813 return;
814 }
815 snd_cs4231_calibrate_mute(chip, 1);
816
817 /* disable IRQ */
818 spin_lock_irqsave(&chip->lock, flags);
819 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
7e52f3da
KH		 820 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
821 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
1da177e4
LT		 822
823 /* now disable record & playback */
824
825 if (chip->image[CS4231_IFACE_CTRL] &
826 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
827 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
828 spin_unlock_irqrestore(&chip->lock, flags);
829 snd_cs4231_mce_up(chip);
830 spin_lock_irqsave(&chip->lock, flags);
831 chip->image[CS4231_IFACE_CTRL] &=
832 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
833 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
9e9abb4f
KH		 834 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
835 chip->image[CS4231_IFACE_CTRL]);
1da177e4
LT		 836 spin_unlock_irqrestore(&chip->lock, flags);
837 snd_cs4231_mce_down(chip);
838 spin_lock_irqsave(&chip->lock, flags);
839 }
840
841 /* clear IRQ again */
842 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
7e52f3da
KH		 843 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
844 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
1da177e4
LT		 845 spin_unlock_irqrestore(&chip->lock, flags);
846
847 snd_cs4231_calibrate_mute(chip, 0);
848
849 chip->mode = 0;
12aa7579 850 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 851}
852
853/*
854 * timer open/close
855 */
856
be9b7e8c 857static int snd_cs4231_timer_open(struct snd_timer *timer)
1da177e4 858{
be9b7e8c 859 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 860 snd_cs4231_open(chip, CS4231_MODE_TIMER);
861 return 0;
862}
863
9e9abb4f 864static int snd_cs4231_timer_close(struct snd_timer *timer)
1da177e4 865{
be9b7e8c 866 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT		 867 snd_cs4231_close(chip, CS4231_MODE_TIMER);
868 return 0;
869}
870
9e9abb4f 871static struct snd_timer_hardware snd_cs4231_timer_table = {
1da177e4
LT		 872 .flags = SNDRV_TIMER_HW_AUTO,
873 .resolution = 9945,
874 .ticks = 65535,
875 .open = snd_cs4231_timer_open,
876 .close = snd_cs4231_timer_close,
877 .c_resolution = snd_cs4231_timer_resolution,
878 .start = snd_cs4231_timer_start,
879 .stop = snd_cs4231_timer_stop,
880};
881
882/*
883 * ok.. exported functions..
884 */
885
be9b7e8c
TI		 886static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
887 struct snd_pcm_hw_params *hw_params)
1da177e4 888{
be9b7e8c 889 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 890 unsigned char new_pdfr;
891 int err;
892
9e9abb4f
KH		 893 err = snd_pcm_lib_malloc_pages(substream,
894 params_buffer_bytes(hw_params));
895 if (err < 0)
1da177e4
LT		 896 return err;
897 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
898 params_channels(hw_params)) |
899 snd_cs4231_get_rate(params_rate(hw_params));
900 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
901
902 return 0;
903}
904
be9b7e8c 905static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 906{
be9b7e8c
TI		 907 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
908 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 909 unsigned long flags;
910
911 spin_lock_irqsave(&chip->lock, flags);
a131430c 912
1da177e4
LT		 913 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
914 CS4231_PLAYBACK_PIO);
a131430c 915
817dd6ee 916 BUG_ON(runtime->period_size > 0xffff + 1);
a131430c 917
a131430c 918 chip->p_periods_sent = 0;
1da177e4
LT		 919 spin_unlock_irqrestore(&chip->lock, flags);
920
921 return 0;
922}
923
be9b7e8c
TI		 924static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
925 struct snd_pcm_hw_params *hw_params)
1da177e4 926{
be9b7e8c 927 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 928 unsigned char new_cdfr;
929 int err;
930
9e9abb4f
KH		 931 err = snd_pcm_lib_malloc_pages(substream,
932 params_buffer_bytes(hw_params));
933 if (err < 0)
1da177e4
LT		 934 return err;
935 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
936 params_channels(hw_params)) |
937 snd_cs4231_get_rate(params_rate(hw_params));
938 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
939
940 return 0;
941}
942
be9b7e8c 943static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 944{
be9b7e8c 945 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 946 unsigned long flags;
947
948 spin_lock_irqsave(&chip->lock, flags);
949 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
950 CS4231_RECORD_PIO);
951
a131430c 952
5a820fa7 953 chip->c_periods_sent = 0;
1da177e4
LT		 954 spin_unlock_irqrestore(&chip->lock, flags);
955
956 return 0;
957}
958
be9b7e8c 959static void snd_cs4231_overrange(struct snd_cs4231 *chip)
1da177e4
LT		 960{
961 unsigned long flags;
962 unsigned char res;
963
964 spin_lock_irqsave(&chip->lock, flags);
965 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
966 spin_unlock_irqrestore(&chip->lock, flags);
967
9e9abb4f
KH		 968 /* detect overrange only above 0dB; may be user selectable? */
969 if (res & (0x08 | 0x02))
1da177e4
LT		 970 chip->capture_substream->runtime->overrange++;
971}
972
be9b7e8c 973static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
1da177e4 974{
1da177e4
LT		 975 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
976 snd_pcm_period_elapsed(chip->playback_substream);
b128254f 977 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
1da177e4
LT		 978 &chip->p_periods_sent);
979 }
980}
981
be9b7e8c 982static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
1da177e4 983{
1da177e4
LT		 984 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
985 snd_pcm_period_elapsed(chip->capture_substream);
b128254f 986 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
1da177e4
LT		 987 &chip->c_periods_sent);
988 }
989}
1da177e4 990
9e9abb4f
KH		 991static snd_pcm_uframes_t snd_cs4231_playback_pointer(
992 struct snd_pcm_substream *substream)
1da177e4 993{
be9b7e8c
TI		 994 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
995 struct cs4231_dma_control *dma_cont = &chip->p_dma;
5a820fa7 996 size_t ptr;
9e9abb4f 997
1da177e4
LT		 998 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
999 return 0;
b128254f
GC		 1000 ptr = dma_cont->address(dma_cont);
1001 if (ptr != 0)
1002 ptr -= substream->runtime->dma_addr;
9e9abb4f 1003
1da177e4
LT		 1004 return bytes_to_frames(substream->runtime, ptr);
1005}
1006
9e9abb4f
KH		 1007static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1008 struct snd_pcm_substream *substream)
1da177e4 1009{
be9b7e8c
TI		 1010 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1011 struct cs4231_dma_control *dma_cont = &chip->c_dma;
5a820fa7 1012 size_t ptr;
9e9abb4f 1013
1da177e4
LT		 1014 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1015 return 0;
b128254f
GC		 1016 ptr = dma_cont->address(dma_cont);
1017 if (ptr != 0)
1018 ptr -= substream->runtime->dma_addr;
9e9abb4f 1019
1da177e4
LT		 1020 return bytes_to_frames(substream->runtime, ptr);
1021}
1022
be9b7e8c 1023static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1da177e4
LT		 1024{
1025 unsigned long flags;
9e9abb4f
KH		 1026 int i;
1027 int id = 0;
1028 int vers = 0;
1da177e4
LT		 1029 unsigned char *ptr;
1030
1da177e4
LT		 1031 for (i = 0; i < 50; i++) {
1032 mb();
7e52f3da 1033 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
9e9abb4f 1034 msleep(2);
1da177e4
LT		 1035 else {
1036 spin_lock_irqsave(&chip->lock, flags);
1037 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1038 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1039 vers = snd_cs4231_in(chip, CS4231_VERSION);
1040 spin_unlock_irqrestore(&chip->lock, flags);
1041 if (id == 0x0a)
1042 break; /* this is valid value */
1043 }
1044 }
1045 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1046 if (id != 0x0a)
1047 return -ENODEV; /* no valid device found */
1048
1049 spin_lock_irqsave(&chip->lock, flags);
1050
7e52f3da
KH		 1051 /* clear any pendings IRQ */
1052 __cs4231_readb(chip, CS4231U(chip, STATUS));
1053 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1da177e4
LT		 1054 mb();
1055
1056 spin_unlock_irqrestore(&chip->lock, flags);
1057
1058 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1059 chip->image[CS4231_IFACE_CTRL] =
1060 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1061 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1062 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1063 if (vers & 0x20)
1064 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1065
1066 ptr = (unsigned char *) &chip->image;
1067
1068 snd_cs4231_mce_down(chip);
1069
1070 spin_lock_irqsave(&chip->lock, flags);
1071
1072 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1073 snd_cs4231_out(chip, i, *ptr++);
1074
1075 spin_unlock_irqrestore(&chip->lock, flags);
1076
1077 snd_cs4231_mce_up(chip);
1078
1079 snd_cs4231_mce_down(chip);
1080
1081 mdelay(2);
1082
1083 return 0; /* all things are ok.. */
1084}
1085
9e9abb4f
KH		 1086static struct snd_pcm_hardware snd_cs4231_playback = {
1087 .info = SNDRV_PCM_INFO_MMAP |
1088 SNDRV_PCM_INFO_INTERLEAVED |
1089 SNDRV_PCM_INFO_MMAP_VALID |
1090 SNDRV_PCM_INFO_SYNC_START,
1091 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1092 SNDRV_PCM_FMTBIT_A_LAW |
1093 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1094 SNDRV_PCM_FMTBIT_U8 |
1095 SNDRV_PCM_FMTBIT_S16_LE |
1096 SNDRV_PCM_FMTBIT_S16_BE,
1097 .rates = SNDRV_PCM_RATE_KNOT |
1098 SNDRV_PCM_RATE_8000_48000,
1da177e4
LT		 1099 .rate_min = 5510,
1100 .rate_max = 48000,
1101 .channels_min = 1,
1102 .channels_max = 2,
9e9abb4f 1103 .buffer_bytes_max = 32 * 1024,
f9af1d9d 1104 .period_bytes_min = 64,
9e9abb4f 1105 .period_bytes_max = 32 * 1024,
1da177e4
LT		 1106 .periods_min = 1,
1107 .periods_max = 1024,
1108};
1109
9e9abb4f
KH		 1110static struct snd_pcm_hardware snd_cs4231_capture = {
1111 .info = SNDRV_PCM_INFO_MMAP |
1112 SNDRV_PCM_INFO_INTERLEAVED |
1113 SNDRV_PCM_INFO_MMAP_VALID |
1114 SNDRV_PCM_INFO_SYNC_START,
1115 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1116 SNDRV_PCM_FMTBIT_A_LAW |
1117 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1118 SNDRV_PCM_FMTBIT_U8 |
1119 SNDRV_PCM_FMTBIT_S16_LE |
1120 SNDRV_PCM_FMTBIT_S16_BE,
1121 .rates = SNDRV_PCM_RATE_KNOT |
1122 SNDRV_PCM_RATE_8000_48000,
1da177e4
LT		 1123 .rate_min = 5510,
1124 .rate_max = 48000,
1125 .channels_min = 1,
1126 .channels_max = 2,
9e9abb4f 1127 .buffer_bytes_max = 32 * 1024,
f9af1d9d 1128 .period_bytes_min = 64,
9e9abb4f 1129 .period_bytes_max = 32 * 1024,
1da177e4
LT		 1130 .periods_min = 1,
1131 .periods_max = 1024,
1132};
1133
be9b7e8c 1134static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1da177e4 1135{
be9b7e8c
TI		 1136 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1137 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1138 int err;
1139
1140 runtime->hw = snd_cs4231_playback;
1141
9e9abb4f
KH		 1142 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1143 if (err < 0) {
1da177e4
LT		 1144 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1145 return err;
1146 }
1147 chip->playback_substream = substream;
1148 chip->p_periods_sent = 0;
1149 snd_pcm_set_sync(substream);
1150 snd_cs4231_xrate(runtime);
1151
1152 return 0;
1153}
1154
be9b7e8c 1155static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1da177e4 1156{
be9b7e8c
TI		 1157 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1158 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1159 int err;
1160
1161 runtime->hw = snd_cs4231_capture;
1162
9e9abb4f
KH		 1163 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1164 if (err < 0) {
1da177e4
LT		 1165 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1166 return err;
1167 }
1168 chip->capture_substream = substream;
1169 chip->c_periods_sent = 0;
1170 snd_pcm_set_sync(substream);
1171 snd_cs4231_xrate(runtime);
1172
1173 return 0;
1174}
1175
be9b7e8c 1176static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1da177e4 1177{
be9b7e8c 1178 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4 1179
1da177e4 1180 snd_cs4231_close(chip, CS4231_MODE_PLAY);
b128254f 1181 chip->playback_substream = NULL;
1da177e4
LT		 1182
1183 return 0;
1184}
1185
be9b7e8c 1186static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1da177e4 1187{
be9b7e8c 1188 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4 1189
1da177e4 1190 snd_cs4231_close(chip, CS4231_MODE_RECORD);
b128254f 1191 chip->capture_substream = NULL;
1da177e4
LT		 1192
1193 return 0;
1194}
1195
1196/* XXX We can do some power-management, in particular on EBUS using
1197 * XXX the audio AUXIO register...
1198 */
1199
be9b7e8c 1200static struct snd_pcm_ops snd_cs4231_playback_ops = {
1da177e4
LT		 1201 .open = snd_cs4231_playback_open,
1202 .close = snd_cs4231_playback_close,
1203 .ioctl = snd_pcm_lib_ioctl,
1204 .hw_params = snd_cs4231_playback_hw_params,
c6c2d57b 1205 .hw_free = snd_pcm_lib_free_pages,
1da177e4
LT		 1206 .prepare = snd_cs4231_playback_prepare,
1207 .trigger = snd_cs4231_trigger,
1208 .pointer = snd_cs4231_playback_pointer,
1209};
1210
be9b7e8c 1211static struct snd_pcm_ops snd_cs4231_capture_ops = {
1da177e4
LT		 1212 .open = snd_cs4231_capture_open,
1213 .close = snd_cs4231_capture_close,
1214 .ioctl = snd_pcm_lib_ioctl,
1215 .hw_params = snd_cs4231_capture_hw_params,
c6c2d57b 1216 .hw_free = snd_pcm_lib_free_pages,
1da177e4
LT		 1217 .prepare = snd_cs4231_capture_prepare,
1218 .trigger = snd_cs4231_trigger,
1219 .pointer = snd_cs4231_capture_pointer,
1220};
1221
c6c2d57b 1222static int __init snd_cs4231_pcm(struct snd_card *card)
1da177e4 1223{
c6c2d57b 1224 struct snd_cs4231 *chip = card->private_data;
be9b7e8c 1225 struct snd_pcm *pcm;
1da177e4
LT		 1226 int err;
1227
c6c2d57b
KH		 1228 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1229 if (err < 0)
1da177e4
LT		 1230 return err;
1231
9e9abb4f
KH		 1232 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1233 &snd_cs4231_playback_ops);
1234 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1235 &snd_cs4231_capture_ops);
1236
1da177e4
LT		 1237 /* global setup */
1238 pcm->private_data = chip;
1da177e4
LT		 1239 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1240 strcpy(pcm->name, "CS4231");
1241
afc88ad6
DM		 1242 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1243 &chip->op->dev,
1244 64 * 1024, 128 * 1024);
1da177e4
LT		 1245
1246 chip->pcm = pcm;
1247
1248 return 0;
1249}
1250
c6c2d57b 1251static int __init snd_cs4231_timer(struct snd_card *card)
1da177e4 1252{
c6c2d57b 1253 struct snd_cs4231 *chip = card->private_data;
be9b7e8c
TI		 1254 struct snd_timer *timer;
1255 struct snd_timer_id tid;
1da177e4
LT		 1256 int err;
1257
1258 /* Timer initialization */
1259 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1260 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
c6c2d57b 1261 tid.card = card->number;
1da177e4
LT		 1262 tid.device = 0;
1263 tid.subdevice = 0;
c6c2d57b
KH		 1264 err = snd_timer_new(card, "CS4231", &tid, &timer);
1265 if (err < 0)
1da177e4
LT		 1266 return err;
1267 strcpy(timer->name, "CS4231");
1268 timer->private_data = chip;
1da177e4
LT		 1269 timer->hw = snd_cs4231_timer_table;
1270 chip->timer = timer;
1271
1272 return 0;
1273}
9e9abb4f 1274
1da177e4
LT		 1275/*
1276 * MIXER part
1277 */
1278
be9b7e8c
TI		 1279static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1280 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1281{
1282 static char *texts[4] = {
1283 "Line", "CD", "Mic", "Mix"
1284 };
1da177e4 1285
1da177e4
LT		 1286 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1287 uinfo->count = 2;
1288 uinfo->value.enumerated.items = 4;
1289 if (uinfo->value.enumerated.item > 3)
1290 uinfo->value.enumerated.item = 3;
9e9abb4f
KH		 1291 strcpy(uinfo->value.enumerated.name,
1292 texts[uinfo->value.enumerated.item]);
1da177e4
LT		 1293
1294 return 0;
1295}
1296
be9b7e8c
TI		 1297static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1298 struct snd_ctl_elem_value *ucontrol)
1da177e4 1299{
be9b7e8c 1300 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1301 unsigned long flags;
9e9abb4f 1302
1da177e4
LT		 1303 spin_lock_irqsave(&chip->lock, flags);
1304 ucontrol->value.enumerated.item[0] =
1305 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1306 ucontrol->value.enumerated.item[1] =
1307 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1308 spin_unlock_irqrestore(&chip->lock, flags);
1309
1310 return 0;
1311}
1312
be9b7e8c
TI		 1313static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1314 struct snd_ctl_elem_value *ucontrol)
1da177e4 1315{
be9b7e8c 1316 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1317 unsigned long flags;
1318 unsigned short left, right;
1319 int change;
9e9abb4f 1320
1da177e4
LT		 1321 if (ucontrol->value.enumerated.item[0] > 3 ||
1322 ucontrol->value.enumerated.item[1] > 3)
1323 return -EINVAL;
1324 left = ucontrol->value.enumerated.item[0] << 6;
1325 right = ucontrol->value.enumerated.item[1] << 6;
1326
1327 spin_lock_irqsave(&chip->lock, flags);
1328
1329 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1330 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1331 change = left != chip->image[CS4231_LEFT_INPUT] ||
9e9abb4f 1332 right != chip->image[CS4231_RIGHT_INPUT];
1da177e4
LT		 1333 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1334 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1335
1336 spin_unlock_irqrestore(&chip->lock, flags);
1337
1338 return change;
1339}
1340
be9b7e8c
TI		 1341static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1342 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1343{
1344 int mask = (kcontrol->private_value >> 16) & 0xff;
1345
1346 uinfo->type = (mask == 1) ?
1347 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1348 uinfo->count = 1;
1349 uinfo->value.integer.min = 0;
1350 uinfo->value.integer.max = mask;
1351
1352 return 0;
1353}
1354
be9b7e8c
TI		 1355static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1356 struct snd_ctl_elem_value *ucontrol)
1da177e4 1357{
be9b7e8c 1358 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1359 unsigned long flags;
1360 int reg = kcontrol->private_value & 0xff;
1361 int shift = (kcontrol->private_value >> 8) & 0xff;
1362 int mask = (kcontrol->private_value >> 16) & 0xff;
1363 int invert = (kcontrol->private_value >> 24) & 0xff;
9e9abb4f 1364
1da177e4
LT		 1365 spin_lock_irqsave(&chip->lock, flags);
1366
1367 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1368
1369 spin_unlock_irqrestore(&chip->lock, flags);
1370
1371 if (invert)
1372 ucontrol->value.integer.value[0] =
1373 (mask - ucontrol->value.integer.value[0]);
1374
1375 return 0;
1376}
1377
be9b7e8c
TI		 1378static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1da177e4 1380{
be9b7e8c 1381 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1382 unsigned long flags;
1383 int reg = kcontrol->private_value & 0xff;
1384 int shift = (kcontrol->private_value >> 8) & 0xff;
1385 int mask = (kcontrol->private_value >> 16) & 0xff;
1386 int invert = (kcontrol->private_value >> 24) & 0xff;
1387 int change;
1388 unsigned short val;
9e9abb4f 1389
1da177e4
LT		 1390 val = (ucontrol->value.integer.value[0] & mask);
1391 if (invert)
1392 val = mask - val;
1393 val <<= shift;
1394
1395 spin_lock_irqsave(&chip->lock, flags);
1396
1397 val = (chip->image[reg] & ~(mask << shift)) | val;
1398 change = val != chip->image[reg];
1399 snd_cs4231_out(chip, reg, val);
1400
1401 spin_unlock_irqrestore(&chip->lock, flags);
1402
1403 return change;
1404}
1405
be9b7e8c
TI		 1406static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1407 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1408{
1409 int mask = (kcontrol->private_value >> 24) & 0xff;
1410
1411 uinfo->type = mask == 1 ?
1412 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1413 uinfo->count = 2;
1414 uinfo->value.integer.min = 0;
1415 uinfo->value.integer.max = mask;
1416
1417 return 0;
1418}
1419
be9b7e8c
TI		 1420static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1421 struct snd_ctl_elem_value *ucontrol)
1da177e4 1422{
be9b7e8c 1423 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1424 unsigned long flags;
1425 int left_reg = kcontrol->private_value & 0xff;
1426 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1427 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1428 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1429 int mask = (kcontrol->private_value >> 24) & 0xff;
1430 int invert = (kcontrol->private_value >> 22) & 1;
9e9abb4f 1431
1da177e4
LT		 1432 spin_lock_irqsave(&chip->lock, flags);
1433
9e9abb4f
KH		 1434 ucontrol->value.integer.value[0] =
1435 (chip->image[left_reg] >> shift_left) & mask;
1436 ucontrol->value.integer.value[1] =
1437 (chip->image[right_reg] >> shift_right) & mask;
1da177e4
LT		 1438
1439 spin_unlock_irqrestore(&chip->lock, flags);
1440
1441 if (invert) {
1442 ucontrol->value.integer.value[0] =
1443 (mask - ucontrol->value.integer.value[0]);
1444 ucontrol->value.integer.value[1] =
1445 (mask - ucontrol->value.integer.value[1]);
1446 }
1447
1448 return 0;
1449}
1450
be9b7e8c
TI		 1451static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1452 struct snd_ctl_elem_value *ucontrol)
1da177e4 1453{
be9b7e8c 1454 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1455 unsigned long flags;
1456 int left_reg = kcontrol->private_value & 0xff;
1457 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1458 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1459 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1460 int mask = (kcontrol->private_value >> 24) & 0xff;
1461 int invert = (kcontrol->private_value >> 22) & 1;
1462 int change;
1463 unsigned short val1, val2;
9e9abb4f 1464
1da177e4
LT		 1465 val1 = ucontrol->value.integer.value[0] & mask;
1466 val2 = ucontrol->value.integer.value[1] & mask;
1467 if (invert) {
1468 val1 = mask - val1;
1469 val2 = mask - val2;
1470 }
1471 val1 <<= shift_left;
1472 val2 <<= shift_right;
1473
1474 spin_lock_irqsave(&chip->lock, flags);
1475
1476 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1477 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
9e9abb4f
KH		 1478 change = val1 != chip->image[left_reg];
1479 change |= val2 != chip->image[right_reg];
1da177e4
LT		 1480 snd_cs4231_out(chip, left_reg, val1);
1481 snd_cs4231_out(chip, right_reg, val2);
1482
1483 spin_unlock_irqrestore(&chip->lock, flags);
1484
1485 return change;
1486}
1487
1488#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
9e9abb4f
KH		 1489{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1490 .info = snd_cs4231_info_single, \
1491 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1492 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1493
1494#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1495 shift_right, mask, invert) \
1496{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1497 .info = snd_cs4231_info_double, \
1498 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1499 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1500 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1da177e4 1501
be9b7e8c 1502static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
9e9abb4f
KH		 1503CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1504 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1505CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1506 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1507CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1508 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1509CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1510 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1511CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1512 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1513CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1514 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1515CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1516 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1517CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1518 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1da177e4
LT		 1519CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1520CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1521CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1522CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
9e9abb4f
KH		 1523CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1524 15, 0),
1da177e4
LT		 1525{
1526 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1527 .name = "Capture Source",
1528 .info = snd_cs4231_info_mux,
1529 .get = snd_cs4231_get_mux,
1530 .put = snd_cs4231_put_mux,
1531},
9e9abb4f
KH		 1532CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1533 1, 0),
1da177e4
LT		 1534CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1535CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1536/* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1537CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1538CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1539};
9e9abb4f 1540
c6c2d57b 1541static int __init snd_cs4231_mixer(struct snd_card *card)
1da177e4 1542{
c6c2d57b 1543 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT		 1544 int err, idx;
1545
5e246b85
TI		 1546 if (snd_BUG_ON(!chip || !chip->pcm))
1547 return -EINVAL;
1da177e4 1548
1da177e4
LT		 1549 strcpy(card->mixername, chip->pcm->name);
1550
1551 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
c6c2d57b
KH		 1552 err = snd_ctl_add(card,
1553 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1554 if (err < 0)
1da177e4
LT		 1555 return err;
1556 }
1557 return 0;
1558}
1559
1560static int dev;
1561
be9b7e8c 1562static int __init cs4231_attach_begin(struct snd_card **rcard)
1da177e4 1563{
be9b7e8c 1564 struct snd_card *card;
c6c2d57b 1565 struct snd_cs4231 *chip;
1da177e4
LT		 1566
1567 *rcard = NULL;
1568
1569 if (dev >= SNDRV_CARDS)
1570 return -ENODEV;
1571
1572 if (!enable[dev]) {
1573 dev++;
1574 return -ENOENT;
1575 }
1576
c6c2d57b
KH		 1577 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1578 sizeof(struct snd_cs4231));
1da177e4
LT		 1579 if (card == NULL)
1580 return -ENOMEM;
1581
1582 strcpy(card->driver, "CS4231");
1583 strcpy(card->shortname, "Sun CS4231");
1584
c6c2d57b
KH		 1585 chip = card->private_data;
1586 chip->card = card;
1587
1da177e4
LT		 1588 *rcard = card;
1589 return 0;
1590}
1591
c6c2d57b 1592static int __init cs4231_attach_finish(struct snd_card *card)
1da177e4 1593{
c6c2d57b 1594 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT		 1595 int err;
1596
c6c2d57b
KH		 1597 err = snd_cs4231_pcm(card);
1598 if (err < 0)
1da177e4
LT		 1599 goto out_err;
1600
c6c2d57b
KH		 1601 err = snd_cs4231_mixer(card);
1602 if (err < 0)
1da177e4
LT		 1603 goto out_err;
1604
c6c2d57b
KH		 1605 err = snd_cs4231_timer(card);
1606 if (err < 0)
1da177e4
LT		 1607 goto out_err;
1608
c6c2d57b
KH		 1609 err = snd_card_register(card);
1610 if (err < 0)
1da177e4
LT		 1611 goto out_err;
1612
afc88ad6 1613 dev_set_drvdata(&chip->op->dev, chip);
1da177e4
LT		 1614
1615 dev++;
1616 return 0;
1617
1618out_err:
1619 snd_card_free(card);
1620 return err;
1621}
1622
1623#ifdef SBUS_SUPPORT
b128254f 1624
7d12e780 1625static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
b128254f
GC		 1626{
1627 unsigned long flags;
1628 unsigned char status;
1629 u32 csr;
be9b7e8c 1630 struct snd_cs4231 *chip = dev_id;
b128254f
GC		 1631
1632 /*This is IRQ is not raised by the cs4231*/
7e52f3da 1633 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
b128254f
GC		 1634 return IRQ_NONE;
1635
1636 /* ACK the APC interrupt. */
1637 csr = sbus_readl(chip->port + APCCSR);
1638
1639 sbus_writel(csr, chip->port + APCCSR);
1640
9e9abb4f
KH		 1641 if ((csr & APC_PDMA_READY) &&
1642 (csr & APC_PLAY_INT) &&
b128254f
GC		 1643 (csr & APC_XINT_PNVA) &&
1644 !(csr & APC_XINT_EMPT))
1645 snd_cs4231_play_callback(chip);
1646
9e9abb4f
KH		 1647 if ((csr & APC_CDMA_READY) &&
1648 (csr & APC_CAPT_INT) &&
b128254f
GC		 1649 (csr & APC_XINT_CNVA) &&
1650 !(csr & APC_XINT_EMPT))
1651 snd_cs4231_capture_callback(chip);
9e9abb4f 1652
b128254f
GC		 1653 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1654
1655 if (status & CS4231_TIMER_IRQ) {
1656 if (chip->timer)
1657 snd_timer_interrupt(chip->timer, chip->timer->sticks);
9e9abb4f 1658 }
b128254f
GC		 1659
1660 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1661 snd_cs4231_overrange(chip);
1662
1663 /* ACK the CS4231 interrupt. */
1664 spin_lock_irqsave(&chip->lock, flags);
1665 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1666 spin_unlock_irqrestore(&chip->lock, flags);
1667
d35a1b9e 1668 return IRQ_HANDLED;
b128254f
GC		 1669}
1670
1671/*
1672 * SBUS DMA routines
1673 */
1674
9e9abb4f
KH		 1675static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1676 dma_addr_t bus_addr, size_t len)
b128254f
GC		 1677{
1678 unsigned long flags;
1679 u32 test, csr;
1680 int err;
be9b7e8c 1681 struct sbus_dma_info *base = &dma_cont->sbus_info;
9e9abb4f 1682
b128254f
GC		 1683 if (len >= (1 << 24))
1684 return -EINVAL;
1685 spin_lock_irqsave(&base->lock, flags);
1686 csr = sbus_readl(base->regs + APCCSR);
1687 err = -EINVAL;
1688 test = APC_CDMA_READY;
9e9abb4f 1689 if (base->dir == APC_PLAY)
b128254f
GC		 1690 test = APC_PDMA_READY;
1691 if (!(csr & test))
1692 goto out;
1693 err = -EBUSY;
b128254f 1694 test = APC_XINT_CNVA;
9e9abb4f 1695 if (base->dir == APC_PLAY)
b128254f
GC		 1696 test = APC_XINT_PNVA;
1697 if (!(csr & test))
1698 goto out;
1699 err = 0;
1700 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1701 sbus_writel(len, base->regs + base->dir + APCNC);
1702out:
1703 spin_unlock_irqrestore(&base->lock, flags);
1704 return err;
1705}
1706
be9b7e8c 1707static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
b128254f
GC		 1708{
1709 unsigned long flags;
1710 u32 csr, test;
be9b7e8c 1711 struct sbus_dma_info *base = &dma_cont->sbus_info;
b128254f
GC		 1712
1713 spin_lock_irqsave(&base->lock, flags);
1714 csr = sbus_readl(base->regs + APCCSR);
1715 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1716 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1717 APC_XINT_PENA;
9e9abb4f 1718 if (base->dir == APC_RECORD)
b128254f
GC		 1719 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1720 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1721 csr |= test;
1722 sbus_writel(csr, base->regs + APCCSR);
1723 spin_unlock_irqrestore(&base->lock, flags);
1724}
1725
be9b7e8c 1726static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
b128254f
GC		 1727{
1728 unsigned long flags;
1729 u32 csr, shift;
be9b7e8c 1730 struct sbus_dma_info *base = &dma_cont->sbus_info;
b128254f
GC		 1731
1732 spin_lock_irqsave(&base->lock, flags);
1733 if (!on) {
d35a1b9e
GC		 1734 sbus_writel(0, base->regs + base->dir + APCNC);
1735 sbus_writel(0, base->regs + base->dir + APCNVA);
9e9abb4f 1736 if (base->dir == APC_PLAY) {
3daadf33
GC		 1737 sbus_writel(0, base->regs + base->dir + APCC);
1738 sbus_writel(0, base->regs + base->dir + APCVA);
1739 }
d35a1b9e 1740
3daadf33 1741 udelay(1200);
9e9abb4f 1742 }
b128254f
GC		 1743 csr = sbus_readl(base->regs + APCCSR);
1744 shift = 0;
9e9abb4f 1745 if (base->dir == APC_PLAY)
b128254f
GC		 1746 shift = 1;
1747 if (on)
1748 csr &= ~(APC_CPAUSE << shift);
1749 else
9e9abb4f 1750 csr |= (APC_CPAUSE << shift);
b128254f
GC		 1751 sbus_writel(csr, base->regs + APCCSR);
1752 if (on)
1753 csr |= (APC_CDMA_READY << shift);
1754 else
1755 csr &= ~(APC_CDMA_READY << shift);
1756 sbus_writel(csr, base->regs + APCCSR);
9e9abb4f 1757
b128254f
GC		 1758 spin_unlock_irqrestore(&base->lock, flags);
1759}
1760
be9b7e8c 1761static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
b128254f 1762{
be9b7e8c 1763 struct sbus_dma_info *base = &dma_cont->sbus_info;
b128254f 1764
9e9abb4f 1765 return sbus_readl(base->regs + base->dir + APCVA);
b128254f
GC		 1766}
1767
b128254f
GC		 1768/*
1769 * Init and exit routines
1770 */
1771
be9b7e8c 1772static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1da177e4 1773{
afc88ad6 1774 struct of_device *op = chip->op;
ae251031 1775
1da177e4
LT		 1776 if (chip->irq[0])
1777 free_irq(chip->irq[0], chip);
1778
1779 if (chip->port)
ae251031 1780 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1da177e4 1781
1da177e4
LT		 1782 return 0;
1783}
1784
be9b7e8c 1785static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1da177e4 1786{
be9b7e8c 1787 struct snd_cs4231 *cp = device->device_data;
1da177e4
LT		 1788
1789 return snd_cs4231_sbus_free(cp);
1790}
1791
be9b7e8c 1792static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1da177e4
LT		 1793 .dev_free = snd_cs4231_sbus_dev_free,
1794};
1795
be9b7e8c 1796static int __init snd_cs4231_sbus_create(struct snd_card *card,
ae251031 1797 struct of_device *op,
c6c2d57b 1798 int dev)
1da177e4 1799{
c6c2d57b 1800 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT		 1801 int err;
1802
1da177e4 1803 spin_lock_init(&chip->lock);
b128254f
GC		 1804 spin_lock_init(&chip->c_dma.sbus_info.lock);
1805 spin_lock_init(&chip->p_dma.sbus_info.lock);
12aa7579
IM		 1806 mutex_init(&chip->mce_mutex);
1807 mutex_init(&chip->open_mutex);
afc88ad6 1808 chip->op = op;
ae251031 1809 chip->regs_size = resource_size(&op->resource[0]);
1da177e4
LT		 1810 memcpy(&chip->image, &snd_cs4231_original_image,
1811 sizeof(snd_cs4231_original_image));
1812
ae251031
DM		 1813 chip->port = of_ioremap(&op->resource[0], 0,
1814 chip->regs_size, "cs4231");
1da177e4 1815 if (!chip->port) {
a131430c 1816 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1da177e4
LT		 1817 return -EIO;
1818 }
1819
b128254f
GC		 1820 chip->c_dma.sbus_info.regs = chip->port;
1821 chip->p_dma.sbus_info.regs = chip->port;
1822 chip->c_dma.sbus_info.dir = APC_RECORD;
1823 chip->p_dma.sbus_info.dir = APC_PLAY;
1824
1825 chip->p_dma.prepare = sbus_dma_prepare;
1826 chip->p_dma.enable = sbus_dma_enable;
1827 chip->p_dma.request = sbus_dma_request;
1828 chip->p_dma.address = sbus_dma_addr;
b128254f
GC		 1829
1830 chip->c_dma.prepare = sbus_dma_prepare;
1831 chip->c_dma.enable = sbus_dma_enable;
1832 chip->c_dma.request = sbus_dma_request;
1833 chip->c_dma.address = sbus_dma_addr;
5a820fa7 1834
ae251031 1835 if (request_irq(op->irqs[0], snd_cs4231_sbus_interrupt,
65ca68b3 1836 IRQF_SHARED, "cs4231", chip)) {
c6387a48 1837 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
ae251031 1838 dev, op->irqs[0]);
1da177e4
LT		 1839 snd_cs4231_sbus_free(chip);
1840 return -EBUSY;
1841 }
ae251031 1842 chip->irq[0] = op->irqs[0];
1da177e4
LT		 1843
1844 if (snd_cs4231_probe(chip) < 0) {
1845 snd_cs4231_sbus_free(chip);
1846 return -ENODEV;
1847 }
1848 snd_cs4231_init(chip);
1849
1850 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1851 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1852 snd_cs4231_sbus_free(chip);
1853 return err;
1854 }
1855
1da177e4
LT		 1856 return 0;
1857}
1858
e669dae6 1859static int __init cs4231_sbus_probe(struct of_device *op, const struct of_device_id *match)
1da177e4 1860{
ae251031 1861 struct resource *rp = &op->resource[0];
be9b7e8c 1862 struct snd_card *card;
1da177e4
LT		 1863 int err;
1864
1865 err = cs4231_attach_begin(&card);
1866 if (err)
1867 return err;
1868
5863aa65 1869 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1da177e4
LT		 1870 card->shortname,
1871 rp->flags & 0xffL,
aa0a2ddc 1872 (unsigned long long)rp->start,
ae251031 1873 op->irqs[0]);
1da177e4 1874
ae251031 1875 err = snd_cs4231_sbus_create(card, op, dev);
c6c2d57b 1876 if (err < 0) {
1da177e4
LT		 1877 snd_card_free(card);
1878 return err;
1879 }
1880
c6c2d57b 1881 return cs4231_attach_finish(card);
1da177e4
LT		 1882}
1883#endif
1884
1885#ifdef EBUS_SUPPORT
b128254f 1886
9e9abb4f
KH		 1887static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1888 void *cookie)
b128254f 1889{
be9b7e8c 1890 struct snd_cs4231 *chip = cookie;
9e9abb4f 1891
b128254f
GC		 1892 snd_cs4231_play_callback(chip);
1893}
1894
9e9abb4f
KH		 1895static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1896 int event, void *cookie)
b128254f 1897{
be9b7e8c 1898 struct snd_cs4231 *chip = cookie;
b128254f
GC		 1899
1900 snd_cs4231_capture_callback(chip);
1901}
1902
1903/*
1904 * EBUS DMA wrappers
1905 */
1906
9e9abb4f
KH		 1907static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1908 dma_addr_t bus_addr, size_t len)
b128254f
GC		 1909{
1910 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1911}
1912
be9b7e8c 1913static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
b128254f
GC		 1914{
1915 ebus_dma_enable(&dma_cont->ebus_info, on);
1916}
1917
be9b7e8c 1918static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
b128254f
GC		 1919{
1920 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1921}
1922
be9b7e8c 1923static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
b128254f
GC		 1924{
1925 return ebus_dma_addr(&dma_cont->ebus_info);
1926}
1927
b128254f
GC		 1928/*
1929 * Init and exit routines
1930 */
1931
be9b7e8c 1932static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1da177e4 1933{
afc88ad6
DM		 1934 struct of_device *op = chip->op;
1935
b128254f
GC		 1936 if (chip->c_dma.ebus_info.regs) {
1937 ebus_dma_unregister(&chip->c_dma.ebus_info);
afc88ad6 1938 of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1da177e4 1939 }
b128254f
GC		 1940 if (chip->p_dma.ebus_info.regs) {
1941 ebus_dma_unregister(&chip->p_dma.ebus_info);
afc88ad6 1942 of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1da177e4
LT		 1943 }
1944
1945 if (chip->port)
afc88ad6 1946 of_iounmap(&op->resource[0], chip->port, 0x10);
1da177e4 1947
1da177e4
LT		 1948 return 0;
1949}
1950
be9b7e8c 1951static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1da177e4 1952{
be9b7e8c 1953 struct snd_cs4231 *cp = device->device_data;
1da177e4
LT		 1954
1955 return snd_cs4231_ebus_free(cp);
1956}
1957
be9b7e8c 1958static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1da177e4
LT		 1959 .dev_free = snd_cs4231_ebus_dev_free,
1960};
1961
be9b7e8c 1962static int __init snd_cs4231_ebus_create(struct snd_card *card,
afc88ad6 1963 struct of_device *op,
c6c2d57b 1964 int dev)
1da177e4 1965{
c6c2d57b 1966 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT		 1967 int err;
1968
1da177e4 1969 spin_lock_init(&chip->lock);
b128254f
GC		 1970 spin_lock_init(&chip->c_dma.ebus_info.lock);
1971 spin_lock_init(&chip->p_dma.ebus_info.lock);
12aa7579
IM		 1972 mutex_init(&chip->mce_mutex);
1973 mutex_init(&chip->open_mutex);
1da177e4 1974 chip->flags |= CS4231_FLAG_EBUS;
afc88ad6 1975 chip->op = op;
1da177e4
LT		 1976 memcpy(&chip->image, &snd_cs4231_original_image,
1977 sizeof(snd_cs4231_original_image));
b128254f
GC		 1978 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1979 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1980 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1981 chip->c_dma.ebus_info.client_cookie = chip;
afc88ad6 1982 chip->c_dma.ebus_info.irq = op->irqs[0];
b128254f
GC		 1983 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1984 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1985 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1986 chip->p_dma.ebus_info.client_cookie = chip;
afc88ad6 1987 chip->p_dma.ebus_info.irq = op->irqs[1];
b128254f
GC		 1988
1989 chip->p_dma.prepare = _ebus_dma_prepare;
1990 chip->p_dma.enable = _ebus_dma_enable;
1991 chip->p_dma.request = _ebus_dma_request;
1992 chip->p_dma.address = _ebus_dma_addr;
b128254f
GC		 1993
1994 chip->c_dma.prepare = _ebus_dma_prepare;
1995 chip->c_dma.enable = _ebus_dma_enable;
1996 chip->c_dma.request = _ebus_dma_request;
1997 chip->c_dma.address = _ebus_dma_addr;
1da177e4 1998
afc88ad6
DM		 1999 chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
2000 chip->p_dma.ebus_info.regs =
2001 of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
2002 chip->c_dma.ebus_info.regs =
2003 of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
9e9abb4f
KH		 2004 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2005 !chip->c_dma.ebus_info.regs) {
1da177e4 2006 snd_cs4231_ebus_free(chip);
a131430c 2007 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1da177e4
LT		 2008 return -EIO;
2009 }
2010
b128254f 2011 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
1da177e4 2012 snd_cs4231_ebus_free(chip);
9e9abb4f
KH		 2013 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2014 dev);
1da177e4
LT		 2015 return -EBUSY;
2016 }
b128254f 2017 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
1da177e4 2018 snd_cs4231_ebus_free(chip);
9e9abb4f
KH		 2019 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2020 dev);
1da177e4
LT		 2021 return -EBUSY;
2022 }
2023
b128254f 2024 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
1da177e4 2025 snd_cs4231_ebus_free(chip);
9e9abb4f
KH		 2026 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2027 dev);
1da177e4
LT		 2028 return -EBUSY;
2029 }
b128254f 2030 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
1da177e4 2031 snd_cs4231_ebus_free(chip);
a131430c 2032 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
1da177e4
LT		 2033 return -EBUSY;
2034 }
2035
2036 if (snd_cs4231_probe(chip) < 0) {
2037 snd_cs4231_ebus_free(chip);
2038 return -ENODEV;
2039 }
2040 snd_cs4231_init(chip);
2041
2042 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2043 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2044 snd_cs4231_ebus_free(chip);
2045 return err;
2046 }
2047
1da177e4
LT		 2048 return 0;
2049}
2050
e669dae6 2051static int __init cs4231_ebus_probe(struct of_device *op, const struct of_device_id *match)
1da177e4 2052{
be9b7e8c 2053 struct snd_card *card;
1da177e4
LT		 2054 int err;
2055
2056 err = cs4231_attach_begin(&card);
2057 if (err)
2058 return err;
2059
c6387a48 2060 sprintf(card->longname, "%s at 0x%lx, irq %d",
1da177e4 2061 card->shortname,
afc88ad6
DM		 2062 op->resource[0].start,
2063 op->irqs[0]);
1da177e4 2064
afc88ad6 2065 err = snd_cs4231_ebus_create(card, op, dev);
c6c2d57b 2066 if (err < 0) {
1da177e4
LT		 2067 snd_card_free(card);
2068 return err;
2069 }
2070
c6c2d57b 2071 return cs4231_attach_finish(card);
1da177e4
LT		 2072}
2073#endif
2074
e669dae6 2075static int __init cs4231_probe(struct of_device *op, const struct of_device_id *match)
afc88ad6
DM		 2076{
2077#ifdef EBUS_SUPPORT
2078 if (!strcmp(op->node->parent->name, "ebus"))
2079 return cs4231_ebus_probe(op, match);
2080#endif
1da177e4 2081#ifdef SBUS_SUPPORT
afc88ad6
DM		 2082 if (!strcmp(op->node->parent->name, "sbus") ||
2083 !strcmp(op->node->parent->name, "sbi"))
2084 return cs4231_sbus_probe(op, match);
2085#endif
2086 return -ENODEV;
2087}
2088
e669dae6 2089static int __exit cs4231_remove(struct of_device *op)
afc88ad6
DM		 2090{
2091 struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2092
2093 snd_card_free(chip->card);
2094
2095 return 0;
2096}
2097
fd098316 2098static const struct of_device_id cs4231_match[] = {
ae251031
DM		 2099 {
2100 .name = "SUNW,CS4231",
2101 },
afc88ad6
DM		 2102 {
2103 .name = "audio",
2104 .compatible = "SUNW,CS4231",
2105 },
ae251031
DM		 2106 {},
2107};
2108
2109MODULE_DEVICE_TABLE(of, cs4231_match);
2110
2111static struct of_platform_driver cs4231_driver = {
2112 .name = "audio",
2113 .match_table = cs4231_match,
2114 .probe = cs4231_probe,
e669dae6 2115 .remove = __exit_p(cs4231_remove),
ae251031 2116};
ae251031
DM		 2117
2118static int __init cs4231_init(void)
2119{
afc88ad6 2120 return of_register_driver(&cs4231_driver, &of_bus_type);
1da177e4
LT		 2121}
2122
2123static void __exit cs4231_exit(void)
2124{
ae251031 2125 of_unregister_driver(&cs4231_driver);
1da177e4
LT		 2126}
2127
2128module_init(cs4231_init);
2129module_exit(cs4231_exit);
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