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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[net-next-2.6.git] / sound / pci / via82xx.c
CommitLineData
1da177e4
LT
1/*
2 * ALSA driver for VIA VT82xx (South Bridge)
3 *
4 * VT82C686A/B/C, VT8233A/C, VT8235
5 *
6 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
7 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
8 * 2002 Takashi Iwai <tiwai@suse.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26/*
27 * Changes:
28 *
29 * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
30 * - use the DSX channels for the first pcm playback.
31 * (on VIA8233, 8233C and 8235 only)
32 * this will allow you play simultaneously up to 4 streams.
33 * multi-channel playback is assigned to the second device
34 * on these chips.
35 * - support the secondary capture (on VIA8233/C,8235)
36 * - SPDIF support
37 * the DSX3 channel can be used for SPDIF output.
38 * on VIA8233A, this channel is assigned to the second pcm
39 * playback.
40 * the card config of alsa-lib will assign the correct
41 * device for applications.
42 * - clean up the code, separate low-level initialization
43 * routines for each chipset.
4f550df5
KW
44 *
45 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
46 * - Optimize position calculation for the 823x chips.
1da177e4
LT
47 */
48
49#include <sound/driver.h>
50#include <asm/io.h>
51#include <linux/delay.h>
52#include <linux/interrupt.h>
53#include <linux/init.h>
54#include <linux/pci.h>
55#include <linux/slab.h>
56#include <linux/gameport.h>
57#include <linux/moduleparam.h>
58#include <sound/core.h>
59#include <sound/pcm.h>
60#include <sound/pcm_params.h>
61#include <sound/info.h>
7058c042 62#include <sound/tlv.h>
1da177e4
LT
63#include <sound/ac97_codec.h>
64#include <sound/mpu401.h>
65#include <sound/initval.h>
66
67#if 0
68#define POINTER_DEBUG
69#endif
70
71MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
72MODULE_DESCRIPTION("VIA VT82xx audio");
73MODULE_LICENSE("GPL");
74MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}");
75
76#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
77#define SUPPORT_JOYSTICK 1
78#endif
79
b7fe4622
CL
80static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
81static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
82static long mpu_port;
1da177e4 83#ifdef SUPPORT_JOYSTICK
b7fe4622 84static int joystick;
1da177e4 85#endif
b7fe4622
CL
86static int ac97_clock = 48000;
87static char *ac97_quirk;
88static int dxs_support;
1da177e4 89
b7fe4622 90module_param(index, int, 0444);
1da177e4 91MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
b7fe4622 92module_param(id, charp, 0444);
1da177e4 93MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
b7fe4622 94module_param(mpu_port, long, 0444);
1da177e4
LT
95MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
96#ifdef SUPPORT_JOYSTICK
b7fe4622 97module_param(joystick, bool, 0444);
1da177e4
LT
98MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
99#endif
b7fe4622 100module_param(ac97_clock, int, 0444);
1da177e4 101MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 102module_param(ac97_quirk, charp, 0444);
1da177e4 103MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 104module_param(dxs_support, int, 0444);
2d7eb7cb 105MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
1da177e4 106
2b3e584b
TI
107/* just for backward compatibility */
108static int enable;
698444f3 109module_param(enable, bool, 0444);
2b3e584b 110
1da177e4 111
1da177e4
LT
112/* revision numbers for via686 */
113#define VIA_REV_686_A 0x10
114#define VIA_REV_686_B 0x11
115#define VIA_REV_686_C 0x12
116#define VIA_REV_686_D 0x13
117#define VIA_REV_686_E 0x14
118#define VIA_REV_686_H 0x20
119
120/* revision numbers for via8233 */
121#define VIA_REV_PRE_8233 0x10 /* not in market */
122#define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
123#define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
124#define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
125#define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
126#define VIA_REV_8237 0x60
8263c65f 127#define VIA_REV_8251 0x70
1da177e4
LT
128
129/*
130 * Direct registers
131 */
132
133#define VIAREG(via, x) ((via)->port + VIA_REG_##x)
134#define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
135
136/* common offsets */
137#define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
138#define VIA_REG_STAT_ACTIVE 0x80 /* RO */
4f550df5 139#define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
1da177e4
LT
140#define VIA_REG_STAT_PAUSED 0x40 /* RO */
141#define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
142#define VIA_REG_STAT_STOPPED 0x04 /* RWC */
143#define VIA_REG_STAT_EOL 0x02 /* RWC */
144#define VIA_REG_STAT_FLAG 0x01 /* RWC */
145#define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
146#define VIA_REG_CTRL_START 0x80 /* WO */
147#define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
148#define VIA_REG_CTRL_AUTOSTART 0x20
149#define VIA_REG_CTRL_PAUSE 0x08 /* RW */
150#define VIA_REG_CTRL_INT_STOP 0x04
151#define VIA_REG_CTRL_INT_EOL 0x02
152#define VIA_REG_CTRL_INT_FLAG 0x01
153#define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
154#define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
155#define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
156#define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
157#define VIA_REG_TYPE_16BIT 0x20 /* RW */
158#define VIA_REG_TYPE_STEREO 0x10 /* RW */
159#define VIA_REG_TYPE_INT_LLINE 0x00
160#define VIA_REG_TYPE_INT_LSAMPLE 0x04
161#define VIA_REG_TYPE_INT_LESSONE 0x08
162#define VIA_REG_TYPE_INT_MASK 0x0c
163#define VIA_REG_TYPE_INT_EOL 0x02
164#define VIA_REG_TYPE_INT_FLAG 0x01
165#define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
166#define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
167#define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
168#define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
169#define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
170#define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
171#define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
172
173#define DEFINE_VIA_REGSET(name,val) \
174enum {\
175 VIA_REG_##name##_STATUS = (val),\
176 VIA_REG_##name##_CONTROL = (val) + 0x01,\
177 VIA_REG_##name##_TYPE = (val) + 0x02,\
178 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
179 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
180 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
181 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
182}
183
184/* playback block */
185DEFINE_VIA_REGSET(PLAYBACK, 0x00);
186DEFINE_VIA_REGSET(CAPTURE, 0x10);
187DEFINE_VIA_REGSET(FM, 0x20);
188
189/* AC'97 */
190#define VIA_REG_AC97 0x80 /* dword */
191#define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
192#define VIA_REG_AC97_CODEC_ID_SHIFT 30
193#define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
194#define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
195#define VIA_REG_AC97_SECONDARY_VALID (1<<27)
196#define VIA_REG_AC97_PRIMARY_VALID (1<<25)
197#define VIA_REG_AC97_BUSY (1<<24)
198#define VIA_REG_AC97_READ (1<<23)
199#define VIA_REG_AC97_CMD_SHIFT 16
200#define VIA_REG_AC97_CMD_MASK 0x7e
201#define VIA_REG_AC97_DATA_SHIFT 0
202#define VIA_REG_AC97_DATA_MASK 0xffff
203
204#define VIA_REG_SGD_SHADOW 0x84 /* dword */
205/* via686 */
206#define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
207#define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
208#define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
209#define VIA_REG_SGD_STAT_PB_EOL (1<<4)
210#define VIA_REG_SGD_STAT_CP_EOL (1<<5)
211#define VIA_REG_SGD_STAT_FM_EOL (1<<6)
212#define VIA_REG_SGD_STAT_PB_STOP (1<<8)
213#define VIA_REG_SGD_STAT_CP_STOP (1<<9)
214#define VIA_REG_SGD_STAT_FM_STOP (1<<10)
215#define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
216#define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
217#define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
218/* via8233 */
219#define VIA8233_REG_SGD_STAT_FLAG (1<<0)
220#define VIA8233_REG_SGD_STAT_EOL (1<<1)
221#define VIA8233_REG_SGD_STAT_STOP (1<<2)
222#define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
223#define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
224#define VIA8233_REG_SGD_CHAN_SDX 0
225#define VIA8233_REG_SGD_CHAN_MULTI 4
226#define VIA8233_REG_SGD_CHAN_REC 6
227#define VIA8233_REG_SGD_CHAN_REC1 7
228
229#define VIA_REG_GPI_STATUS 0x88
230#define VIA_REG_GPI_INTR 0x8c
231
232/* multi-channel and capture registers for via8233 */
233DEFINE_VIA_REGSET(MULTPLAY, 0x40);
234DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
235
236/* via8233-specific registers */
237#define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
238#define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
239#define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
240#define VIA_REG_MULTPLAY_FMT_8BIT 0x00
241#define VIA_REG_MULTPLAY_FMT_16BIT 0x80
242#define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
243#define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
244#define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
245
246#define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
247
248#define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
249#define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
250#define VIA_REG_CAPTURE_CHANNEL_LINE 0
251#define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
252
253#define VIA_TBL_BIT_FLAG 0x40000000
254#define VIA_TBL_BIT_EOL 0x80000000
255
256/* pci space */
257#define VIA_ACLINK_STAT 0x40
258#define VIA_ACLINK_C11_READY 0x20
259#define VIA_ACLINK_C10_READY 0x10
260#define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
261#define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
262#define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
263#define VIA_ACLINK_CTRL 0x41
264#define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
265#define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
266#define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
267#define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
268#define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
269#define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
270#define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
271#define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
272#define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
273 VIA_ACLINK_CTRL_RESET|\
274 VIA_ACLINK_CTRL_PCM|\
275 VIA_ACLINK_CTRL_VRA)
276#define VIA_FUNC_ENABLE 0x42
277#define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
278#define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
279#define VIA_FUNC_RX2C_WRITE 0x20
280#define VIA_FUNC_SB_FIFO_EMPTY 0x10
281#define VIA_FUNC_ENABLE_GAME 0x08
282#define VIA_FUNC_ENABLE_FM 0x04
283#define VIA_FUNC_ENABLE_MIDI 0x02
284#define VIA_FUNC_ENABLE_SB 0x01
285#define VIA_PNP_CONTROL 0x43
286#define VIA_FM_NMI_CTRL 0x48
287#define VIA8233_VOLCHG_CTRL 0x48
288#define VIA8233_SPDIF_CTRL 0x49
289#define VIA8233_SPDIF_DX3 0x08
290#define VIA8233_SPDIF_SLOT_MASK 0x03
291#define VIA8233_SPDIF_SLOT_1011 0x00
292#define VIA8233_SPDIF_SLOT_34 0x01
293#define VIA8233_SPDIF_SLOT_78 0x02
294#define VIA8233_SPDIF_SLOT_69 0x03
295
296/*
297 */
298
299#define VIA_DXS_AUTO 0
300#define VIA_DXS_ENABLE 1
301#define VIA_DXS_DISABLE 2
302#define VIA_DXS_48K 3
303#define VIA_DXS_NO_VRA 4
2d7eb7cb 304#define VIA_DXS_SRC 5
1da177e4
LT
305
306
1da177e4
LT
307/*
308 * pcm stream
309 */
310
311struct snd_via_sg_table {
312 unsigned int offset;
313 unsigned int size;
314} ;
315
316#define VIA_TABLE_SIZE 255
317
e437e3d7 318struct viadev {
1da177e4
LT
319 unsigned int reg_offset;
320 unsigned long port;
321 int direction; /* playback = 0, capture = 1 */
e437e3d7 322 struct snd_pcm_substream *substream;
1da177e4
LT
323 int running;
324 unsigned int tbl_entries; /* # descriptors */
325 struct snd_dma_buffer table;
326 struct snd_via_sg_table *idx_table;
327 /* for recovery from the unexpected pointer */
328 unsigned int lastpos;
329 unsigned int fragsize;
330 unsigned int bufsize;
331 unsigned int bufsize2;
4f550df5
KW
332 int hwptr_done; /* processed frame position in the buffer */
333 int in_interrupt;
334 int shadow_shift;
1da177e4
LT
335};
336
337
338enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
339enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
340
341#define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
342
343struct via_rate_lock {
344 spinlock_t lock;
345 int rate;
346 int used;
347};
348
e437e3d7 349struct via82xx {
1da177e4
LT
350 int irq;
351
352 unsigned long port;
353 struct resource *mpu_res;
354 int chip_type;
355 unsigned char revision;
356
357 unsigned char old_legacy;
358 unsigned char old_legacy_cfg;
359#ifdef CONFIG_PM
360 unsigned char legacy_saved;
361 unsigned char legacy_cfg_saved;
362 unsigned char spdif_ctrl_saved;
363 unsigned char capture_src_saved[2];
364 unsigned int mpu_port_saved;
365#endif
366
00f226d4
HM
367 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
368 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
1da177e4
LT
369
370 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
371
372 struct pci_dev *pci;
e437e3d7 373 struct snd_card *card;
1da177e4
LT
374
375 unsigned int num_devs;
376 unsigned int playback_devno, multi_devno, capture_devno;
e437e3d7 377 struct viadev devs[VIA_MAX_DEVS];
1da177e4
LT
378 struct via_rate_lock rates[2]; /* playback and capture */
379 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
380 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
2d7eb7cb 381 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
1da177e4
LT
382 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
383
e437e3d7
TI
384 struct snd_pcm *pcms[2];
385 struct snd_rawmidi *rmidi;
1da177e4 386
e437e3d7
TI
387 struct snd_ac97_bus *ac97_bus;
388 struct snd_ac97 *ac97;
1da177e4
LT
389 unsigned int ac97_clock;
390 unsigned int ac97_secondary; /* secondary AC'97 codec is present */
391
392 spinlock_t reg_lock;
e437e3d7 393 struct snd_info_entry *proc_entry;
1da177e4
LT
394
395#ifdef SUPPORT_JOYSTICK
396 struct gameport *gameport;
397#endif
398};
399
f40b6890 400static struct pci_device_id snd_via82xx_ids[] = {
4f550df5
KW
401 /* 0x1106, 0x3058 */
402 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA686, }, /* 686A */
403 /* 0x1106, 0x3059 */
404 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8233_5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_CARD_VIA8233, }, /* VT8233 */
1da177e4
LT
405 { 0, }
406};
407
408MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
409
410/*
411 */
412
413/*
414 * allocate and initialize the descriptor buffers
415 * periods = number of periods
416 * fragsize = period size in bytes
417 */
e437e3d7 418static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT
419 struct pci_dev *pci,
420 unsigned int periods, unsigned int fragsize)
421{
422 unsigned int i, idx, ofs, rest;
e437e3d7 423 struct via82xx *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
424 struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream);
425
426 if (dev->table.area == NULL) {
427 /* the start of each lists must be aligned to 8 bytes,
428 * but the kernel pages are much bigger, so we don't care
429 */
430 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
431 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
432 &dev->table) < 0)
433 return -ENOMEM;
434 }
435 if (! dev->idx_table) {
436 dev->idx_table = kmalloc(sizeof(*dev->idx_table) * VIA_TABLE_SIZE, GFP_KERNEL);
437 if (! dev->idx_table)
438 return -ENOMEM;
439 }
440
441 /* fill the entries */
442 idx = 0;
443 ofs = 0;
444 for (i = 0; i < periods; i++) {
445 rest = fragsize;
446 /* fill descriptors for a period.
447 * a period can be split to several descriptors if it's
448 * over page boundary.
449 */
450 do {
451 unsigned int r;
452 unsigned int flag;
453
454 if (idx >= VIA_TABLE_SIZE) {
455 snd_printk(KERN_ERR "via82xx: too much table size!\n");
456 return -EINVAL;
457 }
458 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, ofs));
459 r = PAGE_SIZE - (ofs % PAGE_SIZE);
460 if (rest < r)
461 r = rest;
462 rest -= r;
463 if (! rest) {
464 if (i == periods - 1)
465 flag = VIA_TBL_BIT_EOL; /* buffer boundary */
466 else
467 flag = VIA_TBL_BIT_FLAG; /* period boundary */
468 } else
469 flag = 0; /* period continues to the next */
470 // printk("via: tbl %d: at %d size %d (rest %d)\n", idx, ofs, r, rest);
471 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
472 dev->idx_table[idx].offset = ofs;
473 dev->idx_table[idx].size = r;
474 ofs += r;
475 idx++;
476 } while (rest > 0);
477 }
478 dev->tbl_entries = idx;
479 dev->bufsize = periods * fragsize;
480 dev->bufsize2 = dev->bufsize / 2;
481 dev->fragsize = fragsize;
482 return 0;
483}
484
485
e437e3d7 486static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT
487 struct pci_dev *pci)
488{
489 if (dev->table.area) {
490 snd_dma_free_pages(&dev->table);
491 dev->table.area = NULL;
492 }
4d572776
JJ
493 kfree(dev->idx_table);
494 dev->idx_table = NULL;
1da177e4
LT
495 return 0;
496}
497
498/*
499 * Basic I/O
500 */
501
e437e3d7 502static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
1da177e4
LT
503{
504 return inl(VIAREG(chip, AC97));
505}
506
e437e3d7 507static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
1da177e4
LT
508{
509 outl(val, VIAREG(chip, AC97));
510}
511
e437e3d7 512static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
1da177e4
LT
513{
514 unsigned int timeout = 1000; /* 1ms */
515 unsigned int val;
516
517 while (timeout-- > 0) {
518 udelay(1);
519 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY))
520 return val & 0xffff;
521 }
e437e3d7
TI
522 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n",
523 secondary, snd_via82xx_codec_xread(chip));
1da177e4
LT
524 return -EIO;
525}
526
e437e3d7 527static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
1da177e4
LT
528{
529 unsigned int timeout = 1000; /* 1ms */
530 unsigned int val, val1;
531 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
532 VIA_REG_AC97_SECONDARY_VALID;
533
534 while (timeout-- > 0) {
535 val = snd_via82xx_codec_xread(chip);
536 val1 = val & (VIA_REG_AC97_BUSY | stat);
537 if (val1 == stat)
538 return val & 0xffff;
539 udelay(1);
540 }
541 return -EIO;
542}
543
e437e3d7 544static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
1da177e4 545{
e437e3d7 546 struct via82xx *chip = ac97->private_data;
1da177e4
LT
547 int err;
548 err = snd_via82xx_codec_ready(chip, ac97->num);
549 /* here we need to wait fairly for long time.. */
ef21ca24 550 msleep(500);
1da177e4
LT
551}
552
e437e3d7 553static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
1da177e4
LT
554 unsigned short reg,
555 unsigned short val)
556{
e437e3d7 557 struct via82xx *chip = ac97->private_data;
1da177e4 558 unsigned int xval;
4f550df5 559
1da177e4
LT
560 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
561 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
562 xval |= reg << VIA_REG_AC97_CMD_SHIFT;
563 xval |= val << VIA_REG_AC97_DATA_SHIFT;
564 snd_via82xx_codec_xwrite(chip, xval);
565 snd_via82xx_codec_ready(chip, ac97->num);
566}
567
e437e3d7 568static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 569{
e437e3d7 570 struct via82xx *chip = ac97->private_data;
1da177e4
LT
571 unsigned int xval, val = 0xffff;
572 int again = 0;
573
574 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
575 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
576 xval |= VIA_REG_AC97_READ;
577 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
578 while (1) {
579 if (again++ > 3) {
e437e3d7
TI
580 snd_printk(KERN_ERR "codec_read: codec %i is not valid [0x%x]\n",
581 ac97->num, snd_via82xx_codec_xread(chip));
1da177e4
LT
582 return 0xffff;
583 }
584 snd_via82xx_codec_xwrite(chip, xval);
585 udelay (20);
586 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
587 udelay(25);
588 val = snd_via82xx_codec_xread(chip);
589 break;
590 }
591 }
592 return val & 0xffff;
593}
594
e437e3d7 595static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT
596{
597 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
598 VIADEV_REG(viadev, OFFSET_CONTROL));
599 inb(VIADEV_REG(viadev, OFFSET_CONTROL));
600 udelay(50);
601 /* disable interrupts */
602 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
603 /* clear interrupts */
604 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
605 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
606 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
607 viadev->lastpos = 0;
4f550df5 608 viadev->hwptr_done = 0;
1da177e4
LT
609}
610
611
612/*
613 * Interrupt handler
4f550df5 614 * Used for 686 and 8233A
1da177e4 615 */
7d12e780 616static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
1da177e4 617{
e437e3d7 618 struct via82xx *chip = dev_id;
1da177e4
LT
619 unsigned int status;
620 unsigned int i;
621
622 status = inl(VIAREG(chip, SGD_SHADOW));
623 if (! (status & chip->intr_mask)) {
624 if (chip->rmidi)
625 /* check mpu401 interrupt */
7d12e780 626 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT
627 return IRQ_NONE;
628 }
629
630 /* check status for each stream */
631 spin_lock(&chip->reg_lock);
632 for (i = 0; i < chip->num_devs; i++) {
e437e3d7 633 struct viadev *viadev = &chip->devs[i];
1da177e4 634 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
4f550df5 635 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
1da177e4
LT
636 continue;
637 if (viadev->substream && viadev->running) {
4f550df5
KW
638 /*
639 * Update hwptr_done based on 'period elapsed'
640 * interrupts. We'll use it, when the chip returns 0
641 * for OFFSET_CURR_COUNT.
642 */
643 if (c_status & VIA_REG_STAT_EOL)
644 viadev->hwptr_done = 0;
645 else
646 viadev->hwptr_done += viadev->fragsize;
647 viadev->in_interrupt = c_status;
1da177e4
LT
648 spin_unlock(&chip->reg_lock);
649 snd_pcm_period_elapsed(viadev->substream);
650 spin_lock(&chip->reg_lock);
4f550df5 651 viadev->in_interrupt = 0;
1da177e4
LT
652 }
653 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
654 }
655 spin_unlock(&chip->reg_lock);
656 return IRQ_HANDLED;
657}
658
4f550df5
KW
659/*
660 * Interrupt handler
661 */
7d12e780 662static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
4f550df5 663{
e437e3d7 664 struct via82xx *chip = dev_id;
4f550df5
KW
665 unsigned int status;
666 unsigned int i;
667 int irqreturn = 0;
668
669 /* check status for each stream */
670 spin_lock(&chip->reg_lock);
671 status = inl(VIAREG(chip, SGD_SHADOW));
672
673 for (i = 0; i < chip->num_devs; i++) {
e437e3d7
TI
674 struct viadev *viadev = &chip->devs[i];
675 struct snd_pcm_substream *substream;
4f550df5
KW
676 unsigned char c_status, shadow_status;
677
678 shadow_status = (status >> viadev->shadow_shift) &
679 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
680 VIA_REG_STAT_FLAG);
681 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
682 if (!c_status)
683 continue;
684
685 substream = viadev->substream;
686 if (substream && viadev->running) {
687 /*
688 * Update hwptr_done based on 'period elapsed'
689 * interrupts. We'll use it, when the chip returns 0
690 * for OFFSET_CURR_COUNT.
691 */
692 if (c_status & VIA_REG_STAT_EOL)
693 viadev->hwptr_done = 0;
694 else
695 viadev->hwptr_done += viadev->fragsize;
696 viadev->in_interrupt = c_status;
697 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
698 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
699 spin_unlock(&chip->reg_lock);
700
701 snd_pcm_period_elapsed(substream);
702
703 spin_lock(&chip->reg_lock);
704 viadev->in_interrupt = 0;
705 }
706 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
707 irqreturn = 1;
708 }
709 spin_unlock(&chip->reg_lock);
710 return IRQ_RETVAL(irqreturn);
711}
712
1da177e4
LT
713/*
714 * PCM callbacks
715 */
716
717/*
718 * trigger callback
719 */
e437e3d7 720static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 721{
e437e3d7
TI
722 struct via82xx *chip = snd_pcm_substream_chip(substream);
723 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
724 unsigned char val;
725
726 if (chip->chip_type != TYPE_VIA686)
727 val = VIA_REG_CTRL_INT;
728 else
729 val = 0;
730 switch (cmd) {
731 case SNDRV_PCM_TRIGGER_START:
41e4845c 732 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
733 val |= VIA_REG_CTRL_START;
734 viadev->running = 1;
735 break;
736 case SNDRV_PCM_TRIGGER_STOP:
41e4845c 737 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
738 val = VIA_REG_CTRL_TERMINATE;
739 viadev->running = 0;
740 break;
741 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
742 val |= VIA_REG_CTRL_PAUSE;
743 viadev->running = 0;
744 break;
745 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
746 viadev->running = 1;
747 break;
748 default:
749 return -EINVAL;
750 }
751 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
752 if (cmd == SNDRV_PCM_TRIGGER_STOP)
753 snd_via82xx_channel_reset(chip, viadev);
754 return 0;
755}
756
757
758/*
759 * pointer callbacks
760 */
761
762/*
763 * calculate the linear position at the given sg-buffer index and the rest count
764 */
765
766#define check_invalid_pos(viadev,pos) \
e437e3d7
TI
767 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
768 viadev->lastpos < viadev->bufsize2))
1da177e4 769
e437e3d7
TI
770static inline unsigned int calc_linear_pos(struct viadev *viadev, unsigned int idx,
771 unsigned int count)
1da177e4
LT
772{
773 unsigned int size, base, res;
774
775 size = viadev->idx_table[idx].size;
776 base = viadev->idx_table[idx].offset;
777 res = base + size - count;
4f550df5
KW
778 if (res >= viadev->bufsize)
779 res -= viadev->bufsize;
1da177e4
LT
780
781 /* check the validity of the calculated position */
782 if (size < count) {
e437e3d7
TI
783 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
784 (int)size, (int)count);
1da177e4
LT
785 res = viadev->lastpos;
786 } else {
787 if (! count) {
788 /* Some mobos report count = 0 on the DMA boundary,
789 * i.e. count = size indeed.
790 * Let's check whether this step is above the expected size.
791 */
792 int delta = res - viadev->lastpos;
793 if (delta < 0)
794 delta += viadev->bufsize;
795 if ((unsigned int)delta > viadev->fragsize)
796 res = base;
797 }
798 if (check_invalid_pos(viadev, res)) {
799#ifdef POINTER_DEBUG
e437e3d7
TI
800 printk(KERN_DEBUG "fail: idx = %i/%i, lastpos = 0x%x, "
801 "bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, "
802 "count = 0x%x\n", idx, viadev->tbl_entries,
803 viadev->lastpos, viadev->bufsize2,
804 viadev->idx_table[idx].offset,
805 viadev->idx_table[idx].size, count);
1da177e4
LT
806#endif
807 /* count register returns full size when end of buffer is reached */
808 res = base + size;
809 if (check_invalid_pos(viadev, res)) {
e437e3d7
TI
810 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (2), "
811 "using last valid pointer\n");
1da177e4
LT
812 res = viadev->lastpos;
813 }
814 }
815 }
1da177e4
LT
816 return res;
817}
818
819/*
820 * get the current pointer on via686
821 */
e437e3d7 822static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 823{
e437e3d7
TI
824 struct via82xx *chip = snd_pcm_substream_chip(substream);
825 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
826 unsigned int idx, ptr, count, res;
827
828 snd_assert(viadev->tbl_entries, return 0);
829 if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
830 return 0;
831
832 spin_lock(&chip->reg_lock);
833 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
834 /* The via686a does not have the current index register,
835 * so we need to calculate the index from CURR_PTR.
836 */
837 ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
838 if (ptr <= (unsigned int)viadev->table.addr)
839 idx = 0;
840 else /* CURR_PTR holds the address + 8 */
841 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
842 res = calc_linear_pos(viadev, idx, count);
4f550df5 843 viadev->lastpos = res; /* remember the last position */
1da177e4
LT
844 spin_unlock(&chip->reg_lock);
845
846 return bytes_to_frames(substream->runtime, res);
847}
848
849/*
850 * get the current pointer on via823x
851 */
e437e3d7 852static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 853{
e437e3d7
TI
854 struct via82xx *chip = snd_pcm_substream_chip(substream);
855 struct viadev *viadev = substream->runtime->private_data;
1da177e4 856 unsigned int idx, count, res;
4f550df5 857 int status;
1da177e4
LT
858
859 snd_assert(viadev->tbl_entries, return 0);
4f550df5 860
1da177e4 861 spin_lock(&chip->reg_lock);
4f550df5
KW
862 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
863 status = viadev->in_interrupt;
864 if (!status)
865 status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
866
c6cc0e3b
BJ
867 /* An apparent bug in the 8251 is worked around by sending a
868 * REG_CTRL_START. */
869 if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
870 snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
871
4f550df5 872 if (!(status & VIA_REG_STAT_ACTIVE)) {
c6cc0e3b
BJ
873 res = 0;
874 goto unlock;
4f550df5
KW
875 }
876 if (count & 0xffffff) {
877 idx = count >> 24;
878 if (idx >= viadev->tbl_entries) {
1da177e4 879#ifdef POINTER_DEBUG
e437e3d7
TI
880 printk(KERN_DEBUG "fail: invalid idx = %i/%i\n", idx,
881 viadev->tbl_entries);
1da177e4 882#endif
4f550df5
KW
883 res = viadev->lastpos;
884 } else {
885 count &= 0xffffff;
886 res = calc_linear_pos(viadev, idx, count);
887 }
1da177e4 888 } else {
4f550df5
KW
889 res = viadev->hwptr_done;
890 if (!viadev->in_interrupt) {
891 if (status & VIA_REG_STAT_EOL) {
892 res = 0;
893 } else
894 if (status & VIA_REG_STAT_FLAG) {
895 res += viadev->fragsize;
896 }
897 }
898 }
899unlock:
900 viadev->lastpos = res;
1da177e4
LT
901 spin_unlock(&chip->reg_lock);
902
903 return bytes_to_frames(substream->runtime, res);
904}
905
906
907/*
908 * hw_params callback:
909 * allocate the buffer and build up the buffer description table
910 */
e437e3d7
TI
911static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
912 struct snd_pcm_hw_params *hw_params)
1da177e4 913{
e437e3d7
TI
914 struct via82xx *chip = snd_pcm_substream_chip(substream);
915 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
916 int err;
917
918 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
919 if (err < 0)
920 return err;
921 err = build_via_table(viadev, substream, chip->pci,
922 params_periods(hw_params),
923 params_period_bytes(hw_params));
924 if (err < 0)
925 return err;
926
927 return 0;
928}
929
930/*
931 * hw_free callback:
932 * clean up the buffer description table and release the buffer
933 */
e437e3d7 934static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
1da177e4 935{
e437e3d7
TI
936 struct via82xx *chip = snd_pcm_substream_chip(substream);
937 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
938
939 clean_via_table(viadev, substream, chip->pci);
940 snd_pcm_lib_free_pages(substream);
941 return 0;
942}
943
944
945/*
946 * set up the table pointer
947 */
e437e3d7 948static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT
949{
950 snd_via82xx_codec_ready(chip, 0);
951 outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
952 udelay(20);
953 snd_via82xx_codec_ready(chip, 0);
954}
955
956/*
957 * prepare callback for playback and capture on via686
958 */
e437e3d7
TI
959static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
960 struct snd_pcm_runtime *runtime)
1da177e4
LT
961{
962 snd_via82xx_channel_reset(chip, viadev);
963 /* this must be set after channel_reset */
964 snd_via82xx_set_table_ptr(chip, viadev);
965 outb(VIA_REG_TYPE_AUTOSTART |
966 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
967 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
968 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
969 VIA_REG_TYPE_INT_EOL |
970 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
971}
972
e437e3d7 973static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 974{
e437e3d7
TI
975 struct via82xx *chip = snd_pcm_substream_chip(substream);
976 struct viadev *viadev = substream->runtime->private_data;
977 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
978
979 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
980 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
981 via686_setup_format(chip, viadev, runtime);
982 return 0;
983}
984
e437e3d7 985static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 986{
e437e3d7
TI
987 struct via82xx *chip = snd_pcm_substream_chip(substream);
988 struct viadev *viadev = substream->runtime->private_data;
989 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
990
991 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
992 via686_setup_format(chip, viadev, runtime);
993 return 0;
994}
995
996/*
997 * lock the current rate
998 */
999static int via_lock_rate(struct via_rate_lock *rec, int rate)
1000{
1001 int changed = 0;
1002
1003 spin_lock_irq(&rec->lock);
1004 if (rec->rate != rate) {
1005 if (rec->rate && rec->used > 1) /* already set */
1006 changed = -EINVAL;
1007 else {
1008 rec->rate = rate;
1009 changed = 1;
1010 }
1011 }
1012 spin_unlock_irq(&rec->lock);
1013 return changed;
1014}
1015
1016/*
1017 * prepare callback for DSX playback on via823x
1018 */
e437e3d7 1019static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 1020{
e437e3d7
TI
1021 struct via82xx *chip = snd_pcm_substream_chip(substream);
1022 struct viadev *viadev = substream->runtime->private_data;
1023 struct snd_pcm_runtime *runtime = substream->runtime;
2d7eb7cb 1024 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
1da177e4
LT
1025 int rate_changed;
1026 u32 rbits;
1027
2d7eb7cb 1028 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0)
1da177e4 1029 return rate_changed;
16d3f140 1030 if (rate_changed)
1da177e4
LT
1031 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
1032 chip->no_vra ? 48000 : runtime->rate);
16d3f140
TI
1033 if (chip->spdif_on && viadev->reg_offset == 0x30)
1034 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1035
1da177e4
LT
1036 if (runtime->rate == 48000)
1037 rbits = 0xfffff;
1038 else
e437e3d7
TI
1039 rbits = (0x100000 / 48000) * runtime->rate +
1040 ((0x100000 % 48000) * runtime->rate) / 48000;
1da177e4
LT
1041 snd_assert((rbits & ~0xfffff) == 0, return -EINVAL);
1042 snd_via82xx_channel_reset(chip, viadev);
1043 snd_via82xx_set_table_ptr(chip, viadev);
e437e3d7
TI
1044 outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
1045 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
1046 outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
1047 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
1da177e4
LT
1048 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
1049 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
1050 rbits | /* rate */
1051 0xff000000, /* STOP index is never reached */
1052 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1053 udelay(20);
1054 snd_via82xx_codec_ready(chip, 0);
1055 return 0;
1056}
1057
1058/*
1059 * prepare callback for multi-channel playback on via823x
1060 */
e437e3d7 1061static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
1da177e4 1062{
e437e3d7
TI
1063 struct via82xx *chip = snd_pcm_substream_chip(substream);
1064 struct viadev *viadev = substream->runtime->private_data;
1065 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1066 unsigned int slots;
1067 int fmt;
1068
1069 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
1070 return -EINVAL;
1071 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1072 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
1073 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
1074 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1075 snd_via82xx_channel_reset(chip, viadev);
1076 snd_via82xx_set_table_ptr(chip, viadev);
1077
e437e3d7
TI
1078 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
1079 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
1da177e4
LT
1080 fmt |= runtime->channels << 4;
1081 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
1082#if 0
1083 if (chip->revision == VIA_REV_8233A)
1084 slots = 0;
1085 else
1086#endif
1087 {
1088 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
1089 /* corresponding to FL, FR, RL, RR, C, LFE ?? */
1090 switch (runtime->channels) {
1091 case 1: slots = (1<<0) | (1<<4); break;
1092 case 2: slots = (1<<0) | (2<<4); break;
1093 case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
1094 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
1095 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
1096 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
1097 default: slots = 0; break;
1098 }
1099 }
1100 /* STOP index is never reached */
1101 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
1102 udelay(20);
1103 snd_via82xx_codec_ready(chip, 0);
1104 return 0;
1105}
1106
1107/*
1108 * prepare callback for capture on via823x
1109 */
e437e3d7 1110static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1111{
e437e3d7
TI
1112 struct via82xx *chip = snd_pcm_substream_chip(substream);
1113 struct viadev *viadev = substream->runtime->private_data;
1114 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1115
1116 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
1117 return -EINVAL;
1118 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1119 snd_via82xx_channel_reset(chip, viadev);
1120 snd_via82xx_set_table_ptr(chip, viadev);
1121 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
1122 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
1123 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
1124 0xff000000, /* STOP index is never reached */
1125 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1126 udelay(20);
1127 snd_via82xx_codec_ready(chip, 0);
1128 return 0;
1129}
1130
1131
1132/*
1133 * pcm hardware definition, identical for both playback and capture
1134 */
e437e3d7 1135static struct snd_pcm_hardware snd_via82xx_hw =
1da177e4
LT
1136{
1137 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1138 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1139 SNDRV_PCM_INFO_MMAP_VALID |
41e4845c 1140 /* SNDRV_PCM_INFO_RESUME | */
1da177e4
LT
1141 SNDRV_PCM_INFO_PAUSE),
1142 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1143 .rates = SNDRV_PCM_RATE_48000,
1144 .rate_min = 48000,
1145 .rate_max = 48000,
1146 .channels_min = 1,
1147 .channels_max = 2,
1148 .buffer_bytes_max = 128 * 1024,
1149 .period_bytes_min = 32,
1150 .period_bytes_max = 128 * 1024,
1151 .periods_min = 2,
1152 .periods_max = VIA_TABLE_SIZE / 2,
1153 .fifo_size = 0,
1154};
1155
1156
1157/*
1158 * open callback skeleton
1159 */
e437e3d7
TI
1160static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
1161 struct snd_pcm_substream *substream)
1da177e4 1162{
e437e3d7 1163 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1164 int err;
1165 struct via_rate_lock *ratep;
1166
1167 runtime->hw = snd_via82xx_hw;
1168
1169 /* set the hw rate condition */
1170 ratep = &chip->rates[viadev->direction];
1171 spin_lock_irq(&ratep->lock);
1172 ratep->used++;
1173 if (chip->spdif_on && viadev->reg_offset == 0x30) {
1174 /* DXS#3 and spdif is on */
1175 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
1176 snd_pcm_limit_hw_rates(runtime);
1177 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
1178 /* fixed DXS playback rate */
1179 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1180 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
2d7eb7cb
SV
1181 } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
1182 /* use full SRC capabilities of DXS */
1183 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
1184 SNDRV_PCM_RATE_8000_48000);
1185 runtime->hw.rate_min = 8000;
1186 runtime->hw.rate_max = 48000;
1da177e4
LT
1187 } else if (! ratep->rate) {
1188 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
1189 runtime->hw.rates = chip->ac97->rates[idx];
1190 snd_pcm_limit_hw_rates(runtime);
1191 } else {
1192 /* a fixed rate */
1193 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1194 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
1195 }
1196 spin_unlock_irq(&ratep->lock);
1197
1198 /* we may remove following constaint when we modify table entries
1199 in interrupt */
1200 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1201 return err;
1202
1203 runtime->private_data = viadev;
1204 viadev->substream = substream;
1205
1206 return 0;
1207}
1208
1209
1210/*
1211 * open callback for playback on via686 and via823x DSX
1212 */
e437e3d7 1213static int snd_via82xx_playback_open(struct snd_pcm_substream *substream)
1da177e4 1214{
e437e3d7
TI
1215 struct via82xx *chip = snd_pcm_substream_chip(substream);
1216 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
1da177e4
LT
1217 int err;
1218
1219 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1220 return err;
1221 return 0;
1222}
1223
1224/*
1225 * open callback for playback on via823x multi-channel
1226 */
e437e3d7 1227static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
1da177e4 1228{
e437e3d7
TI
1229 struct via82xx *chip = snd_pcm_substream_chip(substream);
1230 struct viadev *viadev = &chip->devs[chip->multi_devno];
1da177e4
LT
1231 int err;
1232 /* channels constraint for VIA8233A
1233 * 3 and 5 channels are not supported
1234 */
1235 static unsigned int channels[] = {
1236 1, 2, 4, 6
1237 };
e437e3d7 1238 static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
1da177e4
LT
1239 .count = ARRAY_SIZE(channels),
1240 .list = channels,
1241 .mask = 0,
1242 };
1243
1244 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1245 return err;
1246 substream->runtime->hw.channels_max = 6;
1247 if (chip->revision == VIA_REV_8233A)
e437e3d7
TI
1248 snd_pcm_hw_constraint_list(substream->runtime, 0,
1249 SNDRV_PCM_HW_PARAM_CHANNELS,
1250 &hw_constraints_channels);
1da177e4
LT
1251 return 0;
1252}
1253
1254/*
1255 * open callback for capture on via686 and via823x
1256 */
e437e3d7 1257static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
1da177e4 1258{
e437e3d7
TI
1259 struct via82xx *chip = snd_pcm_substream_chip(substream);
1260 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
1da177e4
LT
1261
1262 return snd_via82xx_pcm_open(chip, viadev, substream);
1263}
1264
1265/*
1266 * close callback
1267 */
e437e3d7 1268static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
1da177e4 1269{
e437e3d7
TI
1270 struct via82xx *chip = snd_pcm_substream_chip(substream);
1271 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT
1272 struct via_rate_lock *ratep;
1273
1274 /* release the rate lock */
1275 ratep = &chip->rates[viadev->direction];
1276 spin_lock_irq(&ratep->lock);
1277 ratep->used--;
1278 if (! ratep->used)
1279 ratep->rate = 0;
1280 spin_unlock_irq(&ratep->lock);
6dbe6628
TI
1281 if (! ratep->rate) {
1282 if (! viadev->direction) {
1283 snd_ac97_update_power(chip->ac97,
1284 AC97_PCM_FRONT_DAC_RATE, 0);
1285 snd_ac97_update_power(chip->ac97,
1286 AC97_PCM_SURR_DAC_RATE, 0);
1287 snd_ac97_update_power(chip->ac97,
1288 AC97_PCM_LFE_DAC_RATE, 0);
1289 } else
1290 snd_ac97_update_power(chip->ac97,
1291 AC97_PCM_LR_ADC_RATE, 0);
1292 }
1da177e4
LT
1293 viadev->substream = NULL;
1294 return 0;
1295}
1296
1297
1298/* via686 playback callbacks */
e437e3d7 1299static struct snd_pcm_ops snd_via686_playback_ops = {
1da177e4
LT
1300 .open = snd_via82xx_playback_open,
1301 .close = snd_via82xx_pcm_close,
1302 .ioctl = snd_pcm_lib_ioctl,
1303 .hw_params = snd_via82xx_hw_params,
1304 .hw_free = snd_via82xx_hw_free,
1305 .prepare = snd_via686_playback_prepare,
1306 .trigger = snd_via82xx_pcm_trigger,
1307 .pointer = snd_via686_pcm_pointer,
1308 .page = snd_pcm_sgbuf_ops_page,
1309};
1310
1311/* via686 capture callbacks */
e437e3d7 1312static struct snd_pcm_ops snd_via686_capture_ops = {
1da177e4
LT
1313 .open = snd_via82xx_capture_open,
1314 .close = snd_via82xx_pcm_close,
1315 .ioctl = snd_pcm_lib_ioctl,
1316 .hw_params = snd_via82xx_hw_params,
1317 .hw_free = snd_via82xx_hw_free,
1318 .prepare = snd_via686_capture_prepare,
1319 .trigger = snd_via82xx_pcm_trigger,
1320 .pointer = snd_via686_pcm_pointer,
1321 .page = snd_pcm_sgbuf_ops_page,
1322};
1323
1324/* via823x DSX playback callbacks */
e437e3d7 1325static struct snd_pcm_ops snd_via8233_playback_ops = {
1da177e4
LT
1326 .open = snd_via82xx_playback_open,
1327 .close = snd_via82xx_pcm_close,
1328 .ioctl = snd_pcm_lib_ioctl,
1329 .hw_params = snd_via82xx_hw_params,
1330 .hw_free = snd_via82xx_hw_free,
1331 .prepare = snd_via8233_playback_prepare,
1332 .trigger = snd_via82xx_pcm_trigger,
1333 .pointer = snd_via8233_pcm_pointer,
1334 .page = snd_pcm_sgbuf_ops_page,
1335};
1336
1337/* via823x multi-channel playback callbacks */
e437e3d7 1338static struct snd_pcm_ops snd_via8233_multi_ops = {
1da177e4
LT
1339 .open = snd_via8233_multi_open,
1340 .close = snd_via82xx_pcm_close,
1341 .ioctl = snd_pcm_lib_ioctl,
1342 .hw_params = snd_via82xx_hw_params,
1343 .hw_free = snd_via82xx_hw_free,
1344 .prepare = snd_via8233_multi_prepare,
1345 .trigger = snd_via82xx_pcm_trigger,
1346 .pointer = snd_via8233_pcm_pointer,
1347 .page = snd_pcm_sgbuf_ops_page,
1348};
1349
1350/* via823x capture callbacks */
e437e3d7 1351static struct snd_pcm_ops snd_via8233_capture_ops = {
1da177e4
LT
1352 .open = snd_via82xx_capture_open,
1353 .close = snd_via82xx_pcm_close,
1354 .ioctl = snd_pcm_lib_ioctl,
1355 .hw_params = snd_via82xx_hw_params,
1356 .hw_free = snd_via82xx_hw_free,
1357 .prepare = snd_via8233_capture_prepare,
1358 .trigger = snd_via82xx_pcm_trigger,
1359 .pointer = snd_via8233_pcm_pointer,
1360 .page = snd_pcm_sgbuf_ops_page,
1361};
1362
1363
e437e3d7
TI
1364static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
1365 int shadow_pos, int direction)
1da177e4
LT
1366{
1367 chip->devs[idx].reg_offset = reg_offset;
4f550df5 1368 chip->devs[idx].shadow_shift = shadow_pos * 4;
1da177e4
LT
1369 chip->devs[idx].direction = direction;
1370 chip->devs[idx].port = chip->port + reg_offset;
1371}
1372
1373/*
1374 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
1375 */
e437e3d7 1376static int __devinit snd_via8233_pcm_new(struct via82xx *chip)
1da177e4 1377{
e437e3d7 1378 struct snd_pcm *pcm;
1da177e4
LT
1379 int i, err;
1380
1381 chip->playback_devno = 0; /* x 4 */
1382 chip->multi_devno = 4; /* x 1 */
1383 chip->capture_devno = 5; /* x 2 */
1384 chip->num_devs = 7;
1385 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
1386
1387 /* PCM #0: 4 DSX playbacks and 1 capture */
1388 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
1389 if (err < 0)
1390 return err;
1391 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1392 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1393 pcm->private_data = chip;
1394 strcpy(pcm->name, chip->card->shortname);
1395 chip->pcms[0] = pcm;
1396 /* set up playbacks */
1397 for (i = 0; i < 4; i++)
4f550df5 1398 init_viadev(chip, i, 0x10 * i, i, 0);
1da177e4 1399 /* capture */
4f550df5 1400 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4
LT
1401
1402 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
e437e3d7
TI
1403 snd_dma_pci_data(chip->pci),
1404 64*1024, 128*1024)) < 0)
1da177e4
LT
1405 return err;
1406
1407 /* PCM #1: multi-channel playback and 2nd capture */
1408 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
1409 if (err < 0)
1410 return err;
1411 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1412 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1413 pcm->private_data = chip;
1414 strcpy(pcm->name, chip->card->shortname);
1415 chip->pcms[1] = pcm;
1416 /* set up playback */
4f550df5 1417 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1418 /* set up capture */
4f550df5 1419 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
1da177e4
LT
1420
1421 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
e437e3d7
TI
1422 snd_dma_pci_data(chip->pci),
1423 64*1024, 128*1024)) < 0)
1da177e4
LT
1424 return err;
1425
1426 return 0;
1427}
1428
1429/*
1430 * create pcm instances for VIA8233A
1431 */
e437e3d7 1432static int __devinit snd_via8233a_pcm_new(struct via82xx *chip)
1da177e4 1433{
e437e3d7 1434 struct snd_pcm *pcm;
1da177e4
LT
1435 int err;
1436
1437 chip->multi_devno = 0;
1438 chip->playback_devno = 1;
1439 chip->capture_devno = 2;
1440 chip->num_devs = 3;
1441 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
1442
1443 /* PCM #0: multi-channel playback and capture */
1444 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1445 if (err < 0)
1446 return err;
1447 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1448 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1449 pcm->private_data = chip;
1450 strcpy(pcm->name, chip->card->shortname);
1451 chip->pcms[0] = pcm;
1452 /* set up playback */
4f550df5 1453 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1454 /* capture */
4f550df5 1455 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4
LT
1456
1457 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
e437e3d7
TI
1458 snd_dma_pci_data(chip->pci),
1459 64*1024, 128*1024)) < 0)
1da177e4
LT
1460 return err;
1461
1462 /* SPDIF supported? */
1463 if (! ac97_can_spdif(chip->ac97))
1464 return 0;
1465
1466 /* PCM #1: DXS3 playback (for spdif) */
1467 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
1468 if (err < 0)
1469 return err;
1470 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1471 pcm->private_data = chip;
1472 strcpy(pcm->name, chip->card->shortname);
1473 chip->pcms[1] = pcm;
1474 /* set up playback */
4f550df5 1475 init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
1da177e4
LT
1476
1477 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
e437e3d7
TI
1478 snd_dma_pci_data(chip->pci),
1479 64*1024, 128*1024)) < 0)
1da177e4
LT
1480 return err;
1481
1482 return 0;
1483}
1484
1485/*
1486 * create a pcm instance for via686a/b
1487 */
e437e3d7 1488static int __devinit snd_via686_pcm_new(struct via82xx *chip)
1da177e4 1489{
e437e3d7 1490 struct snd_pcm *pcm;
1da177e4
LT
1491 int err;
1492
1493 chip->playback_devno = 0;
1494 chip->capture_devno = 1;
1495 chip->num_devs = 2;
1496 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
1497
1498 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1499 if (err < 0)
1500 return err;
1501 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
1502 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
1503 pcm->private_data = chip;
1504 strcpy(pcm->name, chip->card->shortname);
1505 chip->pcms[0] = pcm;
4f550df5
KW
1506 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
1507 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
1da177e4
LT
1508
1509 if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
e437e3d7
TI
1510 snd_dma_pci_data(chip->pci),
1511 64*1024, 128*1024)) < 0)
1da177e4
LT
1512 return err;
1513
1514 return 0;
1515}
1516
1517
1518/*
1519 * Mixer part
1520 */
1521
e437e3d7
TI
1522static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
1523 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1524{
1525 /* formerly they were "Line" and "Mic", but it looks like that they
1526 * have nothing to do with the actual physical connections...
1527 */
1528 static char *texts[2] = {
1529 "Input1", "Input2"
1530 };
1531 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1532 uinfo->count = 1;
1533 uinfo->value.enumerated.items = 2;
1534 if (uinfo->value.enumerated.item >= 2)
1535 uinfo->value.enumerated.item = 1;
1536 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1537 return 0;
1538}
1539
e437e3d7
TI
1540static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
1541 struct snd_ctl_elem_value *ucontrol)
1da177e4 1542{
e437e3d7 1543 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1544 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1545 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
1546 return 0;
1547}
1548
e437e3d7
TI
1549static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
1550 struct snd_ctl_elem_value *ucontrol)
1da177e4 1551{
e437e3d7 1552 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1553 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1554 u8 val, oval;
1555
1556 spin_lock_irq(&chip->reg_lock);
1557 oval = inb(port);
1558 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
1559 if (ucontrol->value.enumerated.item[0])
1560 val |= VIA_REG_CAPTURE_CHANNEL_MIC;
1561 if (val != oval)
1562 outb(val, port);
1563 spin_unlock_irq(&chip->reg_lock);
1564 return val != oval;
1565}
1566
e437e3d7 1567static struct snd_kcontrol_new snd_via8233_capture_source __devinitdata = {
1da177e4
LT
1568 .name = "Input Source Select",
1569 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1570 .info = snd_via8233_capture_source_info,
1571 .get = snd_via8233_capture_source_get,
1572 .put = snd_via8233_capture_source_put,
1573};
1574
e437e3d7
TI
1575static int snd_via8233_dxs3_spdif_info(struct snd_kcontrol *kcontrol,
1576 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1577{
1578 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1579 uinfo->count = 1;
1580 uinfo->value.integer.min = 0;
1581 uinfo->value.integer.max = 1;
1582 return 0;
1583}
1584
e437e3d7
TI
1585static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
1586 struct snd_ctl_elem_value *ucontrol)
1da177e4 1587{
e437e3d7 1588 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1589 u8 val;
1590
1591 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1592 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
1593 return 0;
1594}
1595
e437e3d7
TI
1596static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
1597 struct snd_ctl_elem_value *ucontrol)
1da177e4 1598{
e437e3d7 1599 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1600 u8 val, oval;
1601
1602 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
1603 val = oval & ~VIA8233_SPDIF_DX3;
1604 if (ucontrol->value.integer.value[0])
1605 val |= VIA8233_SPDIF_DX3;
1606 /* save the spdif flag for rate filtering */
1607 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
1608 if (val != oval) {
1609 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1610 return 1;
1611 }
1612 return 0;
1613}
1614
e437e3d7 1615static struct snd_kcontrol_new snd_via8233_dxs3_spdif_control __devinitdata = {
10e8d78a 1616 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT
1617 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1618 .info = snd_via8233_dxs3_spdif_info,
1619 .get = snd_via8233_dxs3_spdif_get,
1620 .put = snd_via8233_dxs3_spdif_put,
1621};
1622
e437e3d7
TI
1623static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
1624 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1625{
1626 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1627 uinfo->count = 2;
1628 uinfo->value.integer.min = 0;
1629 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
1630 return 0;
1631}
1632
e437e3d7
TI
1633static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
1634 struct snd_ctl_elem_value *ucontrol)
1da177e4 1635{
e437e3d7 1636 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM
1637 unsigned int idx = snd_ctl_get_ioff(kcontrol, &ucontrol->id);
1638
1639 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
1640 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
1641 return 0;
1642}
1643
e437e3d7
TI
1644static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
1645 struct snd_ctl_elem_value *ucontrol)
00f226d4 1646{
e437e3d7 1647 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM
1648 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
1649 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
1da177e4
LT
1650 return 0;
1651}
1652
e437e3d7
TI
1653static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
1654 struct snd_ctl_elem_value *ucontrol)
00f226d4 1655{
e437e3d7 1656 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM
1657 unsigned int idx = snd_ctl_get_ioff(kcontrol, &ucontrol->id);
1658 unsigned long port = chip->port + 0x10 * idx;
1659 unsigned char val;
1660 int i, change = 0;
1661
1662 for (i = 0; i < 2; i++) {
1663 val = ucontrol->value.integer.value[i];
1664 if (val > VIA_DXS_MAX_VOLUME)
1665 val = VIA_DXS_MAX_VOLUME;
1666 val = VIA_DXS_MAX_VOLUME - val;
1667 change |= val != chip->playback_volume[idx][i];
1668 if (change) {
1669 chip->playback_volume[idx][i] = val;
1670 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1671 }
1672 }
1673 return change;
1674}
1675
e437e3d7
TI
1676static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
1677 struct snd_ctl_elem_value *ucontrol)
1da177e4 1678{
e437e3d7 1679 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1680 unsigned int idx;
1681 unsigned char val;
1682 int i, change = 0;
1683
1684 for (i = 0; i < 2; i++) {
1685 val = ucontrol->value.integer.value[i];
1686 if (val > VIA_DXS_MAX_VOLUME)
1687 val = VIA_DXS_MAX_VOLUME;
1688 val = VIA_DXS_MAX_VOLUME - val;
00f226d4 1689 if (val != chip->playback_volume_c[i]) {
1da177e4 1690 change = 1;
00f226d4 1691 chip->playback_volume_c[i] = val;
1da177e4
LT
1692 for (idx = 0; idx < 4; idx++) {
1693 unsigned long port = chip->port + 0x10 * idx;
00f226d4 1694 chip->playback_volume[idx][i] = val;
1da177e4
LT
1695 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1696 }
1697 }
1698 }
1699 return change;
1700}
1701
7058c042
TI
1702static DECLARE_TLV_DB_SCALE(db_scale_dxs, -9450, 150, 1);
1703
e437e3d7 1704static struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control __devinitdata = {
1da177e4
LT
1705 .name = "PCM Playback Volume",
1706 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI
1707 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1708 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1709 .info = snd_via8233_dxs_volume_info,
00f226d4
HM
1710 .get = snd_via8233_pcmdxs_volume_get,
1711 .put = snd_via8233_pcmdxs_volume_put,
7058c042 1712 .tlv = { .p = db_scale_dxs }
00f226d4
HM
1713};
1714
e437e3d7 1715static struct snd_kcontrol_new snd_via8233_dxs_volume_control __devinitdata = {
00f226d4
HM
1716 .name = "VIA DXS Playback Volume",
1717 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI
1718 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1719 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
00f226d4
HM
1720 .count = 4,
1721 .info = snd_via8233_dxs_volume_info,
1da177e4
LT
1722 .get = snd_via8233_dxs_volume_get,
1723 .put = snd_via8233_dxs_volume_put,
7058c042 1724 .tlv = { .p = db_scale_dxs }
1da177e4
LT
1725};
1726
1727/*
1728 */
1729
e437e3d7 1730static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1731{
e437e3d7 1732 struct via82xx *chip = bus->private_data;
1da177e4
LT
1733 chip->ac97_bus = NULL;
1734}
1735
e437e3d7 1736static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1737{
e437e3d7 1738 struct via82xx *chip = ac97->private_data;
1da177e4
LT
1739 chip->ac97 = NULL;
1740}
1741
1742static struct ac97_quirk ac97_quirks[] = {
1743 {
69ad07cf
JK
1744 .subvendor = 0x1106,
1745 .subdevice = 0x4161,
1da177e4
LT
1746 .codec_id = 0x56494161, /* VT1612A */
1747 .name = "Soltek SL-75DRV5",
1748 .type = AC97_TUNE_NONE
1749 },
1750 { /* FIXME: which codec? */
69ad07cf
JK
1751 .subvendor = 0x1106,
1752 .subdevice = 0x4161,
1da177e4
LT
1753 .name = "ASRock K7VT2",
1754 .type = AC97_TUNE_HP_ONLY
1755 },
1756 {
69ad07cf
JK
1757 .subvendor = 0x1019,
1758 .subdevice = 0x0a81,
1da177e4
LT
1759 .name = "ECS K7VTA3",
1760 .type = AC97_TUNE_HP_ONLY
1761 },
1762 {
69ad07cf
JK
1763 .subvendor = 0x1019,
1764 .subdevice = 0x0a85,
1da177e4
LT
1765 .name = "ECS L7VMM2",
1766 .type = AC97_TUNE_HP_ONLY
1767 },
1768 {
69ad07cf
JK
1769 .subvendor = 0x1849,
1770 .subdevice = 0x3059,
1da177e4
LT
1771 .name = "ASRock K7VM2",
1772 .type = AC97_TUNE_HP_ONLY /* VT1616 */
1773 },
1774 {
69ad07cf
JK
1775 .subvendor = 0x14cd,
1776 .subdevice = 0x7002,
1da177e4
LT
1777 .name = "Unknown",
1778 .type = AC97_TUNE_ALC_JACK
1779 },
1780 {
69ad07cf
JK
1781 .subvendor = 0x1071,
1782 .subdevice = 0x8590,
1da177e4
LT
1783 .name = "Mitac Mobo",
1784 .type = AC97_TUNE_ALC_JACK
1785 },
1786 {
69ad07cf
JK
1787 .subvendor = 0x161f,
1788 .subdevice = 0x202b,
1da177e4
LT
1789 .name = "Arima Notebook",
1790 .type = AC97_TUNE_HP_ONLY,
1791 },
dac8dddd
TI
1792 {
1793 .subvendor = 0x161f,
1794 .subdevice = 0x2032,
1795 .name = "Targa Traveller 811",
1796 .type = AC97_TUNE_HP_ONLY,
1797 },
d4199f01
DC
1798 {
1799 .subvendor = 0x161f,
1800 .subdevice = 0x2032,
1801 .name = "m680x",
1802 .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
1803 },
1da177e4
LT
1804 { } /* terminator */
1805};
1806
e437e3d7 1807static int __devinit snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
1da177e4 1808{
e437e3d7 1809 struct snd_ac97_template ac97;
1da177e4 1810 int err;
e437e3d7 1811 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1812 .write = snd_via82xx_codec_write,
1813 .read = snd_via82xx_codec_read,
1814 .wait = snd_via82xx_codec_wait,
1815 };
1816
1817 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1818 return err;
1819 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
1820 chip->ac97_bus->clock = chip->ac97_clock;
1da177e4
LT
1821
1822 memset(&ac97, 0, sizeof(ac97));
1823 ac97.private_data = chip;
1824 ac97.private_free = snd_via82xx_mixer_free_ac97;
1825 ac97.pci = chip->pci;
2ba71978 1826 ac97.scaps = AC97_SCAP_SKIP_MODEM;
1da177e4
LT
1827 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1828 return err;
1829
1830 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
1831
1832 if (chip->chip_type != TYPE_VIA686) {
1833 /* use slot 10/11 */
1834 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1835 }
1836
1837 return 0;
1838}
1839
1840#ifdef SUPPORT_JOYSTICK
1841#define JOYSTICK_ADDR 0x200
e437e3d7 1842static int __devinit snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT
1843{
1844 struct gameport *gp;
1845 struct resource *r;
1846
b7fe4622 1847 if (!joystick)
1da177e4
LT
1848 return -ENODEV;
1849
1850 r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport");
1851 if (!r) {
e437e3d7
TI
1852 printk(KERN_WARNING "via82xx: cannot reserve joystick port 0x%#x\n",
1853 JOYSTICK_ADDR);
1da177e4
LT
1854 return -EBUSY;
1855 }
1856
1857 chip->gameport = gp = gameport_allocate_port();
1858 if (!gp) {
1859 printk(KERN_ERR "via82xx: cannot allocate memory for gameport\n");
b1d5776d 1860 release_and_free_resource(r);
1da177e4
LT
1861 return -ENOMEM;
1862 }
1863
1864 gameport_set_name(gp, "VIA686 Gameport");
1865 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1866 gameport_set_dev_parent(gp, &chip->pci->dev);
1867 gp->io = JOYSTICK_ADDR;
1868 gameport_set_port_data(gp, r);
1869
1870 /* Enable legacy joystick port */
1871 *legacy |= VIA_FUNC_ENABLE_GAME;
1872 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
1873
1874 gameport_register_port(chip->gameport);
1875
1876 return 0;
1877}
1878
e437e3d7 1879static void snd_via686_free_gameport(struct via82xx *chip)
1da177e4
LT
1880{
1881 if (chip->gameport) {
1882 struct resource *r = gameport_get_port_data(chip->gameport);
1883
1884 gameport_unregister_port(chip->gameport);
1885 chip->gameport = NULL;
b1d5776d 1886 release_and_free_resource(r);
1da177e4
LT
1887 }
1888}
1889#else
e437e3d7 1890static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT
1891{
1892 return -ENOSYS;
1893}
e437e3d7 1894static inline void snd_via686_free_gameport(struct via82xx *chip) { }
1da177e4
LT
1895#endif
1896
1897
1898/*
1899 *
1900 */
1901
e437e3d7 1902static int __devinit snd_via8233_init_misc(struct via82xx *chip)
1da177e4
LT
1903{
1904 int i, err, caps;
1905 unsigned char val;
1906
1907 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
1908 for (i = 0; i < caps; i++) {
1909 snd_via8233_capture_source.index = i;
1910 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
1911 if (err < 0)
1912 return err;
1913 }
1914 if (ac97_can_spdif(chip->ac97)) {
1915 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
1916 if (err < 0)
1917 return err;
1918 }
1919 if (chip->chip_type != TYPE_VIA8233A) {
1920 /* when no h/w PCM volume control is found, use DXS volume control
1921 * as the PCM vol control
1922 */
e437e3d7 1923 struct snd_ctl_elem_id sid;
1da177e4
LT
1924 memset(&sid, 0, sizeof(sid));
1925 strcpy(sid.name, "PCM Playback Volume");
1926 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
1927 if (! snd_ctl_find_id(chip->card, &sid)) {
00f226d4
HM
1928 snd_printd(KERN_INFO "Using DXS as PCM Playback\n");
1929 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
1930 if (err < 0)
1931 return err;
1932 }
1933 else /* Using DXS when PCM emulation is enabled is really weird */
1934 {
1935 /* Standalone DXS controls */
1da177e4
LT
1936 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs_volume_control, chip));
1937 if (err < 0)
1938 return err;
1939 }
1940 }
1da177e4
LT
1941 /* select spdif data slot 10/11 */
1942 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1943 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
1944 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
1945 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1946
1947 return 0;
1948}
1949
e437e3d7 1950static int __devinit snd_via686_init_misc(struct via82xx *chip)
1da177e4
LT
1951{
1952 unsigned char legacy, legacy_cfg;
1953 int rev_h = 0;
1954
1955 legacy = chip->old_legacy;
1956 legacy_cfg = chip->old_legacy_cfg;
1957 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
1958 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
1959 if (chip->revision >= VIA_REV_686_H) {
1960 rev_h = 1;
b7fe4622
CL
1961 if (mpu_port >= 0x200) { /* force MIDI */
1962 mpu_port &= 0xfffc;
1963 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
1da177e4 1964#ifdef CONFIG_PM
b7fe4622 1965 chip->mpu_port_saved = mpu_port;
1da177e4
LT
1966#endif
1967 } else {
b7fe4622 1968 mpu_port = pci_resource_start(chip->pci, 2);
1da177e4
LT
1969 }
1970 } else {
b7fe4622 1971 switch (mpu_port) { /* force MIDI */
1da177e4
LT
1972 case 0x300:
1973 case 0x310:
1974 case 0x320:
1975 case 0x330:
1976 legacy_cfg &= ~(3 << 2);
b7fe4622 1977 legacy_cfg |= (mpu_port & 0x0030) >> 2;
1da177e4
LT
1978 break;
1979 default: /* no, use BIOS settings */
1980 if (legacy & VIA_FUNC_ENABLE_MIDI)
b7fe4622 1981 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
1da177e4
LT
1982 break;
1983 }
1984 }
b7fe4622
CL
1985 if (mpu_port >= 0x200 &&
1986 (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401"))
1987 != NULL) {
1da177e4
LT
1988 if (rev_h)
1989 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
1990 legacy |= VIA_FUNC_ENABLE_MIDI;
1991 } else {
1992 if (rev_h)
1993 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
1994 legacy &= ~VIA_FUNC_ENABLE_MIDI;
b7fe4622 1995 mpu_port = 0;
1da177e4
LT
1996 }
1997
1998 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
1999 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
2000 if (chip->mpu_res) {
2001 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
302e4c2f 2002 mpu_port, MPU401_INFO_INTEGRATED,
1da177e4 2003 chip->irq, 0, &chip->rmidi) < 0) {
b7fe4622
CL
2004 printk(KERN_WARNING "unable to initialize MPU-401"
2005 " at 0x%lx, skipping\n", mpu_port);
1da177e4
LT
2006 legacy &= ~VIA_FUNC_ENABLE_MIDI;
2007 } else {
2008 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
2009 }
2010 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2011 }
2012
b7fe4622 2013 snd_via686_create_gameport(chip, &legacy);
1da177e4
LT
2014
2015#ifdef CONFIG_PM
2016 chip->legacy_saved = legacy;
2017 chip->legacy_cfg_saved = legacy_cfg;
2018#endif
2019
2020 return 0;
2021}
2022
2023
2024/*
2025 * proc interface
2026 */
e437e3d7
TI
2027static void snd_via82xx_proc_read(struct snd_info_entry *entry,
2028 struct snd_info_buffer *buffer)
1da177e4 2029{
e437e3d7 2030 struct via82xx *chip = entry->private_data;
1da177e4
LT
2031 int i;
2032
2033 snd_iprintf(buffer, "%s\n\n", chip->card->longname);
2034 for (i = 0; i < 0xa0; i += 4) {
2035 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
2036 }
2037}
2038
e437e3d7 2039static void __devinit snd_via82xx_proc_init(struct via82xx *chip)
1da177e4 2040{
e437e3d7 2041 struct snd_info_entry *entry;
1da177e4
LT
2042
2043 if (! snd_card_proc_new(chip->card, "via82xx", &entry))
bf850204 2044 snd_info_set_text_ops(entry, chip, snd_via82xx_proc_read);
1da177e4
LT
2045}
2046
2047/*
2048 *
2049 */
2050
e437e3d7 2051static int snd_via82xx_chip_init(struct via82xx *chip)
1da177e4
LT
2052{
2053 unsigned int val;
ef21ca24 2054 unsigned long end_time;
1da177e4
LT
2055 unsigned char pval;
2056
2057#if 0 /* broken on K7M? */
2058 if (chip->chip_type == TYPE_VIA686)
2059 /* disable all legacy ports */
2060 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
2061#endif
2062 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2063 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
2064 /* deassert ACLink reset, force SYNC */
2065 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2066 VIA_ACLINK_CTRL_ENABLE |
2067 VIA_ACLINK_CTRL_RESET |
2068 VIA_ACLINK_CTRL_SYNC);
2069 udelay(100);
2070#if 1 /* FIXME: should we do full reset here for all chip models? */
2071 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
2072 udelay(100);
2073#else
2074 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
2075 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2076 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
2077 udelay(2);
2078#endif
2079 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2080 /* note - FM data out has trouble with non VRA codecs !! */
2081 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2082 udelay(100);
2083 }
2084
2085 /* Make sure VRA is enabled, in case we didn't do a
2086 * complete codec reset, above */
2087 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
2088 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
2089 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2090 /* note - FM data out has trouble with non VRA codecs !! */
2091 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2092 udelay(100);
2093 }
2094
2095 /* wait until codec ready */
ef21ca24 2096 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT
2097 do {
2098 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2099 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
2100 break;
8433a509 2101 schedule_timeout_uninterruptible(1);
ef21ca24 2102 } while (time_before(jiffies, end_time));
1da177e4
LT
2103
2104 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
99b359ba 2105 snd_printk(KERN_ERR "AC'97 codec is not ready [0x%x]\n", val);
1da177e4
LT
2106
2107#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
2108 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2109 VIA_REG_AC97_SECONDARY_VALID |
2110 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
ef21ca24 2111 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT
2112 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2113 VIA_REG_AC97_SECONDARY_VALID |
2114 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
2115 do {
2116 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {
2117 chip->ac97_secondary = 1;
2118 goto __ac97_ok2;
2119 }
8433a509 2120 schedule_timeout_interruptible(1);
ef21ca24 2121 } while (time_before(jiffies, end_time));
1da177e4
LT
2122 /* This is ok, the most of motherboards have only one codec */
2123
2124 __ac97_ok2:
2125#endif
2126
2127 if (chip->chip_type == TYPE_VIA686) {
2128 /* route FM trap to IRQ, disable FM trap */
2129 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
2130 /* disable all GPI interrupts */
2131 outl(0, VIAREG(chip, GPI_INTR));
2132 }
2133
2134 if (chip->chip_type != TYPE_VIA686) {
2135 /* Workaround for Award BIOS bug:
2136 * DXS channels don't work properly with VRA if MC97 is disabled.
2137 */
2138 struct pci_dev *pci;
0dd119f7 2139 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
1da177e4
LT
2140 if (pci) {
2141 unsigned char data;
2142 pci_read_config_byte(pci, 0x44, &data);
2143 pci_write_config_byte(pci, 0x44, data | 0x40);
0dd119f7 2144 pci_dev_put(pci);
1da177e4
LT
2145 }
2146 }
2147
2148 if (chip->chip_type != TYPE_VIA8233A) {
2149 int i, idx;
2150 for (idx = 0; idx < 4; idx++) {
2151 unsigned long port = chip->port + 0x10 * idx;
00f226d4
HM
2152 for (i = 0; i < 2; i++) {
2153 chip->playback_volume[idx][i]=chip->playback_volume_c[i];
e437e3d7
TI
2154 outb(chip->playback_volume_c[i],
2155 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
00f226d4 2156 }
1da177e4
LT
2157 }
2158 }
2159
2160 return 0;
2161}
2162
2163#ifdef CONFIG_PM
2164/*
2165 * power management
2166 */
57feb835 2167static int snd_via82xx_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 2168{
57feb835
TI
2169 struct snd_card *card = pci_get_drvdata(pci);
2170 struct via82xx *chip = card->private_data;
1da177e4
LT
2171 int i;
2172
57feb835 2173 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4 2174 for (i = 0; i < 2; i++)
57feb835 2175 snd_pcm_suspend_all(chip->pcms[i]);
1da177e4
LT
2176 for (i = 0; i < chip->num_devs; i++)
2177 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2178 synchronize_irq(chip->irq);
2179 snd_ac97_suspend(chip->ac97);
2180
2181 /* save misc values */
2182 if (chip->chip_type != TYPE_VIA686) {
2183 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
2184 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
2185 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2186 }
2187
57feb835
TI
2188 pci_set_power_state(pci, PCI_D3hot);
2189 pci_disable_device(pci);
2190 pci_save_state(pci);
1da177e4
LT
2191 return 0;
2192}
2193
57feb835 2194static int snd_via82xx_resume(struct pci_dev *pci)
1da177e4 2195{
57feb835
TI
2196 struct snd_card *card = pci_get_drvdata(pci);
2197 struct via82xx *chip = card->private_data;
1da177e4
LT
2198 int i;
2199
57feb835
TI
2200 pci_restore_state(pci);
2201 pci_enable_device(pci);
2202 pci_set_power_state(pci, PCI_D0);
1da177e4
LT
2203
2204 snd_via82xx_chip_init(chip);
2205
2206 if (chip->chip_type == TYPE_VIA686) {
2207 if (chip->mpu_port_saved)
2208 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
2209 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
2210 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
2211 } else {
2212 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
2213 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
2214 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2215 }
2216
2217 snd_ac97_resume(chip->ac97);
2218
2219 for (i = 0; i < chip->num_devs; i++)
2220 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2221
57feb835 2222 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT
2223 return 0;
2224}
2225#endif /* CONFIG_PM */
2226
e437e3d7 2227static int snd_via82xx_free(struct via82xx *chip)
1da177e4
LT
2228{
2229 unsigned int i;
2230
2231 if (chip->irq < 0)
2232 goto __end_hw;
2233 /* disable interrupts */
2234 for (i = 0; i < chip->num_devs; i++)
2235 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2236 synchronize_irq(chip->irq);
2237 __end_hw:
2238 if (chip->irq >= 0)
e437e3d7 2239 free_irq(chip->irq, chip);
b1d5776d 2240 release_and_free_resource(chip->mpu_res);
1da177e4
LT
2241 pci_release_regions(chip->pci);
2242
2243 if (chip->chip_type == TYPE_VIA686) {
2244 snd_via686_free_gameport(chip);
2245 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
2246 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
2247 }
2248 pci_disable_device(chip->pci);
2249 kfree(chip);
2250 return 0;
2251}
2252
e437e3d7 2253static int snd_via82xx_dev_free(struct snd_device *device)
1da177e4 2254{
e437e3d7 2255 struct via82xx *chip = device->device_data;
1da177e4
LT
2256 return snd_via82xx_free(chip);
2257}
2258
e437e3d7 2259static int __devinit snd_via82xx_create(struct snd_card *card,
1da177e4
LT
2260 struct pci_dev *pci,
2261 int chip_type,
2262 int revision,
2263 unsigned int ac97_clock,
e437e3d7 2264 struct via82xx ** r_via)
1da177e4 2265{
e437e3d7 2266 struct via82xx *chip;
1da177e4 2267 int err;
e437e3d7 2268 static struct snd_device_ops ops = {
1da177e4
LT
2269 .dev_free = snd_via82xx_dev_free,
2270 };
2271
2272 if ((err = pci_enable_device(pci)) < 0)
2273 return err;
2274
e560d8d8 2275 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
1da177e4
LT
2276 pci_disable_device(pci);
2277 return -ENOMEM;
2278 }
2279
2280 chip->chip_type = chip_type;
2281 chip->revision = revision;
2282
2283 spin_lock_init(&chip->reg_lock);
2284 spin_lock_init(&chip->rates[0].lock);
2285 spin_lock_init(&chip->rates[1].lock);
2286 chip->card = card;
2287 chip->pci = pci;
2288 chip->irq = -1;
2289
2290 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
2291 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
2292 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
2293 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
2294
2295 if ((err = pci_request_regions(pci, card->driver)) < 0) {
2296 kfree(chip);
2297 pci_disable_device(pci);
2298 return err;
2299 }
2300 chip->port = pci_resource_start(pci, 0);
4f550df5
KW
2301 if (request_irq(pci->irq,
2302 chip_type == TYPE_VIA8233 ?
2303 snd_via8233_interrupt : snd_via686_interrupt,
65ca68b3 2304 IRQF_DISABLED|IRQF_SHARED,
e437e3d7 2305 card->driver, chip)) {
99b359ba 2306 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT
2307 snd_via82xx_free(chip);
2308 return -EBUSY;
2309 }
2310 chip->irq = pci->irq;
2311 if (ac97_clock >= 8000 && ac97_clock <= 48000)
2312 chip->ac97_clock = ac97_clock;
2313 synchronize_irq(chip->irq);
2314
2315 if ((err = snd_via82xx_chip_init(chip)) < 0) {
2316 snd_via82xx_free(chip);
2317 return err;
2318 }
2319
2320 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2321 snd_via82xx_free(chip);
2322 return err;
2323 }
2324
2325 /* The 8233 ac97 controller does not implement the master bit
2326 * in the pci command register. IMHO this is a violation of the PCI spec.
2327 * We call pci_set_master here because it does not hurt. */
2328 pci_set_master(pci);
2329
2330 snd_card_set_dev(card, &pci->dev);
2331
2332 *r_via = chip;
2333 return 0;
2334}
2335
2336struct via823x_info {
2337 int revision;
2338 char *name;
2339 int type;
2340};
2341static struct via823x_info via823x_cards[] __devinitdata = {
2342 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
2343 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
2344 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
2345 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
2346 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
2347 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
8263c65f 2348 { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
1da177e4
LT
2349};
2350
2351/*
2352 * auto detection of DXS channel supports.
2353 */
2354struct dxs_whitelist {
69ad07cf
JK
2355 unsigned short subvendor;
2356 unsigned short subdevice;
1da177e4
LT
2357 unsigned short mask;
2358 short action; /* new dxs_support value */
2359};
2360
a769577b 2361static int __devinit check_dxs_list(struct pci_dev *pci, int revision)
1da177e4
LT
2362{
2363 static struct dxs_whitelist whitelist[] = {
69ad07cf
JK
2364 { .subvendor = 0x1005, .subdevice = 0x4710, .action = VIA_DXS_ENABLE }, /* Avance Logic Mobo */
2365 { .subvendor = 0x1019, .subdevice = 0x0996, .action = VIA_DXS_48K },
2366 { .subvendor = 0x1019, .subdevice = 0x0a81, .action = VIA_DXS_NO_VRA }, /* ECS K7VTA3 v8.0 */
2367 { .subvendor = 0x1019, .subdevice = 0x0a85, .action = VIA_DXS_NO_VRA }, /* ECS L7VMM2 */
db99055f 2368 { .subvendor = 0x1019, .subdevice = 0xa101, .action = VIA_DXS_SRC },
a26e9d9d 2369 { .subvendor = 0x1019, .subdevice = 0xaa01, .action = VIA_DXS_SRC }, /* ECS K8T890-A */
69ad07cf 2370 { .subvendor = 0x1025, .subdevice = 0x0033, .action = VIA_DXS_NO_VRA }, /* Acer Inspire 1353LM */
f347c774 2371 { .subvendor = 0x1025, .subdevice = 0x0046, .action = VIA_DXS_SRC }, /* Acer Aspire 1524 WLMi */
69ad07cf
JK
2372 { .subvendor = 0x1043, .subdevice = 0x8095, .action = VIA_DXS_NO_VRA }, /* ASUS A7V8X (FIXME: possibly VIA_DXS_ENABLE?)*/
2373 { .subvendor = 0x1043, .subdevice = 0x80a1, .action = VIA_DXS_NO_VRA }, /* ASUS A7V8-X */
2374 { .subvendor = 0x1043, .subdevice = 0x80b0, .action = VIA_DXS_NO_VRA }, /* ASUS A7V600 & K8V*/
c66186e1 2375 { .subvendor = 0x1043, .subdevice = 0x810d, .action = VIA_DXS_SRC }, /* ASUS */
69ad07cf 2376 { .subvendor = 0x1043, .subdevice = 0x812a, .action = VIA_DXS_SRC }, /* ASUS A8V Deluxe */
6c1080c1 2377 { .subvendor = 0x1043, .subdevice = 0x8174, .action = VIA_DXS_SRC }, /* ASUS */
8263c65f 2378 { .subvendor = 0x1043, .subdevice = 0x81b9, .action = VIA_DXS_SRC }, /* ASUS A8V-MX */
69ad07cf 2379 { .subvendor = 0x1071, .subdevice = 0x8375, .action = VIA_DXS_NO_VRA }, /* Vobis/Yakumo/Mitac notebook */
96d07815 2380 { .subvendor = 0x1071, .subdevice = 0x8399, .action = VIA_DXS_NO_VRA }, /* Umax AB 595T (VIA K8N800A - VT8237) */
69ad07cf
JK
2381 { .subvendor = 0x10cf, .subdevice = 0x118e, .action = VIA_DXS_ENABLE }, /* FSC laptop */
2382 { .subvendor = 0x1106, .subdevice = 0x4161, .action = VIA_DXS_NO_VRA }, /* ASRock K7VT2 */
2383 { .subvendor = 0x1106, .subdevice = 0x4552, .action = VIA_DXS_NO_VRA }, /* QDI Kudoz 7X/600-6AL */
2384 { .subvendor = 0x1106, .subdevice = 0xaa01, .action = VIA_DXS_NO_VRA }, /* EPIA MII */
2385 { .subvendor = 0x1106, .subdevice = 0xc001, .action = VIA_DXS_SRC }, /* Insight P4-ITX */
2386 { .subvendor = 0x1297, .subdevice = 0xa232, .action = VIA_DXS_ENABLE }, /* Shuttle ?? */
2387 { .subvendor = 0x1297, .subdevice = 0xc160, .action = VIA_DXS_ENABLE }, /* Shuttle SK41G */
2388 { .subvendor = 0x1458, .subdevice = 0xa002, .action = VIA_DXS_ENABLE }, /* Gigabyte GA-7VAXP */
2389 { .subvendor = 0x1462, .subdevice = 0x0080, .action = VIA_DXS_SRC }, /* MSI K8T Neo-FIS2R */
352dbfd0 2390 { .subvendor = 0x1462, .subdevice = 0x0430, .action = VIA_DXS_SRC }, /* MSI 7142 (K8MM-V) */
c1b8f5f0 2391 { .subvendor = 0x1462, .subdevice = 0x0470, .action = VIA_DXS_SRC }, /* MSI KT880 Delta-FSR */
69ad07cf
JK
2392 { .subvendor = 0x1462, .subdevice = 0x3800, .action = VIA_DXS_ENABLE }, /* MSI KT266 */
2393 { .subvendor = 0x1462, .subdevice = 0x5901, .action = VIA_DXS_NO_VRA }, /* MSI KT6 Delta-SR */
396f739e 2394 { .subvendor = 0x1462, .subdevice = 0x7023, .action = VIA_DXS_SRC }, /* MSI K8T Neo2-FI */
69ad07cf 2395 { .subvendor = 0x1462, .subdevice = 0x7120, .action = VIA_DXS_ENABLE }, /* MSI KT4V */
f347c774 2396 { .subvendor = 0x1462, .subdevice = 0x7142, .action = VIA_DXS_ENABLE }, /* MSI K8MM-V */
802c00f2 2397 { .subvendor = 0x1462, .subdevice = 0xb012, .action = VIA_DXS_SRC }, /* P4M800/VIA8237R */
69ad07cf
JK
2398 { .subvendor = 0x147b, .subdevice = 0x1401, .action = VIA_DXS_ENABLE }, /* ABIT KD7(-RAID) */
2399 { .subvendor = 0x147b, .subdevice = 0x1411, .action = VIA_DXS_ENABLE }, /* ABIT VA-20 */
2400 { .subvendor = 0x147b, .subdevice = 0x1413, .action = VIA_DXS_ENABLE }, /* ABIT KV8 Pro */
2401 { .subvendor = 0x147b, .subdevice = 0x1415, .action = VIA_DXS_NO_VRA }, /* Abit AV8 */
2402 { .subvendor = 0x14ff, .subdevice = 0x0403, .action = VIA_DXS_ENABLE }, /* Twinhead mobo */
69c3e5f8 2403 { .subvendor = 0x14ff, .subdevice = 0x0408, .action = VIA_DXS_SRC }, /* Twinhead laptop */
94651a5b 2404 { .subvendor = 0x1558, .subdevice = 0x4701, .action = VIA_DXS_SRC }, /* Clevo D470 */
69ad07cf
JK
2405 { .subvendor = 0x1584, .subdevice = 0x8120, .action = VIA_DXS_ENABLE }, /* Gericom/Targa/Vobis/Uniwill laptop */
2406 { .subvendor = 0x1584, .subdevice = 0x8123, .action = VIA_DXS_NO_VRA }, /* Uniwill (Targa Visionary XP-210) */
2407 { .subvendor = 0x161f, .subdevice = 0x202b, .action = VIA_DXS_NO_VRA }, /* Amira Note book */
2408 { .subvendor = 0x161f, .subdevice = 0x2032, .action = VIA_DXS_48K }, /* m680x machines */
2409 { .subvendor = 0x1631, .subdevice = 0xe004, .action = VIA_DXS_ENABLE }, /* Easy Note 3174, Packard Bell */
2410 { .subvendor = 0x1695, .subdevice = 0x3005, .action = VIA_DXS_ENABLE }, /* EPoX EP-8K9A */
c04d092b 2411 { .subvendor = 0x1695, .subdevice = 0x300c, .action = VIA_DXS_SRC }, /* EPoX EP-8KRAI */
cacd3347 2412 { .subvendor = 0x1695, .subdevice = 0x300e, .action = VIA_DXS_SRC }, /* EPoX 9HEAI */
d0bd41e2 2413 { .subvendor = 0x16f3, .subdevice = 0x6405, .action = VIA_DXS_SRC }, /* Jetway K8M8MS */
bd84b0cc 2414 { .subvendor = 0x1734, .subdevice = 0x1078, .action = VIA_DXS_SRC }, /* FSC Amilo L7300 */
51c2bbfc 2415 { .subvendor = 0x1734, .subdevice = 0x1093, .action = VIA_DXS_SRC }, /* FSC */
b7c6b034 2416 { .subvendor = 0x1734, .subdevice = 0x10ab, .action = VIA_DXS_SRC }, /* FSC */
69ad07cf 2417 { .subvendor = 0x1849, .subdevice = 0x3059, .action = VIA_DXS_NO_VRA }, /* ASRock K7VM2 */
42611c02 2418 { .subvendor = 0x1849, .subdevice = 0x9739, .action = VIA_DXS_SRC }, /* ASRock mobo(?) */
46a1736d 2419 { .subvendor = 0x1849, .subdevice = 0x9761, .action = VIA_DXS_SRC }, /* ASRock mobo(?) */
b3e28ce9 2420 { .subvendor = 0x1919, .subdevice = 0x200a, .action = VIA_DXS_NO_VRA }, /* Soltek SL-K8Tpro-939 */
2201987c 2421 { .subvendor = 0x4005, .subdevice = 0x4710, .action = VIA_DXS_SRC }, /* MSI K7T266 Pro2 (MS-6380 V2.0) BIOS 3.7 */
1da177e4
LT
2422 { } /* terminator */
2423 };
2424 struct dxs_whitelist *w;
2425 unsigned short subsystem_vendor;
2426 unsigned short subsystem_device;
2427
2428 pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
2429 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);
2430
69ad07cf
JK
2431 for (w = whitelist; w->subvendor; w++) {
2432 if (w->subvendor != subsystem_vendor)
1da177e4
LT
2433 continue;
2434 if (w->mask) {
69ad07cf 2435 if ((w->mask & subsystem_device) == w->subdevice)
1da177e4
LT
2436 return w->action;
2437 } else {
69ad07cf 2438 if (subsystem_device == w->subdevice)
1da177e4
LT
2439 return w->action;
2440 }
2441 }
2442
a769577b
TI
2443 /* for newer revision, default to DXS_SRC */
2444 if (revision >= VIA_REV_8235)
2445 return VIA_DXS_SRC;
2446
1da177e4
LT
2447 /*
2448 * not detected, try 48k rate only to be sure.
2449 */
2450 printk(KERN_INFO "via82xx: Assuming DXS channels with 48k fixed sample rate.\n");
ee3b4c60 2451 printk(KERN_INFO " Please try dxs_support=5 option\n");
1da177e4 2452 printk(KERN_INFO " and report if it works on your machine.\n");
ee3b4c60 2453 printk(KERN_INFO " For more details, read ALSA-Configuration.txt.\n");
1da177e4
LT
2454 return VIA_DXS_48K;
2455};
2456
2457static int __devinit snd_via82xx_probe(struct pci_dev *pci,
2458 const struct pci_device_id *pci_id)
2459{
e437e3d7
TI
2460 struct snd_card *card;
2461 struct via82xx *chip;
1da177e4
LT
2462 unsigned char revision;
2463 int chip_type = 0, card_type;
2464 unsigned int i;
2465 int err;
2466
b7fe4622 2467 card = snd_card_new(index, id, THIS_MODULE, 0);
1da177e4
LT
2468 if (card == NULL)
2469 return -ENOMEM;
2470
2471 card_type = pci_id->driver_data;
2472 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
2473 switch (card_type) {
2474 case TYPE_CARD_VIA686:
2475 strcpy(card->driver, "VIA686A");
2476 sprintf(card->shortname, "VIA 82C686A/B rev%x", revision);
2477 chip_type = TYPE_VIA686;
2478 break;
2479 case TYPE_CARD_VIA8233:
2480 chip_type = TYPE_VIA8233;
2481 sprintf(card->shortname, "VIA 823x rev%x", revision);
2482 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
2483 if (revision == via823x_cards[i].revision) {
2484 chip_type = via823x_cards[i].type;
2485 strcpy(card->shortname, via823x_cards[i].name);
2486 break;
2487 }
2488 }
2489 if (chip_type != TYPE_VIA8233A) {
b7fe4622 2490 if (dxs_support == VIA_DXS_AUTO)
a769577b 2491 dxs_support = check_dxs_list(pci, revision);
1da177e4
LT
2492 /* force to use VIA8233 or 8233A model according to
2493 * dxs_support module option
2494 */
b7fe4622 2495 if (dxs_support == VIA_DXS_DISABLE)
1da177e4
LT
2496 chip_type = TYPE_VIA8233A;
2497 else
2498 chip_type = TYPE_VIA8233;
2499 }
2500 if (chip_type == TYPE_VIA8233A)
2501 strcpy(card->driver, "VIA8233A");
2502 else if (revision >= VIA_REV_8237)
2503 strcpy(card->driver, "VIA8237"); /* no slog assignment */
2504 else
2505 strcpy(card->driver, "VIA8233");
2506 break;
2507 default:
2508 snd_printk(KERN_ERR "invalid card type %d\n", card_type);
2509 err = -EINVAL;
2510 goto __error;
2511 }
2512
b7fe4622
CL
2513 if ((err = snd_via82xx_create(card, pci, chip_type, revision,
2514 ac97_clock, &chip)) < 0)
1da177e4 2515 goto __error;
57feb835 2516 card->private_data = chip;
b7fe4622 2517 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0)
1da177e4
LT
2518 goto __error;
2519
2520 if (chip_type == TYPE_VIA686) {
2521 if ((err = snd_via686_pcm_new(chip)) < 0 ||
b7fe4622 2522 (err = snd_via686_init_misc(chip)) < 0)
1da177e4
LT
2523 goto __error;
2524 } else {
2525 if (chip_type == TYPE_VIA8233A) {
2526 if ((err = snd_via8233a_pcm_new(chip)) < 0)
2527 goto __error;
2528 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
2529 } else {
2530 if ((err = snd_via8233_pcm_new(chip)) < 0)
2531 goto __error;
b7fe4622 2532 if (dxs_support == VIA_DXS_48K)
1da177e4 2533 chip->dxs_fixed = 1;
b7fe4622 2534 else if (dxs_support == VIA_DXS_NO_VRA)
1da177e4 2535 chip->no_vra = 1;
b7fe4622 2536 else if (dxs_support == VIA_DXS_SRC) {
2d7eb7cb
SV
2537 chip->no_vra = 1;
2538 chip->dxs_src = 1;
2539 }
1da177e4 2540 }
b7fe4622 2541 if ((err = snd_via8233_init_misc(chip)) < 0)
1da177e4
LT
2542 goto __error;
2543 }
2544
1da177e4
LT
2545 /* disable interrupts */
2546 for (i = 0; i < chip->num_devs; i++)
2547 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2548
2549 snprintf(card->longname, sizeof(card->longname),
2550 "%s with %s at %#lx, irq %d", card->shortname,
2551 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
2552
2553 snd_via82xx_proc_init(chip);
2554
2555 if ((err = snd_card_register(card)) < 0) {
2556 snd_card_free(card);
2557 return err;
2558 }
2559 pci_set_drvdata(pci, card);
1da177e4
LT
2560 return 0;
2561
2562 __error:
2563 snd_card_free(card);
2564 return err;
2565}
2566
2567static void __devexit snd_via82xx_remove(struct pci_dev *pci)
2568{
2569 snd_card_free(pci_get_drvdata(pci));
2570 pci_set_drvdata(pci, NULL);
2571}
2572
2573static struct pci_driver driver = {
2574 .name = "VIA 82xx Audio",
2575 .id_table = snd_via82xx_ids,
2576 .probe = snd_via82xx_probe,
2577 .remove = __devexit_p(snd_via82xx_remove),
57feb835
TI
2578#ifdef CONFIG_PM
2579 .suspend = snd_via82xx_suspend,
2580 .resume = snd_via82xx_resume,
2581#endif
1da177e4
LT
2582};
2583
2584static int __init alsa_card_via82xx_init(void)
2585{
01d25d46 2586 return pci_register_driver(&driver);
1da177e4
LT
2587}
2588
2589static void __exit alsa_card_via82xx_exit(void)
2590{
2591 pci_unregister_driver(&driver);
2592}
2593
2594module_init(alsa_card_via82xx_init)
2595module_exit(alsa_card_via82xx_exit)