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[net-next-2.6.git] / sound / pci / via82xx.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for VIA VT82xx (South Bridge)
3 *
4 * VT82C686A/B/C, VT8233A/C, VT8235
5 *
c1017a4c 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 7 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
8 * 2002 Takashi Iwai <tiwai@suse.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26/*
27 * Changes:
28 *
29 * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
30 * - use the DSX channels for the first pcm playback.
31 * (on VIA8233, 8233C and 8235 only)
32 * this will allow you play simultaneously up to 4 streams.
33 * multi-channel playback is assigned to the second device
34 * on these chips.
35 * - support the secondary capture (on VIA8233/C,8235)
36 * - SPDIF support
37 * the DSX3 channel can be used for SPDIF output.
38 * on VIA8233A, this channel is assigned to the second pcm
39 * playback.
40 * the card config of alsa-lib will assign the correct
41 * device for applications.
42 * - clean up the code, separate low-level initialization
43 * routines for each chipset.
4f550df5
KW		 44 *
45 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
46 * - Optimize position calculation for the 823x chips.
1da177e4
LT		 47 */
48
1da177e4
LT		 49#include <asm/io.h>
50#include <linux/delay.h>
51#include <linux/interrupt.h>
52#include <linux/init.h>
53#include <linux/pci.h>
54#include <linux/slab.h>
55#include <linux/gameport.h>
56#include <linux/moduleparam.h>
57#include <sound/core.h>
58#include <sound/pcm.h>
59#include <sound/pcm_params.h>
60#include <sound/info.h>
7058c042 61#include <sound/tlv.h>
1da177e4
LT		 62#include <sound/ac97_codec.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
65
66#if 0
67#define POINTER_DEBUG
68#endif
69
c1017a4c 70MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 71MODULE_DESCRIPTION("VIA VT82xx audio");
72MODULE_LICENSE("GPL");
73MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}");
74
75#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
76#define SUPPORT_JOYSTICK 1
77#endif
78
b7fe4622
CL		 79static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
80static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
81static long mpu_port;
1da177e4 82#ifdef SUPPORT_JOYSTICK
b7fe4622 83static int joystick;
1da177e4 84#endif
b7fe4622
CL		 85static int ac97_clock = 48000;
86static char *ac97_quirk;
87static int dxs_support;
395c61d1 88static int dxs_init_volume = 31;
115551d9 89static int nodelay;
1da177e4 90
b7fe4622 91module_param(index, int, 0444);
1da177e4 92MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
b7fe4622 93module_param(id, charp, 0444);
1da177e4 94MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
b7fe4622 95module_param(mpu_port, long, 0444);
1da177e4
LT		 96MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
97#ifdef SUPPORT_JOYSTICK
b7fe4622 98module_param(joystick, bool, 0444);
1da177e4
LT		 99MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
100#endif
b7fe4622 101module_param(ac97_clock, int, 0444);
1da177e4 102MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 103module_param(ac97_quirk, charp, 0444);
1da177e4 104MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 105module_param(dxs_support, int, 0444);
2d7eb7cb 106MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
395c61d1
CL		 107module_param(dxs_init_volume, int, 0644);
108MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
115551d9
SA		 109module_param(nodelay, int, 0444);
110MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
1da177e4 111
2b3e584b
TI		 112/* just for backward compatibility */
113static int enable;
698444f3 114module_param(enable, bool, 0444);
2b3e584b 115
1da177e4 116
1da177e4
LT		 117/* revision numbers for via686 */
118#define VIA_REV_686_A 0x10
119#define VIA_REV_686_B 0x11
120#define VIA_REV_686_C 0x12
121#define VIA_REV_686_D 0x13
122#define VIA_REV_686_E 0x14
123#define VIA_REV_686_H 0x20
124
125/* revision numbers for via8233 */
126#define VIA_REV_PRE_8233 0x10 /* not in market */
127#define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
128#define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
129#define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
130#define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
131#define VIA_REV_8237 0x60
8263c65f 132#define VIA_REV_8251 0x70
1da177e4
LT		 133
134/*
135 * Direct registers
136 */
137
138#define VIAREG(via, x) ((via)->port + VIA_REG_##x)
139#define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
140
141/* common offsets */
142#define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
143#define VIA_REG_STAT_ACTIVE 0x80 /* RO */
4f550df5 144#define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
1da177e4
LT		 145#define VIA_REG_STAT_PAUSED 0x40 /* RO */
146#define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
147#define VIA_REG_STAT_STOPPED 0x04 /* RWC */
148#define VIA_REG_STAT_EOL 0x02 /* RWC */
149#define VIA_REG_STAT_FLAG 0x01 /* RWC */
150#define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
151#define VIA_REG_CTRL_START 0x80 /* WO */
152#define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
153#define VIA_REG_CTRL_AUTOSTART 0x20
154#define VIA_REG_CTRL_PAUSE 0x08 /* RW */
155#define VIA_REG_CTRL_INT_STOP 0x04
156#define VIA_REG_CTRL_INT_EOL 0x02
157#define VIA_REG_CTRL_INT_FLAG 0x01
158#define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
159#define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
160#define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
161#define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
162#define VIA_REG_TYPE_16BIT 0x20 /* RW */
163#define VIA_REG_TYPE_STEREO 0x10 /* RW */
164#define VIA_REG_TYPE_INT_LLINE 0x00
165#define VIA_REG_TYPE_INT_LSAMPLE 0x04
166#define VIA_REG_TYPE_INT_LESSONE 0x08
167#define VIA_REG_TYPE_INT_MASK 0x0c
168#define VIA_REG_TYPE_INT_EOL 0x02
169#define VIA_REG_TYPE_INT_FLAG 0x01
170#define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
171#define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
172#define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
173#define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
174#define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
175#define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
176#define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
177
178#define DEFINE_VIA_REGSET(name,val) \
179enum {\
180 VIA_REG_##name##_STATUS = (val),\
181 VIA_REG_##name##_CONTROL = (val) + 0x01,\
182 VIA_REG_##name##_TYPE = (val) + 0x02,\
183 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
184 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
185 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
186 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
187}
188
189/* playback block */
190DEFINE_VIA_REGSET(PLAYBACK, 0x00);
191DEFINE_VIA_REGSET(CAPTURE, 0x10);
192DEFINE_VIA_REGSET(FM, 0x20);
193
194/* AC'97 */
195#define VIA_REG_AC97 0x80 /* dword */
196#define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
197#define VIA_REG_AC97_CODEC_ID_SHIFT 30
198#define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
199#define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
200#define VIA_REG_AC97_SECONDARY_VALID (1<<27)
201#define VIA_REG_AC97_PRIMARY_VALID (1<<25)
202#define VIA_REG_AC97_BUSY (1<<24)
203#define VIA_REG_AC97_READ (1<<23)
204#define VIA_REG_AC97_CMD_SHIFT 16
205#define VIA_REG_AC97_CMD_MASK 0x7e
206#define VIA_REG_AC97_DATA_SHIFT 0
207#define VIA_REG_AC97_DATA_MASK 0xffff
208
209#define VIA_REG_SGD_SHADOW 0x84 /* dword */
210/* via686 */
211#define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
212#define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
213#define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
214#define VIA_REG_SGD_STAT_PB_EOL (1<<4)
215#define VIA_REG_SGD_STAT_CP_EOL (1<<5)
216#define VIA_REG_SGD_STAT_FM_EOL (1<<6)
217#define VIA_REG_SGD_STAT_PB_STOP (1<<8)
218#define VIA_REG_SGD_STAT_CP_STOP (1<<9)
219#define VIA_REG_SGD_STAT_FM_STOP (1<<10)
220#define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
221#define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
222#define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
223/* via8233 */
224#define VIA8233_REG_SGD_STAT_FLAG (1<<0)
225#define VIA8233_REG_SGD_STAT_EOL (1<<1)
226#define VIA8233_REG_SGD_STAT_STOP (1<<2)
227#define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
228#define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
229#define VIA8233_REG_SGD_CHAN_SDX 0
230#define VIA8233_REG_SGD_CHAN_MULTI 4
231#define VIA8233_REG_SGD_CHAN_REC 6
232#define VIA8233_REG_SGD_CHAN_REC1 7
233
234#define VIA_REG_GPI_STATUS 0x88
235#define VIA_REG_GPI_INTR 0x8c
236
237/* multi-channel and capture registers for via8233 */
238DEFINE_VIA_REGSET(MULTPLAY, 0x40);
239DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
240
241/* via8233-specific registers */
242#define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
243#define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
244#define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
245#define VIA_REG_MULTPLAY_FMT_8BIT 0x00
246#define VIA_REG_MULTPLAY_FMT_16BIT 0x80
247#define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
248#define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
249#define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
250
251#define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
252
253#define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
254#define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
255#define VIA_REG_CAPTURE_CHANNEL_LINE 0
256#define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
257
258#define VIA_TBL_BIT_FLAG 0x40000000
259#define VIA_TBL_BIT_EOL 0x80000000
260
261/* pci space */
262#define VIA_ACLINK_STAT 0x40
263#define VIA_ACLINK_C11_READY 0x20
264#define VIA_ACLINK_C10_READY 0x10
265#define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
266#define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
267#define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
268#define VIA_ACLINK_CTRL 0x41
269#define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
270#define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
271#define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
272#define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
273#define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
274#define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
275#define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
276#define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
277#define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
278 VIA_ACLINK_CTRL_RESET|\
279 VIA_ACLINK_CTRL_PCM|\
280 VIA_ACLINK_CTRL_VRA)
281#define VIA_FUNC_ENABLE 0x42
282#define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
283#define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
284#define VIA_FUNC_RX2C_WRITE 0x20
285#define VIA_FUNC_SB_FIFO_EMPTY 0x10
286#define VIA_FUNC_ENABLE_GAME 0x08
287#define VIA_FUNC_ENABLE_FM 0x04
288#define VIA_FUNC_ENABLE_MIDI 0x02
289#define VIA_FUNC_ENABLE_SB 0x01
290#define VIA_PNP_CONTROL 0x43
291#define VIA_FM_NMI_CTRL 0x48
292#define VIA8233_VOLCHG_CTRL 0x48
293#define VIA8233_SPDIF_CTRL 0x49
294#define VIA8233_SPDIF_DX3 0x08
295#define VIA8233_SPDIF_SLOT_MASK 0x03
296#define VIA8233_SPDIF_SLOT_1011 0x00
297#define VIA8233_SPDIF_SLOT_34 0x01
298#define VIA8233_SPDIF_SLOT_78 0x02
299#define VIA8233_SPDIF_SLOT_69 0x03
300
301/*
302 */
303
304#define VIA_DXS_AUTO 0
305#define VIA_DXS_ENABLE 1
306#define VIA_DXS_DISABLE 2
307#define VIA_DXS_48K 3
308#define VIA_DXS_NO_VRA 4
2d7eb7cb 309#define VIA_DXS_SRC 5
1da177e4
LT		 310
311
1da177e4
LT		 312/*
313 * pcm stream
314 */
315
316struct snd_via_sg_table {
317 unsigned int offset;
318 unsigned int size;
319} ;
320
321#define VIA_TABLE_SIZE 255
5503600a 322#define VIA_MAX_BUFSIZE (1<<24)
1da177e4 323
e437e3d7 324struct viadev {
1da177e4
LT		 325 unsigned int reg_offset;
326 unsigned long port;
327 int direction; /* playback = 0, capture = 1 */
e437e3d7 328 struct snd_pcm_substream *substream;
1da177e4
LT		 329 int running;
330 unsigned int tbl_entries; /* # descriptors */
331 struct snd_dma_buffer table;
332 struct snd_via_sg_table *idx_table;
333 /* for recovery from the unexpected pointer */
334 unsigned int lastpos;
335 unsigned int fragsize;
336 unsigned int bufsize;
337 unsigned int bufsize2;
4f550df5
KW		 338 int hwptr_done; /* processed frame position in the buffer */
339 int in_interrupt;
340 int shadow_shift;
1da177e4
LT		 341};
342
343
344enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
345enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
346
347#define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
348
349struct via_rate_lock {
350 spinlock_t lock;
351 int rate;
352 int used;
353};
354
e437e3d7 355struct via82xx {
1da177e4
LT		 356 int irq;
357
358 unsigned long port;
359 struct resource *mpu_res;
360 int chip_type;
361 unsigned char revision;
362
363 unsigned char old_legacy;
364 unsigned char old_legacy_cfg;
365#ifdef CONFIG_PM
366 unsigned char legacy_saved;
367 unsigned char legacy_cfg_saved;
368 unsigned char spdif_ctrl_saved;
369 unsigned char capture_src_saved[2];
370 unsigned int mpu_port_saved;
371#endif
372
00f226d4
HM		 373 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
374 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
1da177e4
LT		 375
376 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
377
378 struct pci_dev *pci;
e437e3d7 379 struct snd_card *card;
1da177e4
LT		 380
381 unsigned int num_devs;
382 unsigned int playback_devno, multi_devno, capture_devno;
e437e3d7 383 struct viadev devs[VIA_MAX_DEVS];
1da177e4
LT		 384 struct via_rate_lock rates[2]; /* playback and capture */
385 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
386 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
2d7eb7cb 387 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
1da177e4
LT		 388 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
389
e437e3d7
TI		 390 struct snd_pcm *pcms[2];
391 struct snd_rawmidi *rmidi;
3d009413 392 struct snd_kcontrol *dxs_controls[4];
1da177e4 393
e437e3d7
TI		 394 struct snd_ac97_bus *ac97_bus;
395 struct snd_ac97 *ac97;
1da177e4
LT		 396 unsigned int ac97_clock;
397 unsigned int ac97_secondary; /* secondary AC'97 codec is present */
398
399 spinlock_t reg_lock;
e437e3d7 400 struct snd_info_entry *proc_entry;
1da177e4
LT		 401
402#ifdef SUPPORT_JOYSTICK
403 struct gameport *gameport;
404#endif
405};
406
cebe41d4 407static DEFINE_PCI_DEVICE_TABLE(snd_via82xx_ids) = {
4f550df5 408 /* 0x1106, 0x3058 */
28d27aae 409 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
4f550df5 410 /* 0x1106, 0x3059 */
28d27aae 411 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
1da177e4
LT		 412 { 0, }
413};
414
415MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
416
417/*
418 */
419
420/*
421 * allocate and initialize the descriptor buffers
422 * periods = number of periods
423 * fragsize = period size in bytes
424 */
e437e3d7 425static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 426 struct pci_dev *pci,
427 unsigned int periods, unsigned int fragsize)
428{
429 unsigned int i, idx, ofs, rest;
e437e3d7 430 struct via82xx *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 431
432 if (dev->table.area == NULL) {
433 /* the start of each lists must be aligned to 8 bytes,
434 * but the kernel pages are much bigger, so we don't care
435 */
436 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
437 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
438 &dev->table) < 0)
439 return -ENOMEM;
440 }
441 if (! dev->idx_table) {
442 dev->idx_table = kmalloc(sizeof(*dev->idx_table) * VIA_TABLE_SIZE, GFP_KERNEL);
443 if (! dev->idx_table)
444 return -ENOMEM;
445 }
446
447 /* fill the entries */
448 idx = 0;
449 ofs = 0;
450 for (i = 0; i < periods; i++) {
451 rest = fragsize;
452 /* fill descriptors for a period.
453 * a period can be split to several descriptors if it's
454 * over page boundary.
455 */
456 do {
457 unsigned int r;
458 unsigned int flag;
77a23f26 459 unsigned int addr;
1da177e4
LT		 460
461 if (idx >= VIA_TABLE_SIZE) {
462 snd_printk(KERN_ERR "via82xx: too much table size!\n");
463 return -EINVAL;
464 }
77a23f26
TI		 465 addr = snd_pcm_sgbuf_get_addr(substream, ofs);
466 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32(addr);
5503600a 467 r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
1da177e4
LT		 468 rest -= r;
469 if (! rest) {
470 if (i == periods - 1)
471 flag = VIA_TBL_BIT_EOL; /* buffer boundary */
472 else
473 flag = VIA_TBL_BIT_FLAG; /* period boundary */
474 } else
475 flag = 0; /* period continues to the next */
ee419653
TI		 476 /*
477 printk(KERN_DEBUG "via: tbl %d: at %d size %d "
478 "(rest %d)\n", idx, ofs, r, rest);
479 */
1da177e4
LT		 480 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
481 dev->idx_table[idx].offset = ofs;
482 dev->idx_table[idx].size = r;
483 ofs += r;
484 idx++;
485 } while (rest > 0);
486 }
487 dev->tbl_entries = idx;
488 dev->bufsize = periods * fragsize;
489 dev->bufsize2 = dev->bufsize / 2;
490 dev->fragsize = fragsize;
491 return 0;
492}
493
494
e437e3d7 495static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 496 struct pci_dev *pci)
497{
498 if (dev->table.area) {
499 snd_dma_free_pages(&dev->table);
500 dev->table.area = NULL;
501 }
4d572776
JJ		 502 kfree(dev->idx_table);
503 dev->idx_table = NULL;
1da177e4
LT		 504 return 0;
505}
506
507/*
508 * Basic I/O
509 */
510
e437e3d7 511static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
1da177e4
LT		 512{
513 return inl(VIAREG(chip, AC97));
514}
515
e437e3d7 516static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
1da177e4
LT		 517{
518 outl(val, VIAREG(chip, AC97));
519}
520
e437e3d7 521static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
1da177e4
LT		 522{
523 unsigned int timeout = 1000; /* 1ms */
524 unsigned int val;
525
526 while (timeout-- > 0) {
527 udelay(1);
528 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY))
529 return val & 0xffff;
530 }
e437e3d7
TI		 531 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n",
532 secondary, snd_via82xx_codec_xread(chip));
1da177e4
LT		 533 return -EIO;
534}
535
e437e3d7 536static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
1da177e4
LT		 537{
538 unsigned int timeout = 1000; /* 1ms */
539 unsigned int val, val1;
540 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
541 VIA_REG_AC97_SECONDARY_VALID;
542
543 while (timeout-- > 0) {
544 val = snd_via82xx_codec_xread(chip);
545 val1 = val & (VIA_REG_AC97_BUSY | stat);
546 if (val1 == stat)
547 return val & 0xffff;
548 udelay(1);
549 }
550 return -EIO;
551}
552
e437e3d7 553static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
1da177e4 554{
e437e3d7 555 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 556 int err;
557 err = snd_via82xx_codec_ready(chip, ac97->num);
558 /* here we need to wait fairly for long time.. */
115551d9
SA		 559 if (!nodelay)
560 msleep(500);
1da177e4
LT		 561}
562
e437e3d7 563static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 564 unsigned short reg,
565 unsigned short val)
566{
e437e3d7 567 struct via82xx *chip = ac97->private_data;
1da177e4 568 unsigned int xval;
4f550df5 569
1da177e4
LT		 570 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
571 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
572 xval |= reg << VIA_REG_AC97_CMD_SHIFT;
573 xval |= val << VIA_REG_AC97_DATA_SHIFT;
574 snd_via82xx_codec_xwrite(chip, xval);
575 snd_via82xx_codec_ready(chip, ac97->num);
576}
577
e437e3d7 578static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 579{
e437e3d7 580 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 581 unsigned int xval, val = 0xffff;
582 int again = 0;
583
584 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
585 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
586 xval |= VIA_REG_AC97_READ;
587 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
588 while (1) {
589 if (again++ > 3) {
e437e3d7
TI		 590 snd_printk(KERN_ERR "codec_read: codec %i is not valid [0x%x]\n",
591 ac97->num, snd_via82xx_codec_xread(chip));
1da177e4
LT		 592 return 0xffff;
593 }
594 snd_via82xx_codec_xwrite(chip, xval);
595 udelay (20);
596 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
597 udelay(25);
598 val = snd_via82xx_codec_xread(chip);
599 break;
600 }
601 }
602 return val & 0xffff;
603}
604
e437e3d7 605static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 606{
607 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
608 VIADEV_REG(viadev, OFFSET_CONTROL));
609 inb(VIADEV_REG(viadev, OFFSET_CONTROL));
610 udelay(50);
611 /* disable interrupts */
612 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
613 /* clear interrupts */
614 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
615 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
616 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
617 viadev->lastpos = 0;
4f550df5 618 viadev->hwptr_done = 0;
1da177e4
LT		 619}
620
621
622/*
623 * Interrupt handler
4f550df5 624 * Used for 686 and 8233A
1da177e4 625 */
7d12e780 626static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
1da177e4 627{
e437e3d7 628 struct via82xx *chip = dev_id;
1da177e4
LT		 629 unsigned int status;
630 unsigned int i;
631
632 status = inl(VIAREG(chip, SGD_SHADOW));
633 if (! (status & chip->intr_mask)) {
634 if (chip->rmidi)
635 /* check mpu401 interrupt */
7d12e780 636 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 637 return IRQ_NONE;
638 }
639
640 /* check status for each stream */
641 spin_lock(&chip->reg_lock);
642 for (i = 0; i < chip->num_devs; i++) {
e437e3d7 643 struct viadev *viadev = &chip->devs[i];
1da177e4 644 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
4f550df5 645 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
1da177e4
LT		 646 continue;
647 if (viadev->substream && viadev->running) {
4f550df5
KW		 648 /*
649 * Update hwptr_done based on 'period elapsed'
650 * interrupts. We'll use it, when the chip returns 0
651 * for OFFSET_CURR_COUNT.
652 */
653 if (c_status & VIA_REG_STAT_EOL)
654 viadev->hwptr_done = 0;
655 else
656 viadev->hwptr_done += viadev->fragsize;
657 viadev->in_interrupt = c_status;
1da177e4
LT		 658 spin_unlock(&chip->reg_lock);
659 snd_pcm_period_elapsed(viadev->substream);
660 spin_lock(&chip->reg_lock);
4f550df5 661 viadev->in_interrupt = 0;
1da177e4
LT		 662 }
663 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
664 }
665 spin_unlock(&chip->reg_lock);
666 return IRQ_HANDLED;
667}
668
4f550df5
KW		 669/*
670 * Interrupt handler
671 */
7d12e780 672static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
4f550df5 673{
e437e3d7 674 struct via82xx *chip = dev_id;
4f550df5
KW		 675 unsigned int status;
676 unsigned int i;
677 int irqreturn = 0;
678
679 /* check status for each stream */
680 spin_lock(&chip->reg_lock);
681 status = inl(VIAREG(chip, SGD_SHADOW));
682
683 for (i = 0; i < chip->num_devs; i++) {
e437e3d7
TI		 684 struct viadev *viadev = &chip->devs[i];
685 struct snd_pcm_substream *substream;
4f550df5
KW		 686 unsigned char c_status, shadow_status;
687
688 shadow_status = (status >> viadev->shadow_shift) &
689 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
690 VIA_REG_STAT_FLAG);
691 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
692 if (!c_status)
693 continue;
694
695 substream = viadev->substream;
696 if (substream && viadev->running) {
697 /*
698 * Update hwptr_done based on 'period elapsed'
699 * interrupts. We'll use it, when the chip returns 0
700 * for OFFSET_CURR_COUNT.
701 */
702 if (c_status & VIA_REG_STAT_EOL)
703 viadev->hwptr_done = 0;
704 else
705 viadev->hwptr_done += viadev->fragsize;
706 viadev->in_interrupt = c_status;
707 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
708 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
709 spin_unlock(&chip->reg_lock);
710
711 snd_pcm_period_elapsed(substream);
712
713 spin_lock(&chip->reg_lock);
714 viadev->in_interrupt = 0;
715 }
716 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
717 irqreturn = 1;
718 }
719 spin_unlock(&chip->reg_lock);
720 return IRQ_RETVAL(irqreturn);
721}
722
1da177e4
LT		 723/*
724 * PCM callbacks
725 */
726
727/*
728 * trigger callback
729 */
e437e3d7 730static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 731{
e437e3d7
TI		 732 struct via82xx *chip = snd_pcm_substream_chip(substream);
733 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 734 unsigned char val;
735
736 if (chip->chip_type != TYPE_VIA686)
737 val = VIA_REG_CTRL_INT;
738 else
739 val = 0;
740 switch (cmd) {
741 case SNDRV_PCM_TRIGGER_START:
41e4845c 742 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 743 val |= VIA_REG_CTRL_START;
744 viadev->running = 1;
745 break;
746 case SNDRV_PCM_TRIGGER_STOP:
41e4845c 747 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 748 val = VIA_REG_CTRL_TERMINATE;
749 viadev->running = 0;
750 break;
751 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
752 val |= VIA_REG_CTRL_PAUSE;
753 viadev->running = 0;
754 break;
755 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
756 viadev->running = 1;
757 break;
758 default:
759 return -EINVAL;
760 }
761 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
762 if (cmd == SNDRV_PCM_TRIGGER_STOP)
763 snd_via82xx_channel_reset(chip, viadev);
764 return 0;
765}
766
767
768/*
769 * pointer callbacks
770 */
771
772/*
773 * calculate the linear position at the given sg-buffer index and the rest count
774 */
775
776#define check_invalid_pos(viadev,pos) \
e437e3d7
TI		 777 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
778 viadev->lastpos < viadev->bufsize2))
1da177e4 779
e437e3d7
TI		 780static inline unsigned int calc_linear_pos(struct viadev *viadev, unsigned int idx,
781 unsigned int count)
1da177e4
LT		 782{
783 unsigned int size, base, res;
784
785 size = viadev->idx_table[idx].size;
786 base = viadev->idx_table[idx].offset;
787 res = base + size - count;
4f550df5
KW		 788 if (res >= viadev->bufsize)
789 res -= viadev->bufsize;
1da177e4
LT		 790
791 /* check the validity of the calculated position */
792 if (size < count) {
e437e3d7
TI		 793 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
794 (int)size, (int)count);
1da177e4
LT		 795 res = viadev->lastpos;
796 } else {
797 if (! count) {
798 /* Some mobos report count = 0 on the DMA boundary,
799 * i.e. count = size indeed.
800 * Let's check whether this step is above the expected size.
801 */
802 int delta = res - viadev->lastpos;
803 if (delta < 0)
804 delta += viadev->bufsize;
805 if ((unsigned int)delta > viadev->fragsize)
806 res = base;
807 }
808 if (check_invalid_pos(viadev, res)) {
809#ifdef POINTER_DEBUG
e437e3d7
TI		 810 printk(KERN_DEBUG "fail: idx = %i/%i, lastpos = 0x%x, "
811 "bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, "
812 "count = 0x%x\n", idx, viadev->tbl_entries,
813 viadev->lastpos, viadev->bufsize2,
814 viadev->idx_table[idx].offset,
815 viadev->idx_table[idx].size, count);
1da177e4
LT		 816#endif
817 /* count register returns full size when end of buffer is reached */
818 res = base + size;
819 if (check_invalid_pos(viadev, res)) {
e437e3d7
TI		 820 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (2), "
821 "using last valid pointer\n");
1da177e4
LT		 822 res = viadev->lastpos;
823 }
824 }
825 }
1da177e4
LT		 826 return res;
827}
828
829/*
830 * get the current pointer on via686
831 */
e437e3d7 832static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 833{
e437e3d7
TI		 834 struct via82xx *chip = snd_pcm_substream_chip(substream);
835 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 836 unsigned int idx, ptr, count, res;
837
da3cec35
TI		 838 if (snd_BUG_ON(!viadev->tbl_entries))
839 return 0;
1da177e4
LT		 840 if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
841 return 0;
842
843 spin_lock(&chip->reg_lock);
844 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
845 /* The via686a does not have the current index register,
846 * so we need to calculate the index from CURR_PTR.
847 */
848 ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
849 if (ptr <= (unsigned int)viadev->table.addr)
850 idx = 0;
851 else /* CURR_PTR holds the address + 8 */
852 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
853 res = calc_linear_pos(viadev, idx, count);
4f550df5 854 viadev->lastpos = res; /* remember the last position */
1da177e4
LT		 855 spin_unlock(&chip->reg_lock);
856
857 return bytes_to_frames(substream->runtime, res);
858}
859
860/*
861 * get the current pointer on via823x
862 */
e437e3d7 863static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 864{
e437e3d7
TI		 865 struct via82xx *chip = snd_pcm_substream_chip(substream);
866 struct viadev *viadev = substream->runtime->private_data;
1da177e4 867 unsigned int idx, count, res;
4f550df5 868 int status;
1da177e4 869
da3cec35
TI		 870 if (snd_BUG_ON(!viadev->tbl_entries))
871 return 0;
4f550df5 872
1da177e4 873 spin_lock(&chip->reg_lock);
4f550df5
KW		 874 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
875 status = viadev->in_interrupt;
876 if (!status)
877 status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
878
c6cc0e3b
BJ		 879 /* An apparent bug in the 8251 is worked around by sending a
880 * REG_CTRL_START. */
881 if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
882 snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
883
4f550df5 884 if (!(status & VIA_REG_STAT_ACTIVE)) {
c6cc0e3b
BJ		 885 res = 0;
886 goto unlock;
4f550df5
KW		 887 }
888 if (count & 0xffffff) {
889 idx = count >> 24;
890 if (idx >= viadev->tbl_entries) {
1da177e4 891#ifdef POINTER_DEBUG
e437e3d7
TI		 892 printk(KERN_DEBUG "fail: invalid idx = %i/%i\n", idx,
893 viadev->tbl_entries);
1da177e4 894#endif
4f550df5
KW		 895 res = viadev->lastpos;
896 } else {
897 count &= 0xffffff;
898 res = calc_linear_pos(viadev, idx, count);
899 }
1da177e4 900 } else {
4f550df5
KW		 901 res = viadev->hwptr_done;
902 if (!viadev->in_interrupt) {
903 if (status & VIA_REG_STAT_EOL) {
904 res = 0;
905 } else
906 if (status & VIA_REG_STAT_FLAG) {
907 res += viadev->fragsize;
908 }
909 }
910 }
911unlock:
912 viadev->lastpos = res;
1da177e4
LT		 913 spin_unlock(&chip->reg_lock);
914
915 return bytes_to_frames(substream->runtime, res);
916}
917
918
919/*
920 * hw_params callback:
921 * allocate the buffer and build up the buffer description table
922 */
e437e3d7
TI		 923static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
924 struct snd_pcm_hw_params *hw_params)
1da177e4 925{
e437e3d7
TI		 926 struct via82xx *chip = snd_pcm_substream_chip(substream);
927 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 928 int err;
929
930 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
931 if (err < 0)
932 return err;
933 err = build_via_table(viadev, substream, chip->pci,
934 params_periods(hw_params),
935 params_period_bytes(hw_params));
936 if (err < 0)
937 return err;
938
939 return 0;
940}
941
942/*
943 * hw_free callback:
944 * clean up the buffer description table and release the buffer
945 */
e437e3d7 946static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
1da177e4 947{
e437e3d7
TI		 948 struct via82xx *chip = snd_pcm_substream_chip(substream);
949 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 950
951 clean_via_table(viadev, substream, chip->pci);
952 snd_pcm_lib_free_pages(substream);
953 return 0;
954}
955
956
957/*
958 * set up the table pointer
959 */
e437e3d7 960static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 961{
962 snd_via82xx_codec_ready(chip, 0);
963 outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
964 udelay(20);
965 snd_via82xx_codec_ready(chip, 0);
966}
967
968/*
969 * prepare callback for playback and capture on via686
970 */
e437e3d7
TI		 971static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
972 struct snd_pcm_runtime *runtime)
1da177e4
LT		 973{
974 snd_via82xx_channel_reset(chip, viadev);
975 /* this must be set after channel_reset */
976 snd_via82xx_set_table_ptr(chip, viadev);
977 outb(VIA_REG_TYPE_AUTOSTART |
978 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
979 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
980 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
981 VIA_REG_TYPE_INT_EOL |
982 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
983}
984
e437e3d7 985static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 986{
e437e3d7
TI		 987 struct via82xx *chip = snd_pcm_substream_chip(substream);
988 struct viadev *viadev = substream->runtime->private_data;
989 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 990
991 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
992 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
993 via686_setup_format(chip, viadev, runtime);
994 return 0;
995}
996
e437e3d7 997static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 998{
e437e3d7
TI		 999 struct via82xx *chip = snd_pcm_substream_chip(substream);
1000 struct viadev *viadev = substream->runtime->private_data;
1001 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1002
1003 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1004 via686_setup_format(chip, viadev, runtime);
1005 return 0;
1006}
1007
1008/*
1009 * lock the current rate
1010 */
1011static int via_lock_rate(struct via_rate_lock *rec, int rate)
1012{
1013 int changed = 0;
1014
1015 spin_lock_irq(&rec->lock);
1016 if (rec->rate != rate) {
1017 if (rec->rate && rec->used > 1) /* already set */
1018 changed = -EINVAL;
1019 else {
1020 rec->rate = rate;
1021 changed = 1;
1022 }
1023 }
1024 spin_unlock_irq(&rec->lock);
1025 return changed;
1026}
1027
1028/*
1029 * prepare callback for DSX playback on via823x
1030 */
e437e3d7 1031static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 1032{
e437e3d7
TI		 1033 struct via82xx *chip = snd_pcm_substream_chip(substream);
1034 struct viadev *viadev = substream->runtime->private_data;
1035 struct snd_pcm_runtime *runtime = substream->runtime;
2d7eb7cb 1036 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
1da177e4
LT		 1037 int rate_changed;
1038 u32 rbits;
1039
2d7eb7cb 1040 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0)
1da177e4 1041 return rate_changed;
16d3f140 1042 if (rate_changed)
1da177e4
LT		 1043 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
1044 chip->no_vra ? 48000 : runtime->rate);
16d3f140
TI		 1045 if (chip->spdif_on && viadev->reg_offset == 0x30)
1046 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1047
1da177e4
LT		 1048 if (runtime->rate == 48000)
1049 rbits = 0xfffff;
1050 else
e437e3d7
TI		 1051 rbits = (0x100000 / 48000) * runtime->rate +
1052 ((0x100000 % 48000) * runtime->rate) / 48000;
da3cec35 1053 snd_BUG_ON(rbits & ~0xfffff);
1da177e4
LT		 1054 snd_via82xx_channel_reset(chip, viadev);
1055 snd_via82xx_set_table_ptr(chip, viadev);
e437e3d7
TI		 1056 outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
1057 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
1058 outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
1059 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
1da177e4
LT		 1060 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
1061 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
1062 rbits | /* rate */
1063 0xff000000, /* STOP index is never reached */
1064 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1065 udelay(20);
1066 snd_via82xx_codec_ready(chip, 0);
1067 return 0;
1068}
1069
1070/*
1071 * prepare callback for multi-channel playback on via823x
1072 */
e437e3d7 1073static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
1da177e4 1074{
e437e3d7
TI		 1075 struct via82xx *chip = snd_pcm_substream_chip(substream);
1076 struct viadev *viadev = substream->runtime->private_data;
1077 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1078 unsigned int slots;
1079 int fmt;
1080
1081 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
1082 return -EINVAL;
1083 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1084 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
1085 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
1086 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1087 snd_via82xx_channel_reset(chip, viadev);
1088 snd_via82xx_set_table_ptr(chip, viadev);
1089
e437e3d7
TI		 1090 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
1091 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
1da177e4
LT		 1092 fmt |= runtime->channels << 4;
1093 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
1094#if 0
1095 if (chip->revision == VIA_REV_8233A)
1096 slots = 0;
1097 else
1098#endif
1099 {
1100 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
1101 /* corresponding to FL, FR, RL, RR, C, LFE ?? */
1102 switch (runtime->channels) {
1103 case 1: slots = (1<<0) | (1<<4); break;
1104 case 2: slots = (1<<0) | (2<<4); break;
1105 case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
1106 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
1107 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
1108 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
1109 default: slots = 0; break;
1110 }
1111 }
1112 /* STOP index is never reached */
1113 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
1114 udelay(20);
1115 snd_via82xx_codec_ready(chip, 0);
1116 return 0;
1117}
1118
1119/*
1120 * prepare callback for capture on via823x
1121 */
e437e3d7 1122static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1123{
e437e3d7
TI		 1124 struct via82xx *chip = snd_pcm_substream_chip(substream);
1125 struct viadev *viadev = substream->runtime->private_data;
1126 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1127
1128 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
1129 return -EINVAL;
1130 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1131 snd_via82xx_channel_reset(chip, viadev);
1132 snd_via82xx_set_table_ptr(chip, viadev);
1133 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
1134 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
1135 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
1136 0xff000000, /* STOP index is never reached */
1137 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1138 udelay(20);
1139 snd_via82xx_codec_ready(chip, 0);
1140 return 0;
1141}
1142
1143
1144/*
1145 * pcm hardware definition, identical for both playback and capture
1146 */
e437e3d7 1147static struct snd_pcm_hardware snd_via82xx_hw =
1da177e4
LT		 1148{
1149 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1150 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1151 SNDRV_PCM_INFO_MMAP_VALID |
41e4845c 1152 /* SNDRV_PCM_INFO_RESUME | */
1da177e4
LT		 1153 SNDRV_PCM_INFO_PAUSE),
1154 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1155 .rates = SNDRV_PCM_RATE_48000,
1156 .rate_min = 48000,
1157 .rate_max = 48000,
1158 .channels_min = 1,
1159 .channels_max = 2,
5503600a 1160 .buffer_bytes_max = VIA_MAX_BUFSIZE,
1da177e4 1161 .period_bytes_min = 32,
5503600a 1162 .period_bytes_max = VIA_MAX_BUFSIZE / 2,
1da177e4
LT		 1163 .periods_min = 2,
1164 .periods_max = VIA_TABLE_SIZE / 2,
1165 .fifo_size = 0,
1166};
1167
1168
1169/*
1170 * open callback skeleton
1171 */
e437e3d7
TI		 1172static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
1173 struct snd_pcm_substream *substream)
1da177e4 1174{
e437e3d7 1175 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1176 int err;
1177 struct via_rate_lock *ratep;
1178
1179 runtime->hw = snd_via82xx_hw;
1180
1181 /* set the hw rate condition */
1182 ratep = &chip->rates[viadev->direction];
1183 spin_lock_irq(&ratep->lock);
1184 ratep->used++;
1185 if (chip->spdif_on && viadev->reg_offset == 0x30) {
1186 /* DXS#3 and spdif is on */
1187 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
1188 snd_pcm_limit_hw_rates(runtime);
1189 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
1190 /* fixed DXS playback rate */
1191 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1192 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
2d7eb7cb
SV		 1193 } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
1194 /* use full SRC capabilities of DXS */
1195 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
1196 SNDRV_PCM_RATE_8000_48000);
1197 runtime->hw.rate_min = 8000;
1198 runtime->hw.rate_max = 48000;
1da177e4
LT		 1199 } else if (! ratep->rate) {
1200 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
1201 runtime->hw.rates = chip->ac97->rates[idx];
1202 snd_pcm_limit_hw_rates(runtime);
1203 } else {
1204 /* a fixed rate */
1205 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1206 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
1207 }
1208 spin_unlock_irq(&ratep->lock);
1209
1210 /* we may remove following constaint when we modify table entries
1211 in interrupt */
1212 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1213 return err;
1214
1215 runtime->private_data = viadev;
1216 viadev->substream = substream;
1217
1218 return 0;
1219}
1220
1221
1222/*
3d009413 1223 * open callback for playback on via686
1da177e4 1224 */
3d009413 1225static int snd_via686_playback_open(struct snd_pcm_substream *substream)
1da177e4 1226{
e437e3d7
TI		 1227 struct via82xx *chip = snd_pcm_substream_chip(substream);
1228 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
1da177e4
LT		 1229 int err;
1230
1231 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1232 return err;
1233 return 0;
1234}
1235
3d009413
CL		 1236/*
1237 * open callback for playback on via823x DXS
1238 */
1239static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
1240{
1241 struct via82xx *chip = snd_pcm_substream_chip(substream);
1242 struct viadev *viadev;
1243 unsigned int stream;
1244 int err;
1245
1246 viadev = &chip->devs[chip->playback_devno + substream->number];
1247 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1248 return err;
1249 stream = viadev->reg_offset / 0x10;
1250 if (chip->dxs_controls[stream]) {
395c61d1
CL		 1251 chip->playback_volume[stream][0] =
1252 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
1253 chip->playback_volume[stream][1] =
1254 VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
3d009413
CL		 1255 chip->dxs_controls[stream]->vd[0].access &=
1256 ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1257 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1258 SNDRV_CTL_EVENT_MASK_INFO,
1259 &chip->dxs_controls[stream]->id);
1260 }
1261 return 0;
1262}
1263
1da177e4
LT		 1264/*
1265 * open callback for playback on via823x multi-channel
1266 */
e437e3d7 1267static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
1da177e4 1268{
e437e3d7
TI		 1269 struct via82xx *chip = snd_pcm_substream_chip(substream);
1270 struct viadev *viadev = &chip->devs[chip->multi_devno];
1da177e4
LT		 1271 int err;
1272 /* channels constraint for VIA8233A
1273 * 3 and 5 channels are not supported
1274 */
1275 static unsigned int channels[] = {
1276 1, 2, 4, 6
1277 };
e437e3d7 1278 static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
1da177e4
LT		 1279 .count = ARRAY_SIZE(channels),
1280 .list = channels,
1281 .mask = 0,
1282 };
1283
1284 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1285 return err;
1286 substream->runtime->hw.channels_max = 6;
1287 if (chip->revision == VIA_REV_8233A)
e437e3d7
TI		 1288 snd_pcm_hw_constraint_list(substream->runtime, 0,
1289 SNDRV_PCM_HW_PARAM_CHANNELS,
1290 &hw_constraints_channels);
1da177e4
LT		 1291 return 0;
1292}
1293
1294/*
1295 * open callback for capture on via686 and via823x
1296 */
e437e3d7 1297static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
1da177e4 1298{
e437e3d7
TI		 1299 struct via82xx *chip = snd_pcm_substream_chip(substream);
1300 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
1da177e4
LT		 1301
1302 return snd_via82xx_pcm_open(chip, viadev, substream);
1303}
1304
1305/*
1306 * close callback
1307 */
e437e3d7 1308static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
1da177e4 1309{
e437e3d7
TI		 1310 struct via82xx *chip = snd_pcm_substream_chip(substream);
1311 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 1312 struct via_rate_lock *ratep;
1313
1314 /* release the rate lock */
1315 ratep = &chip->rates[viadev->direction];
1316 spin_lock_irq(&ratep->lock);
1317 ratep->used--;
1318 if (! ratep->used)
1319 ratep->rate = 0;
1320 spin_unlock_irq(&ratep->lock);
6dbe6628
TI		 1321 if (! ratep->rate) {
1322 if (! viadev->direction) {
1323 snd_ac97_update_power(chip->ac97,
1324 AC97_PCM_FRONT_DAC_RATE, 0);
1325 snd_ac97_update_power(chip->ac97,
1326 AC97_PCM_SURR_DAC_RATE, 0);
1327 snd_ac97_update_power(chip->ac97,
1328 AC97_PCM_LFE_DAC_RATE, 0);
1329 } else
1330 snd_ac97_update_power(chip->ac97,
1331 AC97_PCM_LR_ADC_RATE, 0);
1332 }
1da177e4
LT		 1333 viadev->substream = NULL;
1334 return 0;
1335}
1336
3d009413
CL		 1337static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
1338{
1339 struct via82xx *chip = snd_pcm_substream_chip(substream);
1340 struct viadev *viadev = substream->runtime->private_data;
1341 unsigned int stream;
1342
1343 stream = viadev->reg_offset / 0x10;
1344 if (chip->dxs_controls[stream]) {
1345 chip->dxs_controls[stream]->vd[0].access |=
1346 SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1347 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
1348 &chip->dxs_controls[stream]->id);
1349 }
1350 return snd_via82xx_pcm_close(substream);
1351}
1352
1da177e4
LT		 1353
1354/* via686 playback callbacks */
e437e3d7 1355static struct snd_pcm_ops snd_via686_playback_ops = {
3d009413 1356 .open = snd_via686_playback_open,
1da177e4
LT		 1357 .close = snd_via82xx_pcm_close,
1358 .ioctl = snd_pcm_lib_ioctl,
1359 .hw_params = snd_via82xx_hw_params,
1360 .hw_free = snd_via82xx_hw_free,
1361 .prepare = snd_via686_playback_prepare,
1362 .trigger = snd_via82xx_pcm_trigger,
1363 .pointer = snd_via686_pcm_pointer,
1364 .page = snd_pcm_sgbuf_ops_page,
1365};
1366
1367/* via686 capture callbacks */
e437e3d7 1368static struct snd_pcm_ops snd_via686_capture_ops = {
1da177e4
LT		 1369 .open = snd_via82xx_capture_open,
1370 .close = snd_via82xx_pcm_close,
1371 .ioctl = snd_pcm_lib_ioctl,
1372 .hw_params = snd_via82xx_hw_params,
1373 .hw_free = snd_via82xx_hw_free,
1374 .prepare = snd_via686_capture_prepare,
1375 .trigger = snd_via82xx_pcm_trigger,
1376 .pointer = snd_via686_pcm_pointer,
1377 .page = snd_pcm_sgbuf_ops_page,
1378};
1379
1380/* via823x DSX playback callbacks */
e437e3d7 1381static struct snd_pcm_ops snd_via8233_playback_ops = {
3d009413
CL		 1382 .open = snd_via8233_playback_open,
1383 .close = snd_via8233_playback_close,
1da177e4
LT		 1384 .ioctl = snd_pcm_lib_ioctl,
1385 .hw_params = snd_via82xx_hw_params,
1386 .hw_free = snd_via82xx_hw_free,
1387 .prepare = snd_via8233_playback_prepare,
1388 .trigger = snd_via82xx_pcm_trigger,
1389 .pointer = snd_via8233_pcm_pointer,
1390 .page = snd_pcm_sgbuf_ops_page,
1391};
1392
1393/* via823x multi-channel playback callbacks */
e437e3d7 1394static struct snd_pcm_ops snd_via8233_multi_ops = {
1da177e4
LT		 1395 .open = snd_via8233_multi_open,
1396 .close = snd_via82xx_pcm_close,
1397 .ioctl = snd_pcm_lib_ioctl,
1398 .hw_params = snd_via82xx_hw_params,
1399 .hw_free = snd_via82xx_hw_free,
1400 .prepare = snd_via8233_multi_prepare,
1401 .trigger = snd_via82xx_pcm_trigger,
1402 .pointer = snd_via8233_pcm_pointer,
1403 .page = snd_pcm_sgbuf_ops_page,
1404};
1405
1406/* via823x capture callbacks */
e437e3d7 1407static struct snd_pcm_ops snd_via8233_capture_ops = {
1da177e4
LT		 1408 .open = snd_via82xx_capture_open,
1409 .close = snd_via82xx_pcm_close,
1410 .ioctl = snd_pcm_lib_ioctl,
1411 .hw_params = snd_via82xx_hw_params,
1412 .hw_free = snd_via82xx_hw_free,
1413 .prepare = snd_via8233_capture_prepare,
1414 .trigger = snd_via82xx_pcm_trigger,
1415 .pointer = snd_via8233_pcm_pointer,
1416 .page = snd_pcm_sgbuf_ops_page,
1417};
1418
1419
e437e3d7
TI		 1420static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
1421 int shadow_pos, int direction)
1da177e4
LT		 1422{
1423 chip->devs[idx].reg_offset = reg_offset;
4f550df5 1424 chip->devs[idx].shadow_shift = shadow_pos * 4;
1da177e4
LT		 1425 chip->devs[idx].direction = direction;
1426 chip->devs[idx].port = chip->port + reg_offset;
1427}
1428
1429/*
1430 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
1431 */
e437e3d7 1432static int __devinit snd_via8233_pcm_new(struct via82xx *chip)
1da177e4 1433{
e437e3d7 1434 struct snd_pcm *pcm;
1da177e4
LT		 1435 int i, err;
1436
1437 chip->playback_devno = 0; /* x 4 */
1438 chip->multi_devno = 4; /* x 1 */
1439 chip->capture_devno = 5; /* x 2 */
1440 chip->num_devs = 7;
1441 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
1442
1443 /* PCM #0: 4 DSX playbacks and 1 capture */
1444 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
1445 if (err < 0)
1446 return err;
1447 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1448 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1449 pcm->private_data = chip;
1450 strcpy(pcm->name, chip->card->shortname);
1451 chip->pcms[0] = pcm;
1452 /* set up playbacks */
1453 for (i = 0; i < 4; i++)
4f550df5 1454 init_viadev(chip, i, 0x10 * i, i, 0);
1da177e4 1455 /* capture */
4f550df5 1456 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1457
a2e3961d
TI		 1458 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1459 snd_dma_pci_data(chip->pci),
5503600a 1460 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1461
1462 /* PCM #1: multi-channel playback and 2nd capture */
1463 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
1464 if (err < 0)
1465 return err;
1466 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1467 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1468 pcm->private_data = chip;
1469 strcpy(pcm->name, chip->card->shortname);
1470 chip->pcms[1] = pcm;
1471 /* set up playback */
4f550df5 1472 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1473 /* set up capture */
4f550df5 1474 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
1da177e4 1475
a2e3961d
TI		 1476 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1477 snd_dma_pci_data(chip->pci),
5503600a 1478 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1479 return 0;
1480}
1481
1482/*
1483 * create pcm instances for VIA8233A
1484 */
e437e3d7 1485static int __devinit snd_via8233a_pcm_new(struct via82xx *chip)
1da177e4 1486{
e437e3d7 1487 struct snd_pcm *pcm;
1da177e4
LT		 1488 int err;
1489
1490 chip->multi_devno = 0;
1491 chip->playback_devno = 1;
1492 chip->capture_devno = 2;
1493 chip->num_devs = 3;
1494 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
1495
1496 /* PCM #0: multi-channel playback and capture */
1497 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1498 if (err < 0)
1499 return err;
1500 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1501 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1502 pcm->private_data = chip;
1503 strcpy(pcm->name, chip->card->shortname);
1504 chip->pcms[0] = pcm;
1505 /* set up playback */
4f550df5 1506 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1507 /* capture */
4f550df5 1508 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1509
a2e3961d
TI		 1510 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1511 snd_dma_pci_data(chip->pci),
5503600a 1512 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1513
1514 /* SPDIF supported? */
1515 if (! ac97_can_spdif(chip->ac97))
1516 return 0;
1517
1518 /* PCM #1: DXS3 playback (for spdif) */
1519 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
1520 if (err < 0)
1521 return err;
1522 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1523 pcm->private_data = chip;
1524 strcpy(pcm->name, chip->card->shortname);
1525 chip->pcms[1] = pcm;
1526 /* set up playback */
4f550df5 1527 init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
1da177e4 1528
a2e3961d
TI		 1529 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1530 snd_dma_pci_data(chip->pci),
5503600a 1531 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1532 return 0;
1533}
1534
1535/*
1536 * create a pcm instance for via686a/b
1537 */
e437e3d7 1538static int __devinit snd_via686_pcm_new(struct via82xx *chip)
1da177e4 1539{
e437e3d7 1540 struct snd_pcm *pcm;
1da177e4
LT		 1541 int err;
1542
1543 chip->playback_devno = 0;
1544 chip->capture_devno = 1;
1545 chip->num_devs = 2;
1546 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
1547
1548 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1549 if (err < 0)
1550 return err;
1551 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
1552 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
1553 pcm->private_data = chip;
1554 strcpy(pcm->name, chip->card->shortname);
1555 chip->pcms[0] = pcm;
4f550df5
KW		 1556 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
1557 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
1da177e4 1558
a2e3961d
TI		 1559 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1560 snd_dma_pci_data(chip->pci),
5503600a 1561 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1562 return 0;
1563}
1564
1565
1566/*
1567 * Mixer part
1568 */
1569
e437e3d7
TI		 1570static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
1571 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1572{
1573 /* formerly they were "Line" and "Mic", but it looks like that they
1574 * have nothing to do with the actual physical connections...
1575 */
1576 static char *texts[2] = {
1577 "Input1", "Input2"
1578 };
1579 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1580 uinfo->count = 1;
1581 uinfo->value.enumerated.items = 2;
1582 if (uinfo->value.enumerated.item >= 2)
1583 uinfo->value.enumerated.item = 1;
1584 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1585 return 0;
1586}
1587
e437e3d7
TI		 1588static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
1589 struct snd_ctl_elem_value *ucontrol)
1da177e4 1590{
e437e3d7 1591 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1592 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1593 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
1594 return 0;
1595}
1596
e437e3d7
TI		 1597static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
1598 struct snd_ctl_elem_value *ucontrol)
1da177e4 1599{
e437e3d7 1600 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1601 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1602 u8 val, oval;
1603
1604 spin_lock_irq(&chip->reg_lock);
1605 oval = inb(port);
1606 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
1607 if (ucontrol->value.enumerated.item[0])
1608 val |= VIA_REG_CAPTURE_CHANNEL_MIC;
1609 if (val != oval)
1610 outb(val, port);
1611 spin_unlock_irq(&chip->reg_lock);
1612 return val != oval;
1613}
1614
e437e3d7 1615static struct snd_kcontrol_new snd_via8233_capture_source __devinitdata = {
1da177e4
LT		 1616 .name = "Input Source Select",
1617 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1618 .info = snd_via8233_capture_source_info,
1619 .get = snd_via8233_capture_source_get,
1620 .put = snd_via8233_capture_source_put,
1621};
1622
a5ce8890 1623#define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
1da177e4 1624
e437e3d7
TI		 1625static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
1626 struct snd_ctl_elem_value *ucontrol)
1da177e4 1627{
e437e3d7 1628 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1629 u8 val;
1630
1631 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1632 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
1633 return 0;
1634}
1635
e437e3d7
TI		 1636static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
1637 struct snd_ctl_elem_value *ucontrol)
1da177e4 1638{
e437e3d7 1639 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1640 u8 val, oval;
1641
1642 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
1643 val = oval & ~VIA8233_SPDIF_DX3;
1644 if (ucontrol->value.integer.value[0])
1645 val |= VIA8233_SPDIF_DX3;
1646 /* save the spdif flag for rate filtering */
1647 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
1648 if (val != oval) {
1649 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1650 return 1;
1651 }
1652 return 0;
1653}
1654
e437e3d7 1655static struct snd_kcontrol_new snd_via8233_dxs3_spdif_control __devinitdata = {
10e8d78a 1656 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT		 1657 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1658 .info = snd_via8233_dxs3_spdif_info,
1659 .get = snd_via8233_dxs3_spdif_get,
1660 .put = snd_via8233_dxs3_spdif_put,
1661};
1662
e437e3d7
TI		 1663static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
1664 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1665{
1666 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1667 uinfo->count = 2;
1668 uinfo->value.integer.min = 0;
1669 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
1670 return 0;
1671}
1672
e437e3d7
TI		 1673static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1da177e4 1675{
e437e3d7 1676 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1677 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1678
1679 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
1680 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
1681 return 0;
1682}
1683
e437e3d7
TI		 1684static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
1685 struct snd_ctl_elem_value *ucontrol)
00f226d4 1686{
e437e3d7 1687 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM		 1688 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
1689 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
1da177e4
LT		 1690 return 0;
1691}
1692
e437e3d7
TI		 1693static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
1694 struct snd_ctl_elem_value *ucontrol)
00f226d4 1695{
e437e3d7 1696 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1697 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1698 unsigned long port = chip->port + 0x10 * idx;
1699 unsigned char val;
1700 int i, change = 0;
1701
1702 for (i = 0; i < 2; i++) {
1703 val = ucontrol->value.integer.value[i];
1704 if (val > VIA_DXS_MAX_VOLUME)
1705 val = VIA_DXS_MAX_VOLUME;
1706 val = VIA_DXS_MAX_VOLUME - val;
1707 change |= val != chip->playback_volume[idx][i];
1708 if (change) {
1709 chip->playback_volume[idx][i] = val;
1710 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1711 }
1712 }
1713 return change;
1714}
1715
e437e3d7
TI		 1716static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
1717 struct snd_ctl_elem_value *ucontrol)
1da177e4 1718{
e437e3d7 1719 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1720 unsigned int idx;
1721 unsigned char val;
1722 int i, change = 0;
1723
1724 for (i = 0; i < 2; i++) {
1725 val = ucontrol->value.integer.value[i];
1726 if (val > VIA_DXS_MAX_VOLUME)
1727 val = VIA_DXS_MAX_VOLUME;
1728 val = VIA_DXS_MAX_VOLUME - val;
00f226d4 1729 if (val != chip->playback_volume_c[i]) {
1da177e4 1730 change = 1;
00f226d4 1731 chip->playback_volume_c[i] = val;
1da177e4
LT		 1732 for (idx = 0; idx < 4; idx++) {
1733 unsigned long port = chip->port + 0x10 * idx;
00f226d4 1734 chip->playback_volume[idx][i] = val;
1da177e4
LT		 1735 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1736 }
1737 }
1738 }
1739 return change;
1740}
1741
b452e08e 1742static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
7058c042 1743
e437e3d7 1744static struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control __devinitdata = {
1da177e4
LT		 1745 .name = "PCM Playback Volume",
1746 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI		 1747 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1748 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1749 .info = snd_via8233_dxs_volume_info,
00f226d4
HM		 1750 .get = snd_via8233_pcmdxs_volume_get,
1751 .put = snd_via8233_pcmdxs_volume_put,
7058c042 1752 .tlv = { .p = db_scale_dxs }
00f226d4
HM		 1753};
1754
e437e3d7 1755static struct snd_kcontrol_new snd_via8233_dxs_volume_control __devinitdata = {
2fb930b5
CL		 1756 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1757 .device = 0,
1758 /* .subdevice set later */
1759 .name = "PCM Playback Volume",
3d009413
CL		 1760 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1761 SNDRV_CTL_ELEM_ACCESS_TLV_READ |
1762 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
00f226d4 1763 .info = snd_via8233_dxs_volume_info,
1da177e4
LT		 1764 .get = snd_via8233_dxs_volume_get,
1765 .put = snd_via8233_dxs_volume_put,
7058c042 1766 .tlv = { .p = db_scale_dxs }
1da177e4
LT		 1767};
1768
1769/*
1770 */
1771
e437e3d7 1772static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1773{
e437e3d7 1774 struct via82xx *chip = bus->private_data;
1da177e4
LT		 1775 chip->ac97_bus = NULL;
1776}
1777
e437e3d7 1778static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1779{
e437e3d7 1780 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 1781 chip->ac97 = NULL;
1782}
1783
1784static struct ac97_quirk ac97_quirks[] = {
1785 {
69ad07cf
JK		 1786 .subvendor = 0x1106,
1787 .subdevice = 0x4161,
1da177e4
LT		 1788 .codec_id = 0x56494161, /* VT1612A */
1789 .name = "Soltek SL-75DRV5",
1790 .type = AC97_TUNE_NONE
1791 },
1792 { /* FIXME: which codec? */
69ad07cf
JK		 1793 .subvendor = 0x1106,
1794 .subdevice = 0x4161,
1da177e4
LT		 1795 .name = "ASRock K7VT2",
1796 .type = AC97_TUNE_HP_ONLY
1797 },
bf30a430
CL		 1798 {
1799 .subvendor = 0x110a,
1800 .subdevice = 0x0079,
1801 .name = "Fujitsu Siemens D1289",
1802 .type = AC97_TUNE_HP_ONLY
1803 },
1da177e4 1804 {
69ad07cf
JK		 1805 .subvendor = 0x1019,
1806 .subdevice = 0x0a81,
1da177e4
LT		 1807 .name = "ECS K7VTA3",
1808 .type = AC97_TUNE_HP_ONLY
1809 },
1810 {
69ad07cf
JK		 1811 .subvendor = 0x1019,
1812 .subdevice = 0x0a85,
1da177e4
LT		 1813 .name = "ECS L7VMM2",
1814 .type = AC97_TUNE_HP_ONLY
1815 },
942fd1eb
WS		 1816 {
1817 .subvendor = 0x1019,
1818 .subdevice = 0x1841,
1819 .name = "ECS K7VTA3",
1820 .type = AC97_TUNE_HP_ONLY
1821 },
1da177e4 1822 {
69ad07cf
JK		 1823 .subvendor = 0x1849,
1824 .subdevice = 0x3059,
1da177e4
LT		 1825 .name = "ASRock K7VM2",
1826 .type = AC97_TUNE_HP_ONLY /* VT1616 */
1827 },
1828 {
69ad07cf
JK		 1829 .subvendor = 0x14cd,
1830 .subdevice = 0x7002,
1da177e4
LT		 1831 .name = "Unknown",
1832 .type = AC97_TUNE_ALC_JACK
1833 },
1834 {
69ad07cf
JK		 1835 .subvendor = 0x1071,
1836 .subdevice = 0x8590,
1da177e4
LT		 1837 .name = "Mitac Mobo",
1838 .type = AC97_TUNE_ALC_JACK
1839 },
1840 {
69ad07cf
JK		 1841 .subvendor = 0x161f,
1842 .subdevice = 0x202b,
1da177e4
LT		 1843 .name = "Arima Notebook",
1844 .type = AC97_TUNE_HP_ONLY,
1845 },
dac8dddd
TI		 1846 {
1847 .subvendor = 0x161f,
1848 .subdevice = 0x2032,
1849 .name = "Targa Traveller 811",
1850 .type = AC97_TUNE_HP_ONLY,
1851 },
d4199f01
DC		 1852 {
1853 .subvendor = 0x161f,
1854 .subdevice = 0x2032,
1855 .name = "m680x",
1856 .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
1857 },
9674513d
TI		 1858 {
1859 .subvendor = 0x1297,
1860 .subdevice = 0xa232,
1861 .name = "Shuttle AK32VN",
1862 .type = AC97_TUNE_HP_ONLY
1863 },
1da177e4
LT		 1864 { } /* terminator */
1865};
1866
e437e3d7 1867static int __devinit snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
1da177e4 1868{
e437e3d7 1869 struct snd_ac97_template ac97;
1da177e4 1870 int err;
e437e3d7 1871 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1872 .write = snd_via82xx_codec_write,
1873 .read = snd_via82xx_codec_read,
1874 .wait = snd_via82xx_codec_wait,
1875 };
1876
1877 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1878 return err;
1879 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
1880 chip->ac97_bus->clock = chip->ac97_clock;
1da177e4
LT		 1881
1882 memset(&ac97, 0, sizeof(ac97));
1883 ac97.private_data = chip;
1884 ac97.private_free = snd_via82xx_mixer_free_ac97;
1885 ac97.pci = chip->pci;
f1a63a38 1886 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1da177e4
LT		 1887 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1888 return err;
1889
1890 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
1891
1892 if (chip->chip_type != TYPE_VIA686) {
1893 /* use slot 10/11 */
1894 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1895 }
1896
1897 return 0;
1898}
1899
1900#ifdef SUPPORT_JOYSTICK
1901#define JOYSTICK_ADDR 0x200
e437e3d7 1902static int __devinit snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1903{
1904 struct gameport *gp;
1905 struct resource *r;
1906
b7fe4622 1907 if (!joystick)
1da177e4
LT		 1908 return -ENODEV;
1909
1910 r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport");
1911 if (!r) {
e437e3d7
TI		 1912 printk(KERN_WARNING "via82xx: cannot reserve joystick port 0x%#x\n",
1913 JOYSTICK_ADDR);
1da177e4
LT		 1914 return -EBUSY;
1915 }
1916
1917 chip->gameport = gp = gameport_allocate_port();
1918 if (!gp) {
1919 printk(KERN_ERR "via82xx: cannot allocate memory for gameport\n");
b1d5776d 1920 release_and_free_resource(r);
1da177e4
LT		 1921 return -ENOMEM;
1922 }
1923
1924 gameport_set_name(gp, "VIA686 Gameport");
1925 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1926 gameport_set_dev_parent(gp, &chip->pci->dev);
1927 gp->io = JOYSTICK_ADDR;
1928 gameport_set_port_data(gp, r);
1929
1930 /* Enable legacy joystick port */
1931 *legacy |= VIA_FUNC_ENABLE_GAME;
1932 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
1933
1934 gameport_register_port(chip->gameport);
1935
1936 return 0;
1937}
1938
e437e3d7 1939static void snd_via686_free_gameport(struct via82xx *chip)
1da177e4
LT		 1940{
1941 if (chip->gameport) {
1942 struct resource *r = gameport_get_port_data(chip->gameport);
1943
1944 gameport_unregister_port(chip->gameport);
1945 chip->gameport = NULL;
b1d5776d 1946 release_and_free_resource(r);
1da177e4
LT		 1947 }
1948}
1949#else
e437e3d7 1950static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1951{
1952 return -ENOSYS;
1953}
e437e3d7 1954static inline void snd_via686_free_gameport(struct via82xx *chip) { }
1da177e4
LT		 1955#endif
1956
1957
1958/*
1959 *
1960 */
1961
e437e3d7 1962static int __devinit snd_via8233_init_misc(struct via82xx *chip)
1da177e4
LT		 1963{
1964 int i, err, caps;
1965 unsigned char val;
1966
1967 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
1968 for (i = 0; i < caps; i++) {
1969 snd_via8233_capture_source.index = i;
1970 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
1971 if (err < 0)
1972 return err;
1973 }
1974 if (ac97_can_spdif(chip->ac97)) {
1975 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
1976 if (err < 0)
1977 return err;
1978 }
1979 if (chip->chip_type != TYPE_VIA8233A) {
1980 /* when no h/w PCM volume control is found, use DXS volume control
1981 * as the PCM vol control
1982 */
e437e3d7 1983 struct snd_ctl_elem_id sid;
1da177e4
LT		 1984 memset(&sid, 0, sizeof(sid));
1985 strcpy(sid.name, "PCM Playback Volume");
1986 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
1987 if (! snd_ctl_find_id(chip->card, &sid)) {
00f226d4
HM		 1988 snd_printd(KERN_INFO "Using DXS as PCM Playback\n");
1989 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
1990 if (err < 0)
1991 return err;
1992 }
1993 else /* Using DXS when PCM emulation is enabled is really weird */
1994 {
2fb930b5
CL		 1995 for (i = 0; i < 4; ++i) {
1996 struct snd_kcontrol *kctl;
1997
1998 kctl = snd_ctl_new1(
1999 &snd_via8233_dxs_volume_control, chip);
2000 if (!kctl)
2001 return -ENOMEM;
2002 kctl->id.subdevice = i;
2003 err = snd_ctl_add(chip->card, kctl);
2004 if (err < 0)
2005 return err;
3d009413 2006 chip->dxs_controls[i] = kctl;
2fb930b5 2007 }
1da177e4
LT		 2008 }
2009 }
1da177e4
LT		 2010 /* select spdif data slot 10/11 */
2011 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
2012 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
2013 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
2014 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
2015
2016 return 0;
2017}
2018
e437e3d7 2019static int __devinit snd_via686_init_misc(struct via82xx *chip)
1da177e4
LT		 2020{
2021 unsigned char legacy, legacy_cfg;
2022 int rev_h = 0;
2023
2024 legacy = chip->old_legacy;
2025 legacy_cfg = chip->old_legacy_cfg;
2026 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
2027 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
2028 if (chip->revision >= VIA_REV_686_H) {
2029 rev_h = 1;
b7fe4622
CL		 2030 if (mpu_port >= 0x200) { /* force MIDI */
2031 mpu_port &= 0xfffc;
2032 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
1da177e4 2033#ifdef CONFIG_PM
b7fe4622 2034 chip->mpu_port_saved = mpu_port;
1da177e4
LT		 2035#endif
2036 } else {
b7fe4622 2037 mpu_port = pci_resource_start(chip->pci, 2);
1da177e4
LT		 2038 }
2039 } else {
b7fe4622 2040 switch (mpu_port) { /* force MIDI */
1da177e4
LT		 2041 case 0x300:
2042 case 0x310:
2043 case 0x320:
2044 case 0x330:
2045 legacy_cfg &= ~(3 << 2);
b7fe4622 2046 legacy_cfg |= (mpu_port & 0x0030) >> 2;
1da177e4
LT		 2047 break;
2048 default: /* no, use BIOS settings */
2049 if (legacy & VIA_FUNC_ENABLE_MIDI)
b7fe4622 2050 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
1da177e4
LT		 2051 break;
2052 }
2053 }
b7fe4622
CL		 2054 if (mpu_port >= 0x200 &&
2055 (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401"))
2056 != NULL) {
1da177e4
LT		 2057 if (rev_h)
2058 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
2059 legacy |= VIA_FUNC_ENABLE_MIDI;
2060 } else {
2061 if (rev_h)
2062 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
2063 legacy &= ~VIA_FUNC_ENABLE_MIDI;
b7fe4622 2064 mpu_port = 0;
1da177e4
LT		 2065 }
2066
2067 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2068 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
2069 if (chip->mpu_res) {
2070 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
302e4c2f 2071 mpu_port, MPU401_INFO_INTEGRATED,
1da177e4 2072 chip->irq, 0, &chip->rmidi) < 0) {
b7fe4622
CL		 2073 printk(KERN_WARNING "unable to initialize MPU-401"
2074 " at 0x%lx, skipping\n", mpu_port);
1da177e4
LT		 2075 legacy &= ~VIA_FUNC_ENABLE_MIDI;
2076 } else {
2077 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
2078 }
2079 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2080 }
2081
b7fe4622 2082 snd_via686_create_gameport(chip, &legacy);
1da177e4
LT		 2083
2084#ifdef CONFIG_PM
2085 chip->legacy_saved = legacy;
2086 chip->legacy_cfg_saved = legacy_cfg;
2087#endif
2088
2089 return 0;
2090}
2091
2092
2093/*
2094 * proc interface
2095 */
e437e3d7
TI		 2096static void snd_via82xx_proc_read(struct snd_info_entry *entry,
2097 struct snd_info_buffer *buffer)
1da177e4 2098{
e437e3d7 2099 struct via82xx *chip = entry->private_data;
1da177e4
LT		 2100 int i;
2101
2102 snd_iprintf(buffer, "%s\n\n", chip->card->longname);
2103 for (i = 0; i < 0xa0; i += 4) {
2104 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
2105 }
2106}
2107
e437e3d7 2108static void __devinit snd_via82xx_proc_init(struct via82xx *chip)
1da177e4 2109{
e437e3d7 2110 struct snd_info_entry *entry;
1da177e4
LT		 2111
2112 if (! snd_card_proc_new(chip->card, "via82xx", &entry))
bf850204 2113 snd_info_set_text_ops(entry, chip, snd_via82xx_proc_read);
1da177e4
LT		 2114}
2115
2116/*
2117 *
2118 */
2119
e437e3d7 2120static int snd_via82xx_chip_init(struct via82xx *chip)
1da177e4
LT		 2121{
2122 unsigned int val;
ef21ca24 2123 unsigned long end_time;
1da177e4
LT		 2124 unsigned char pval;
2125
2126#if 0 /* broken on K7M? */
2127 if (chip->chip_type == TYPE_VIA686)
2128 /* disable all legacy ports */
2129 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
2130#endif
2131 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2132 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
2133 /* deassert ACLink reset, force SYNC */
2134 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2135 VIA_ACLINK_CTRL_ENABLE |
2136 VIA_ACLINK_CTRL_RESET |
2137 VIA_ACLINK_CTRL_SYNC);
2138 udelay(100);
2139#if 1 /* FIXME: should we do full reset here for all chip models? */
2140 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
2141 udelay(100);
2142#else
2143 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
2144 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2145 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
2146 udelay(2);
2147#endif
2148 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2149 /* note - FM data out has trouble with non VRA codecs !! */
2150 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2151 udelay(100);
2152 }
2153
2154 /* Make sure VRA is enabled, in case we didn't do a
2155 * complete codec reset, above */
2156 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
2157 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
2158 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2159 /* note - FM data out has trouble with non VRA codecs !! */
2160 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2161 udelay(100);
2162 }
2163
2164 /* wait until codec ready */
ef21ca24 2165 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2166 do {
2167 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2168 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
2169 break;
d86d0193 2170 schedule_timeout_uninterruptible(1);
ef21ca24 2171 } while (time_before(jiffies, end_time));
1da177e4
LT		 2172
2173 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
99b359ba 2174 snd_printk(KERN_ERR "AC'97 codec is not ready [0x%x]\n", val);
1da177e4
LT		 2175
2176#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
2177 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2178 VIA_REG_AC97_SECONDARY_VALID |
2179 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
ef21ca24 2180 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2181 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2182 VIA_REG_AC97_SECONDARY_VALID |
2183 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
2184 do {
2185 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {
2186 chip->ac97_secondary = 1;
2187 goto __ac97_ok2;
2188 }
d86d0193 2189 schedule_timeout_uninterruptible(1);
ef21ca24 2190 } while (time_before(jiffies, end_time));
1da177e4
LT		 2191 /* This is ok, the most of motherboards have only one codec */
2192
2193 __ac97_ok2:
2194#endif
2195
2196 if (chip->chip_type == TYPE_VIA686) {
2197 /* route FM trap to IRQ, disable FM trap */
2198 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
2199 /* disable all GPI interrupts */
2200 outl(0, VIAREG(chip, GPI_INTR));
2201 }
2202
2203 if (chip->chip_type != TYPE_VIA686) {
2204 /* Workaround for Award BIOS bug:
2205 * DXS channels don't work properly with VRA if MC97 is disabled.
2206 */
2207 struct pci_dev *pci;
0dd119f7 2208 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
1da177e4
LT		 2209 if (pci) {
2210 unsigned char data;
2211 pci_read_config_byte(pci, 0x44, &data);
2212 pci_write_config_byte(pci, 0x44, data | 0x40);
0dd119f7 2213 pci_dev_put(pci);
1da177e4
LT		 2214 }
2215 }
2216
2217 if (chip->chip_type != TYPE_VIA8233A) {
2218 int i, idx;
2219 for (idx = 0; idx < 4; idx++) {
2220 unsigned long port = chip->port + 0x10 * idx;
00f226d4
HM		 2221 for (i = 0; i < 2; i++) {
2222 chip->playback_volume[idx][i]=chip->playback_volume_c[i];
e437e3d7
TI		 2223 outb(chip->playback_volume_c[i],
2224 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
00f226d4 2225 }
1da177e4
LT		 2226 }
2227 }
2228
2229 return 0;
2230}
2231
2232#ifdef CONFIG_PM
2233/*
2234 * power management
2235 */
57feb835 2236static int snd_via82xx_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 2237{
57feb835
TI		 2238 struct snd_card *card = pci_get_drvdata(pci);
2239 struct via82xx *chip = card->private_data;
1da177e4
LT		 2240 int i;
2241
57feb835 2242 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4 2243 for (i = 0; i < 2; i++)
57feb835 2244 snd_pcm_suspend_all(chip->pcms[i]);
1da177e4
LT		 2245 for (i = 0; i < chip->num_devs; i++)
2246 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2247 synchronize_irq(chip->irq);
2248 snd_ac97_suspend(chip->ac97);
2249
2250 /* save misc values */
2251 if (chip->chip_type != TYPE_VIA686) {
2252 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
2253 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
2254 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2255 }
2256
57feb835
TI		 2257 pci_disable_device(pci);
2258 pci_save_state(pci);
30b35399 2259 pci_set_power_state(pci, pci_choose_state(pci, state));
1da177e4
LT		 2260 return 0;
2261}
2262
57feb835 2263static int snd_via82xx_resume(struct pci_dev *pci)
1da177e4 2264{
57feb835
TI		 2265 struct snd_card *card = pci_get_drvdata(pci);
2266 struct via82xx *chip = card->private_data;
1da177e4
LT		 2267 int i;
2268
57feb835 2269 pci_set_power_state(pci, PCI_D0);
30b35399
TI		 2270 pci_restore_state(pci);
2271 if (pci_enable_device(pci) < 0) {
2272 printk(KERN_ERR "via82xx: pci_enable_device failed, "
2273 "disabling device\n");
2274 snd_card_disconnect(card);
2275 return -EIO;
2276 }
2277 pci_set_master(pci);
1da177e4
LT		 2278
2279 snd_via82xx_chip_init(chip);
2280
2281 if (chip->chip_type == TYPE_VIA686) {
2282 if (chip->mpu_port_saved)
2283 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
2284 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
2285 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
2286 } else {
2287 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
2288 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
2289 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2290 }
2291
2292 snd_ac97_resume(chip->ac97);
2293
2294 for (i = 0; i < chip->num_devs; i++)
2295 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2296
57feb835 2297 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2298 return 0;
2299}
2300#endif /* CONFIG_PM */
2301
e437e3d7 2302static int snd_via82xx_free(struct via82xx *chip)
1da177e4
LT		 2303{
2304 unsigned int i;
2305
2306 if (chip->irq < 0)
2307 goto __end_hw;
2308 /* disable interrupts */
2309 for (i = 0; i < chip->num_devs; i++)
2310 snd_via82xx_channel_reset(chip, &chip->devs[i]);
f000fd80 2311
1da177e4 2312 if (chip->irq >= 0)
e437e3d7 2313 free_irq(chip->irq, chip);
757d5a75 2314 __end_hw:
b1d5776d 2315 release_and_free_resource(chip->mpu_res);
1da177e4
LT		 2316 pci_release_regions(chip->pci);
2317
2318 if (chip->chip_type == TYPE_VIA686) {
2319 snd_via686_free_gameport(chip);
2320 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
2321 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
2322 }
2323 pci_disable_device(chip->pci);
2324 kfree(chip);
2325 return 0;
2326}
2327
e437e3d7 2328static int snd_via82xx_dev_free(struct snd_device *device)
1da177e4 2329{
e437e3d7 2330 struct via82xx *chip = device->device_data;
1da177e4
LT		 2331 return snd_via82xx_free(chip);
2332}
2333
e437e3d7 2334static int __devinit snd_via82xx_create(struct snd_card *card,
1da177e4
LT		 2335 struct pci_dev *pci,
2336 int chip_type,
2337 int revision,
2338 unsigned int ac97_clock,
e437e3d7 2339 struct via82xx ** r_via)
1da177e4 2340{
e437e3d7 2341 struct via82xx *chip;
1da177e4 2342 int err;
e437e3d7 2343 static struct snd_device_ops ops = {
1da177e4
LT		 2344 .dev_free = snd_via82xx_dev_free,
2345 };
2346
2347 if ((err = pci_enable_device(pci)) < 0)
2348 return err;
2349
e560d8d8 2350 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
1da177e4
LT		 2351 pci_disable_device(pci);
2352 return -ENOMEM;
2353 }
2354
2355 chip->chip_type = chip_type;
2356 chip->revision = revision;
2357
2358 spin_lock_init(&chip->reg_lock);
2359 spin_lock_init(&chip->rates[0].lock);
2360 spin_lock_init(&chip->rates[1].lock);
2361 chip->card = card;
2362 chip->pci = pci;
2363 chip->irq = -1;
2364
2365 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
2366 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
2367 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
2368 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
2369
2370 if ((err = pci_request_regions(pci, card->driver)) < 0) {
2371 kfree(chip);
2372 pci_disable_device(pci);
2373 return err;
2374 }
2375 chip->port = pci_resource_start(pci, 0);
4f550df5
KW		 2376 if (request_irq(pci->irq,
2377 chip_type == TYPE_VIA8233 ?
2378 snd_via8233_interrupt : snd_via686_interrupt,
437a5a46 2379 IRQF_SHARED,
e437e3d7 2380 card->driver, chip)) {
99b359ba 2381 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2382 snd_via82xx_free(chip);
2383 return -EBUSY;
2384 }
2385 chip->irq = pci->irq;
2386 if (ac97_clock >= 8000 && ac97_clock <= 48000)
2387 chip->ac97_clock = ac97_clock;
2388 synchronize_irq(chip->irq);
2389
2390 if ((err = snd_via82xx_chip_init(chip)) < 0) {
2391 snd_via82xx_free(chip);
2392 return err;
2393 }
2394
2395 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2396 snd_via82xx_free(chip);
2397 return err;
2398 }
2399
2400 /* The 8233 ac97 controller does not implement the master bit
2401 * in the pci command register. IMHO this is a violation of the PCI spec.
2402 * We call pci_set_master here because it does not hurt. */
2403 pci_set_master(pci);
2404
2405 snd_card_set_dev(card, &pci->dev);
2406
2407 *r_via = chip;
2408 return 0;
2409}
2410
2411struct via823x_info {
2412 int revision;
2413 char *name;
2414 int type;
2415};
2416static struct via823x_info via823x_cards[] __devinitdata = {
2417 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
2418 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
2419 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
2420 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
2421 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
2422 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
8263c65f 2423 { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
1da177e4
LT		 2424};
2425
2426/*
2427 * auto detection of DXS channel supports.
2428 */
9d74958a
TI		 2429
2430static struct snd_pci_quirk dxs_whitelist[] __devinitdata = {
2431 SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
2432 SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
2433 SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
2434 SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
a85165c6 2435 SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
9d74958a
TI		 2436 SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
2437 SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
2438 SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
a85165c6
TI		 2439 SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
2440 SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
9d74958a 2441 SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
a85165c6 2442 SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
11be265f 2443 SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
9674513d
TI		 2444 SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
2445 SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
9d74958a
TI		 2446 SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
2447 SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
2448 SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
2449 SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
a85165c6 2450 SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
9d74958a
TI		 2451 SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
2452 SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
2453 SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
2454 SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
2455 SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
2456 SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
2457 SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
2458 SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
2459 SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
2460 SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
2461 SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
2462 SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
2463 SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
a85165c6
TI		 2464 SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
2465 SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
2466 SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
9d74958a 2467 SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
a85165c6 2468 SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
9d74958a
TI		 2469 SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
2470 SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
2471 { } /* terminator */
1da177e4
LT		 2472};
2473
a769577b 2474static int __devinit check_dxs_list(struct pci_dev *pci, int revision)
1da177e4 2475{
9d74958a 2476 const struct snd_pci_quirk *w;
1da177e4 2477
9d74958a
TI		 2478 w = snd_pci_quirk_lookup(pci, dxs_whitelist);
2479 if (w) {
2480 snd_printdd(KERN_INFO "via82xx: DXS white list for %s found\n",
2481 w->name);
2482 return w->value;
1da177e4
LT		 2483 }
2484
a769577b
TI		 2485 /* for newer revision, default to DXS_SRC */
2486 if (revision >= VIA_REV_8235)
2487 return VIA_DXS_SRC;
2488
1da177e4
LT		 2489 /*
2490 * not detected, try 48k rate only to be sure.
2491 */
2492 printk(KERN_INFO "via82xx: Assuming DXS channels with 48k fixed sample rate.\n");
ee3b4c60 2493 printk(KERN_INFO " Please try dxs_support=5 option\n");
1da177e4 2494 printk(KERN_INFO " and report if it works on your machine.\n");
ee3b4c60 2495 printk(KERN_INFO " For more details, read ALSA-Configuration.txt.\n");
1da177e4
LT		 2496 return VIA_DXS_48K;
2497};
2498
2499static int __devinit snd_via82xx_probe(struct pci_dev *pci,
2500 const struct pci_device_id *pci_id)
2501{
e437e3d7
TI		 2502 struct snd_card *card;
2503 struct via82xx *chip;
1da177e4
LT		 2504 int chip_type = 0, card_type;
2505 unsigned int i;
2506 int err;
2507
e58de7ba
TI		 2508 err = snd_card_create(index, id, THIS_MODULE, 0, &card);
2509 if (err < 0)
2510 return err;
1da177e4
LT		 2511
2512 card_type = pci_id->driver_data;
1da177e4
LT		 2513 switch (card_type) {
2514 case TYPE_CARD_VIA686:
2515 strcpy(card->driver, "VIA686A");
44c10138 2516 sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
1da177e4
LT		 2517 chip_type = TYPE_VIA686;
2518 break;
2519 case TYPE_CARD_VIA8233:
2520 chip_type = TYPE_VIA8233;
44c10138 2521 sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
1da177e4 2522 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
44c10138 2523 if (pci->revision == via823x_cards[i].revision) {
1da177e4
LT		 2524 chip_type = via823x_cards[i].type;
2525 strcpy(card->shortname, via823x_cards[i].name);
2526 break;
2527 }
2528 }
2529 if (chip_type != TYPE_VIA8233A) {
b7fe4622 2530 if (dxs_support == VIA_DXS_AUTO)
44c10138 2531 dxs_support = check_dxs_list(pci, pci->revision);
1da177e4
LT		 2532 /* force to use VIA8233 or 8233A model according to
2533 * dxs_support module option
2534 */
b7fe4622 2535 if (dxs_support == VIA_DXS_DISABLE)
1da177e4
LT		 2536 chip_type = TYPE_VIA8233A;
2537 else
2538 chip_type = TYPE_VIA8233;
2539 }
2540 if (chip_type == TYPE_VIA8233A)
2541 strcpy(card->driver, "VIA8233A");
44c10138 2542 else if (pci->revision >= VIA_REV_8237)
1da177e4
LT		 2543 strcpy(card->driver, "VIA8237"); /* no slog assignment */
2544 else
2545 strcpy(card->driver, "VIA8233");
2546 break;
2547 default:
2548 snd_printk(KERN_ERR "invalid card type %d\n", card_type);
2549 err = -EINVAL;
2550 goto __error;
2551 }
2552
44c10138 2553 if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision,
b7fe4622 2554 ac97_clock, &chip)) < 0)
1da177e4 2555 goto __error;
57feb835 2556 card->private_data = chip;
b7fe4622 2557 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0)
1da177e4
LT		 2558 goto __error;
2559
2560 if (chip_type == TYPE_VIA686) {
2561 if ((err = snd_via686_pcm_new(chip)) < 0 ||
b7fe4622 2562 (err = snd_via686_init_misc(chip)) < 0)
1da177e4
LT		 2563 goto __error;
2564 } else {
2565 if (chip_type == TYPE_VIA8233A) {
2566 if ((err = snd_via8233a_pcm_new(chip)) < 0)
2567 goto __error;
2568 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
2569 } else {
2570 if ((err = snd_via8233_pcm_new(chip)) < 0)
2571 goto __error;
b7fe4622 2572 if (dxs_support == VIA_DXS_48K)
1da177e4 2573 chip->dxs_fixed = 1;
b7fe4622 2574 else if (dxs_support == VIA_DXS_NO_VRA)
1da177e4 2575 chip->no_vra = 1;
b7fe4622 2576 else if (dxs_support == VIA_DXS_SRC) {
2d7eb7cb
SV		 2577 chip->no_vra = 1;
2578 chip->dxs_src = 1;
2579 }
1da177e4 2580 }
b7fe4622 2581 if ((err = snd_via8233_init_misc(chip)) < 0)
1da177e4
LT		 2582 goto __error;
2583 }
2584
1da177e4
LT		 2585 /* disable interrupts */
2586 for (i = 0; i < chip->num_devs; i++)
2587 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2588
2589 snprintf(card->longname, sizeof(card->longname),
2590 "%s with %s at %#lx, irq %d", card->shortname,
2591 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
2592
2593 snd_via82xx_proc_init(chip);
2594
2595 if ((err = snd_card_register(card)) < 0) {
2596 snd_card_free(card);
2597 return err;
2598 }
2599 pci_set_drvdata(pci, card);
1da177e4
LT		 2600 return 0;
2601
2602 __error:
2603 snd_card_free(card);
2604 return err;
2605}
2606
2607static void __devexit snd_via82xx_remove(struct pci_dev *pci)
2608{
2609 snd_card_free(pci_get_drvdata(pci));
2610 pci_set_drvdata(pci, NULL);
2611}
2612
2613static struct pci_driver driver = {
2614 .name = "VIA 82xx Audio",
2615 .id_table = snd_via82xx_ids,
2616 .probe = snd_via82xx_probe,
2617 .remove = __devexit_p(snd_via82xx_remove),
57feb835
TI		 2618#ifdef CONFIG_PM
2619 .suspend = snd_via82xx_suspend,
2620 .resume = snd_via82xx_resume,
2621#endif
1da177e4
LT		 2622};
2623
2624static int __init alsa_card_via82xx_init(void)
2625{
01d25d46 2626 return pci_register_driver(&driver);
1da177e4
LT		 2627}
2628
2629static void __exit alsa_card_via82xx_exit(void)
2630{
2631 pci_unregister_driver(&driver);
2632}
2633
2634module_init(alsa_card_via82xx_init)
2635module_exit(alsa_card_via82xx_exit)
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