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drm/radeon/r100/r200: fix calculation of compressed cube maps
[net-next-2.6.git] / sound / pci / via82xx.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for VIA VT82xx (South Bridge)
3 *
4 * VT82C686A/B/C, VT8233A/C, VT8235
5 *
c1017a4c 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 7 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
8 * 2002 Takashi Iwai <tiwai@suse.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26/*
27 * Changes:
28 *
29 * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
30 * - use the DSX channels for the first pcm playback.
31 * (on VIA8233, 8233C and 8235 only)
32 * this will allow you play simultaneously up to 4 streams.
33 * multi-channel playback is assigned to the second device
34 * on these chips.
35 * - support the secondary capture (on VIA8233/C,8235)
36 * - SPDIF support
37 * the DSX3 channel can be used for SPDIF output.
38 * on VIA8233A, this channel is assigned to the second pcm
39 * playback.
40 * the card config of alsa-lib will assign the correct
41 * device for applications.
42 * - clean up the code, separate low-level initialization
43 * routines for each chipset.
4f550df5
KW		 44 *
45 * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
46 * - Optimize position calculation for the 823x chips.
1da177e4
LT		 47 */
48
1da177e4
LT		 49#include <asm/io.h>
50#include <linux/delay.h>
51#include <linux/interrupt.h>
52#include <linux/init.h>
53#include <linux/pci.h>
54#include <linux/slab.h>
55#include <linux/gameport.h>
56#include <linux/moduleparam.h>
57#include <sound/core.h>
58#include <sound/pcm.h>
59#include <sound/pcm_params.h>
60#include <sound/info.h>
7058c042 61#include <sound/tlv.h>
1da177e4
LT		 62#include <sound/ac97_codec.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
65
66#if 0
67#define POINTER_DEBUG
68#endif
69
c1017a4c 70MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 71MODULE_DESCRIPTION("VIA VT82xx audio");
72MODULE_LICENSE("GPL");
73MODULE_SUPPORTED_DEVICE("{{VIA,VT82C686A/B/C,pci},{VIA,VT8233A/C,8235}}");
74
75#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
76#define SUPPORT_JOYSTICK 1
77#endif
78
b7fe4622
CL		 79static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
80static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
81static long mpu_port;
1da177e4 82#ifdef SUPPORT_JOYSTICK
b7fe4622 83static int joystick;
1da177e4 84#endif
b7fe4622
CL		 85static int ac97_clock = 48000;
86static char *ac97_quirk;
87static int dxs_support;
115551d9 88static int nodelay;
1da177e4 89
b7fe4622 90module_param(index, int, 0444);
1da177e4 91MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
b7fe4622 92module_param(id, charp, 0444);
1da177e4 93MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
b7fe4622 94module_param(mpu_port, long, 0444);
1da177e4
LT		 95MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
96#ifdef SUPPORT_JOYSTICK
b7fe4622 97module_param(joystick, bool, 0444);
1da177e4
LT		 98MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
99#endif
b7fe4622 100module_param(ac97_clock, int, 0444);
1da177e4 101MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 102module_param(ac97_quirk, charp, 0444);
1da177e4 103MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 104module_param(dxs_support, int, 0444);
2d7eb7cb 105MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
115551d9
SA		 106module_param(nodelay, int, 0444);
107MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
1da177e4 108
2b3e584b
TI		 109/* just for backward compatibility */
110static int enable;
698444f3 111module_param(enable, bool, 0444);
2b3e584b 112
1da177e4 113
1da177e4
LT		 114/* revision numbers for via686 */
115#define VIA_REV_686_A 0x10
116#define VIA_REV_686_B 0x11
117#define VIA_REV_686_C 0x12
118#define VIA_REV_686_D 0x13
119#define VIA_REV_686_E 0x14
120#define VIA_REV_686_H 0x20
121
122/* revision numbers for via8233 */
123#define VIA_REV_PRE_8233 0x10 /* not in market */
124#define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
125#define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
126#define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
127#define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
128#define VIA_REV_8237 0x60
8263c65f 129#define VIA_REV_8251 0x70
1da177e4
LT		 130
131/*
132 * Direct registers
133 */
134
135#define VIAREG(via, x) ((via)->port + VIA_REG_##x)
136#define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
137
138/* common offsets */
139#define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
140#define VIA_REG_STAT_ACTIVE 0x80 /* RO */
4f550df5 141#define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
1da177e4
LT		 142#define VIA_REG_STAT_PAUSED 0x40 /* RO */
143#define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
144#define VIA_REG_STAT_STOPPED 0x04 /* RWC */
145#define VIA_REG_STAT_EOL 0x02 /* RWC */
146#define VIA_REG_STAT_FLAG 0x01 /* RWC */
147#define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
148#define VIA_REG_CTRL_START 0x80 /* WO */
149#define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
150#define VIA_REG_CTRL_AUTOSTART 0x20
151#define VIA_REG_CTRL_PAUSE 0x08 /* RW */
152#define VIA_REG_CTRL_INT_STOP 0x04
153#define VIA_REG_CTRL_INT_EOL 0x02
154#define VIA_REG_CTRL_INT_FLAG 0x01
155#define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
156#define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
157#define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
158#define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
159#define VIA_REG_TYPE_16BIT 0x20 /* RW */
160#define VIA_REG_TYPE_STEREO 0x10 /* RW */
161#define VIA_REG_TYPE_INT_LLINE 0x00
162#define VIA_REG_TYPE_INT_LSAMPLE 0x04
163#define VIA_REG_TYPE_INT_LESSONE 0x08
164#define VIA_REG_TYPE_INT_MASK 0x0c
165#define VIA_REG_TYPE_INT_EOL 0x02
166#define VIA_REG_TYPE_INT_FLAG 0x01
167#define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
168#define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
169#define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
170#define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
171#define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
172#define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
173#define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
174
175#define DEFINE_VIA_REGSET(name,val) \
176enum {\
177 VIA_REG_##name##_STATUS = (val),\
178 VIA_REG_##name##_CONTROL = (val) + 0x01,\
179 VIA_REG_##name##_TYPE = (val) + 0x02,\
180 VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
181 VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
182 VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
183 VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
184}
185
186/* playback block */
187DEFINE_VIA_REGSET(PLAYBACK, 0x00);
188DEFINE_VIA_REGSET(CAPTURE, 0x10);
189DEFINE_VIA_REGSET(FM, 0x20);
190
191/* AC'97 */
192#define VIA_REG_AC97 0x80 /* dword */
193#define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
194#define VIA_REG_AC97_CODEC_ID_SHIFT 30
195#define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
196#define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
197#define VIA_REG_AC97_SECONDARY_VALID (1<<27)
198#define VIA_REG_AC97_PRIMARY_VALID (1<<25)
199#define VIA_REG_AC97_BUSY (1<<24)
200#define VIA_REG_AC97_READ (1<<23)
201#define VIA_REG_AC97_CMD_SHIFT 16
202#define VIA_REG_AC97_CMD_MASK 0x7e
203#define VIA_REG_AC97_DATA_SHIFT 0
204#define VIA_REG_AC97_DATA_MASK 0xffff
205
206#define VIA_REG_SGD_SHADOW 0x84 /* dword */
207/* via686 */
208#define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
209#define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
210#define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
211#define VIA_REG_SGD_STAT_PB_EOL (1<<4)
212#define VIA_REG_SGD_STAT_CP_EOL (1<<5)
213#define VIA_REG_SGD_STAT_FM_EOL (1<<6)
214#define VIA_REG_SGD_STAT_PB_STOP (1<<8)
215#define VIA_REG_SGD_STAT_CP_STOP (1<<9)
216#define VIA_REG_SGD_STAT_FM_STOP (1<<10)
217#define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
218#define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
219#define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
220/* via8233 */
221#define VIA8233_REG_SGD_STAT_FLAG (1<<0)
222#define VIA8233_REG_SGD_STAT_EOL (1<<1)
223#define VIA8233_REG_SGD_STAT_STOP (1<<2)
224#define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
225#define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
226#define VIA8233_REG_SGD_CHAN_SDX 0
227#define VIA8233_REG_SGD_CHAN_MULTI 4
228#define VIA8233_REG_SGD_CHAN_REC 6
229#define VIA8233_REG_SGD_CHAN_REC1 7
230
231#define VIA_REG_GPI_STATUS 0x88
232#define VIA_REG_GPI_INTR 0x8c
233
234/* multi-channel and capture registers for via8233 */
235DEFINE_VIA_REGSET(MULTPLAY, 0x40);
236DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
237
238/* via8233-specific registers */
239#define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
240#define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
241#define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
242#define VIA_REG_MULTPLAY_FMT_8BIT 0x00
243#define VIA_REG_MULTPLAY_FMT_16BIT 0x80
244#define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
245#define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
246#define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
247
248#define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
249
250#define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
251#define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
252#define VIA_REG_CAPTURE_CHANNEL_LINE 0
253#define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
254
255#define VIA_TBL_BIT_FLAG 0x40000000
256#define VIA_TBL_BIT_EOL 0x80000000
257
258/* pci space */
259#define VIA_ACLINK_STAT 0x40
260#define VIA_ACLINK_C11_READY 0x20
261#define VIA_ACLINK_C10_READY 0x10
262#define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
263#define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
264#define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
265#define VIA_ACLINK_CTRL 0x41
266#define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
267#define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
268#define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
269#define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
270#define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
271#define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
272#define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
273#define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
274#define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
275 VIA_ACLINK_CTRL_RESET|\
276 VIA_ACLINK_CTRL_PCM|\
277 VIA_ACLINK_CTRL_VRA)
278#define VIA_FUNC_ENABLE 0x42
279#define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
280#define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
281#define VIA_FUNC_RX2C_WRITE 0x20
282#define VIA_FUNC_SB_FIFO_EMPTY 0x10
283#define VIA_FUNC_ENABLE_GAME 0x08
284#define VIA_FUNC_ENABLE_FM 0x04
285#define VIA_FUNC_ENABLE_MIDI 0x02
286#define VIA_FUNC_ENABLE_SB 0x01
287#define VIA_PNP_CONTROL 0x43
288#define VIA_FM_NMI_CTRL 0x48
289#define VIA8233_VOLCHG_CTRL 0x48
290#define VIA8233_SPDIF_CTRL 0x49
291#define VIA8233_SPDIF_DX3 0x08
292#define VIA8233_SPDIF_SLOT_MASK 0x03
293#define VIA8233_SPDIF_SLOT_1011 0x00
294#define VIA8233_SPDIF_SLOT_34 0x01
295#define VIA8233_SPDIF_SLOT_78 0x02
296#define VIA8233_SPDIF_SLOT_69 0x03
297
298/*
299 */
300
301#define VIA_DXS_AUTO 0
302#define VIA_DXS_ENABLE 1
303#define VIA_DXS_DISABLE 2
304#define VIA_DXS_48K 3
305#define VIA_DXS_NO_VRA 4
2d7eb7cb 306#define VIA_DXS_SRC 5
1da177e4
LT		 307
308
1da177e4
LT		 309/*
310 * pcm stream
311 */
312
313struct snd_via_sg_table {
314 unsigned int offset;
315 unsigned int size;
316} ;
317
318#define VIA_TABLE_SIZE 255
5503600a 319#define VIA_MAX_BUFSIZE (1<<24)
1da177e4 320
e437e3d7 321struct viadev {
1da177e4
LT		 322 unsigned int reg_offset;
323 unsigned long port;
324 int direction; /* playback = 0, capture = 1 */
e437e3d7 325 struct snd_pcm_substream *substream;
1da177e4
LT		 326 int running;
327 unsigned int tbl_entries; /* # descriptors */
328 struct snd_dma_buffer table;
329 struct snd_via_sg_table *idx_table;
330 /* for recovery from the unexpected pointer */
331 unsigned int lastpos;
332 unsigned int fragsize;
333 unsigned int bufsize;
334 unsigned int bufsize2;
4f550df5
KW		 335 int hwptr_done; /* processed frame position in the buffer */
336 int in_interrupt;
337 int shadow_shift;
1da177e4
LT		 338};
339
340
341enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
342enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
343
344#define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
345
346struct via_rate_lock {
347 spinlock_t lock;
348 int rate;
349 int used;
350};
351
e437e3d7 352struct via82xx {
1da177e4
LT		 353 int irq;
354
355 unsigned long port;
356 struct resource *mpu_res;
357 int chip_type;
358 unsigned char revision;
359
360 unsigned char old_legacy;
361 unsigned char old_legacy_cfg;
362#ifdef CONFIG_PM
363 unsigned char legacy_saved;
364 unsigned char legacy_cfg_saved;
365 unsigned char spdif_ctrl_saved;
366 unsigned char capture_src_saved[2];
367 unsigned int mpu_port_saved;
368#endif
369
00f226d4
HM		 370 unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
371 unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
1da177e4
LT		 372
373 unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
374
375 struct pci_dev *pci;
e437e3d7 376 struct snd_card *card;
1da177e4
LT		 377
378 unsigned int num_devs;
379 unsigned int playback_devno, multi_devno, capture_devno;
e437e3d7 380 struct viadev devs[VIA_MAX_DEVS];
1da177e4
LT		 381 struct via_rate_lock rates[2]; /* playback and capture */
382 unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
383 unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
2d7eb7cb 384 unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
1da177e4
LT		 385 unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
386
e437e3d7
TI		 387 struct snd_pcm *pcms[2];
388 struct snd_rawmidi *rmidi;
3d009413 389 struct snd_kcontrol *dxs_controls[4];
1da177e4 390
e437e3d7
TI		 391 struct snd_ac97_bus *ac97_bus;
392 struct snd_ac97 *ac97;
1da177e4
LT		 393 unsigned int ac97_clock;
394 unsigned int ac97_secondary; /* secondary AC'97 codec is present */
395
396 spinlock_t reg_lock;
e437e3d7 397 struct snd_info_entry *proc_entry;
1da177e4
LT		 398
399#ifdef SUPPORT_JOYSTICK
400 struct gameport *gameport;
401#endif
402};
403
cebe41d4 404static DEFINE_PCI_DEVICE_TABLE(snd_via82xx_ids) = {
4f550df5 405 /* 0x1106, 0x3058 */
28d27aae 406 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
4f550df5 407 /* 0x1106, 0x3059 */
28d27aae 408 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
1da177e4
LT		 409 { 0, }
410};
411
412MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
413
414/*
415 */
416
417/*
418 * allocate and initialize the descriptor buffers
419 * periods = number of periods
420 * fragsize = period size in bytes
421 */
e437e3d7 422static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 423 struct pci_dev *pci,
424 unsigned int periods, unsigned int fragsize)
425{
426 unsigned int i, idx, ofs, rest;
e437e3d7 427 struct via82xx *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 428
429 if (dev->table.area == NULL) {
430 /* the start of each lists must be aligned to 8 bytes,
431 * but the kernel pages are much bigger, so we don't care
432 */
433 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
434 PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
435 &dev->table) < 0)
436 return -ENOMEM;
437 }
438 if (! dev->idx_table) {
439 dev->idx_table = kmalloc(sizeof(*dev->idx_table) * VIA_TABLE_SIZE, GFP_KERNEL);
440 if (! dev->idx_table)
441 return -ENOMEM;
442 }
443
444 /* fill the entries */
445 idx = 0;
446 ofs = 0;
447 for (i = 0; i < periods; i++) {
448 rest = fragsize;
449 /* fill descriptors for a period.
450 * a period can be split to several descriptors if it's
451 * over page boundary.
452 */
453 do {
454 unsigned int r;
455 unsigned int flag;
77a23f26 456 unsigned int addr;
1da177e4
LT		 457
458 if (idx >= VIA_TABLE_SIZE) {
459 snd_printk(KERN_ERR "via82xx: too much table size!\n");
460 return -EINVAL;
461 }
77a23f26
TI		 462 addr = snd_pcm_sgbuf_get_addr(substream, ofs);
463 ((u32 *)dev->table.area)[idx << 1] = cpu_to_le32(addr);
5503600a 464 r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
1da177e4
LT		 465 rest -= r;
466 if (! rest) {
467 if (i == periods - 1)
468 flag = VIA_TBL_BIT_EOL; /* buffer boundary */
469 else
470 flag = VIA_TBL_BIT_FLAG; /* period boundary */
471 } else
472 flag = 0; /* period continues to the next */
ee419653
TI		 473 /*
474 printk(KERN_DEBUG "via: tbl %d: at %d size %d "
475 "(rest %d)\n", idx, ofs, r, rest);
476 */
1da177e4
LT		 477 ((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
478 dev->idx_table[idx].offset = ofs;
479 dev->idx_table[idx].size = r;
480 ofs += r;
481 idx++;
482 } while (rest > 0);
483 }
484 dev->tbl_entries = idx;
485 dev->bufsize = periods * fragsize;
486 dev->bufsize2 = dev->bufsize / 2;
487 dev->fragsize = fragsize;
488 return 0;
489}
490
491
e437e3d7 492static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
1da177e4
LT		 493 struct pci_dev *pci)
494{
495 if (dev->table.area) {
496 snd_dma_free_pages(&dev->table);
497 dev->table.area = NULL;
498 }
4d572776
JJ		 499 kfree(dev->idx_table);
500 dev->idx_table = NULL;
1da177e4
LT		 501 return 0;
502}
503
504/*
505 * Basic I/O
506 */
507
e437e3d7 508static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
1da177e4
LT		 509{
510 return inl(VIAREG(chip, AC97));
511}
512
e437e3d7 513static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
1da177e4
LT		 514{
515 outl(val, VIAREG(chip, AC97));
516}
517
e437e3d7 518static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
1da177e4
LT		 519{
520 unsigned int timeout = 1000; /* 1ms */
521 unsigned int val;
522
523 while (timeout-- > 0) {
524 udelay(1);
525 if (!((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY))
526 return val & 0xffff;
527 }
e437e3d7
TI		 528 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n",
529 secondary, snd_via82xx_codec_xread(chip));
1da177e4
LT		 530 return -EIO;
531}
532
e437e3d7 533static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
1da177e4
LT		 534{
535 unsigned int timeout = 1000; /* 1ms */
536 unsigned int val, val1;
537 unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
538 VIA_REG_AC97_SECONDARY_VALID;
539
540 while (timeout-- > 0) {
541 val = snd_via82xx_codec_xread(chip);
542 val1 = val & (VIA_REG_AC97_BUSY | stat);
543 if (val1 == stat)
544 return val & 0xffff;
545 udelay(1);
546 }
547 return -EIO;
548}
549
e437e3d7 550static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
1da177e4 551{
e437e3d7 552 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 553 int err;
554 err = snd_via82xx_codec_ready(chip, ac97->num);
555 /* here we need to wait fairly for long time.. */
115551d9
SA		 556 if (!nodelay)
557 msleep(500);
1da177e4
LT		 558}
559
e437e3d7 560static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 561 unsigned short reg,
562 unsigned short val)
563{
e437e3d7 564 struct via82xx *chip = ac97->private_data;
1da177e4 565 unsigned int xval;
4f550df5 566
1da177e4
LT		 567 xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
568 xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
569 xval |= reg << VIA_REG_AC97_CMD_SHIFT;
570 xval |= val << VIA_REG_AC97_DATA_SHIFT;
571 snd_via82xx_codec_xwrite(chip, xval);
572 snd_via82xx_codec_ready(chip, ac97->num);
573}
574
e437e3d7 575static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 576{
e437e3d7 577 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 578 unsigned int xval, val = 0xffff;
579 int again = 0;
580
581 xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
582 xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
583 xval |= VIA_REG_AC97_READ;
584 xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
585 while (1) {
586 if (again++ > 3) {
e437e3d7
TI		 587 snd_printk(KERN_ERR "codec_read: codec %i is not valid [0x%x]\n",
588 ac97->num, snd_via82xx_codec_xread(chip));
1da177e4
LT		 589 return 0xffff;
590 }
591 snd_via82xx_codec_xwrite(chip, xval);
592 udelay (20);
593 if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
594 udelay(25);
595 val = snd_via82xx_codec_xread(chip);
596 break;
597 }
598 }
599 return val & 0xffff;
600}
601
e437e3d7 602static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 603{
604 outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
605 VIADEV_REG(viadev, OFFSET_CONTROL));
606 inb(VIADEV_REG(viadev, OFFSET_CONTROL));
607 udelay(50);
608 /* disable interrupts */
609 outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
610 /* clear interrupts */
611 outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
612 outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
613 // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
614 viadev->lastpos = 0;
4f550df5 615 viadev->hwptr_done = 0;
1da177e4
LT		 616}
617
618
619/*
620 * Interrupt handler
4f550df5 621 * Used for 686 and 8233A
1da177e4 622 */
7d12e780 623static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
1da177e4 624{
e437e3d7 625 struct via82xx *chip = dev_id;
1da177e4
LT		 626 unsigned int status;
627 unsigned int i;
628
629 status = inl(VIAREG(chip, SGD_SHADOW));
630 if (! (status & chip->intr_mask)) {
631 if (chip->rmidi)
632 /* check mpu401 interrupt */
7d12e780 633 return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 634 return IRQ_NONE;
635 }
636
637 /* check status for each stream */
638 spin_lock(&chip->reg_lock);
639 for (i = 0; i < chip->num_devs; i++) {
e437e3d7 640 struct viadev *viadev = &chip->devs[i];
1da177e4 641 unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
4f550df5 642 if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
1da177e4
LT		 643 continue;
644 if (viadev->substream && viadev->running) {
4f550df5
KW		 645 /*
646 * Update hwptr_done based on 'period elapsed'
647 * interrupts. We'll use it, when the chip returns 0
648 * for OFFSET_CURR_COUNT.
649 */
650 if (c_status & VIA_REG_STAT_EOL)
651 viadev->hwptr_done = 0;
652 else
653 viadev->hwptr_done += viadev->fragsize;
654 viadev->in_interrupt = c_status;
1da177e4
LT		 655 spin_unlock(&chip->reg_lock);
656 snd_pcm_period_elapsed(viadev->substream);
657 spin_lock(&chip->reg_lock);
4f550df5 658 viadev->in_interrupt = 0;
1da177e4
LT		 659 }
660 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
661 }
662 spin_unlock(&chip->reg_lock);
663 return IRQ_HANDLED;
664}
665
4f550df5
KW		 666/*
667 * Interrupt handler
668 */
7d12e780 669static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
4f550df5 670{
e437e3d7 671 struct via82xx *chip = dev_id;
4f550df5
KW		 672 unsigned int status;
673 unsigned int i;
674 int irqreturn = 0;
675
676 /* check status for each stream */
677 spin_lock(&chip->reg_lock);
678 status = inl(VIAREG(chip, SGD_SHADOW));
679
680 for (i = 0; i < chip->num_devs; i++) {
e437e3d7
TI		 681 struct viadev *viadev = &chip->devs[i];
682 struct snd_pcm_substream *substream;
4f550df5
KW		 683 unsigned char c_status, shadow_status;
684
685 shadow_status = (status >> viadev->shadow_shift) &
686 (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
687 VIA_REG_STAT_FLAG);
688 c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
689 if (!c_status)
690 continue;
691
692 substream = viadev->substream;
693 if (substream && viadev->running) {
694 /*
695 * Update hwptr_done based on 'period elapsed'
696 * interrupts. We'll use it, when the chip returns 0
697 * for OFFSET_CURR_COUNT.
698 */
699 if (c_status & VIA_REG_STAT_EOL)
700 viadev->hwptr_done = 0;
701 else
702 viadev->hwptr_done += viadev->fragsize;
703 viadev->in_interrupt = c_status;
704 if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
705 viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
706 spin_unlock(&chip->reg_lock);
707
708 snd_pcm_period_elapsed(substream);
709
710 spin_lock(&chip->reg_lock);
711 viadev->in_interrupt = 0;
712 }
713 outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
714 irqreturn = 1;
715 }
716 spin_unlock(&chip->reg_lock);
717 return IRQ_RETVAL(irqreturn);
718}
719
1da177e4
LT		 720/*
721 * PCM callbacks
722 */
723
724/*
725 * trigger callback
726 */
e437e3d7 727static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 728{
e437e3d7
TI		 729 struct via82xx *chip = snd_pcm_substream_chip(substream);
730 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 731 unsigned char val;
732
733 if (chip->chip_type != TYPE_VIA686)
734 val = VIA_REG_CTRL_INT;
735 else
736 val = 0;
737 switch (cmd) {
738 case SNDRV_PCM_TRIGGER_START:
41e4845c 739 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 740 val |= VIA_REG_CTRL_START;
741 viadev->running = 1;
742 break;
743 case SNDRV_PCM_TRIGGER_STOP:
41e4845c 744 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 745 val = VIA_REG_CTRL_TERMINATE;
746 viadev->running = 0;
747 break;
748 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
749 val |= VIA_REG_CTRL_PAUSE;
750 viadev->running = 0;
751 break;
752 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
753 viadev->running = 1;
754 break;
755 default:
756 return -EINVAL;
757 }
758 outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
759 if (cmd == SNDRV_PCM_TRIGGER_STOP)
760 snd_via82xx_channel_reset(chip, viadev);
761 return 0;
762}
763
764
765/*
766 * pointer callbacks
767 */
768
769/*
770 * calculate the linear position at the given sg-buffer index and the rest count
771 */
772
773#define check_invalid_pos(viadev,pos) \
e437e3d7
TI		 774 ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
775 viadev->lastpos < viadev->bufsize2))
1da177e4 776
e437e3d7
TI		 777static inline unsigned int calc_linear_pos(struct viadev *viadev, unsigned int idx,
778 unsigned int count)
1da177e4
LT		 779{
780 unsigned int size, base, res;
781
782 size = viadev->idx_table[idx].size;
783 base = viadev->idx_table[idx].offset;
784 res = base + size - count;
4f550df5
KW		 785 if (res >= viadev->bufsize)
786 res -= viadev->bufsize;
1da177e4
LT		 787
788 /* check the validity of the calculated position */
789 if (size < count) {
e437e3d7
TI		 790 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
791 (int)size, (int)count);
1da177e4
LT		 792 res = viadev->lastpos;
793 } else {
794 if (! count) {
795 /* Some mobos report count = 0 on the DMA boundary,
796 * i.e. count = size indeed.
797 * Let's check whether this step is above the expected size.
798 */
799 int delta = res - viadev->lastpos;
800 if (delta < 0)
801 delta += viadev->bufsize;
802 if ((unsigned int)delta > viadev->fragsize)
803 res = base;
804 }
805 if (check_invalid_pos(viadev, res)) {
806#ifdef POINTER_DEBUG
e437e3d7
TI		 807 printk(KERN_DEBUG "fail: idx = %i/%i, lastpos = 0x%x, "
808 "bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, "
809 "count = 0x%x\n", idx, viadev->tbl_entries,
810 viadev->lastpos, viadev->bufsize2,
811 viadev->idx_table[idx].offset,
812 viadev->idx_table[idx].size, count);
1da177e4
LT		 813#endif
814 /* count register returns full size when end of buffer is reached */
815 res = base + size;
816 if (check_invalid_pos(viadev, res)) {
e437e3d7
TI		 817 snd_printd(KERN_ERR "invalid via82xx_cur_ptr (2), "
818 "using last valid pointer\n");
1da177e4
LT		 819 res = viadev->lastpos;
820 }
821 }
822 }
1da177e4
LT		 823 return res;
824}
825
826/*
827 * get the current pointer on via686
828 */
e437e3d7 829static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 830{
e437e3d7
TI		 831 struct via82xx *chip = snd_pcm_substream_chip(substream);
832 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 833 unsigned int idx, ptr, count, res;
834
da3cec35
TI		 835 if (snd_BUG_ON(!viadev->tbl_entries))
836 return 0;
1da177e4
LT		 837 if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
838 return 0;
839
840 spin_lock(&chip->reg_lock);
841 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
842 /* The via686a does not have the current index register,
843 * so we need to calculate the index from CURR_PTR.
844 */
845 ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
846 if (ptr <= (unsigned int)viadev->table.addr)
847 idx = 0;
848 else /* CURR_PTR holds the address + 8 */
849 idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
850 res = calc_linear_pos(viadev, idx, count);
4f550df5 851 viadev->lastpos = res; /* remember the last position */
1da177e4
LT		 852 spin_unlock(&chip->reg_lock);
853
854 return bytes_to_frames(substream->runtime, res);
855}
856
857/*
858 * get the current pointer on via823x
859 */
e437e3d7 860static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 861{
e437e3d7
TI		 862 struct via82xx *chip = snd_pcm_substream_chip(substream);
863 struct viadev *viadev = substream->runtime->private_data;
1da177e4 864 unsigned int idx, count, res;
4f550df5 865 int status;
1da177e4 866
da3cec35
TI		 867 if (snd_BUG_ON(!viadev->tbl_entries))
868 return 0;
4f550df5 869
1da177e4 870 spin_lock(&chip->reg_lock);
4f550df5
KW		 871 count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
872 status = viadev->in_interrupt;
873 if (!status)
874 status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
875
c6cc0e3b
BJ		 876 /* An apparent bug in the 8251 is worked around by sending a
877 * REG_CTRL_START. */
878 if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
879 snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
880
4f550df5 881 if (!(status & VIA_REG_STAT_ACTIVE)) {
c6cc0e3b
BJ		 882 res = 0;
883 goto unlock;
4f550df5
KW		 884 }
885 if (count & 0xffffff) {
886 idx = count >> 24;
887 if (idx >= viadev->tbl_entries) {
1da177e4 888#ifdef POINTER_DEBUG
e437e3d7
TI		 889 printk(KERN_DEBUG "fail: invalid idx = %i/%i\n", idx,
890 viadev->tbl_entries);
1da177e4 891#endif
4f550df5
KW		 892 res = viadev->lastpos;
893 } else {
894 count &= 0xffffff;
895 res = calc_linear_pos(viadev, idx, count);
896 }
1da177e4 897 } else {
4f550df5
KW		 898 res = viadev->hwptr_done;
899 if (!viadev->in_interrupt) {
900 if (status & VIA_REG_STAT_EOL) {
901 res = 0;
902 } else
903 if (status & VIA_REG_STAT_FLAG) {
904 res += viadev->fragsize;
905 }
906 }
907 }
908unlock:
909 viadev->lastpos = res;
1da177e4
LT		 910 spin_unlock(&chip->reg_lock);
911
912 return bytes_to_frames(substream->runtime, res);
913}
914
915
916/*
917 * hw_params callback:
918 * allocate the buffer and build up the buffer description table
919 */
e437e3d7
TI		 920static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
921 struct snd_pcm_hw_params *hw_params)
1da177e4 922{
e437e3d7
TI		 923 struct via82xx *chip = snd_pcm_substream_chip(substream);
924 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 925 int err;
926
927 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
928 if (err < 0)
929 return err;
930 err = build_via_table(viadev, substream, chip->pci,
931 params_periods(hw_params),
932 params_period_bytes(hw_params));
933 if (err < 0)
934 return err;
935
936 return 0;
937}
938
939/*
940 * hw_free callback:
941 * clean up the buffer description table and release the buffer
942 */
e437e3d7 943static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
1da177e4 944{
e437e3d7
TI		 945 struct via82xx *chip = snd_pcm_substream_chip(substream);
946 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 947
948 clean_via_table(viadev, substream, chip->pci);
949 snd_pcm_lib_free_pages(substream);
950 return 0;
951}
952
953
954/*
955 * set up the table pointer
956 */
e437e3d7 957static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
1da177e4
LT		 958{
959 snd_via82xx_codec_ready(chip, 0);
960 outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
961 udelay(20);
962 snd_via82xx_codec_ready(chip, 0);
963}
964
965/*
966 * prepare callback for playback and capture on via686
967 */
e437e3d7
TI		 968static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
969 struct snd_pcm_runtime *runtime)
1da177e4
LT		 970{
971 snd_via82xx_channel_reset(chip, viadev);
972 /* this must be set after channel_reset */
973 snd_via82xx_set_table_ptr(chip, viadev);
974 outb(VIA_REG_TYPE_AUTOSTART |
975 (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
976 (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
977 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
978 VIA_REG_TYPE_INT_EOL |
979 VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
980}
981
e437e3d7 982static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 983{
e437e3d7
TI		 984 struct via82xx *chip = snd_pcm_substream_chip(substream);
985 struct viadev *viadev = substream->runtime->private_data;
986 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 987
988 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
989 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
990 via686_setup_format(chip, viadev, runtime);
991 return 0;
992}
993
e437e3d7 994static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 995{
e437e3d7
TI		 996 struct via82xx *chip = snd_pcm_substream_chip(substream);
997 struct viadev *viadev = substream->runtime->private_data;
998 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 999
1000 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1001 via686_setup_format(chip, viadev, runtime);
1002 return 0;
1003}
1004
1005/*
1006 * lock the current rate
1007 */
1008static int via_lock_rate(struct via_rate_lock *rec, int rate)
1009{
1010 int changed = 0;
1011
1012 spin_lock_irq(&rec->lock);
1013 if (rec->rate != rate) {
1014 if (rec->rate && rec->used > 1) /* already set */
1015 changed = -EINVAL;
1016 else {
1017 rec->rate = rate;
1018 changed = 1;
1019 }
1020 }
1021 spin_unlock_irq(&rec->lock);
1022 return changed;
1023}
1024
1025/*
1026 * prepare callback for DSX playback on via823x
1027 */
e437e3d7 1028static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 1029{
e437e3d7
TI		 1030 struct via82xx *chip = snd_pcm_substream_chip(substream);
1031 struct viadev *viadev = substream->runtime->private_data;
1032 struct snd_pcm_runtime *runtime = substream->runtime;
2d7eb7cb 1033 int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
1da177e4
LT		 1034 int rate_changed;
1035 u32 rbits;
1036
2d7eb7cb 1037 if ((rate_changed = via_lock_rate(&chip->rates[0], ac97_rate)) < 0)
1da177e4 1038 return rate_changed;
16d3f140 1039 if (rate_changed)
1da177e4
LT		 1040 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
1041 chip->no_vra ? 48000 : runtime->rate);
16d3f140
TI		 1042 if (chip->spdif_on && viadev->reg_offset == 0x30)
1043 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1044
1da177e4
LT		 1045 if (runtime->rate == 48000)
1046 rbits = 0xfffff;
1047 else
e437e3d7
TI		 1048 rbits = (0x100000 / 48000) * runtime->rate +
1049 ((0x100000 % 48000) * runtime->rate) / 48000;
da3cec35 1050 snd_BUG_ON(rbits & ~0xfffff);
1da177e4
LT		 1051 snd_via82xx_channel_reset(chip, viadev);
1052 snd_via82xx_set_table_ptr(chip, viadev);
e437e3d7
TI		 1053 outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
1054 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
1055 outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
1056 VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
1da177e4
LT		 1057 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
1058 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
1059 rbits | /* rate */
1060 0xff000000, /* STOP index is never reached */
1061 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1062 udelay(20);
1063 snd_via82xx_codec_ready(chip, 0);
1064 return 0;
1065}
1066
1067/*
1068 * prepare callback for multi-channel playback on via823x
1069 */
e437e3d7 1070static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
1da177e4 1071{
e437e3d7
TI		 1072 struct via82xx *chip = snd_pcm_substream_chip(substream);
1073 struct viadev *viadev = substream->runtime->private_data;
1074 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1075 unsigned int slots;
1076 int fmt;
1077
1078 if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
1079 return -EINVAL;
1080 snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
1081 snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
1082 snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
1083 snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
1084 snd_via82xx_channel_reset(chip, viadev);
1085 snd_via82xx_set_table_ptr(chip, viadev);
1086
e437e3d7
TI		 1087 fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
1088 VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
1da177e4
LT		 1089 fmt |= runtime->channels << 4;
1090 outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
1091#if 0
1092 if (chip->revision == VIA_REV_8233A)
1093 slots = 0;
1094 else
1095#endif
1096 {
1097 /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
1098 /* corresponding to FL, FR, RL, RR, C, LFE ?? */
1099 switch (runtime->channels) {
1100 case 1: slots = (1<<0) | (1<<4); break;
1101 case 2: slots = (1<<0) | (2<<4); break;
1102 case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
1103 case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
1104 case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
1105 case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
1106 default: slots = 0; break;
1107 }
1108 }
1109 /* STOP index is never reached */
1110 outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
1111 udelay(20);
1112 snd_via82xx_codec_ready(chip, 0);
1113 return 0;
1114}
1115
1116/*
1117 * prepare callback for capture on via823x
1118 */
e437e3d7 1119static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 1120{
e437e3d7
TI		 1121 struct via82xx *chip = snd_pcm_substream_chip(substream);
1122 struct viadev *viadev = substream->runtime->private_data;
1123 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1124
1125 if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
1126 return -EINVAL;
1127 snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
1128 snd_via82xx_channel_reset(chip, viadev);
1129 snd_via82xx_set_table_ptr(chip, viadev);
1130 outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
1131 outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
1132 (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
1133 0xff000000, /* STOP index is never reached */
1134 VIADEV_REG(viadev, OFFSET_STOP_IDX));
1135 udelay(20);
1136 snd_via82xx_codec_ready(chip, 0);
1137 return 0;
1138}
1139
1140
1141/*
1142 * pcm hardware definition, identical for both playback and capture
1143 */
e437e3d7 1144static struct snd_pcm_hardware snd_via82xx_hw =
1da177e4
LT		 1145{
1146 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1147 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1148 SNDRV_PCM_INFO_MMAP_VALID |
41e4845c 1149 /* SNDRV_PCM_INFO_RESUME | */
1da177e4
LT		 1150 SNDRV_PCM_INFO_PAUSE),
1151 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1152 .rates = SNDRV_PCM_RATE_48000,
1153 .rate_min = 48000,
1154 .rate_max = 48000,
1155 .channels_min = 1,
1156 .channels_max = 2,
5503600a 1157 .buffer_bytes_max = VIA_MAX_BUFSIZE,
1da177e4 1158 .period_bytes_min = 32,
5503600a 1159 .period_bytes_max = VIA_MAX_BUFSIZE / 2,
1da177e4
LT		 1160 .periods_min = 2,
1161 .periods_max = VIA_TABLE_SIZE / 2,
1162 .fifo_size = 0,
1163};
1164
1165
1166/*
1167 * open callback skeleton
1168 */
e437e3d7
TI		 1169static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
1170 struct snd_pcm_substream *substream)
1da177e4 1171{
e437e3d7 1172 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 1173 int err;
1174 struct via_rate_lock *ratep;
1175
1176 runtime->hw = snd_via82xx_hw;
1177
1178 /* set the hw rate condition */
1179 ratep = &chip->rates[viadev->direction];
1180 spin_lock_irq(&ratep->lock);
1181 ratep->used++;
1182 if (chip->spdif_on && viadev->reg_offset == 0x30) {
1183 /* DXS#3 and spdif is on */
1184 runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
1185 snd_pcm_limit_hw_rates(runtime);
1186 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
1187 /* fixed DXS playback rate */
1188 runtime->hw.rates = SNDRV_PCM_RATE_48000;
1189 runtime->hw.rate_min = runtime->hw.rate_max = 48000;
2d7eb7cb
SV		 1190 } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
1191 /* use full SRC capabilities of DXS */
1192 runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
1193 SNDRV_PCM_RATE_8000_48000);
1194 runtime->hw.rate_min = 8000;
1195 runtime->hw.rate_max = 48000;
1da177e4
LT		 1196 } else if (! ratep->rate) {
1197 int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
1198 runtime->hw.rates = chip->ac97->rates[idx];
1199 snd_pcm_limit_hw_rates(runtime);
1200 } else {
1201 /* a fixed rate */
1202 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1203 runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
1204 }
1205 spin_unlock_irq(&ratep->lock);
1206
1207 /* we may remove following constaint when we modify table entries
1208 in interrupt */
1209 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1210 return err;
1211
1212 runtime->private_data = viadev;
1213 viadev->substream = substream;
1214
1215 return 0;
1216}
1217
1218
1219/*
3d009413 1220 * open callback for playback on via686
1da177e4 1221 */
3d009413 1222static int snd_via686_playback_open(struct snd_pcm_substream *substream)
1da177e4 1223{
e437e3d7
TI		 1224 struct via82xx *chip = snd_pcm_substream_chip(substream);
1225 struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
1da177e4
LT		 1226 int err;
1227
1228 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1229 return err;
1230 return 0;
1231}
1232
3d009413
CL		 1233/*
1234 * open callback for playback on via823x DXS
1235 */
1236static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
1237{
1238 struct via82xx *chip = snd_pcm_substream_chip(substream);
1239 struct viadev *viadev;
1240 unsigned int stream;
1241 int err;
1242
1243 viadev = &chip->devs[chip->playback_devno + substream->number];
1244 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1245 return err;
1246 stream = viadev->reg_offset / 0x10;
1247 if (chip->dxs_controls[stream]) {
1248 chip->playback_volume[stream][0] = 0;
1249 chip->playback_volume[stream][1] = 0;
1250 chip->dxs_controls[stream]->vd[0].access &=
1251 ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1252 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1253 SNDRV_CTL_EVENT_MASK_INFO,
1254 &chip->dxs_controls[stream]->id);
1255 }
1256 return 0;
1257}
1258
1da177e4
LT		 1259/*
1260 * open callback for playback on via823x multi-channel
1261 */
e437e3d7 1262static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
1da177e4 1263{
e437e3d7
TI		 1264 struct via82xx *chip = snd_pcm_substream_chip(substream);
1265 struct viadev *viadev = &chip->devs[chip->multi_devno];
1da177e4
LT		 1266 int err;
1267 /* channels constraint for VIA8233A
1268 * 3 and 5 channels are not supported
1269 */
1270 static unsigned int channels[] = {
1271 1, 2, 4, 6
1272 };
e437e3d7 1273 static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
1da177e4
LT		 1274 .count = ARRAY_SIZE(channels),
1275 .list = channels,
1276 .mask = 0,
1277 };
1278
1279 if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0)
1280 return err;
1281 substream->runtime->hw.channels_max = 6;
1282 if (chip->revision == VIA_REV_8233A)
e437e3d7
TI		 1283 snd_pcm_hw_constraint_list(substream->runtime, 0,
1284 SNDRV_PCM_HW_PARAM_CHANNELS,
1285 &hw_constraints_channels);
1da177e4
LT		 1286 return 0;
1287}
1288
1289/*
1290 * open callback for capture on via686 and via823x
1291 */
e437e3d7 1292static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
1da177e4 1293{
e437e3d7
TI		 1294 struct via82xx *chip = snd_pcm_substream_chip(substream);
1295 struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
1da177e4
LT		 1296
1297 return snd_via82xx_pcm_open(chip, viadev, substream);
1298}
1299
1300/*
1301 * close callback
1302 */
e437e3d7 1303static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
1da177e4 1304{
e437e3d7
TI		 1305 struct via82xx *chip = snd_pcm_substream_chip(substream);
1306 struct viadev *viadev = substream->runtime->private_data;
1da177e4
LT		 1307 struct via_rate_lock *ratep;
1308
1309 /* release the rate lock */
1310 ratep = &chip->rates[viadev->direction];
1311 spin_lock_irq(&ratep->lock);
1312 ratep->used--;
1313 if (! ratep->used)
1314 ratep->rate = 0;
1315 spin_unlock_irq(&ratep->lock);
6dbe6628
TI		 1316 if (! ratep->rate) {
1317 if (! viadev->direction) {
1318 snd_ac97_update_power(chip->ac97,
1319 AC97_PCM_FRONT_DAC_RATE, 0);
1320 snd_ac97_update_power(chip->ac97,
1321 AC97_PCM_SURR_DAC_RATE, 0);
1322 snd_ac97_update_power(chip->ac97,
1323 AC97_PCM_LFE_DAC_RATE, 0);
1324 } else
1325 snd_ac97_update_power(chip->ac97,
1326 AC97_PCM_LR_ADC_RATE, 0);
1327 }
1da177e4
LT		 1328 viadev->substream = NULL;
1329 return 0;
1330}
1331
3d009413
CL		 1332static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
1333{
1334 struct via82xx *chip = snd_pcm_substream_chip(substream);
1335 struct viadev *viadev = substream->runtime->private_data;
1336 unsigned int stream;
1337
1338 stream = viadev->reg_offset / 0x10;
1339 if (chip->dxs_controls[stream]) {
1340 chip->dxs_controls[stream]->vd[0].access |=
1341 SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1342 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
1343 &chip->dxs_controls[stream]->id);
1344 }
1345 return snd_via82xx_pcm_close(substream);
1346}
1347
1da177e4
LT		 1348
1349/* via686 playback callbacks */
e437e3d7 1350static struct snd_pcm_ops snd_via686_playback_ops = {
3d009413 1351 .open = snd_via686_playback_open,
1da177e4
LT		 1352 .close = snd_via82xx_pcm_close,
1353 .ioctl = snd_pcm_lib_ioctl,
1354 .hw_params = snd_via82xx_hw_params,
1355 .hw_free = snd_via82xx_hw_free,
1356 .prepare = snd_via686_playback_prepare,
1357 .trigger = snd_via82xx_pcm_trigger,
1358 .pointer = snd_via686_pcm_pointer,
1359 .page = snd_pcm_sgbuf_ops_page,
1360};
1361
1362/* via686 capture callbacks */
e437e3d7 1363static struct snd_pcm_ops snd_via686_capture_ops = {
1da177e4
LT		 1364 .open = snd_via82xx_capture_open,
1365 .close = snd_via82xx_pcm_close,
1366 .ioctl = snd_pcm_lib_ioctl,
1367 .hw_params = snd_via82xx_hw_params,
1368 .hw_free = snd_via82xx_hw_free,
1369 .prepare = snd_via686_capture_prepare,
1370 .trigger = snd_via82xx_pcm_trigger,
1371 .pointer = snd_via686_pcm_pointer,
1372 .page = snd_pcm_sgbuf_ops_page,
1373};
1374
1375/* via823x DSX playback callbacks */
e437e3d7 1376static struct snd_pcm_ops snd_via8233_playback_ops = {
3d009413
CL		 1377 .open = snd_via8233_playback_open,
1378 .close = snd_via8233_playback_close,
1da177e4
LT		 1379 .ioctl = snd_pcm_lib_ioctl,
1380 .hw_params = snd_via82xx_hw_params,
1381 .hw_free = snd_via82xx_hw_free,
1382 .prepare = snd_via8233_playback_prepare,
1383 .trigger = snd_via82xx_pcm_trigger,
1384 .pointer = snd_via8233_pcm_pointer,
1385 .page = snd_pcm_sgbuf_ops_page,
1386};
1387
1388/* via823x multi-channel playback callbacks */
e437e3d7 1389static struct snd_pcm_ops snd_via8233_multi_ops = {
1da177e4
LT		 1390 .open = snd_via8233_multi_open,
1391 .close = snd_via82xx_pcm_close,
1392 .ioctl = snd_pcm_lib_ioctl,
1393 .hw_params = snd_via82xx_hw_params,
1394 .hw_free = snd_via82xx_hw_free,
1395 .prepare = snd_via8233_multi_prepare,
1396 .trigger = snd_via82xx_pcm_trigger,
1397 .pointer = snd_via8233_pcm_pointer,
1398 .page = snd_pcm_sgbuf_ops_page,
1399};
1400
1401/* via823x capture callbacks */
e437e3d7 1402static struct snd_pcm_ops snd_via8233_capture_ops = {
1da177e4
LT		 1403 .open = snd_via82xx_capture_open,
1404 .close = snd_via82xx_pcm_close,
1405 .ioctl = snd_pcm_lib_ioctl,
1406 .hw_params = snd_via82xx_hw_params,
1407 .hw_free = snd_via82xx_hw_free,
1408 .prepare = snd_via8233_capture_prepare,
1409 .trigger = snd_via82xx_pcm_trigger,
1410 .pointer = snd_via8233_pcm_pointer,
1411 .page = snd_pcm_sgbuf_ops_page,
1412};
1413
1414
e437e3d7
TI		 1415static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
1416 int shadow_pos, int direction)
1da177e4
LT		 1417{
1418 chip->devs[idx].reg_offset = reg_offset;
4f550df5 1419 chip->devs[idx].shadow_shift = shadow_pos * 4;
1da177e4
LT		 1420 chip->devs[idx].direction = direction;
1421 chip->devs[idx].port = chip->port + reg_offset;
1422}
1423
1424/*
1425 * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
1426 */
e437e3d7 1427static int __devinit snd_via8233_pcm_new(struct via82xx *chip)
1da177e4 1428{
e437e3d7 1429 struct snd_pcm *pcm;
1da177e4
LT		 1430 int i, err;
1431
1432 chip->playback_devno = 0; /* x 4 */
1433 chip->multi_devno = 4; /* x 1 */
1434 chip->capture_devno = 5; /* x 2 */
1435 chip->num_devs = 7;
1436 chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
1437
1438 /* PCM #0: 4 DSX playbacks and 1 capture */
1439 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
1440 if (err < 0)
1441 return err;
1442 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1443 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1444 pcm->private_data = chip;
1445 strcpy(pcm->name, chip->card->shortname);
1446 chip->pcms[0] = pcm;
1447 /* set up playbacks */
1448 for (i = 0; i < 4; i++)
4f550df5 1449 init_viadev(chip, i, 0x10 * i, i, 0);
1da177e4 1450 /* capture */
4f550df5 1451 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1452
a2e3961d
TI		 1453 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1454 snd_dma_pci_data(chip->pci),
5503600a 1455 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1456
1457 /* PCM #1: multi-channel playback and 2nd capture */
1458 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
1459 if (err < 0)
1460 return err;
1461 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1462 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1463 pcm->private_data = chip;
1464 strcpy(pcm->name, chip->card->shortname);
1465 chip->pcms[1] = pcm;
1466 /* set up playback */
4f550df5 1467 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1468 /* set up capture */
4f550df5 1469 init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
1da177e4 1470
a2e3961d
TI		 1471 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1472 snd_dma_pci_data(chip->pci),
5503600a 1473 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1474 return 0;
1475}
1476
1477/*
1478 * create pcm instances for VIA8233A
1479 */
e437e3d7 1480static int __devinit snd_via8233a_pcm_new(struct via82xx *chip)
1da177e4 1481{
e437e3d7 1482 struct snd_pcm *pcm;
1da177e4
LT		 1483 int err;
1484
1485 chip->multi_devno = 0;
1486 chip->playback_devno = 1;
1487 chip->capture_devno = 2;
1488 chip->num_devs = 3;
1489 chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
1490
1491 /* PCM #0: multi-channel playback and capture */
1492 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1493 if (err < 0)
1494 return err;
1495 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
1496 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
1497 pcm->private_data = chip;
1498 strcpy(pcm->name, chip->card->shortname);
1499 chip->pcms[0] = pcm;
1500 /* set up playback */
4f550df5 1501 init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
1da177e4 1502 /* capture */
4f550df5 1503 init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
1da177e4 1504
a2e3961d
TI		 1505 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1506 snd_dma_pci_data(chip->pci),
5503600a 1507 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1508
1509 /* SPDIF supported? */
1510 if (! ac97_can_spdif(chip->ac97))
1511 return 0;
1512
1513 /* PCM #1: DXS3 playback (for spdif) */
1514 err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
1515 if (err < 0)
1516 return err;
1517 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
1518 pcm->private_data = chip;
1519 strcpy(pcm->name, chip->card->shortname);
1520 chip->pcms[1] = pcm;
1521 /* set up playback */
4f550df5 1522 init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
1da177e4 1523
a2e3961d
TI		 1524 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1525 snd_dma_pci_data(chip->pci),
5503600a 1526 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1527 return 0;
1528}
1529
1530/*
1531 * create a pcm instance for via686a/b
1532 */
e437e3d7 1533static int __devinit snd_via686_pcm_new(struct via82xx *chip)
1da177e4 1534{
e437e3d7 1535 struct snd_pcm *pcm;
1da177e4
LT		 1536 int err;
1537
1538 chip->playback_devno = 0;
1539 chip->capture_devno = 1;
1540 chip->num_devs = 2;
1541 chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
1542
1543 err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
1544 if (err < 0)
1545 return err;
1546 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
1547 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
1548 pcm->private_data = chip;
1549 strcpy(pcm->name, chip->card->shortname);
1550 chip->pcms[0] = pcm;
4f550df5
KW		 1551 init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
1552 init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
1da177e4 1553
a2e3961d
TI		 1554 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
1555 snd_dma_pci_data(chip->pci),
5503600a 1556 64*1024, VIA_MAX_BUFSIZE);
1da177e4
LT		 1557 return 0;
1558}
1559
1560
1561/*
1562 * Mixer part
1563 */
1564
e437e3d7
TI		 1565static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
1566 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1567{
1568 /* formerly they were "Line" and "Mic", but it looks like that they
1569 * have nothing to do with the actual physical connections...
1570 */
1571 static char *texts[2] = {
1572 "Input1", "Input2"
1573 };
1574 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1575 uinfo->count = 1;
1576 uinfo->value.enumerated.items = 2;
1577 if (uinfo->value.enumerated.item >= 2)
1578 uinfo->value.enumerated.item = 1;
1579 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1580 return 0;
1581}
1582
e437e3d7
TI		 1583static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
1584 struct snd_ctl_elem_value *ucontrol)
1da177e4 1585{
e437e3d7 1586 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1587 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1588 ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
1589 return 0;
1590}
1591
e437e3d7
TI		 1592static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
1593 struct snd_ctl_elem_value *ucontrol)
1da177e4 1594{
e437e3d7 1595 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1596 unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
1597 u8 val, oval;
1598
1599 spin_lock_irq(&chip->reg_lock);
1600 oval = inb(port);
1601 val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
1602 if (ucontrol->value.enumerated.item[0])
1603 val |= VIA_REG_CAPTURE_CHANNEL_MIC;
1604 if (val != oval)
1605 outb(val, port);
1606 spin_unlock_irq(&chip->reg_lock);
1607 return val != oval;
1608}
1609
e437e3d7 1610static struct snd_kcontrol_new snd_via8233_capture_source __devinitdata = {
1da177e4
LT		 1611 .name = "Input Source Select",
1612 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1613 .info = snd_via8233_capture_source_info,
1614 .get = snd_via8233_capture_source_get,
1615 .put = snd_via8233_capture_source_put,
1616};
1617
a5ce8890 1618#define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
1da177e4 1619
e437e3d7
TI		 1620static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
1621 struct snd_ctl_elem_value *ucontrol)
1da177e4 1622{
e437e3d7 1623 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1624 u8 val;
1625
1626 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
1627 ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
1628 return 0;
1629}
1630
e437e3d7
TI		 1631static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
1632 struct snd_ctl_elem_value *ucontrol)
1da177e4 1633{
e437e3d7 1634 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1635 u8 val, oval;
1636
1637 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
1638 val = oval & ~VIA8233_SPDIF_DX3;
1639 if (ucontrol->value.integer.value[0])
1640 val |= VIA8233_SPDIF_DX3;
1641 /* save the spdif flag for rate filtering */
1642 chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
1643 if (val != oval) {
1644 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
1645 return 1;
1646 }
1647 return 0;
1648}
1649
e437e3d7 1650static struct snd_kcontrol_new snd_via8233_dxs3_spdif_control __devinitdata = {
10e8d78a 1651 .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
1da177e4
LT		 1652 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1653 .info = snd_via8233_dxs3_spdif_info,
1654 .get = snd_via8233_dxs3_spdif_get,
1655 .put = snd_via8233_dxs3_spdif_put,
1656};
1657
e437e3d7
TI		 1658static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
1659 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1660{
1661 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1662 uinfo->count = 2;
1663 uinfo->value.integer.min = 0;
1664 uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
1665 return 0;
1666}
1667
e437e3d7
TI		 1668static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
1669 struct snd_ctl_elem_value *ucontrol)
1da177e4 1670{
e437e3d7 1671 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1672 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1673
1674 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
1675 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
1676 return 0;
1677}
1678
e437e3d7
TI		 1679static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
1680 struct snd_ctl_elem_value *ucontrol)
00f226d4 1681{
e437e3d7 1682 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
00f226d4
HM		 1683 ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
1684 ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
1da177e4
LT		 1685 return 0;
1686}
1687
e437e3d7
TI		 1688static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
1689 struct snd_ctl_elem_value *ucontrol)
00f226d4 1690{
e437e3d7 1691 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
2fb930b5 1692 unsigned int idx = kcontrol->id.subdevice;
00f226d4
HM		 1693 unsigned long port = chip->port + 0x10 * idx;
1694 unsigned char val;
1695 int i, change = 0;
1696
1697 for (i = 0; i < 2; i++) {
1698 val = ucontrol->value.integer.value[i];
1699 if (val > VIA_DXS_MAX_VOLUME)
1700 val = VIA_DXS_MAX_VOLUME;
1701 val = VIA_DXS_MAX_VOLUME - val;
1702 change |= val != chip->playback_volume[idx][i];
1703 if (change) {
1704 chip->playback_volume[idx][i] = val;
1705 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1706 }
1707 }
1708 return change;
1709}
1710
e437e3d7
TI		 1711static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
1712 struct snd_ctl_elem_value *ucontrol)
1da177e4 1713{
e437e3d7 1714 struct via82xx *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1715 unsigned int idx;
1716 unsigned char val;
1717 int i, change = 0;
1718
1719 for (i = 0; i < 2; i++) {
1720 val = ucontrol->value.integer.value[i];
1721 if (val > VIA_DXS_MAX_VOLUME)
1722 val = VIA_DXS_MAX_VOLUME;
1723 val = VIA_DXS_MAX_VOLUME - val;
00f226d4 1724 if (val != chip->playback_volume_c[i]) {
1da177e4 1725 change = 1;
00f226d4 1726 chip->playback_volume_c[i] = val;
1da177e4
LT		 1727 for (idx = 0; idx < 4; idx++) {
1728 unsigned long port = chip->port + 0x10 * idx;
00f226d4 1729 chip->playback_volume[idx][i] = val;
1da177e4
LT		 1730 outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
1731 }
1732 }
1733 }
1734 return change;
1735}
1736
b452e08e 1737static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
7058c042 1738
e437e3d7 1739static struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control __devinitdata = {
1da177e4
LT		 1740 .name = "PCM Playback Volume",
1741 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
7058c042
TI		 1742 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1743 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1744 .info = snd_via8233_dxs_volume_info,
00f226d4
HM		 1745 .get = snd_via8233_pcmdxs_volume_get,
1746 .put = snd_via8233_pcmdxs_volume_put,
7058c042 1747 .tlv = { .p = db_scale_dxs }
00f226d4
HM		 1748};
1749
e437e3d7 1750static struct snd_kcontrol_new snd_via8233_dxs_volume_control __devinitdata = {
2fb930b5
CL		 1751 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1752 .device = 0,
1753 /* .subdevice set later */
1754 .name = "PCM Playback Volume",
3d009413
CL		 1755 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1756 SNDRV_CTL_ELEM_ACCESS_TLV_READ |
1757 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
00f226d4 1758 .info = snd_via8233_dxs_volume_info,
1da177e4
LT		 1759 .get = snd_via8233_dxs_volume_get,
1760 .put = snd_via8233_dxs_volume_put,
7058c042 1761 .tlv = { .p = db_scale_dxs }
1da177e4
LT		 1762};
1763
1764/*
1765 */
1766
e437e3d7 1767static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1768{
e437e3d7 1769 struct via82xx *chip = bus->private_data;
1da177e4
LT		 1770 chip->ac97_bus = NULL;
1771}
1772
e437e3d7 1773static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1774{
e437e3d7 1775 struct via82xx *chip = ac97->private_data;
1da177e4
LT		 1776 chip->ac97 = NULL;
1777}
1778
1779static struct ac97_quirk ac97_quirks[] = {
1780 {
69ad07cf
JK		 1781 .subvendor = 0x1106,
1782 .subdevice = 0x4161,
1da177e4
LT		 1783 .codec_id = 0x56494161, /* VT1612A */
1784 .name = "Soltek SL-75DRV5",
1785 .type = AC97_TUNE_NONE
1786 },
1787 { /* FIXME: which codec? */
69ad07cf
JK		 1788 .subvendor = 0x1106,
1789 .subdevice = 0x4161,
1da177e4
LT		 1790 .name = "ASRock K7VT2",
1791 .type = AC97_TUNE_HP_ONLY
1792 },
bf30a430
CL		 1793 {
1794 .subvendor = 0x110a,
1795 .subdevice = 0x0079,
1796 .name = "Fujitsu Siemens D1289",
1797 .type = AC97_TUNE_HP_ONLY
1798 },
1da177e4 1799 {
69ad07cf
JK		 1800 .subvendor = 0x1019,
1801 .subdevice = 0x0a81,
1da177e4
LT		 1802 .name = "ECS K7VTA3",
1803 .type = AC97_TUNE_HP_ONLY
1804 },
1805 {
69ad07cf
JK		 1806 .subvendor = 0x1019,
1807 .subdevice = 0x0a85,
1da177e4
LT		 1808 .name = "ECS L7VMM2",
1809 .type = AC97_TUNE_HP_ONLY
1810 },
942fd1eb
WS		 1811 {
1812 .subvendor = 0x1019,
1813 .subdevice = 0x1841,
1814 .name = "ECS K7VTA3",
1815 .type = AC97_TUNE_HP_ONLY
1816 },
1da177e4 1817 {
69ad07cf
JK		 1818 .subvendor = 0x1849,
1819 .subdevice = 0x3059,
1da177e4
LT		 1820 .name = "ASRock K7VM2",
1821 .type = AC97_TUNE_HP_ONLY /* VT1616 */
1822 },
1823 {
69ad07cf
JK		 1824 .subvendor = 0x14cd,
1825 .subdevice = 0x7002,
1da177e4
LT		 1826 .name = "Unknown",
1827 .type = AC97_TUNE_ALC_JACK
1828 },
1829 {
69ad07cf
JK		 1830 .subvendor = 0x1071,
1831 .subdevice = 0x8590,
1da177e4
LT		 1832 .name = "Mitac Mobo",
1833 .type = AC97_TUNE_ALC_JACK
1834 },
1835 {
69ad07cf
JK		 1836 .subvendor = 0x161f,
1837 .subdevice = 0x202b,
1da177e4
LT		 1838 .name = "Arima Notebook",
1839 .type = AC97_TUNE_HP_ONLY,
1840 },
dac8dddd
TI		 1841 {
1842 .subvendor = 0x161f,
1843 .subdevice = 0x2032,
1844 .name = "Targa Traveller 811",
1845 .type = AC97_TUNE_HP_ONLY,
1846 },
d4199f01
DC		 1847 {
1848 .subvendor = 0x161f,
1849 .subdevice = 0x2032,
1850 .name = "m680x",
1851 .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
1852 },
9674513d
TI		 1853 {
1854 .subvendor = 0x1297,
1855 .subdevice = 0xa232,
1856 .name = "Shuttle AK32VN",
1857 .type = AC97_TUNE_HP_ONLY
1858 },
1da177e4
LT		 1859 { } /* terminator */
1860};
1861
e437e3d7 1862static int __devinit snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
1da177e4 1863{
e437e3d7 1864 struct snd_ac97_template ac97;
1da177e4 1865 int err;
e437e3d7 1866 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1867 .write = snd_via82xx_codec_write,
1868 .read = snd_via82xx_codec_read,
1869 .wait = snd_via82xx_codec_wait,
1870 };
1871
1872 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1873 return err;
1874 chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
1875 chip->ac97_bus->clock = chip->ac97_clock;
1da177e4
LT		 1876
1877 memset(&ac97, 0, sizeof(ac97));
1878 ac97.private_data = chip;
1879 ac97.private_free = snd_via82xx_mixer_free_ac97;
1880 ac97.pci = chip->pci;
f1a63a38 1881 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1da177e4
LT		 1882 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1883 return err;
1884
1885 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
1886
1887 if (chip->chip_type != TYPE_VIA686) {
1888 /* use slot 10/11 */
1889 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1890 }
1891
1892 return 0;
1893}
1894
1895#ifdef SUPPORT_JOYSTICK
1896#define JOYSTICK_ADDR 0x200
e437e3d7 1897static int __devinit snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1898{
1899 struct gameport *gp;
1900 struct resource *r;
1901
b7fe4622 1902 if (!joystick)
1da177e4
LT		 1903 return -ENODEV;
1904
1905 r = request_region(JOYSTICK_ADDR, 8, "VIA686 gameport");
1906 if (!r) {
e437e3d7
TI		 1907 printk(KERN_WARNING "via82xx: cannot reserve joystick port 0x%#x\n",
1908 JOYSTICK_ADDR);
1da177e4
LT		 1909 return -EBUSY;
1910 }
1911
1912 chip->gameport = gp = gameport_allocate_port();
1913 if (!gp) {
1914 printk(KERN_ERR "via82xx: cannot allocate memory for gameport\n");
b1d5776d 1915 release_and_free_resource(r);
1da177e4
LT		 1916 return -ENOMEM;
1917 }
1918
1919 gameport_set_name(gp, "VIA686 Gameport");
1920 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1921 gameport_set_dev_parent(gp, &chip->pci->dev);
1922 gp->io = JOYSTICK_ADDR;
1923 gameport_set_port_data(gp, r);
1924
1925 /* Enable legacy joystick port */
1926 *legacy |= VIA_FUNC_ENABLE_GAME;
1927 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
1928
1929 gameport_register_port(chip->gameport);
1930
1931 return 0;
1932}
1933
e437e3d7 1934static void snd_via686_free_gameport(struct via82xx *chip)
1da177e4
LT		 1935{
1936 if (chip->gameport) {
1937 struct resource *r = gameport_get_port_data(chip->gameport);
1938
1939 gameport_unregister_port(chip->gameport);
1940 chip->gameport = NULL;
b1d5776d 1941 release_and_free_resource(r);
1da177e4
LT		 1942 }
1943}
1944#else
e437e3d7 1945static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
1da177e4
LT		 1946{
1947 return -ENOSYS;
1948}
e437e3d7 1949static inline void snd_via686_free_gameport(struct via82xx *chip) { }
1da177e4
LT		 1950#endif
1951
1952
1953/*
1954 *
1955 */
1956
e437e3d7 1957static int __devinit snd_via8233_init_misc(struct via82xx *chip)
1da177e4
LT		 1958{
1959 int i, err, caps;
1960 unsigned char val;
1961
1962 caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
1963 for (i = 0; i < caps; i++) {
1964 snd_via8233_capture_source.index = i;
1965 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
1966 if (err < 0)
1967 return err;
1968 }
1969 if (ac97_can_spdif(chip->ac97)) {
1970 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
1971 if (err < 0)
1972 return err;
1973 }
1974 if (chip->chip_type != TYPE_VIA8233A) {
1975 /* when no h/w PCM volume control is found, use DXS volume control
1976 * as the PCM vol control
1977 */
e437e3d7 1978 struct snd_ctl_elem_id sid;
1da177e4
LT		 1979 memset(&sid, 0, sizeof(sid));
1980 strcpy(sid.name, "PCM Playback Volume");
1981 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
1982 if (! snd_ctl_find_id(chip->card, &sid)) {
00f226d4
HM		 1983 snd_printd(KERN_INFO "Using DXS as PCM Playback\n");
1984 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
1985 if (err < 0)
1986 return err;
1987 }
1988 else /* Using DXS when PCM emulation is enabled is really weird */
1989 {
2fb930b5
CL		 1990 for (i = 0; i < 4; ++i) {
1991 struct snd_kcontrol *kctl;
1992
1993 kctl = snd_ctl_new1(
1994 &snd_via8233_dxs_volume_control, chip);
1995 if (!kctl)
1996 return -ENOMEM;
1997 kctl->id.subdevice = i;
1998 err = snd_ctl_add(chip->card, kctl);
1999 if (err < 0)
2000 return err;
3d009413 2001 chip->dxs_controls[i] = kctl;
2fb930b5 2002 }
1da177e4
LT		 2003 }
2004 }
1da177e4
LT		 2005 /* select spdif data slot 10/11 */
2006 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
2007 val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
2008 val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
2009 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
2010
2011 return 0;
2012}
2013
e437e3d7 2014static int __devinit snd_via686_init_misc(struct via82xx *chip)
1da177e4
LT		 2015{
2016 unsigned char legacy, legacy_cfg;
2017 int rev_h = 0;
2018
2019 legacy = chip->old_legacy;
2020 legacy_cfg = chip->old_legacy_cfg;
2021 legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
2022 legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
2023 if (chip->revision >= VIA_REV_686_H) {
2024 rev_h = 1;
b7fe4622
CL		 2025 if (mpu_port >= 0x200) { /* force MIDI */
2026 mpu_port &= 0xfffc;
2027 pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
1da177e4 2028#ifdef CONFIG_PM
b7fe4622 2029 chip->mpu_port_saved = mpu_port;
1da177e4
LT		 2030#endif
2031 } else {
b7fe4622 2032 mpu_port = pci_resource_start(chip->pci, 2);
1da177e4
LT		 2033 }
2034 } else {
b7fe4622 2035 switch (mpu_port) { /* force MIDI */
1da177e4
LT		 2036 case 0x300:
2037 case 0x310:
2038 case 0x320:
2039 case 0x330:
2040 legacy_cfg &= ~(3 << 2);
b7fe4622 2041 legacy_cfg |= (mpu_port & 0x0030) >> 2;
1da177e4
LT		 2042 break;
2043 default: /* no, use BIOS settings */
2044 if (legacy & VIA_FUNC_ENABLE_MIDI)
b7fe4622 2045 mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
1da177e4
LT		 2046 break;
2047 }
2048 }
b7fe4622
CL		 2049 if (mpu_port >= 0x200 &&
2050 (chip->mpu_res = request_region(mpu_port, 2, "VIA82xx MPU401"))
2051 != NULL) {
1da177e4
LT		 2052 if (rev_h)
2053 legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
2054 legacy |= VIA_FUNC_ENABLE_MIDI;
2055 } else {
2056 if (rev_h)
2057 legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
2058 legacy &= ~VIA_FUNC_ENABLE_MIDI;
b7fe4622 2059 mpu_port = 0;
1da177e4
LT		 2060 }
2061
2062 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2063 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
2064 if (chip->mpu_res) {
2065 if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
302e4c2f 2066 mpu_port, MPU401_INFO_INTEGRATED,
1da177e4 2067 chip->irq, 0, &chip->rmidi) < 0) {
b7fe4622
CL		 2068 printk(KERN_WARNING "unable to initialize MPU-401"
2069 " at 0x%lx, skipping\n", mpu_port);
1da177e4
LT		 2070 legacy &= ~VIA_FUNC_ENABLE_MIDI;
2071 } else {
2072 legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
2073 }
2074 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
2075 }
2076
b7fe4622 2077 snd_via686_create_gameport(chip, &legacy);
1da177e4
LT		 2078
2079#ifdef CONFIG_PM
2080 chip->legacy_saved = legacy;
2081 chip->legacy_cfg_saved = legacy_cfg;
2082#endif
2083
2084 return 0;
2085}
2086
2087
2088/*
2089 * proc interface
2090 */
e437e3d7
TI		 2091static void snd_via82xx_proc_read(struct snd_info_entry *entry,
2092 struct snd_info_buffer *buffer)
1da177e4 2093{
e437e3d7 2094 struct via82xx *chip = entry->private_data;
1da177e4
LT		 2095 int i;
2096
2097 snd_iprintf(buffer, "%s\n\n", chip->card->longname);
2098 for (i = 0; i < 0xa0; i += 4) {
2099 snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
2100 }
2101}
2102
e437e3d7 2103static void __devinit snd_via82xx_proc_init(struct via82xx *chip)
1da177e4 2104{
e437e3d7 2105 struct snd_info_entry *entry;
1da177e4
LT		 2106
2107 if (! snd_card_proc_new(chip->card, "via82xx", &entry))
bf850204 2108 snd_info_set_text_ops(entry, chip, snd_via82xx_proc_read);
1da177e4
LT		 2109}
2110
2111/*
2112 *
2113 */
2114
e437e3d7 2115static int snd_via82xx_chip_init(struct via82xx *chip)
1da177e4
LT		 2116{
2117 unsigned int val;
ef21ca24 2118 unsigned long end_time;
1da177e4
LT		 2119 unsigned char pval;
2120
2121#if 0 /* broken on K7M? */
2122 if (chip->chip_type == TYPE_VIA686)
2123 /* disable all legacy ports */
2124 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
2125#endif
2126 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2127 if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
2128 /* deassert ACLink reset, force SYNC */
2129 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2130 VIA_ACLINK_CTRL_ENABLE |
2131 VIA_ACLINK_CTRL_RESET |
2132 VIA_ACLINK_CTRL_SYNC);
2133 udelay(100);
2134#if 1 /* FIXME: should we do full reset here for all chip models? */
2135 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
2136 udelay(100);
2137#else
2138 /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
2139 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
2140 VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
2141 udelay(2);
2142#endif
2143 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2144 /* note - FM data out has trouble with non VRA codecs !! */
2145 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2146 udelay(100);
2147 }
2148
2149 /* Make sure VRA is enabled, in case we didn't do a
2150 * complete codec reset, above */
2151 pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
2152 if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
2153 /* ACLink on, deassert ACLink reset, VSR, SGD data out */
2154 /* note - FM data out has trouble with non VRA codecs !! */
2155 pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
2156 udelay(100);
2157 }
2158
2159 /* wait until codec ready */
ef21ca24 2160 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2161 do {
2162 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
2163 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
2164 break;
d86d0193 2165 schedule_timeout_uninterruptible(1);
ef21ca24 2166 } while (time_before(jiffies, end_time));
1da177e4
LT		 2167
2168 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
99b359ba 2169 snd_printk(KERN_ERR "AC'97 codec is not ready [0x%x]\n", val);
1da177e4
LT		 2170
2171#if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
2172 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2173 VIA_REG_AC97_SECONDARY_VALID |
2174 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
ef21ca24 2175 end_time = jiffies + msecs_to_jiffies(750);
1da177e4
LT		 2176 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
2177 VIA_REG_AC97_SECONDARY_VALID |
2178 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
2179 do {
2180 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_SECONDARY_VALID) {
2181 chip->ac97_secondary = 1;
2182 goto __ac97_ok2;
2183 }
d86d0193 2184 schedule_timeout_uninterruptible(1);
ef21ca24 2185 } while (time_before(jiffies, end_time));
1da177e4
LT		 2186 /* This is ok, the most of motherboards have only one codec */
2187
2188 __ac97_ok2:
2189#endif
2190
2191 if (chip->chip_type == TYPE_VIA686) {
2192 /* route FM trap to IRQ, disable FM trap */
2193 pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
2194 /* disable all GPI interrupts */
2195 outl(0, VIAREG(chip, GPI_INTR));
2196 }
2197
2198 if (chip->chip_type != TYPE_VIA686) {
2199 /* Workaround for Award BIOS bug:
2200 * DXS channels don't work properly with VRA if MC97 is disabled.
2201 */
2202 struct pci_dev *pci;
0dd119f7 2203 pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
1da177e4
LT		 2204 if (pci) {
2205 unsigned char data;
2206 pci_read_config_byte(pci, 0x44, &data);
2207 pci_write_config_byte(pci, 0x44, data | 0x40);
0dd119f7 2208 pci_dev_put(pci);
1da177e4
LT		 2209 }
2210 }
2211
2212 if (chip->chip_type != TYPE_VIA8233A) {
2213 int i, idx;
2214 for (idx = 0; idx < 4; idx++) {
2215 unsigned long port = chip->port + 0x10 * idx;
00f226d4
HM		 2216 for (i = 0; i < 2; i++) {
2217 chip->playback_volume[idx][i]=chip->playback_volume_c[i];
e437e3d7
TI		 2218 outb(chip->playback_volume_c[i],
2219 port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
00f226d4 2220 }
1da177e4
LT		 2221 }
2222 }
2223
2224 return 0;
2225}
2226
2227#ifdef CONFIG_PM
2228/*
2229 * power management
2230 */
57feb835 2231static int snd_via82xx_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 2232{
57feb835
TI		 2233 struct snd_card *card = pci_get_drvdata(pci);
2234 struct via82xx *chip = card->private_data;
1da177e4
LT		 2235 int i;
2236
57feb835 2237 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4 2238 for (i = 0; i < 2; i++)
57feb835 2239 snd_pcm_suspend_all(chip->pcms[i]);
1da177e4
LT		 2240 for (i = 0; i < chip->num_devs; i++)
2241 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2242 synchronize_irq(chip->irq);
2243 snd_ac97_suspend(chip->ac97);
2244
2245 /* save misc values */
2246 if (chip->chip_type != TYPE_VIA686) {
2247 pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
2248 chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
2249 chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2250 }
2251
57feb835
TI		 2252 pci_disable_device(pci);
2253 pci_save_state(pci);
30b35399 2254 pci_set_power_state(pci, pci_choose_state(pci, state));
1da177e4
LT		 2255 return 0;
2256}
2257
57feb835 2258static int snd_via82xx_resume(struct pci_dev *pci)
1da177e4 2259{
57feb835
TI		 2260 struct snd_card *card = pci_get_drvdata(pci);
2261 struct via82xx *chip = card->private_data;
1da177e4
LT		 2262 int i;
2263
57feb835 2264 pci_set_power_state(pci, PCI_D0);
30b35399
TI		 2265 pci_restore_state(pci);
2266 if (pci_enable_device(pci) < 0) {
2267 printk(KERN_ERR "via82xx: pci_enable_device failed, "
2268 "disabling device\n");
2269 snd_card_disconnect(card);
2270 return -EIO;
2271 }
2272 pci_set_master(pci);
1da177e4
LT		 2273
2274 snd_via82xx_chip_init(chip);
2275
2276 if (chip->chip_type == TYPE_VIA686) {
2277 if (chip->mpu_port_saved)
2278 pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
2279 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
2280 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
2281 } else {
2282 pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
2283 outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
2284 outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
2285 }
2286
2287 snd_ac97_resume(chip->ac97);
2288
2289 for (i = 0; i < chip->num_devs; i++)
2290 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2291
57feb835 2292 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 2293 return 0;
2294}
2295#endif /* CONFIG_PM */
2296
e437e3d7 2297static int snd_via82xx_free(struct via82xx *chip)
1da177e4
LT		 2298{
2299 unsigned int i;
2300
2301 if (chip->irq < 0)
2302 goto __end_hw;
2303 /* disable interrupts */
2304 for (i = 0; i < chip->num_devs; i++)
2305 snd_via82xx_channel_reset(chip, &chip->devs[i]);
f000fd80 2306
1da177e4 2307 if (chip->irq >= 0)
e437e3d7 2308 free_irq(chip->irq, chip);
757d5a75 2309 __end_hw:
b1d5776d 2310 release_and_free_resource(chip->mpu_res);
1da177e4
LT		 2311 pci_release_regions(chip->pci);
2312
2313 if (chip->chip_type == TYPE_VIA686) {
2314 snd_via686_free_gameport(chip);
2315 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
2316 pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
2317 }
2318 pci_disable_device(chip->pci);
2319 kfree(chip);
2320 return 0;
2321}
2322
e437e3d7 2323static int snd_via82xx_dev_free(struct snd_device *device)
1da177e4 2324{
e437e3d7 2325 struct via82xx *chip = device->device_data;
1da177e4
LT		 2326 return snd_via82xx_free(chip);
2327}
2328
e437e3d7 2329static int __devinit snd_via82xx_create(struct snd_card *card,
1da177e4
LT		 2330 struct pci_dev *pci,
2331 int chip_type,
2332 int revision,
2333 unsigned int ac97_clock,
e437e3d7 2334 struct via82xx ** r_via)
1da177e4 2335{
e437e3d7 2336 struct via82xx *chip;
1da177e4 2337 int err;
e437e3d7 2338 static struct snd_device_ops ops = {
1da177e4
LT		 2339 .dev_free = snd_via82xx_dev_free,
2340 };
2341
2342 if ((err = pci_enable_device(pci)) < 0)
2343 return err;
2344
e560d8d8 2345 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
1da177e4
LT		 2346 pci_disable_device(pci);
2347 return -ENOMEM;
2348 }
2349
2350 chip->chip_type = chip_type;
2351 chip->revision = revision;
2352
2353 spin_lock_init(&chip->reg_lock);
2354 spin_lock_init(&chip->rates[0].lock);
2355 spin_lock_init(&chip->rates[1].lock);
2356 chip->card = card;
2357 chip->pci = pci;
2358 chip->irq = -1;
2359
2360 pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
2361 pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
2362 pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
2363 chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
2364
2365 if ((err = pci_request_regions(pci, card->driver)) < 0) {
2366 kfree(chip);
2367 pci_disable_device(pci);
2368 return err;
2369 }
2370 chip->port = pci_resource_start(pci, 0);
4f550df5
KW		 2371 if (request_irq(pci->irq,
2372 chip_type == TYPE_VIA8233 ?
2373 snd_via8233_interrupt : snd_via686_interrupt,
437a5a46 2374 IRQF_SHARED,
e437e3d7 2375 card->driver, chip)) {
99b359ba 2376 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2377 snd_via82xx_free(chip);
2378 return -EBUSY;
2379 }
2380 chip->irq = pci->irq;
2381 if (ac97_clock >= 8000 && ac97_clock <= 48000)
2382 chip->ac97_clock = ac97_clock;
2383 synchronize_irq(chip->irq);
2384
2385 if ((err = snd_via82xx_chip_init(chip)) < 0) {
2386 snd_via82xx_free(chip);
2387 return err;
2388 }
2389
2390 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2391 snd_via82xx_free(chip);
2392 return err;
2393 }
2394
2395 /* The 8233 ac97 controller does not implement the master bit
2396 * in the pci command register. IMHO this is a violation of the PCI spec.
2397 * We call pci_set_master here because it does not hurt. */
2398 pci_set_master(pci);
2399
2400 snd_card_set_dev(card, &pci->dev);
2401
2402 *r_via = chip;
2403 return 0;
2404}
2405
2406struct via823x_info {
2407 int revision;
2408 char *name;
2409 int type;
2410};
2411static struct via823x_info via823x_cards[] __devinitdata = {
2412 { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
2413 { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
2414 { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
2415 { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
2416 { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
2417 { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
8263c65f 2418 { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
1da177e4
LT		 2419};
2420
2421/*
2422 * auto detection of DXS channel supports.
2423 */
9d74958a
TI		 2424
2425static struct snd_pci_quirk dxs_whitelist[] __devinitdata = {
2426 SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
2427 SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
2428 SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
2429 SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
a85165c6 2430 SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
9d74958a
TI		 2431 SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
2432 SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
2433 SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
a85165c6
TI		 2434 SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
2435 SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
9d74958a 2436 SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
a85165c6 2437 SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
11be265f 2438 SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
9674513d
TI		 2439 SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
2440 SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
9d74958a
TI		 2441 SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
2442 SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
2443 SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
2444 SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
a85165c6 2445 SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
9d74958a
TI		 2446 SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
2447 SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
2448 SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
2449 SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
2450 SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
2451 SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
2452 SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
2453 SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
2454 SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
2455 SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
2456 SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
2457 SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
2458 SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
a85165c6
TI		 2459 SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
2460 SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
2461 SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
9d74958a 2462 SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
a85165c6 2463 SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
9d74958a
TI		 2464 SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
2465 SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
2466 { } /* terminator */
1da177e4
LT		 2467};
2468
a769577b 2469static int __devinit check_dxs_list(struct pci_dev *pci, int revision)
1da177e4 2470{
9d74958a 2471 const struct snd_pci_quirk *w;
1da177e4 2472
9d74958a
TI		 2473 w = snd_pci_quirk_lookup(pci, dxs_whitelist);
2474 if (w) {
2475 snd_printdd(KERN_INFO "via82xx: DXS white list for %s found\n",
2476 w->name);
2477 return w->value;
1da177e4
LT		 2478 }
2479
a769577b
TI		 2480 /* for newer revision, default to DXS_SRC */
2481 if (revision >= VIA_REV_8235)
2482 return VIA_DXS_SRC;
2483
1da177e4
LT		 2484 /*
2485 * not detected, try 48k rate only to be sure.
2486 */
2487 printk(KERN_INFO "via82xx: Assuming DXS channels with 48k fixed sample rate.\n");
ee3b4c60 2488 printk(KERN_INFO " Please try dxs_support=5 option\n");
1da177e4 2489 printk(KERN_INFO " and report if it works on your machine.\n");
ee3b4c60 2490 printk(KERN_INFO " For more details, read ALSA-Configuration.txt.\n");
1da177e4
LT		 2491 return VIA_DXS_48K;
2492};
2493
2494static int __devinit snd_via82xx_probe(struct pci_dev *pci,
2495 const struct pci_device_id *pci_id)
2496{
e437e3d7
TI		 2497 struct snd_card *card;
2498 struct via82xx *chip;
1da177e4
LT		 2499 int chip_type = 0, card_type;
2500 unsigned int i;
2501 int err;
2502
e58de7ba
TI		 2503 err = snd_card_create(index, id, THIS_MODULE, 0, &card);
2504 if (err < 0)
2505 return err;
1da177e4
LT		 2506
2507 card_type = pci_id->driver_data;
1da177e4
LT		 2508 switch (card_type) {
2509 case TYPE_CARD_VIA686:
2510 strcpy(card->driver, "VIA686A");
44c10138 2511 sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
1da177e4
LT		 2512 chip_type = TYPE_VIA686;
2513 break;
2514 case TYPE_CARD_VIA8233:
2515 chip_type = TYPE_VIA8233;
44c10138 2516 sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
1da177e4 2517 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
44c10138 2518 if (pci->revision == via823x_cards[i].revision) {
1da177e4
LT		 2519 chip_type = via823x_cards[i].type;
2520 strcpy(card->shortname, via823x_cards[i].name);
2521 break;
2522 }
2523 }
2524 if (chip_type != TYPE_VIA8233A) {
b7fe4622 2525 if (dxs_support == VIA_DXS_AUTO)
44c10138 2526 dxs_support = check_dxs_list(pci, pci->revision);
1da177e4
LT		 2527 /* force to use VIA8233 or 8233A model according to
2528 * dxs_support module option
2529 */
b7fe4622 2530 if (dxs_support == VIA_DXS_DISABLE)
1da177e4
LT		 2531 chip_type = TYPE_VIA8233A;
2532 else
2533 chip_type = TYPE_VIA8233;
2534 }
2535 if (chip_type == TYPE_VIA8233A)
2536 strcpy(card->driver, "VIA8233A");
44c10138 2537 else if (pci->revision >= VIA_REV_8237)
1da177e4
LT		 2538 strcpy(card->driver, "VIA8237"); /* no slog assignment */
2539 else
2540 strcpy(card->driver, "VIA8233");
2541 break;
2542 default:
2543 snd_printk(KERN_ERR "invalid card type %d\n", card_type);
2544 err = -EINVAL;
2545 goto __error;
2546 }
2547
44c10138 2548 if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision,
b7fe4622 2549 ac97_clock, &chip)) < 0)
1da177e4 2550 goto __error;
57feb835 2551 card->private_data = chip;
b7fe4622 2552 if ((err = snd_via82xx_mixer_new(chip, ac97_quirk)) < 0)
1da177e4
LT		 2553 goto __error;
2554
2555 if (chip_type == TYPE_VIA686) {
2556 if ((err = snd_via686_pcm_new(chip)) < 0 ||
b7fe4622 2557 (err = snd_via686_init_misc(chip)) < 0)
1da177e4
LT		 2558 goto __error;
2559 } else {
2560 if (chip_type == TYPE_VIA8233A) {
2561 if ((err = snd_via8233a_pcm_new(chip)) < 0)
2562 goto __error;
2563 // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
2564 } else {
2565 if ((err = snd_via8233_pcm_new(chip)) < 0)
2566 goto __error;
b7fe4622 2567 if (dxs_support == VIA_DXS_48K)
1da177e4 2568 chip->dxs_fixed = 1;
b7fe4622 2569 else if (dxs_support == VIA_DXS_NO_VRA)
1da177e4 2570 chip->no_vra = 1;
b7fe4622 2571 else if (dxs_support == VIA_DXS_SRC) {
2d7eb7cb
SV		 2572 chip->no_vra = 1;
2573 chip->dxs_src = 1;
2574 }
1da177e4 2575 }
b7fe4622 2576 if ((err = snd_via8233_init_misc(chip)) < 0)
1da177e4
LT		 2577 goto __error;
2578 }
2579
1da177e4
LT		 2580 /* disable interrupts */
2581 for (i = 0; i < chip->num_devs; i++)
2582 snd_via82xx_channel_reset(chip, &chip->devs[i]);
2583
2584 snprintf(card->longname, sizeof(card->longname),
2585 "%s with %s at %#lx, irq %d", card->shortname,
2586 snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
2587
2588 snd_via82xx_proc_init(chip);
2589
2590 if ((err = snd_card_register(card)) < 0) {
2591 snd_card_free(card);
2592 return err;
2593 }
2594 pci_set_drvdata(pci, card);
1da177e4
LT		 2595 return 0;
2596
2597 __error:
2598 snd_card_free(card);
2599 return err;
2600}
2601
2602static void __devexit snd_via82xx_remove(struct pci_dev *pci)
2603{
2604 snd_card_free(pci_get_drvdata(pci));
2605 pci_set_drvdata(pci, NULL);
2606}
2607
2608static struct pci_driver driver = {
2609 .name = "VIA 82xx Audio",
2610 .id_table = snd_via82xx_ids,
2611 .probe = snd_via82xx_probe,
2612 .remove = __devexit_p(snd_via82xx_remove),
57feb835
TI		 2613#ifdef CONFIG_PM
2614 .suspend = snd_via82xx_suspend,
2615 .resume = snd_via82xx_resume,
2616#endif
1da177e4
LT		 2617};
2618
2619static int __init alsa_card_via82xx_init(void)
2620{
01d25d46 2621 return pci_register_driver(&driver);
1da177e4
LT		 2622}
2623
2624static void __exit alsa_card_via82xx_exit(void)
2625{
2626 pci_unregister_driver(&driver);
2627}
2628
2629module_init(alsa_card_via82xx_init)
2630module_exit(alsa_card_via82xx_exit)
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