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ALSA: ice1724 - Make call to set hw params succeed on ESI Juli@
[net-next-2.6.git] / sound / pci / ice1712 / ice1724.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
c1017a4c 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
1de9fdc2 23 */
1da177e4 24
1de9fdc2 25#include <linux/io.h>
1da177e4
LT		 26#include <linux/delay.h>
27#include <linux/interrupt.h>
28#include <linux/init.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/moduleparam.h>
62932df8 32#include <linux/mutex.h>
1da177e4
LT		 33#include <sound/core.h>
34#include <sound/info.h>
aea3bfbc 35#include <sound/rawmidi.h>
1da177e4
LT		 36#include <sound/initval.h>
37
38#include <sound/asoundef.h>
39
40#include "ice1712.h"
41#include "envy24ht.h"
42
43/* lowlevel routines */
44#include "amp.h"
45#include "revo.h"
46#include "aureon.h"
47#include "vt1720_mobo.h"
48#include "pontis.h"
49#include "prodigy192.h"
6b8d6e55 50#include "prodigy_hifi.h"
1da177e4 51#include "juli.h"
72cbfd45 52#include "maya44.h"
1da177e4 53#include "phase.h"
f6cdab5f 54#include "wtm.h"
f31639b8 55#include "se.h"
1da177e4 56
c1017a4c 57MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 58MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
59MODULE_LICENSE("GPL");
60MODULE_SUPPORTED_DEVICE("{"
61 REVO_DEVICE_DESC
62 AMP_AUDIO2000_DEVICE_DESC
63 AUREON_DEVICE_DESC
64 VT1720_MOBO_DEVICE_DESC
65 PONTIS_DEVICE_DESC
66 PRODIGY192_DEVICE_DESC
6b8d6e55 67 PRODIGY_HIFI_DEVICE_DESC
1da177e4 68 JULI_DEVICE_DESC
72cbfd45 69 MAYA44_DEVICE_DESC
1da177e4 70 PHASE_DEVICE_DESC
f6cdab5f 71 WTM_DEVICE_DESC
f31639b8 72 SE_DEVICE_DESC
1da177e4
LT		 73 "{VIA,VT1720},"
74 "{VIA,VT1724},"
75 "{ICEnsemble,Generic ICE1724},"
76 "{ICEnsemble,Generic Envy24HT}"
77 "{ICEnsemble,Generic Envy24PT}}");
78
79static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
80static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
81static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
82static char *model[SNDRV_CARDS];
83
84module_param_array(index, int, NULL, 0444);
85MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
86module_param_array(id, charp, NULL, 0444);
87MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
88module_param_array(enable, bool, NULL, 0444);
89MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
90module_param_array(model, charp, NULL, 0444);
91MODULE_PARM_DESC(model, "Use the given board model.");
92
1da177e4
LT		 93
94/* Both VT1720 and VT1724 have the same PCI IDs */
32b47da0 95static const struct pci_device_id snd_vt1724_ids[] = {
28d27aae 96 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
1da177e4
LT		 97 { 0, }
98};
99
100MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
101
102
103static int PRO_RATE_LOCKED;
104static int PRO_RATE_RESET = 1;
105static unsigned int PRO_RATE_DEFAULT = 44100;
106
107/*
108 * Basic I/O
109 */
1de9fdc2 110
d16be8ed
PH		 111/*
112 * default rates, default clock routines
113 */
114
1da177e4 115/* check whether the clock mode is spdif-in */
d16be8ed 116static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 117{
118 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
119}
120
ab0c7d72 121static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4 122{
d16be8ed 123 return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
1da177e4
LT		 124}
125
126/*
127 * ac97 section
128 */
129
ab0c7d72 130static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
1da177e4
LT		 131{
132 unsigned char old_cmd;
133 int tm;
134 for (tm = 0; tm < 0x10000; tm++) {
135 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
136 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
137 continue;
138 if (!(old_cmd & VT1724_AC97_READY))
139 continue;
140 return old_cmd;
141 }
142 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
143 return old_cmd;
144}
145
ab0c7d72 146static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
1da177e4
LT		 147{
148 int tm;
149 for (tm = 0; tm < 0x10000; tm++)
150 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
151 return 0;
152 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
153 return -EIO;
154}
155
ab0c7d72 156static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 157 unsigned short reg,
158 unsigned short val)
159{
ab0c7d72 160 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 161 unsigned char old_cmd;
162
163 old_cmd = snd_vt1724_ac97_ready(ice);
164 old_cmd &= ~VT1724_AC97_ID_MASK;
165 old_cmd |= ac97->num;
166 outb(reg, ICEMT1724(ice, AC97_INDEX));
167 outw(val, ICEMT1724(ice, AC97_DATA));
168 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
169 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
170}
171
ab0c7d72 172static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 173{
ab0c7d72 174 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 175 unsigned char old_cmd;
176
177 old_cmd = snd_vt1724_ac97_ready(ice);
178 old_cmd &= ~VT1724_AC97_ID_MASK;
179 old_cmd |= ac97->num;
180 outb(reg, ICEMT1724(ice, AC97_INDEX));
181 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
182 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
183 return ~0;
184 return inw(ICEMT1724(ice, AC97_DATA));
185}
186
187
188/*
189 * GPIO operations
190 */
191
192/* set gpio direction 0 = read, 1 = write */
ab0c7d72 193static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 194{
195 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
196 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
197}
198
199/* set the gpio mask (0 = writable) */
ab0c7d72 200static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 201{
202 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
1de9fdc2 203 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
1da177e4
LT		 204 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
205 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
206}
207
ab0c7d72 208static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 209{
210 outw(data, ICEREG1724(ice, GPIO_DATA));
1de9fdc2 211 if (!ice->vt1720)
1da177e4
LT		 212 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
213 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
214}
215
ab0c7d72 216static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 217{
218 unsigned int data;
1de9fdc2 219 if (!ice->vt1720)
1da177e4
LT		 220 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
221 else
222 data = 0;
223 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
224 return data;
225}
226
3a841d51 227/*
aea3bfbc 228 * MIDI
3a841d51 229 */
aea3bfbc
CL		 230
231static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
232{
233 unsigned int count;
234
235 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
236 inb(ICEREG1724(ice, MPU_DATA));
237}
238
239static inline struct snd_rawmidi_substream *
240get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
3a841d51 241{
aea3bfbc
CL		 242 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
243 struct snd_rawmidi_substream, list);
244}
245
e683ec46
TI		 246static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
247
aea3bfbc
CL		 248static void vt1724_midi_write(struct snd_ice1712 *ice)
249{
250 struct snd_rawmidi_substream *s;
251 int count, i;
252 u8 buffer[32];
253
254 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
255 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
256 if (count > 0) {
257 count = snd_rawmidi_transmit(s, buffer, count);
258 for (i = 0; i < count; ++i)
259 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
260 }
e683ec46
TI		 261 /* mask irq when all bytes have been transmitted.
262 * enabled again in output_trigger when the new data comes in.
263 */
264 enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
265 !snd_rawmidi_transmit_empty(s));
aea3bfbc
CL		 266}
267
268static void vt1724_midi_read(struct snd_ice1712 *ice)
269{
270 struct snd_rawmidi_substream *s;
271 int count, i;
272 u8 buffer[32];
273
274 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
275 count = inb(ICEREG1724(ice, MPU_RXFIFO));
276 if (count > 0) {
277 count = min(count, 32);
278 for (i = 0; i < count; ++i)
279 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
280 snd_rawmidi_receive(s, buffer, count);
281 }
282}
283
e683ec46
TI		 284/* call with ice->reg_lock */
285static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
aea3bfbc 286{
e683ec46 287 u8 mask = inb(ICEREG1724(ice, IRQMASK));
aea3bfbc
CL		 288 if (enable)
289 mask &= ~flag;
3a841d51 290 else
aea3bfbc
CL		 291 mask |= flag;
292 outb(mask, ICEREG1724(ice, IRQMASK));
e683ec46
TI		 293}
294
295static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
296 u8 flag, int enable)
297{
298 struct snd_ice1712 *ice = substream->rmidi->private_data;
299
300 spin_lock_irq(&ice->reg_lock);
301 enable_midi_irq(ice, flag, enable);
aea3bfbc 302 spin_unlock_irq(&ice->reg_lock);
3a841d51
TI		 303}
304
aea3bfbc 305static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
3a841d51 306{
aea3bfbc
CL		 307 return 0;
308}
309
310static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
311{
aea3bfbc 312 return 0;
3a841d51
TI		 313}
314
aea3bfbc
CL		 315static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
316{
317 struct snd_ice1712 *ice = s->rmidi->private_data;
318 unsigned long flags;
319
320 spin_lock_irqsave(&ice->reg_lock, flags);
321 if (up) {
322 ice->midi_output = 1;
323 vt1724_midi_write(ice);
324 } else {
325 ice->midi_output = 0;
e683ec46 326 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
aea3bfbc
CL		 327 }
328 spin_unlock_irqrestore(&ice->reg_lock, flags);
329}
330
331static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
332{
333 struct snd_ice1712 *ice = s->rmidi->private_data;
334 unsigned long timeout;
335
e683ec46 336 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
aea3bfbc
CL		 337 /* 32 bytes should be transmitted in less than about 12 ms */
338 timeout = jiffies + msecs_to_jiffies(15);
339 do {
340 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
341 break;
342 schedule_timeout_uninterruptible(1);
343 } while (time_after(timeout, jiffies));
344}
345
346static struct snd_rawmidi_ops vt1724_midi_output_ops = {
347 .open = vt1724_midi_output_open,
348 .close = vt1724_midi_output_close,
349 .trigger = vt1724_midi_output_trigger,
350 .drain = vt1724_midi_output_drain,
351};
352
353static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
354{
355 vt1724_midi_clear_rx(s->rmidi->private_data);
356 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
357 return 0;
358}
359
360static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
361{
362 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
363 return 0;
364}
365
366static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
367{
368 struct snd_ice1712 *ice = s->rmidi->private_data;
369 unsigned long flags;
370
371 spin_lock_irqsave(&ice->reg_lock, flags);
372 if (up) {
373 ice->midi_input = 1;
374 vt1724_midi_read(ice);
375 } else {
376 ice->midi_input = 0;
377 }
378 spin_unlock_irqrestore(&ice->reg_lock, flags);
379}
380
381static struct snd_rawmidi_ops vt1724_midi_input_ops = {
382 .open = vt1724_midi_input_open,
383 .close = vt1724_midi_input_close,
384 .trigger = vt1724_midi_input_trigger,
385};
386
3a841d51 387
1da177e4
LT		 388/*
389 * Interrupt handler
390 */
391
7d12e780 392static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
1da177e4 393{
ab0c7d72 394 struct snd_ice1712 *ice = dev_id;
1da177e4 395 unsigned char status;
3a841d51
TI		 396 unsigned char status_mask =
397 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
1da177e4 398 int handled = 0;
3a841d51 399 int timeout = 0;
1da177e4
LT		 400
401 while (1) {
402 status = inb(ICEREG1724(ice, IRQSTAT));
3a841d51 403 status &= status_mask;
1da177e4
LT		 404 if (status == 0)
405 break;
e683ec46 406 spin_lock(&ice->reg_lock);
3a841d51 407 if (++timeout > 10) {
1083206f
TI		 408 status = inb(ICEREG1724(ice, IRQSTAT));
409 printk(KERN_ERR "ice1724: Too long irq loop, "
410 "status = 0x%x\n", status);
411 if (status & VT1724_IRQ_MPU_TX) {
412 printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
e683ec46 413 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
1083206f 414 }
e683ec46 415 spin_unlock(&ice->reg_lock);
3a841d51
TI		 416 break;
417 }
1de9fdc2 418 handled = 1;
3a841d51 419 if (status & VT1724_IRQ_MPU_TX) {
aea3bfbc
CL		 420 if (ice->midi_output)
421 vt1724_midi_write(ice);
e683ec46
TI		 422 else
423 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
3a841d51
TI		 424 /* Due to mysterical reasons, MPU_TX is always
425 * generated (and can't be cleared) when a PCM
426 * playback is going. So let's ignore at the
427 * next loop.
428 */
429 status_mask &= ~VT1724_IRQ_MPU_TX;
430 }
431 if (status & VT1724_IRQ_MPU_RX) {
aea3bfbc
CL		 432 if (ice->midi_input)
433 vt1724_midi_read(ice);
434 else
435 vt1724_midi_clear_rx(ice);
1da177e4 436 }
3a841d51
TI		 437 /* ack MPU irq */
438 outb(status, ICEREG1724(ice, IRQSTAT));
e683ec46 439 spin_unlock(&ice->reg_lock);
1da177e4
LT		 440 if (status & VT1724_IRQ_MTPCM) {
441 /*
442 * Multi-track PCM
443 * PCM assignment are:
444 * Playback DMA0 (M/C) = playback_pro_substream
445 * Playback DMA1 = playback_con_substream_ds[0]
446 * Playback DMA2 = playback_con_substream_ds[1]
447 * Playback DMA3 = playback_con_substream_ds[2]
448 * Playback DMA4 (SPDIF) = playback_con_substream
449 * Record DMA0 = capture_pro_substream
450 * Record DMA1 = capture_con_substream
451 */
452 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
453 if (mtstat & VT1724_MULTI_PDMA0) {
454 if (ice->playback_pro_substream)
455 snd_pcm_period_elapsed(ice->playback_pro_substream);
456 }
457 if (mtstat & VT1724_MULTI_RDMA0) {
458 if (ice->capture_pro_substream)
459 snd_pcm_period_elapsed(ice->capture_pro_substream);
460 }
461 if (mtstat & VT1724_MULTI_PDMA1) {
462 if (ice->playback_con_substream_ds[0])
463 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
464 }
465 if (mtstat & VT1724_MULTI_PDMA2) {
466 if (ice->playback_con_substream_ds[1])
467 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
468 }
469 if (mtstat & VT1724_MULTI_PDMA3) {
470 if (ice->playback_con_substream_ds[2])
471 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
472 }
473 if (mtstat & VT1724_MULTI_PDMA4) {
474 if (ice->playback_con_substream)
475 snd_pcm_period_elapsed(ice->playback_con_substream);
476 }
477 if (mtstat & VT1724_MULTI_RDMA1) {
478 if (ice->capture_con_substream)
479 snd_pcm_period_elapsed(ice->capture_con_substream);
480 }
481 /* ack anyway to avoid freeze */
482 outb(mtstat, ICEMT1724(ice, IRQ));
483 /* ought to really handle this properly */
484 if (mtstat & VT1724_MULTI_FIFO_ERR) {
485 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
1de9fdc2
AB		 486 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
487 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
1da177e4
LT		 488 /* If I don't do this, I get machine lockup due to continual interrupts */
489 }
490
491 }
492 }
493 return IRQ_RETVAL(handled);
494}
495
496/*
497 * PCM code - professional part (multitrack)
498 */
499
500static unsigned int rates[] = {
501 8000, 9600, 11025, 12000, 16000, 22050, 24000,
502 32000, 44100, 48000, 64000, 88200, 96000,
503 176400, 192000,
504};
505
ab0c7d72 506static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
1da177e4
LT		 507 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
508 .list = rates,
509 .mask = 0,
510};
511
ab0c7d72 512static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
1da177e4
LT		 513 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
514 .list = rates,
515 .mask = 0,
516};
517
ab0c7d72 518static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
1da177e4
LT		 519 .count = ARRAY_SIZE(rates),
520 .list = rates,
521 .mask = 0,
522};
523
524struct vt1724_pcm_reg {
525 unsigned int addr; /* ADDR register offset */
526 unsigned int size; /* SIZE register offset */
527 unsigned int count; /* COUNT register offset */
528 unsigned int start; /* start & pause bit */
529};
530
ab0c7d72 531static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 532{
ab0c7d72 533 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 534 unsigned char what;
535 unsigned char old;
ab0c7d72 536 struct snd_pcm_substream *s;
1da177e4
LT		 537
538 what = 0;
ef991b95 539 snd_pcm_group_for_each_entry(s, substream) {
29998d24
CL		 540 if (snd_pcm_substream_chip(s) == ice) {
541 const struct vt1724_pcm_reg *reg;
542 reg = s->runtime->private_data;
543 what |= reg->start;
544 snd_pcm_trigger_done(s, substream);
545 }
1da177e4
LT		 546 }
547
548 switch (cmd) {
549 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
550 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
551 spin_lock(&ice->reg_lock);
552 old = inb(ICEMT1724(ice, DMA_PAUSE));
553 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
554 old |= what;
555 else
556 old &= ~what;
557 outb(old, ICEMT1724(ice, DMA_PAUSE));
558 spin_unlock(&ice->reg_lock);
559 break;
560
561 case SNDRV_PCM_TRIGGER_START:
562 case SNDRV_PCM_TRIGGER_STOP:
b40e9538 563 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 564 spin_lock(&ice->reg_lock);
565 old = inb(ICEMT1724(ice, DMA_CONTROL));
566 if (cmd == SNDRV_PCM_TRIGGER_START)
567 old |= what;
568 else
569 old &= ~what;
570 outb(old, ICEMT1724(ice, DMA_CONTROL));
571 spin_unlock(&ice->reg_lock);
572 break;
573
b40e9538
IC		 574 case SNDRV_PCM_TRIGGER_RESUME:
575 /* apps will have to restart stream */
576 break;
577
1da177e4
LT		 578 default:
579 return -EINVAL;
580 }
581 return 0;
582}
583
584/*
585 */
586
587#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
588 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
589#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
590 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
591
d16be8ed
PH		 592static const unsigned int stdclock_rate_list[16] = {
593 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
594 22050, 11025, 88200, 176400, 0, 192000, 64000
595};
596
597static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
1da177e4 598{
d16be8ed
PH		 599 unsigned int rate;
600 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
601 return rate;
602}
603
604static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
605{
606 int i;
607 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
608 if (stdclock_rate_list[i] == rate) {
609 outb(i, ICEMT1724(ice, RATE));
610 return;
611 }
612 }
613}
614
615static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
616 unsigned int rate)
617{
618 unsigned char val, old;
619 /* check MT02 */
1da177e4 620 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
d16be8ed
PH		 621 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
622 if (rate > 96000)
623 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
1da177e4 624 else
d16be8ed
PH		 625 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
626 if (val != old) {
627 outb(val, ICEMT1724(ice, I2S_FORMAT));
628 /* master clock changed */
629 return 1;
630 }
631 }
632 /* no change in master clock */
633 return 0;
1da177e4
LT		 634}
635
92d71005 636static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
ab0c7d72 637 int force)
1da177e4
LT		 638{
639 unsigned long flags;
d16be8ed
PH		 640 unsigned char mclk_change;
641 unsigned int i, old_rate;
1da177e4 642
d16be8ed 643 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
92d71005
TI		 644 return -EINVAL;
645
1da177e4 646 spin_lock_irqsave(&ice->reg_lock, flags);
d16be8ed 647 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
1da177e4
LT		 648 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
649 /* running? we cannot change the rate now... */
650 spin_unlock_irqrestore(&ice->reg_lock, flags);
bd3c200e 651 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
1da177e4
LT		 652 }
653 if (!force && is_pro_rate_locked(ice)) {
654 spin_unlock_irqrestore(&ice->reg_lock, flags);
92d71005 655 return (rate == ice->cur_rate) ? 0 : -EBUSY;
1da177e4
LT		 656 }
657
d16be8ed
PH		 658 old_rate = ice->get_rate(ice);
659 if (force || (old_rate != rate))
660 ice->set_rate(ice, rate);
1da177e4
LT		 661 else if (rate == ice->cur_rate) {
662 spin_unlock_irqrestore(&ice->reg_lock, flags);
92d71005 663 return 0;
1da177e4
LT		 664 }
665
666 ice->cur_rate = rate;
667
d16be8ed
PH		 668 /* setting master clock */
669 mclk_change = ice->set_mclk(ice, rate);
670
1da177e4
LT		 671 spin_unlock_irqrestore(&ice->reg_lock, flags);
672
673 if (mclk_change && ice->gpio.i2s_mclk_changed)
674 ice->gpio.i2s_mclk_changed(ice);
675 if (ice->gpio.set_pro_rate)
676 ice->gpio.set_pro_rate(ice, rate);
677
678 /* set up codecs */
679 for (i = 0; i < ice->akm_codecs; i++) {
680 if (ice->akm[i].ops.set_rate_val)
681 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
682 }
683 if (ice->spdif.ops.setup_rate)
684 ice->spdif.ops.setup_rate(ice, rate);
92d71005
TI		 685
686 return 0;
1da177e4
LT		 687}
688
ab0c7d72
TI		 689static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
690 struct snd_pcm_hw_params *hw_params)
1da177e4 691{
ab0c7d72 692 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
92d71005 693 int i, chs, err;
1da177e4
LT		 694
695 chs = params_channels(hw_params);
62932df8 696 mutex_lock(&ice->open_mutex);
1da177e4
LT		 697 /* mark surround channels */
698 if (substream == ice->playback_pro_substream) {
699 /* PDMA0 can be multi-channel up to 8 */
700 chs = chs / 2 - 1;
701 for (i = 0; i < chs; i++) {
ab0c7d72
TI		 702 if (ice->pcm_reserved[i] &&
703 ice->pcm_reserved[i] != substream) {
62932df8 704 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 705 return -EBUSY;
706 }
707 ice->pcm_reserved[i] = substream;
708 }
709 for (; i < 3; i++) {
710 if (ice->pcm_reserved[i] == substream)
711 ice->pcm_reserved[i] = NULL;
712 }
713 } else {
714 for (i = 0; i < 3; i++) {
715 /* check individual playback stream */
716 if (ice->playback_con_substream_ds[i] == substream) {
ab0c7d72
TI		 717 if (ice->pcm_reserved[i] &&
718 ice->pcm_reserved[i] != substream) {
62932df8 719 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 720 return -EBUSY;
721 }
722 ice->pcm_reserved[i] = substream;
723 break;
724 }
725 }
726 }
62932df8 727 mutex_unlock(&ice->open_mutex);
92d71005
TI		 728
729 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
730 if (err < 0)
731 return err;
732
1da177e4
LT		 733 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
734}
735
ab0c7d72 736static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 737{
ab0c7d72 738 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 739 int i;
740
62932df8 741 mutex_lock(&ice->open_mutex);
1da177e4
LT		 742 /* unmark surround channels */
743 for (i = 0; i < 3; i++)
744 if (ice->pcm_reserved[i] == substream)
745 ice->pcm_reserved[i] = NULL;
62932df8 746 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 747 return snd_pcm_lib_free_pages(substream);
748}
749
ab0c7d72 750static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 751{
ab0c7d72 752 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 753 unsigned char val;
754 unsigned int size;
755
756 spin_lock_irq(&ice->reg_lock);
757 val = (8 - substream->runtime->channels) >> 1;
758 outb(val, ICEMT1724(ice, BURST));
759
760 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
761
762 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
1de9fdc2 763 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
1da177e4
LT		 764 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
765 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
766 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
1de9fdc2 767 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
1da177e4
LT		 768 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
769 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
770
771 spin_unlock_irq(&ice->reg_lock);
772
e2ea7cfc
TI		 773 /*
774 printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
775 "buffer = 0x%x, period = 0x%x\n",
776 substream->runtime->channels,
777 (unsigned int)substream->runtime->dma_addr,
778 snd_pcm_lib_buffer_bytes(substream),
779 snd_pcm_lib_period_bytes(substream));
780 */
1da177e4
LT		 781 return 0;
782}
783
ab0c7d72 784static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 785{
ab0c7d72 786 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 787 size_t ptr;
788
789 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
790 return 0;
791#if 0 /* read PLAYBACK_ADDR */
792 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
793 if (ptr < substream->runtime->dma_addr) {
794 snd_printd("ice1724: invalid negative ptr\n");
795 return 0;
796 }
797 ptr -= substream->runtime->dma_addr;
798 ptr = bytes_to_frames(substream->runtime, ptr);
799 if (ptr >= substream->runtime->buffer_size) {
ab0c7d72
TI		 800 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
801 (int)ptr, (int)substream->runtime->period_size);
1da177e4
LT		 802 return 0;
803 }
804#else /* read PLAYBACK_SIZE */
805 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
806 ptr = (ptr + 1) << 2;
807 ptr = bytes_to_frames(substream->runtime, ptr);
1de9fdc2 808 if (!ptr)
1da177e4
LT		 809 ;
810 else if (ptr <= substream->runtime->buffer_size)
811 ptr = substream->runtime->buffer_size - ptr;
812 else {
ab0c7d72
TI		 813 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
814 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 815 ptr = 0;
816 }
817#endif
818 return ptr;
819}
820
ab0c7d72 821static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 822{
ab0c7d72 823 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 824 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT		 825
826 spin_lock_irq(&ice->reg_lock);
827 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
ab0c7d72
TI		 828 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
829 ice->profi_port + reg->size);
830 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
831 ice->profi_port + reg->count);
1da177e4
LT		 832 spin_unlock_irq(&ice->reg_lock);
833 return 0;
834}
835
ab0c7d72 836static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 837{
ab0c7d72 838 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 839 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT		 840 size_t ptr;
841
842 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
843 return 0;
844#if 0 /* use ADDR register */
845 ptr = inl(ice->profi_port + reg->addr);
846 ptr -= substream->runtime->dma_addr;
847 return bytes_to_frames(substream->runtime, ptr);
848#else /* use SIZE register */
849 ptr = inw(ice->profi_port + reg->size);
850 ptr = (ptr + 1) << 2;
851 ptr = bytes_to_frames(substream->runtime, ptr);
1de9fdc2 852 if (!ptr)
1da177e4
LT		 853 ;
854 else if (ptr <= substream->runtime->buffer_size)
855 ptr = substream->runtime->buffer_size - ptr;
856 else {
ab0c7d72
TI		 857 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
858 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 859 ptr = 0;
860 }
861 return ptr;
862#endif
863}
864
a5b7b5c1 865static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
1da177e4
LT		 866 .addr = VT1724_MT_PLAYBACK_ADDR,
867 .size = VT1724_MT_PLAYBACK_SIZE,
868 .count = VT1724_MT_PLAYBACK_COUNT,
869 .start = VT1724_PDMA0_START,
870};
871
a5b7b5c1
TI		 872static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
873 .addr = VT1724_MT_PDMA4_ADDR,
874 .size = VT1724_MT_PDMA4_SIZE,
875 .count = VT1724_MT_PDMA4_COUNT,
876 .start = VT1724_PDMA4_START,
877};
878
879static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
1da177e4
LT		 880 .addr = VT1724_MT_CAPTURE_ADDR,
881 .size = VT1724_MT_CAPTURE_SIZE,
882 .count = VT1724_MT_CAPTURE_COUNT,
883 .start = VT1724_RDMA0_START,
884};
885
a5b7b5c1
TI		 886static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
887 .addr = VT1724_MT_RDMA1_ADDR,
888 .size = VT1724_MT_RDMA1_SIZE,
889 .count = VT1724_MT_RDMA1_COUNT,
890 .start = VT1724_RDMA1_START,
891};
892
893#define vt1724_playback_pro_reg vt1724_pdma0_reg
894#define vt1724_playback_spdif_reg vt1724_pdma4_reg
895#define vt1724_capture_pro_reg vt1724_rdma0_reg
896#define vt1724_capture_spdif_reg vt1724_rdma1_reg
897
1de9fdc2 898static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
1da177e4
LT		 899 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
900 SNDRV_PCM_INFO_BLOCK_TRANSFER |
901 SNDRV_PCM_INFO_MMAP_VALID |
902 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
903 .formats = SNDRV_PCM_FMTBIT_S32_LE,
904 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
905 .rate_min = 8000,
906 .rate_max = 192000,
907 .channels_min = 2,
908 .channels_max = 8,
909 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
910 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
911 .period_bytes_max = (1UL << 21),
912 .periods_min = 2,
913 .periods_max = 1024,
914};
915
1de9fdc2 916static const struct snd_pcm_hardware snd_vt1724_spdif = {
1da177e4
LT		 917 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
918 SNDRV_PCM_INFO_BLOCK_TRANSFER |
919 SNDRV_PCM_INFO_MMAP_VALID |
920 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
921 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2dfbeca9
TI		 922 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
923 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
924 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
925 SNDRV_PCM_RATE_192000),
1da177e4 926 .rate_min = 32000,
2dfbeca9 927 .rate_max = 192000,
1da177e4
LT		 928 .channels_min = 2,
929 .channels_max = 2,
930 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
931 .period_bytes_min = 2 * 4 * 2,
932 .period_bytes_max = (1UL << 18),
933 .periods_min = 2,
934 .periods_max = 1024,
935};
936
1de9fdc2 937static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
1da177e4
LT		 938 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
939 SNDRV_PCM_INFO_BLOCK_TRANSFER |
940 SNDRV_PCM_INFO_MMAP_VALID |
941 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
942 .formats = SNDRV_PCM_FMTBIT_S32_LE,
943 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
944 .rate_min = 8000,
945 .rate_max = 192000,
946 .channels_min = 2,
947 .channels_max = 2,
948 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
949 .period_bytes_min = 2 * 4 * 2,
950 .period_bytes_max = (1UL << 18),
951 .periods_min = 2,
952 .periods_max = 1024,
953};
954
955/*
956 * set rate constraints
957 */
d16be8ed 958static void set_std_hw_rates(struct snd_ice1712 *ice)
1da177e4 959{
1da177e4
LT		 960 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
961 /* I2S */
962 /* VT1720 doesn't support more than 96kHz */
963 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
d16be8ed
PH		 964 ice->hw_rates = &hw_constraints_rates_192;
965 else
966 ice->hw_rates = &hw_constraints_rates_96;
967 } else {
1da177e4 968 /* ACLINK */
d16be8ed 969 ice->hw_rates = &hw_constraints_rates_48;
1da177e4 970 }
d16be8ed
PH		 971}
972
973static int set_rate_constraints(struct snd_ice1712 *ice,
974 struct snd_pcm_substream *substream)
975{
976 struct snd_pcm_runtime *runtime = substream->runtime;
977
978 runtime->hw.rate_min = ice->hw_rates->list[0];
979 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
980 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
981 return snd_pcm_hw_constraint_list(runtime, 0,
982 SNDRV_PCM_HW_PARAM_RATE,
983 ice->hw_rates);
1da177e4
LT		 984}
985
986/* multi-channel playback needs alignment 8x32bit regardless of the channels
987 * actually used
988 */
989#define VT1724_BUFFER_ALIGN 0x20
990
ab0c7d72 991static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 992{
ab0c7d72
TI		 993 struct snd_pcm_runtime *runtime = substream->runtime;
994 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
a6b936b9 995 int chs, num_indeps;
1da177e4 996
32b47da0 997 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1da177e4
LT		 998 ice->playback_pro_substream = substream;
999 runtime->hw = snd_vt1724_playback_pro;
1000 snd_pcm_set_sync(substream);
1001 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1002 set_rate_constraints(ice, substream);
62932df8 1003 mutex_lock(&ice->open_mutex);
1da177e4 1004 /* calculate the currently available channels */
a6b936b9
TI		 1005 num_indeps = ice->num_total_dacs / 2 - 1;
1006 for (chs = 0; chs < num_indeps; chs++) {
1da177e4
LT		 1007 if (ice->pcm_reserved[chs])
1008 break;
1009 }
1010 chs = (chs + 1) * 2;
1011 runtime->hw.channels_max = chs;
1012 if (chs > 2) /* channels must be even */
1013 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
62932df8 1014 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 1015 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1016 VT1724_BUFFER_ALIGN);
1017 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1018 VT1724_BUFFER_ALIGN);
1019 return 0;
1020}
1021
ab0c7d72 1022static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 1023{
ab0c7d72
TI		 1024 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1025 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1026
32b47da0 1027 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1da177e4
LT		 1028 ice->capture_pro_substream = substream;
1029 runtime->hw = snd_vt1724_2ch_stereo;
1030 snd_pcm_set_sync(substream);
1031 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1032 set_rate_constraints(ice, substream);
1033 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1034 VT1724_BUFFER_ALIGN);
1035 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1036 VT1724_BUFFER_ALIGN);
1037 return 0;
1038}
1039
ab0c7d72 1040static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 1041{
ab0c7d72 1042 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1043
1044 if (PRO_RATE_RESET)
d16be8ed 1045 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1046 ice->playback_pro_substream = NULL;
1047
1048 return 0;
1049}
1050
ab0c7d72 1051static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1052{
ab0c7d72 1053 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1054
1055 if (PRO_RATE_RESET)
d16be8ed 1056 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1057 ice->capture_pro_substream = NULL;
1058 return 0;
1059}
1060
ab0c7d72 1061static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1da177e4
LT		 1062 .open = snd_vt1724_playback_pro_open,
1063 .close = snd_vt1724_playback_pro_close,
1064 .ioctl = snd_pcm_lib_ioctl,
1065 .hw_params = snd_vt1724_pcm_hw_params,
1066 .hw_free = snd_vt1724_pcm_hw_free,
1067 .prepare = snd_vt1724_playback_pro_prepare,
1068 .trigger = snd_vt1724_pcm_trigger,
1069 .pointer = snd_vt1724_playback_pro_pointer,
1070};
1071
ab0c7d72 1072static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1da177e4
LT		 1073 .open = snd_vt1724_capture_pro_open,
1074 .close = snd_vt1724_capture_pro_close,
1075 .ioctl = snd_pcm_lib_ioctl,
1076 .hw_params = snd_vt1724_pcm_hw_params,
1077 .hw_free = snd_vt1724_pcm_hw_free,
1078 .prepare = snd_vt1724_pcm_prepare,
1079 .trigger = snd_vt1724_pcm_trigger,
1080 .pointer = snd_vt1724_pcm_pointer,
1081};
1082
1de9fdc2 1083static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1da177e4 1084{
ab0c7d72 1085 struct snd_pcm *pcm;
1da177e4
LT		 1086 int err;
1087
1088 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
1089 if (err < 0)
1090 return err;
1091
1092 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1093 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
1094
1095 pcm->private_data = ice;
1096 pcm->info_flags = 0;
1097 strcpy(pcm->name, "ICE1724");
1098
1099 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1100 snd_dma_pci_data(ice->pci),
1101 256*1024, 256*1024);
1da177e4
LT		 1102
1103 ice->pcm_pro = pcm;
1104
1105 return 0;
1106}
1107
1108
1109/*
1110 * SPDIF PCM
1111 */
1112
1da177e4 1113/* update spdif control bits; call with reg_lock */
ab0c7d72 1114static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 1115{
1116 unsigned char cbit, disabled;
1117
1118 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1119 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1120 if (cbit != disabled)
1121 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1122 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1123 if (cbit != disabled)
1124 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1125 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1126}
1127
1128/* update SPDIF control bits according to the given rate */
ab0c7d72 1129static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1da177e4
LT		 1130{
1131 unsigned int val, nval;
1132 unsigned long flags;
1133
1134 spin_lock_irqsave(&ice->reg_lock, flags);
1135 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1136 nval &= ~(7 << 12);
1137 switch (rate) {
1138 case 44100: break;
1139 case 48000: nval |= 2 << 12; break;
1140 case 32000: nval |= 3 << 12; break;
2dfbeca9
TI		 1141 case 88200: nval |= 4 << 12; break;
1142 case 96000: nval |= 5 << 12; break;
1143 case 192000: nval |= 6 << 12; break;
1144 case 176400: nval |= 7 << 12; break;
1da177e4
LT		 1145 }
1146 if (val != nval)
1147 update_spdif_bits(ice, nval);
1148 spin_unlock_irqrestore(&ice->reg_lock, flags);
1149}
1150
ab0c7d72 1151static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1da177e4 1152{
ab0c7d72 1153 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1de9fdc2 1154 if (!ice->force_pdma4)
1da177e4
LT		 1155 update_spdif_rate(ice, substream->runtime->rate);
1156 return snd_vt1724_pcm_prepare(substream);
1157}
1158
ab0c7d72 1159static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 1160{
ab0c7d72
TI		 1161 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1162 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1163
32b47da0 1164 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1da177e4
LT		 1165 ice->playback_con_substream = substream;
1166 if (ice->force_pdma4) {
1167 runtime->hw = snd_vt1724_2ch_stereo;
1168 set_rate_constraints(ice, substream);
1169 } else
1170 runtime->hw = snd_vt1724_spdif;
1171 snd_pcm_set_sync(substream);
1172 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1173 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1174 VT1724_BUFFER_ALIGN);
1175 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1176 VT1724_BUFFER_ALIGN);
c93f5a1e
TI		 1177 if (ice->spdif.ops.open)
1178 ice->spdif.ops.open(ice, substream);
1da177e4
LT		 1179 return 0;
1180}
1181
ab0c7d72 1182static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1183{
ab0c7d72 1184 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1185
1186 if (PRO_RATE_RESET)
d16be8ed 1187 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 1188 ice->playback_con_substream = NULL;
c93f5a1e
TI		 1189 if (ice->spdif.ops.close)
1190 ice->spdif.ops.close(ice, substream);
1da177e4
LT		 1191
1192 return 0;
1193}
1194
ab0c7d72 1195static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1da177e4 1196{
ab0c7d72
TI		 1197 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1198 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1199
32b47da0 1200 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1da177e4
LT		 1201 ice->capture_con_substream = substream;
1202 if (ice->force_rdma1) {
1203 runtime->hw = snd_vt1724_2ch_stereo;
1204 set_rate_constraints(ice, substream);
1205 } else
1206 runtime->hw = snd_vt1724_spdif;
1207 snd_pcm_set_sync(substream);
1208 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1209 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1210 VT1724_BUFFER_ALIGN);
1211 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1212 VT1724_BUFFER_ALIGN);
c93f5a1e
TI		 1213 if (ice->spdif.ops.open)
1214 ice->spdif.ops.open(ice, substream);
1da177e4
LT		 1215 return 0;
1216}
1217
ab0c7d72 1218static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1219{
ab0c7d72 1220 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1221
1222 if (PRO_RATE_RESET)
d16be8ed 1223 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 1224 ice->capture_con_substream = NULL;
c93f5a1e
TI		 1225 if (ice->spdif.ops.close)
1226 ice->spdif.ops.close(ice, substream);
1da177e4
LT		 1227
1228 return 0;
1229}
1230
ab0c7d72 1231static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1da177e4
LT		 1232 .open = snd_vt1724_playback_spdif_open,
1233 .close = snd_vt1724_playback_spdif_close,
1234 .ioctl = snd_pcm_lib_ioctl,
1235 .hw_params = snd_vt1724_pcm_hw_params,
1236 .hw_free = snd_vt1724_pcm_hw_free,
1237 .prepare = snd_vt1724_playback_spdif_prepare,
1238 .trigger = snd_vt1724_pcm_trigger,
1239 .pointer = snd_vt1724_pcm_pointer,
1240};
1241
ab0c7d72 1242static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1da177e4
LT		 1243 .open = snd_vt1724_capture_spdif_open,
1244 .close = snd_vt1724_capture_spdif_close,
1245 .ioctl = snd_pcm_lib_ioctl,
1246 .hw_params = snd_vt1724_pcm_hw_params,
1247 .hw_free = snd_vt1724_pcm_hw_free,
1248 .prepare = snd_vt1724_pcm_prepare,
1249 .trigger = snd_vt1724_pcm_trigger,
1250 .pointer = snd_vt1724_pcm_pointer,
1251};
1252
1253
1de9fdc2 1254static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1da177e4
LT		 1255{
1256 char *name;
ab0c7d72 1257 struct snd_pcm *pcm;
1da177e4
LT		 1258 int play, capt;
1259 int err;
1260
1261 if (ice->force_pdma4 ||
1262 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1263 play = 1;
1264 ice->has_spdif = 1;
1265 } else
1266 play = 0;
1267 if (ice->force_rdma1 ||
1268 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1269 capt = 1;
1270 ice->has_spdif = 1;
1271 } else
1272 capt = 0;
1de9fdc2 1273 if (!play && !capt)
1da177e4
LT		 1274 return 0; /* no spdif device */
1275
1276 if (ice->force_pdma4 || ice->force_rdma1)
1277 name = "ICE1724 Secondary";
1278 else
8eca7538 1279 name = "ICE1724 IEC958";
1da177e4
LT		 1280 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1281 if (err < 0)
1282 return err;
1283
1284 if (play)
1285 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1286 &snd_vt1724_playback_spdif_ops);
1287 if (capt)
1288 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1289 &snd_vt1724_capture_spdif_ops);
1290
1291 pcm->private_data = ice;
1292 pcm->info_flags = 0;
1293 strcpy(pcm->name, name);
1294
1295 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72 1296 snd_dma_pci_data(ice->pci),
1d4efa66 1297 256*1024, 256*1024);
1da177e4
LT		 1298
1299 ice->pcm = pcm;
1300
1301 return 0;
1302}
1303
1304
1305/*
1306 * independent surround PCMs
1307 */
1308
32b47da0 1309static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1da177e4
LT		 1310 {
1311 .addr = VT1724_MT_PDMA1_ADDR,
1312 .size = VT1724_MT_PDMA1_SIZE,
1313 .count = VT1724_MT_PDMA1_COUNT,
1314 .start = VT1724_PDMA1_START,
1315 },
1316 {
1317 .addr = VT1724_MT_PDMA2_ADDR,
1318 .size = VT1724_MT_PDMA2_SIZE,
1319 .count = VT1724_MT_PDMA2_COUNT,
1320 .start = VT1724_PDMA2_START,
1321 },
1322 {
1323 .addr = VT1724_MT_PDMA3_ADDR,
1324 .size = VT1724_MT_PDMA3_SIZE,
1325 .count = VT1724_MT_PDMA3_COUNT,
1326 .start = VT1724_PDMA3_START,
1327 },
1328};
1329
ab0c7d72 1330static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1da177e4 1331{
ab0c7d72 1332 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1333 unsigned char val;
1334
1335 spin_lock_irq(&ice->reg_lock);
1336 val = 3 - substream->number;
1337 if (inb(ICEMT1724(ice, BURST)) < val)
1338 outb(val, ICEMT1724(ice, BURST));
1339 spin_unlock_irq(&ice->reg_lock);
1340 return snd_vt1724_pcm_prepare(substream);
1341}
1342
ab0c7d72 1343static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1da177e4 1344{
ab0c7d72
TI		 1345 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1346 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1347
62932df8 1348 mutex_lock(&ice->open_mutex);
1da177e4
LT		 1349 /* already used by PDMA0? */
1350 if (ice->pcm_reserved[substream->number]) {
62932df8 1351 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 1352 return -EBUSY; /* FIXME: should handle blocking mode properly */
1353 }
62932df8 1354 mutex_unlock(&ice->open_mutex);
32b47da0 1355 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1da177e4
LT		 1356 ice->playback_con_substream_ds[substream->number] = substream;
1357 runtime->hw = snd_vt1724_2ch_stereo;
1358 snd_pcm_set_sync(substream);
1359 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1360 set_rate_constraints(ice, substream);
1361 return 0;
1362}
1363
ab0c7d72 1364static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1da177e4 1365{
ab0c7d72 1366 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1367
1368 if (PRO_RATE_RESET)
d16be8ed 1369 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1370 ice->playback_con_substream_ds[substream->number] = NULL;
1371 ice->pcm_reserved[substream->number] = NULL;
1372
1373 return 0;
1374}
1375
ab0c7d72 1376static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1da177e4
LT		 1377 .open = snd_vt1724_playback_indep_open,
1378 .close = snd_vt1724_playback_indep_close,
1379 .ioctl = snd_pcm_lib_ioctl,
1380 .hw_params = snd_vt1724_pcm_hw_params,
1381 .hw_free = snd_vt1724_pcm_hw_free,
1382 .prepare = snd_vt1724_playback_indep_prepare,
1383 .trigger = snd_vt1724_pcm_trigger,
1384 .pointer = snd_vt1724_pcm_pointer,
1385};
1386
1387
1de9fdc2 1388static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1da177e4 1389{
ab0c7d72 1390 struct snd_pcm *pcm;
1da177e4
LT		 1391 int play;
1392 int err;
1393
1394 play = ice->num_total_dacs / 2 - 1;
1395 if (play <= 0)
1396 return 0;
1397
1398 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1399 if (err < 0)
1400 return err;
1401
1402 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1403 &snd_vt1724_playback_indep_ops);
1404
1405 pcm->private_data = ice;
1406 pcm->info_flags = 0;
1407 strcpy(pcm->name, "ICE1724 Surround PCM");
1408
1409 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72 1410 snd_dma_pci_data(ice->pci),
1d4efa66 1411 256*1024, 256*1024);
1da177e4
LT		 1412
1413 ice->pcm_ds = pcm;
1414
1415 return 0;
1416}
1417
1418
1419/*
1420 * Mixer section
1421 */
1422
1de9fdc2 1423static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1da177e4
LT		 1424{
1425 int err;
1426
1de9fdc2 1427 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
ab0c7d72
TI		 1428 struct snd_ac97_bus *pbus;
1429 struct snd_ac97_template ac97;
1430 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1431 .write = snd_vt1724_ac97_write,
1432 .read = snd_vt1724_ac97_read,
1433 };
1434
1435 /* cold reset */
1436 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1437 mdelay(5); /* FIXME */
1438 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1439
1de9fdc2
AB		 1440 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1441 if (err < 0)
1da177e4
LT		 1442 return err;
1443 memset(&ac97, 0, sizeof(ac97));
1444 ac97.private_data = ice;
1de9fdc2
AB		 1445 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1446 if (err < 0)
1da177e4
LT		 1447 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1448 else
1449 return 0;
1450 }
1451 /* I2S mixer only */
1452 strcat(ice->card->mixername, "ICE1724 - multitrack");
1453 return 0;
1454}
1455
1456/*
1457 *
1458 */
1459
ab0c7d72 1460static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1461{
1462 return (unsigned int)ice->eeprom.data[idx] | \
1463 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1464 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1465}
1466
1de9fdc2 1467static void snd_vt1724_proc_read(struct snd_info_entry *entry,
ab0c7d72 1468 struct snd_info_buffer *buffer)
1da177e4 1469{
ab0c7d72 1470 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1471 unsigned int idx;
1472
1473 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1474 snd_iprintf(buffer, "EEPROM:\n");
1475
1476 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1477 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1478 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
ab0c7d72
TI		 1479 snd_iprintf(buffer, " System Config : 0x%x\n",
1480 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1481 snd_iprintf(buffer, " ACLink : 0x%x\n",
1482 ice->eeprom.data[ICE_EEP2_ACLINK]);
1483 snd_iprintf(buffer, " I2S : 0x%x\n",
1484 ice->eeprom.data[ICE_EEP2_I2S]);
1485 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1486 ice->eeprom.data[ICE_EEP2_SPDIF]);
1487 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1488 ice->eeprom.gpiodir);
1489 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1490 ice->eeprom.gpiomask);
1491 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1492 ice->eeprom.gpiostate);
1da177e4 1493 for (idx = 0x12; idx < ice->eeprom.size; idx++)
ab0c7d72
TI		 1494 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1495 idx, ice->eeprom.data[idx]);
1da177e4
LT		 1496
1497 snd_iprintf(buffer, "\nRegisters:\n");
1498
ab0c7d72
TI		 1499 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1500 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1da177e4 1501 for (idx = 0x0; idx < 0x20 ; idx++)
ab0c7d72
TI		 1502 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1503 idx, inb(ice->port+idx));
1da177e4 1504 for (idx = 0x0; idx < 0x30 ; idx++)
ab0c7d72
TI		 1505 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1506 idx, inb(ice->profi_port+idx));
1da177e4
LT		 1507}
1508
1de9fdc2 1509static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
1da177e4 1510{
ab0c7d72 1511 struct snd_info_entry *entry;
1da177e4 1512
1de9fdc2 1513 if (!snd_card_proc_new(ice->card, "ice1724", &entry))
bf850204 1514 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1da177e4
LT		 1515}
1516
1517/*
1518 *
1519 */
1520
ab0c7d72
TI		 1521static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1522 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1523{
1524 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
ab0c7d72 1525 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1526 return 0;
1527}
1528
ab0c7d72
TI		 1529static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1530 struct snd_ctl_elem_value *ucontrol)
1da177e4 1531{
ab0c7d72 1532 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1de9fdc2 1533
1da177e4
LT		 1534 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1535 return 0;
1536}
1537
1b60f6b0 1538static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
1da177e4
LT		 1539 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1540 .name = "ICE1724 EEPROM",
1541 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1542 .info = snd_vt1724_eeprom_info,
1543 .get = snd_vt1724_eeprom_get
1544};
1545
1546/*
1547 */
ab0c7d72
TI		 1548static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1549 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1550{
1551 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1552 uinfo->count = 1;
1553 return 0;
1554}
1555
ab0c7d72 1556static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1da177e4 1557{
2dfbeca9 1558 unsigned int val, rbits;
1da177e4
LT		 1559
1560 val = diga->status[0] & 0x03; /* professional, non-audio */
1561 if (val & 0x01) {
1562 /* professional */
ab0c7d72
TI		 1563 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1564 IEC958_AES0_PRO_EMPHASIS_5015)
1da177e4 1565 val |= 1U << 3;
2dfbeca9
TI		 1566 rbits = (diga->status[4] >> 3) & 0x0f;
1567 if (rbits) {
1568 switch (rbits) {
1569 case 2: val |= 5 << 12; break; /* 96k */
1570 case 3: val |= 6 << 12; break; /* 192k */
1571 case 10: val |= 4 << 12; break; /* 88.2k */
1572 case 11: val |= 7 << 12; break; /* 176.4k */
1573 }
1574 } else {
1575 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1576 case IEC958_AES0_PRO_FS_44100:
1577 break;
1578 case IEC958_AES0_PRO_FS_32000:
1579 val |= 3U << 12;
1580 break;
1581 default:
1582 val |= 2U << 12;
1583 break;
1584 }
1da177e4
LT		 1585 }
1586 } else {
1587 /* consumer */
1588 val |= diga->status[1] & 0x04; /* copyright */
ab0c7d72
TI		 1589 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1590 IEC958_AES0_CON_EMPHASIS_5015)
1da177e4
LT		 1591 val |= 1U << 3;
1592 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1593 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1594 }
1595 return val;
1596}
1597
ab0c7d72 1598static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1da177e4
LT		 1599{
1600 memset(diga->status, 0, sizeof(diga->status));
1601 diga->status[0] = val & 0x03; /* professional, non-audio */
1602 if (val & 0x01) {
1603 /* professional */
1604 if (val & (1U << 3))
1605 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1606 switch ((val >> 12) & 0x7) {
1607 case 0:
1608 break;
1609 case 2:
1610 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1611 break;
1612 default:
1613 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1614 break;
1615 }
1616 } else {
1617 /* consumer */
1618 diga->status[0] |= val & (1U << 2); /* copyright */
1619 if (val & (1U << 3))
1620 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1621 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1622 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1623 }
1624}
1625
ab0c7d72
TI		 1626static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1627 struct snd_ctl_elem_value *ucontrol)
1da177e4 1628{
ab0c7d72 1629 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1630 unsigned int val;
1631 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1632 decode_spdif_bits(&ucontrol->value.iec958, val);
1633 return 0;
1634}
1635
ab0c7d72
TI		 1636static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1637 struct snd_ctl_elem_value *ucontrol)
1da177e4 1638{
ab0c7d72 1639 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1640 unsigned int val, old;
1641
1642 val = encode_spdif_bits(&ucontrol->value.iec958);
1643 spin_lock_irq(&ice->reg_lock);
1644 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1645 if (val != old)
1646 update_spdif_bits(ice, val);
1647 spin_unlock_irq(&ice->reg_lock);
1de9fdc2 1648 return val != old;
1da177e4
LT		 1649}
1650
1b60f6b0 1651static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
1da177e4
LT		 1652{
1653 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1654 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1da177e4
LT		 1655 .info = snd_vt1724_spdif_info,
1656 .get = snd_vt1724_spdif_default_get,
1657 .put = snd_vt1724_spdif_default_put
1658};
1659
ab0c7d72
TI		 1660static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1662{
1663 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1664 IEC958_AES0_PROFESSIONAL |
1665 IEC958_AES0_CON_NOT_COPYRIGHT |
1666 IEC958_AES0_CON_EMPHASIS;
1667 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1668 IEC958_AES1_CON_CATEGORY;
1669 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1670 return 0;
1671}
1672
ab0c7d72
TI		 1673static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1675{
1676 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1677 IEC958_AES0_PROFESSIONAL |
1678 IEC958_AES0_PRO_FS |
1679 IEC958_AES0_PRO_EMPHASIS;
1680 return 0;
1681}
1682
1b60f6b0 1683static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
1da177e4
LT		 1684{
1685 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1686 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1687 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1da177e4
LT		 1688 .info = snd_vt1724_spdif_info,
1689 .get = snd_vt1724_spdif_maskc_get,
1690};
1691
1b60f6b0 1692static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
1da177e4
LT		 1693{
1694 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1695 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1696 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1da177e4
LT		 1697 .info = snd_vt1724_spdif_info,
1698 .get = snd_vt1724_spdif_maskp_get,
1699};
1700
a5ce8890 1701#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1da177e4 1702
ab0c7d72
TI		 1703static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1704 struct snd_ctl_elem_value *ucontrol)
1da177e4 1705{
ab0c7d72
TI		 1706 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1707 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1708 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1da177e4
LT		 1709 return 0;
1710}
1711
ab0c7d72
TI		 1712static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1713 struct snd_ctl_elem_value *ucontrol)
1da177e4 1714{
ab0c7d72 1715 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1716 unsigned char old, val;
1717
1718 spin_lock_irq(&ice->reg_lock);
1719 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1720 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1721 if (ucontrol->value.integer.value[0])
1722 val |= VT1724_CFG_SPDIF_OUT_EN;
1723 if (old != val)
1724 outb(val, ICEREG1724(ice, SPDIF_CFG));
1725 spin_unlock_irq(&ice->reg_lock);
1726 return old != val;
1727}
1728
1b60f6b0 1729static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
1da177e4
LT		 1730{
1731 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1732 /* FIXME: the following conflict with IEC958 Playback Route */
1de9fdc2
AB		 1733 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
1734 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1da177e4
LT		 1735 .info = snd_vt1724_spdif_sw_info,
1736 .get = snd_vt1724_spdif_sw_get,
1737 .put = snd_vt1724_spdif_sw_put
1738};
1739
1740
1741#if 0 /* NOT USED YET */
1742/*
1743 * GPIO access from extern
1744 */
1745
a5ce8890 1746#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1da177e4 1747
ab0c7d72
TI		 1748int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1749 struct snd_ctl_elem_value *ucontrol)
1da177e4 1750{
ab0c7d72 1751 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1752 int shift = kcontrol->private_value & 0xff;
1753 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1de9fdc2 1754
1da177e4 1755 snd_ice1712_save_gpio_status(ice);
ab0c7d72
TI		 1756 ucontrol->value.integer.value[0] =
1757 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1da177e4
LT		 1758 snd_ice1712_restore_gpio_status(ice);
1759 return 0;
1760}
1761
ab0c7d72
TI		 1762int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1763 struct snd_ctl_elem_value *ucontrol)
1da177e4 1764{
ab0c7d72 1765 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1766 int shift = kcontrol->private_value & 0xff;
1767 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1768 unsigned int val, nval;
1769
1770 if (kcontrol->private_value & (1 << 31))
1771 return -EPERM;
1772 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1773 snd_ice1712_save_gpio_status(ice);
1774 val = snd_ice1712_gpio_read(ice);
1775 nval |= val & ~(1 << shift);
1776 if (val != nval)
1777 snd_ice1712_gpio_write(ice, nval);
1778 snd_ice1712_restore_gpio_status(ice);
1779 return val != nval;
1780}
1781#endif /* NOT USED YET */
1782
1783/*
1784 * rate
1785 */
ab0c7d72
TI		 1786static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1787 struct snd_ctl_elem_info *uinfo)
1da177e4 1788{
ab0c7d72 1789 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1790
1791 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1792 uinfo->count = 1;
d16be8ed 1793 uinfo->value.enumerated.items = ice->hw_rates->count + 1;
1da177e4
LT		 1794 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1795 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
d16be8ed
PH		 1796 if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
1797 strcpy(uinfo->value.enumerated.name, "IEC958 Input");
1798 else
1799 sprintf(uinfo->value.enumerated.name, "%d",
1800 ice->hw_rates->list[uinfo->value.enumerated.item]);
1da177e4
LT		 1801 return 0;
1802}
1803
ab0c7d72
TI		 1804static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1805 struct snd_ctl_elem_value *ucontrol)
1da177e4 1806{
ab0c7d72 1807 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed 1808 unsigned int i, rate;
1de9fdc2 1809
1da177e4 1810 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH		 1811 if (ice->is_spdif_master(ice)) {
1812 ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
1da177e4 1813 } else {
d16be8ed
PH		 1814 rate = ice->get_rate(ice);
1815 ucontrol->value.enumerated.item[0] = 0;
1816 for (i = 0; i < ice->hw_rates->count; i++) {
1817 if (ice->hw_rates->list[i] == rate) {
1818 ucontrol->value.enumerated.item[0] = i;
1819 break;
1820 }
1da177e4 1821 }
1da177e4
LT		 1822 }
1823 spin_unlock_irq(&ice->reg_lock);
1824 return 0;
1825}
1826
d16be8ed
PH		 1827/* setting clock to external - SPDIF */
1828static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
1829{
1830 unsigned char oval;
1831 unsigned char i2s_oval;
1832 oval = inb(ICEMT1724(ice, RATE));
1833 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1834 /* setting 256fs */
1835 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1836 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1837}
1838
ab0c7d72
TI		 1839static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1840 struct snd_ctl_elem_value *ucontrol)
1da177e4 1841{
ab0c7d72 1842 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed
PH		 1843 unsigned int old_rate, new_rate;
1844 unsigned int item = ucontrol->value.enumerated.item[0];
1845 unsigned int spdif = ice->hw_rates->count;
1846
1847 if (item > spdif)
1848 return -EINVAL;
1da177e4
LT		 1849
1850 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH		 1851 if (ice->is_spdif_master(ice))
1852 old_rate = 0;
1853 else
1854 old_rate = ice->get_rate(ice);
1855 if (item == spdif) {
1856 /* switching to external clock via SPDIF */
1857 ice->set_spdif_clock(ice);
1858 new_rate = 0;
1da177e4 1859 } else {
d16be8ed
PH		 1860 /* internal on-card clock */
1861 new_rate = ice->hw_rates->list[item];
1862 ice->pro_rate_default = new_rate;
1863 spin_unlock_irq(&ice->reg_lock);
1864 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1865 spin_lock_irq(&ice->reg_lock);
1da177e4 1866 }
1da177e4
LT		 1867 spin_unlock_irq(&ice->reg_lock);
1868
d16be8ed
PH		 1869 /* the first reset to the SPDIF master mode? */
1870 if (old_rate != new_rate && !new_rate) {
1da177e4 1871 /* notify akm chips as well */
d16be8ed
PH		 1872 unsigned int i;
1873 if (ice->gpio.set_pro_rate)
1874 ice->gpio.set_pro_rate(ice, 0);
1875 for (i = 0; i < ice->akm_codecs; i++) {
1876 if (ice->akm[i].ops.set_rate_val)
1877 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1da177e4
LT		 1878 }
1879 }
d16be8ed 1880 return old_rate != new_rate;
1da177e4
LT		 1881}
1882
1b60f6b0 1883static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
1da177e4
LT		 1884 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1885 .name = "Multi Track Internal Clock",
1886 .info = snd_vt1724_pro_internal_clock_info,
1887 .get = snd_vt1724_pro_internal_clock_get,
1888 .put = snd_vt1724_pro_internal_clock_put
1889};
1890
a5ce8890 1891#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1892
ab0c7d72
TI		 1893static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1894 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1895{
1896 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1897 return 0;
1898}
1899
ab0c7d72
TI		 1900static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1901 struct snd_ctl_elem_value *ucontrol)
1da177e4 1902{
ab0c7d72 1903 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1904 int change = 0, nval;
1905
1906 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1907 spin_lock_irq(&ice->reg_lock);
1908 change = PRO_RATE_LOCKED != nval;
1909 PRO_RATE_LOCKED = nval;
1910 spin_unlock_irq(&ice->reg_lock);
1911 return change;
1912}
1913
1b60f6b0 1914static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
1da177e4
LT		 1915 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1916 .name = "Multi Track Rate Locking",
1917 .info = snd_vt1724_pro_rate_locking_info,
1918 .get = snd_vt1724_pro_rate_locking_get,
1919 .put = snd_vt1724_pro_rate_locking_put
1920};
1921
a5ce8890 1922#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 1923
ab0c7d72
TI		 1924static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1925 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1926{
1927 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1928 return 0;
1929}
1930
ab0c7d72
TI		 1931static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1932 struct snd_ctl_elem_value *ucontrol)
1da177e4 1933{
ab0c7d72 1934 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1935 int change = 0, nval;
1936
1937 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1938 spin_lock_irq(&ice->reg_lock);
1939 change = PRO_RATE_RESET != nval;
1940 PRO_RATE_RESET = nval;
1941 spin_unlock_irq(&ice->reg_lock);
1942 return change;
1943}
1944
1b60f6b0 1945static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
1da177e4
LT		 1946 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1947 .name = "Multi Track Rate Reset",
1948 .info = snd_vt1724_pro_rate_reset_info,
1949 .get = snd_vt1724_pro_rate_reset_get,
1950 .put = snd_vt1724_pro_rate_reset_put
1951};
1952
1953
1954/*
1955 * routing
1956 */
ab0c7d72
TI		 1957static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1958 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1959{
1960 static char *texts[] = {
1961 "PCM Out", /* 0 */
1962 "H/W In 0", "H/W In 1", /* 1-2 */
1963 "IEC958 In L", "IEC958 In R", /* 3-4 */
1964 };
1de9fdc2 1965
1da177e4
LT		 1966 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1967 uinfo->count = 1;
1968 uinfo->value.enumerated.items = 5;
1969 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1970 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1971 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1972 return 0;
1973}
1974
1975static inline int analog_route_shift(int idx)
1976{
1977 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1978}
1979
1980static inline int digital_route_shift(int idx)
1981{
1982 return idx * 3;
1983}
1984
2bf864ac 1985int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
1da177e4
LT		 1986{
1987 unsigned long val;
1988 unsigned char eitem;
32b47da0 1989 static const unsigned char xlate[8] = {
1da177e4
LT		 1990 0, 255, 1, 2, 255, 255, 3, 4,
1991 };
1992
1993 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1994 val >>= shift;
1de9fdc2 1995 val &= 7; /* we now have 3 bits per output */
1da177e4
LT		 1996 eitem = xlate[val];
1997 if (eitem == 255) {
1998 snd_BUG();
1999 return 0;
2000 }
2001 return eitem;
2002}
2003
2bf864ac
TI		 2004int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
2005 int shift)
1da177e4
LT		 2006{
2007 unsigned int old_val, nval;
2008 int change;
32b47da0 2009 static const unsigned char xroute[8] = {
1da177e4
LT		 2010 0, /* PCM */
2011 2, /* PSDIN0 Left */
2012 3, /* PSDIN0 Right */
2013 6, /* SPDIN Left */
2014 7, /* SPDIN Right */
2015 };
2016
2017 nval = xroute[val % 5];
2018 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2019 val &= ~(0x07 << shift);
2020 val |= nval << shift;
2021 change = val != old_val;
2022 if (change)
2023 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2024 return change;
2025}
2026
ab0c7d72
TI		 2027static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2028 struct snd_ctl_elem_value *ucontrol)
1da177e4 2029{
ab0c7d72 2030 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2031 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72 2032 ucontrol->value.enumerated.item[0] =
2bf864ac 2033 snd_ice1724_get_route_val(ice, analog_route_shift(idx));
1da177e4
LT		 2034 return 0;
2035}
2036
ab0c7d72
TI		 2037static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2038 struct snd_ctl_elem_value *ucontrol)
1da177e4 2039{
ab0c7d72 2040 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2041 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2bf864ac
TI		 2042 return snd_ice1724_put_route_val(ice,
2043 ucontrol->value.enumerated.item[0],
2044 analog_route_shift(idx));
1da177e4
LT		 2045}
2046
ab0c7d72
TI		 2047static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2048 struct snd_ctl_elem_value *ucontrol)
1da177e4 2049{
ab0c7d72 2050 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2051 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72 2052 ucontrol->value.enumerated.item[0] =
2bf864ac 2053 snd_ice1724_get_route_val(ice, digital_route_shift(idx));
1da177e4
LT		 2054 return 0;
2055}
2056
ab0c7d72
TI		 2057static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2058 struct snd_ctl_elem_value *ucontrol)
1da177e4 2059{
ab0c7d72 2060 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2061 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2bf864ac
TI		 2062 return snd_ice1724_put_route_val(ice,
2063 ucontrol->value.enumerated.item[0],
2064 digital_route_shift(idx));
1da177e4
LT		 2065}
2066
2bf864ac
TI		 2067static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata =
2068{
1da177e4
LT		 2069 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2070 .name = "H/W Playback Route",
2071 .info = snd_vt1724_pro_route_info,
2072 .get = snd_vt1724_pro_route_analog_get,
2073 .put = snd_vt1724_pro_route_analog_put,
2074};
2075
1b60f6b0 2076static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1da177e4 2077 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1de9fdc2 2078 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
1da177e4
LT		 2079 .info = snd_vt1724_pro_route_info,
2080 .get = snd_vt1724_pro_route_spdif_get,
2081 .put = snd_vt1724_pro_route_spdif_put,
2082 .count = 2,
2083};
2084
2085
ab0c7d72
TI		 2086static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2087 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2088{
2089 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2090 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
2091 uinfo->value.integer.min = 0;
2092 uinfo->value.integer.max = 255;
2093 return 0;
2094}
2095
ab0c7d72
TI		 2096static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2097 struct snd_ctl_elem_value *ucontrol)
1da177e4 2098{
ab0c7d72 2099 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2100 int idx;
1de9fdc2 2101
1da177e4
LT		 2102 spin_lock_irq(&ice->reg_lock);
2103 for (idx = 0; idx < 22; idx++) {
2104 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
ab0c7d72
TI		 2105 ucontrol->value.integer.value[idx] =
2106 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1da177e4
LT		 2107 }
2108 spin_unlock_irq(&ice->reg_lock);
2109 return 0;
2110}
2111
1b60f6b0 2112static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
2bdf6633 2113 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 2114 .name = "Multi Track Peak",
2115 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2116 .info = snd_vt1724_pro_peak_info,
2117 .get = snd_vt1724_pro_peak_get
2118};
2119
2120/*
2121 *
2122 */
2123
1b60f6b0 2124static struct snd_ice1712_card_info no_matched __devinitdata;
1da177e4 2125
1b60f6b0 2126static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1da177e4 2127 snd_vt1724_revo_cards,
1de9fdc2 2128 snd_vt1724_amp_cards,
1da177e4
LT		 2129 snd_vt1724_aureon_cards,
2130 snd_vt1720_mobo_cards,
2131 snd_vt1720_pontis_cards,
6b8d6e55 2132 snd_vt1724_prodigy_hifi_cards,
1da177e4
LT		 2133 snd_vt1724_prodigy192_cards,
2134 snd_vt1724_juli_cards,
72cbfd45 2135 snd_vt1724_maya44_cards,
1da177e4 2136 snd_vt1724_phase_cards,
f6cdab5f 2137 snd_vt1724_wtm_cards,
f31639b8 2138 snd_vt1724_se_cards,
1da177e4
LT		 2139 NULL,
2140};
2141
2142
2143/*
2144 */
2145
ab0c7d72 2146static void wait_i2c_busy(struct snd_ice1712 *ice)
1da177e4
LT		 2147{
2148 int t = 0x10000;
2149 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2150 ;
2151 if (t == -1)
2152 printk(KERN_ERR "ice1724: i2c busy timeout\n");
2153}
2154
ab0c7d72
TI		 2155unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2156 unsigned char dev, unsigned char addr)
1da177e4
LT		 2157{
2158 unsigned char val;
2159
62932df8 2160 mutex_lock(&ice->i2c_mutex);
acec30ff 2161 wait_i2c_busy(ice);
1da177e4
LT		 2162 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2163 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2164 wait_i2c_busy(ice);
2165 val = inb(ICEREG1724(ice, I2C_DATA));
62932df8 2166 mutex_unlock(&ice->i2c_mutex);
e2ea7cfc
TI		 2167 /*
2168 printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
2169 */
1da177e4
LT		 2170 return val;
2171}
2172
ab0c7d72
TI		 2173void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2174 unsigned char dev, unsigned char addr, unsigned char data)
1da177e4 2175{
62932df8 2176 mutex_lock(&ice->i2c_mutex);
1da177e4 2177 wait_i2c_busy(ice);
e2ea7cfc
TI		 2178 /*
2179 printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
2180 */
1da177e4
LT		 2181 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2182 outb(data, ICEREG1724(ice, I2C_DATA));
2183 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2184 wait_i2c_busy(ice);
62932df8 2185 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT		 2186}
2187
ab0c7d72
TI		 2188static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2189 const char *modelname)
1da177e4
LT		 2190{
2191 const int dev = 0xa0; /* EEPROM device address */
2192 unsigned int i, size;
1b60f6b0 2193 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4 2194
1de9fdc2 2195 if (!modelname || !*modelname) {
1da177e4
LT		 2196 ice->eeprom.subvendor = 0;
2197 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2198 ice->eeprom.subvendor =
2199 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1de9fdc2
AB		 2200 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2201 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1da177e4 2202 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
ab0c7d72
TI		 2203 if (ice->eeprom.subvendor == 0 ||
2204 ice->eeprom.subvendor == (unsigned int)-1) {
2205 /* invalid subvendor from EEPROM, try the PCI
2206 * subststem ID instead
2207 */
1da177e4 2208 u16 vendor, device;
ab0c7d72
TI		 2209 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2210 &vendor);
1da177e4 2211 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ab0c7d72
TI		 2212 ice->eeprom.subvendor =
2213 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2214 if (ice->eeprom.subvendor == 0 ||
2215 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2216 printk(KERN_ERR "ice1724: No valid ID is found\n");
2217 return -ENXIO;
2218 }
2219 }
2220 }
2221 for (tbl = card_tables; *tbl; tbl++) {
2222 for (c = *tbl; c->subvendor; c++) {
ab0c7d72 2223 if (modelname && c->model &&
1de9fdc2 2224 !strcmp(modelname, c->model)) {
ab0c7d72
TI		 2225 printk(KERN_INFO "ice1724: Using board model %s\n",
2226 c->name);
1da177e4
LT		 2227 ice->eeprom.subvendor = c->subvendor;
2228 } else if (c->subvendor != ice->eeprom.subvendor)
2229 continue;
1de9fdc2 2230 if (!c->eeprom_size || !c->eeprom_data)
1da177e4
LT		 2231 goto found;
2232 /* if the EEPROM is given by the driver, use it */
2233 snd_printdd("using the defined eeprom..\n");
2234 ice->eeprom.version = 2;
2235 ice->eeprom.size = c->eeprom_size + 6;
2236 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2237 goto read_skipped;
2238 }
2239 }
ab0c7d72
TI		 2240 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
2241 ice->eeprom.subvendor);
1da177e4
LT		 2242
2243 found:
2244 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2245 if (ice->eeprom.size < 6)
2246 ice->eeprom.size = 32;
2247 else if (ice->eeprom.size > 32) {
ab0c7d72
TI		 2248 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
2249 ice->eeprom.size);
1da177e4
LT		 2250 return -EIO;
2251 }
2252 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2253 if (ice->eeprom.version != 2)
ab0c7d72
TI		 2254 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
2255 ice->eeprom.version);
1da177e4
LT		 2256 size = ice->eeprom.size - 6;
2257 for (i = 0; i < size; i++)
2258 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2259
2260 read_skipped:
2261 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2262 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2263 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2264
2265 return 0;
2266}
2267
2268
2269
cd775387 2270static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
1da177e4
LT		 2271{
2272 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
d82b64f4 2273 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
988f0664 2274 msleep(10);
1da177e4 2275 outb(0, ICEREG1724(ice, CONTROL));
d82b64f4 2276 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
988f0664
KW		 2277 msleep(10);
2278}
2279
b40e9538 2280static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
988f0664 2281{
1da177e4
LT		 2282 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2283 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2284 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2285 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2286
2287 ice->gpio.write_mask = ice->eeprom.gpiomask;
2288 ice->gpio.direction = ice->eeprom.gpiodir;
2289 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2290 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2291 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2292
2293 outb(0, ICEREG1724(ice, POWERDOWN));
2294
b40e9538
IC		 2295 /* MPU_RX and TX irq masks are cleared later dynamically */
2296 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
2297
2298 /* don't handle FIFO overrun/underruns (just yet),
2299 * since they cause machine lockups
2300 */
2301 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2302
1da177e4
LT		 2303 return 0;
2304}
2305
ab0c7d72 2306static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2307{
2308 int err;
ab0c7d72 2309 struct snd_kcontrol *kctl;
1da177e4 2310
da3cec35
TI		 2311 if (snd_BUG_ON(!ice->pcm))
2312 return -EIO;
1da177e4 2313
2bf864ac
TI		 2314 if (!ice->own_routing) {
2315 err = snd_ctl_add(ice->card,
2316 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2317 if (err < 0)
2318 return err;
2319 }
1da177e4
LT		 2320
2321 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2322 if (err < 0)
2323 return err;
2324
2325 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2326 if (err < 0)
2327 return err;
2328 kctl->id.device = ice->pcm->device;
2329 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2330 if (err < 0)
2331 return err;
2332 kctl->id.device = ice->pcm->device;
2333 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2334 if (err < 0)
2335 return err;
2336 kctl->id.device = ice->pcm->device;
2337#if 0 /* use default only */
2338 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2339 if (err < 0)
2340 return err;
2341 kctl->id.device = ice->pcm->device;
2342 ice->spdif.stream_ctl = kctl;
2343#endif
2344 return 0;
2345}
2346
2347
ab0c7d72 2348static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2349{
2350 int err;
2351
2352 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2353 if (err < 0)
2354 return err;
2355 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2356 if (err < 0)
2357 return err;
2358
2359 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2360 if (err < 0)
2361 return err;
2362 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2363 if (err < 0)
2364 return err;
2365
2bf864ac 2366 if (!ice->own_routing && ice->num_total_dacs > 0) {
ab0c7d72 2367 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
1da177e4
LT		 2368 tmp.count = ice->num_total_dacs;
2369 if (ice->vt1720 && tmp.count > 2)
2370 tmp.count = 2;
2371 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2372 if (err < 0)
2373 return err;
2374 }
2375
2376 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2377 if (err < 0)
2378 return err;
2379
2380 return 0;
2381}
2382
ab0c7d72 2383static int snd_vt1724_free(struct snd_ice1712 *ice)
1da177e4 2384{
1de9fdc2 2385 if (!ice->port)
1da177e4
LT		 2386 goto __hw_end;
2387 /* mask all interrupts */
2388 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2389 outb(0xff, ICEREG1724(ice, IRQMASK));
2390 /* --- */
1de9fdc2 2391__hw_end:
f000fd80 2392 if (ice->irq >= 0)
ab0c7d72 2393 free_irq(ice->irq, ice);
1da177e4
LT		 2394 pci_release_regions(ice->pci);
2395 snd_ice1712_akm4xxx_free(ice);
2396 pci_disable_device(ice->pci);
7cda8ba9 2397 kfree(ice->spec);
1da177e4
LT		 2398 kfree(ice);
2399 return 0;
2400}
2401
ab0c7d72 2402static int snd_vt1724_dev_free(struct snd_device *device)
1da177e4 2403{
ab0c7d72 2404 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2405 return snd_vt1724_free(ice);
2406}
2407
ab0c7d72 2408static int __devinit snd_vt1724_create(struct snd_card *card,
1da177e4
LT		 2409 struct pci_dev *pci,
2410 const char *modelname,
1de9fdc2 2411 struct snd_ice1712 **r_ice1712)
1da177e4 2412{
ab0c7d72 2413 struct snd_ice1712 *ice;
1da177e4 2414 int err;
ab0c7d72 2415 static struct snd_device_ops ops = {
1da177e4
LT		 2416 .dev_free = snd_vt1724_dev_free,
2417 };
2418
2419 *r_ice1712 = NULL;
2420
1de9fdc2
AB		 2421 /* enable PCI device */
2422 err = pci_enable_device(pci);
2423 if (err < 0)
1da177e4
LT		 2424 return err;
2425
e560d8d8 2426 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2427 if (ice == NULL) {
2428 pci_disable_device(pci);
2429 return -ENOMEM;
2430 }
2431 ice->vt1724 = 1;
2432 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2433 mutex_init(&ice->gpio_mutex);
2434 mutex_init(&ice->open_mutex);
2435 mutex_init(&ice->i2c_mutex);
1da177e4
LT		 2436 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2437 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2438 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2439 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2440 ice->card = card;
2441 ice->pci = pci;
2442 ice->irq = -1;
2443 pci_set_master(pci);
2444 snd_vt1724_proc_init(ice);
2445 synchronize_irq(pci->irq);
2446
b40e9538
IC		 2447 card->private_data = ice;
2448
1de9fdc2
AB		 2449 err = pci_request_regions(pci, "ICE1724");
2450 if (err < 0) {
1da177e4
LT		 2451 kfree(ice);
2452 pci_disable_device(pci);
2453 return err;
2454 }
2455 ice->port = pci_resource_start(pci, 0);
2456 ice->profi_port = pci_resource_start(pci, 1);
2457
ab0c7d72 2458 if (request_irq(pci->irq, snd_vt1724_interrupt,
437a5a46 2459 IRQF_SHARED, "ICE1724", ice)) {
99b359ba 2460 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2461 snd_vt1724_free(ice);
2462 return -EIO;
2463 }
2464
2465 ice->irq = pci->irq;
2466
988f0664 2467 snd_vt1724_chip_reset(ice);
1da177e4
LT		 2468 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2469 snd_vt1724_free(ice);
2470 return -EIO;
2471 }
2472 if (snd_vt1724_chip_init(ice) < 0) {
2473 snd_vt1724_free(ice);
2474 return -EIO;
2475 }
2476
1de9fdc2
AB		 2477 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2478 if (err < 0) {
1da177e4 2479 snd_vt1724_free(ice);
1de9fdc2 2480 return err;
1da177e4
LT		 2481 }
2482
2483 snd_card_set_dev(card, &pci->dev);
2484
2485 *r_ice1712 = ice;
2486 return 0;
2487}
2488
2489
2490/*
2491 *
2492 * Registration
2493 *
2494 */
2495
2496static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2497 const struct pci_device_id *pci_id)
2498{
2499 static int dev;
ab0c7d72
TI		 2500 struct snd_card *card;
2501 struct snd_ice1712 *ice;
1da177e4 2502 int pcm_dev = 0, err;
1b60f6b0 2503 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT		 2504
2505 if (dev >= SNDRV_CARDS)
2506 return -ENODEV;
2507 if (!enable[dev]) {
2508 dev++;
2509 return -ENOENT;
2510 }
2511
e58de7ba
TI		 2512 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2513 if (err < 0)
2514 return err;
1da177e4
LT		 2515
2516 strcpy(card->driver, "ICE1724");
2517 strcpy(card->shortname, "ICEnsemble ICE1724");
1de9fdc2
AB		 2518
2519 err = snd_vt1724_create(card, pci, model[dev], &ice);
2520 if (err < 0) {
1da177e4
LT		 2521 snd_card_free(card);
2522 return err;
2523 }
2524
2525 for (tbl = card_tables; *tbl; tbl++) {
2526 for (c = *tbl; c->subvendor; c++) {
2527 if (c->subvendor == ice->eeprom.subvendor) {
2528 strcpy(card->shortname, c->name);
2529 if (c->driver) /* specific driver? */
2530 strcpy(card->driver, c->driver);
2531 if (c->chip_init) {
1de9fdc2
AB		 2532 err = c->chip_init(ice);
2533 if (err < 0) {
1da177e4
LT		 2534 snd_card_free(card);
2535 return err;
2536 }
2537 }
2538 goto __found;
2539 }
2540 }
2541 }
2542 c = &no_matched;
1de9fdc2
AB		 2543__found:
2544 /*
2545 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2546 * ICE1712 has only one for both (mixed up).
2547 *
2548 * Confusingly the analog PCM is named "professional" here because it
2549 * was called so in ice1712 driver, and vt1724 driver is derived from
2550 * ice1712 driver.
2551 */
d16be8ed
PH		 2552 ice->pro_rate_default = PRO_RATE_DEFAULT;
2553 if (!ice->is_spdif_master)
2554 ice->is_spdif_master = stdclock_is_spdif_master;
2555 if (!ice->get_rate)
2556 ice->get_rate = stdclock_get_rate;
2557 if (!ice->set_rate)
2558 ice->set_rate = stdclock_set_rate;
2559 if (!ice->set_mclk)
2560 ice->set_mclk = stdclock_set_mclk;
2561 if (!ice->set_spdif_clock)
2562 ice->set_spdif_clock = stdclock_set_spdif_clock;
2563 if (!ice->hw_rates)
2564 set_std_hw_rates(ice);
1da177e4 2565
1de9fdc2
AB		 2566 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2567 if (err < 0) {
1da177e4
LT		 2568 snd_card_free(card);
2569 return err;
2570 }
1de9fdc2
AB		 2571
2572 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2573 if (err < 0) {
1da177e4
LT		 2574 snd_card_free(card);
2575 return err;
2576 }
1de9fdc2
AB		 2577
2578 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2579 if (err < 0) {
1da177e4
LT		 2580 snd_card_free(card);
2581 return err;
2582 }
2583
1de9fdc2
AB		 2584 err = snd_vt1724_ac97_mixer(ice);
2585 if (err < 0) {
1da177e4
LT		 2586 snd_card_free(card);
2587 return err;
2588 }
2589
1de9fdc2
AB		 2590 err = snd_vt1724_build_controls(ice);
2591 if (err < 0) {
1da177e4
LT		 2592 snd_card_free(card);
2593 return err;
2594 }
2595
2596 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
1de9fdc2
AB		 2597 err = snd_vt1724_spdif_build_controls(ice);
2598 if (err < 0) {
1da177e4
LT		 2599 snd_card_free(card);
2600 return err;
2601 }
2602 }
2603
2604 if (c->build_controls) {
1de9fdc2
AB		 2605 err = c->build_controls(ice);
2606 if (err < 0) {
1da177e4
LT		 2607 snd_card_free(card);
2608 return err;
2609 }
2610 }
2611
1de9fdc2 2612 if (!c->no_mpu401) {
1da177e4 2613 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
aea3bfbc
CL		 2614 struct snd_rawmidi *rmidi;
2615
2616 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2617 if (err < 0) {
1da177e4
LT		 2618 snd_card_free(card);
2619 return err;
2620 }
aea3bfbc
CL		 2621 ice->rmidi[0] = rmidi;
2622 rmidi->private_data = ice;
2623 strcpy(rmidi->name, "ICE1724 MIDI");
2624 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2625 SNDRV_RAWMIDI_INFO_INPUT |
2626 SNDRV_RAWMIDI_INFO_DUPLEX;
2627 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2628 &vt1724_midi_output_ops);
2629 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2630 &vt1724_midi_input_ops);
2631
3a841d51
TI		 2632 /* set watermarks */
2633 outb(VT1724_MPU_RX_FIFO | 0x1,
2634 ICEREG1724(ice, MPU_FIFO_WM));
2635 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
aea3bfbc
CL		 2636 /* set UART mode */
2637 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
1da177e4
LT		 2638 }
2639 }
2640
2641 sprintf(card->longname, "%s at 0x%lx, irq %i",
2642 card->shortname, ice->port, ice->irq);
2643
1de9fdc2
AB		 2644 err = snd_card_register(card);
2645 if (err < 0) {
1da177e4
LT		 2646 snd_card_free(card);
2647 return err;
2648 }
2649 pci_set_drvdata(pci, card);
2650 dev++;
2651 return 0;
2652}
2653
2654static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2655{
2656 snd_card_free(pci_get_drvdata(pci));
2657 pci_set_drvdata(pci, NULL);
2658}
2659
b40e9538
IC		 2660#ifdef CONFIG_PM
2661static int snd_vt1724_suspend(struct pci_dev *pci, pm_message_t state)
2662{
2663 struct snd_card *card = pci_get_drvdata(pci);
2664 struct snd_ice1712 *ice = card->private_data;
2665
2666 if (!ice->pm_suspend_enabled)
2667 return 0;
2668
2669 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2670
2671 snd_pcm_suspend_all(ice->pcm);
2672 snd_pcm_suspend_all(ice->pcm_pro);
2673 snd_pcm_suspend_all(ice->pcm_ds);
2674 snd_ac97_suspend(ice->ac97);
2675
2676 spin_lock_irq(&ice->reg_lock);
2677 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
2678 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
2679 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
2680 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2681 spin_unlock_irq(&ice->reg_lock);
2682
2683 if (ice->pm_suspend)
2684 ice->pm_suspend(ice);
2685
2686 pci_disable_device(pci);
2687 pci_save_state(pci);
2688 pci_set_power_state(pci, pci_choose_state(pci, state));
2689 return 0;
2690}
2691
2692static int snd_vt1724_resume(struct pci_dev *pci)
2693{
2694 struct snd_card *card = pci_get_drvdata(pci);
2695 struct snd_ice1712 *ice = card->private_data;
2696
2697 if (!ice->pm_suspend_enabled)
2698 return 0;
2699
2700 pci_set_power_state(pci, PCI_D0);
2701 pci_restore_state(pci);
2702
2703 if (pci_enable_device(pci) < 0) {
2704 snd_card_disconnect(card);
2705 return -EIO;
2706 }
2707
2708 pci_set_master(pci);
2709
2710 snd_vt1724_chip_reset(ice);
2711
2712 if (snd_vt1724_chip_init(ice) < 0) {
2713 snd_card_disconnect(card);
2714 return -EIO;
2715 }
2716
2717 if (ice->pm_resume)
2718 ice->pm_resume(ice);
2719
2720 if (ice->pm_saved_is_spdif_master) {
2721 /* switching to external clock via SPDIF */
2722 ice->set_spdif_clock(ice);
2723 } else {
2724 /* internal on-card clock */
2725 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
2726 }
2727
2728 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
2729
2730 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
2731 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
2732
2733 if (ice->ac97)
2734 snd_ac97_resume(ice->ac97);
2735
2736 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2737 return 0;
2738}
2739#endif
2740
1da177e4
LT		 2741static struct pci_driver driver = {
2742 .name = "ICE1724",
2743 .id_table = snd_vt1724_ids,
2744 .probe = snd_vt1724_probe,
2745 .remove = __devexit_p(snd_vt1724_remove),
b40e9538
IC		 2746#ifdef CONFIG_PM
2747 .suspend = snd_vt1724_suspend,
2748 .resume = snd_vt1724_resume,
2749#endif
1da177e4
LT		 2750};
2751
2752static int __init alsa_card_ice1724_init(void)
2753{
01d25d46 2754 return pci_register_driver(&driver);
1da177e4
LT		 2755}
2756
2757static void __exit alsa_card_ice1724_exit(void)
2758{
2759 pci_unregister_driver(&driver);
2760}
2761
2762module_init(alsa_card_ice1724_init)
2763module_exit(alsa_card_ice1724_exit)
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