[net-next-2.6.git] / sound / isa / gus / gus_dma.c

/*
 *  Routines for GF1 DMA control
 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
 *
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 *
 */

#include <sound/driver.h>
#include <asm/dma.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/gus.h>

static void snd_gf1_dma_ack(struct snd_gus_card * gus)
{
	unsigned long flags;

	spin_lock_irqsave(&gus->reg_lock, flags);
	snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, 0x00);
	snd_gf1_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL);
	spin_unlock_irqrestore(&gus->reg_lock, flags);
}

static void snd_gf1_dma_program(struct snd_gus_card * gus,
				unsigned int addr,
				unsigned long buf_addr,
				unsigned int count,
				unsigned int cmd)
{
	unsigned long flags;
	unsigned int address;
	unsigned char dma_cmd;
	unsigned int address_high;

	// snd_printk("dma_transfer: addr=0x%x, buf=0x%lx, count=0x%x\n", addr, (long) buf, count);

	if (gus->gf1.dma1 > 3) {
		if (gus->gf1.enh_mode) {
			address = addr >> 1;
		} else {
			if (addr & 0x1f) {
				snd_printd("snd_gf1_dma_transfer: unaligned address (0x%x)?\n", addr);
				return;
			}
			address = (addr & 0x000c0000) | ((addr & 0x0003ffff) >> 1);
		}
	} else {
		address = addr;
	}

	dma_cmd = SNDRV_GF1_DMA_ENABLE | (unsigned short) cmd;
#if 0
	dma_cmd |= 0x08;
#endif
	if (dma_cmd & SNDRV_GF1_DMA_16BIT) {
		count++;
		count &= ~1;	/* align */
	}
	if (gus->gf1.dma1 > 3) {
		dma_cmd |= SNDRV_GF1_DMA_WIDTH16;
		count++;
		count &= ~1;	/* align */
	}
	snd_gf1_dma_ack(gus);
	snd_dma_program(gus->gf1.dma1, buf_addr, count, dma_cmd & SNDRV_GF1_DMA_READ ? DMA_MODE_READ : DMA_MODE_WRITE);
#if 0
	snd_printk("address = 0x%x, count = 0x%x, dma_cmd = 0x%x\n", address << 1, count, dma_cmd);
#endif
	spin_lock_irqsave(&gus->reg_lock, flags);
	if (gus->gf1.enh_mode) {
		address_high = ((address >> 16) & 0x000000f0) | (address & 0x0000000f);
		snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
		snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH, (unsigned char) address_high);
	} else
		snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
	snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, dma_cmd);
	spin_unlock_irqrestore(&gus->reg_lock, flags);
}

static struct snd_gf1_dma_block *snd_gf1_dma_next_block(struct snd_gus_card * gus)
{
	struct snd_gf1_dma_block *block;

	/* PCM block have bigger priority than synthesizer one */
	if (gus->gf1.dma_data_pcm) {
		block = gus->gf1.dma_data_pcm;
		if (gus->gf1.dma_data_pcm_last == block) {
			gus->gf1.dma_data_pcm =
			gus->gf1.dma_data_pcm_last = NULL;
		} else {
			gus->gf1.dma_data_pcm = block->next;
		}
	} else if (gus->gf1.dma_data_synth) {
		block = gus->gf1.dma_data_synth;
		if (gus->gf1.dma_data_synth_last == block) {
			gus->gf1.dma_data_synth =
			gus->gf1.dma_data_synth_last = NULL;
		} else {
			gus->gf1.dma_data_synth = block->next;
		}
	} else {
		block = NULL;
	}
	if (block) {
		gus->gf1.dma_ack = block->ack;
		gus->gf1.dma_private_data = block->private_data;
	}
	return block;
}


static void snd_gf1_dma_interrupt(struct snd_gus_card * gus)
{
	struct snd_gf1_dma_block *block;

	snd_gf1_dma_ack(gus);
	if (gus->gf1.dma_ack)
		gus->gf1.dma_ack(gus, gus->gf1.dma_private_data);
	spin_lock(&gus->dma_lock);
	if (gus->gf1.dma_data_pcm == NULL &&
	    gus->gf1.dma_data_synth == NULL) {
	    	gus->gf1.dma_ack = NULL;
		gus->gf1.dma_flags &= ~SNDRV_GF1_DMA_TRIGGER;
		spin_unlock(&gus->dma_lock);
		return;
	}
	block = snd_gf1_dma_next_block(gus);
	spin_unlock(&gus->dma_lock);
	snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
	kfree(block);
#if 0
	printk("program dma (IRQ) - addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n", addr, (long) buffer, count, cmd);
#endif
}

int snd_gf1_dma_init(struct snd_gus_card * gus)
{
	mutex_lock(&gus->dma_mutex);
	gus->gf1.dma_shared++;
	if (gus->gf1.dma_shared > 1) {
		mutex_unlock(&gus->dma_mutex);
		return 0;
	}
	gus->gf1.interrupt_handler_dma_write = snd_gf1_dma_interrupt;
	gus->gf1.dma_data_pcm = 
	gus->gf1.dma_data_pcm_last =
	gus->gf1.dma_data_synth = 
	gus->gf1.dma_data_synth_last = NULL;
	mutex_unlock(&gus->dma_mutex);
	return 0;
}

int snd_gf1_dma_done(struct snd_gus_card * gus)
{
	struct snd_gf1_dma_block *block;

	mutex_lock(&gus->dma_mutex);
	gus->gf1.dma_shared--;
	if (!gus->gf1.dma_shared) {
		snd_dma_disable(gus->gf1.dma1);
		snd_gf1_set_default_handlers(gus, SNDRV_GF1_HANDLER_DMA_WRITE);
		snd_gf1_dma_ack(gus);
		while ((block = gus->gf1.dma_data_pcm)) {
			gus->gf1.dma_data_pcm = block->next;
			kfree(block);
		}
		while ((block = gus->gf1.dma_data_synth)) {
			gus->gf1.dma_data_synth = block->next;
			kfree(block);
		}
		gus->gf1.dma_data_pcm_last =
		gus->gf1.dma_data_synth_last = NULL;
	}
	mutex_unlock(&gus->dma_mutex);
	return 0;
}

int snd_gf1_dma_transfer_block(struct snd_gus_card * gus,
			       struct snd_gf1_dma_block * __block,
			       int atomic,
			       int synth)
{
	unsigned long flags;
	struct snd_gf1_dma_block *block;

	block = kmalloc(sizeof(*block), atomic ? GFP_ATOMIC : GFP_KERNEL);
	if (block == NULL) {
		snd_printk(KERN_ERR "gf1: DMA transfer failure; not enough memory\n");
		return -ENOMEM;
	}
	*block = *__block;
	block->next = NULL;
#if 0
	printk("addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n", block->addr, (long) block->buffer, block->count, block->cmd);
#endif
#if 0
	printk("gus->gf1.dma_data_pcm_last = 0x%lx\n", (long)gus->gf1.dma_data_pcm_last);
	printk("gus->gf1.dma_data_pcm = 0x%lx\n", (long)gus->gf1.dma_data_pcm);
#endif
	spin_lock_irqsave(&gus->dma_lock, flags);
	if (synth) {
		if (gus->gf1.dma_data_synth_last) {
			gus->gf1.dma_data_synth_last->next = block;
			gus->gf1.dma_data_synth_last = block;
		} else {
			gus->gf1.dma_data_synth = 
			gus->gf1.dma_data_synth_last = block;
		}
	} else {
		if (gus->gf1.dma_data_pcm_last) {
			gus->gf1.dma_data_pcm_last->next = block;
			gus->gf1.dma_data_pcm_last = block;
		} else {
			gus->gf1.dma_data_pcm = 
			gus->gf1.dma_data_pcm_last = block;
		}
	}
	if (!(gus->gf1.dma_flags & SNDRV_GF1_DMA_TRIGGER)) {
		gus->gf1.dma_flags |= SNDRV_GF1_DMA_TRIGGER;
		block = snd_gf1_dma_next_block(gus);
		spin_unlock_irqrestore(&gus->dma_lock, flags);
		if (block == NULL)
			return 0;
		snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
		kfree(block);
		return 0;
	}
	spin_unlock_irqrestore(&gus->dma_lock, flags);
	return 0;
}
Commit	Line	Data
1da177e4 LT	1	/*
1da177e4 LT	2	* Routines for GF1 DMA control
c1017a4c	3	* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 LT	4	*
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*
	20	*/
	21
	22	#include <sound/driver.h>
	23	#include <asm/dma.h>
	24	#include <linux/slab.h>
	25	#include <sound/core.h>
	26	#include <sound/gus.h>
	27
5e2da206	28	static void snd_gf1_dma_ack(struct snd_gus_card * gus)
1da177e4 LT	29	{
	30	unsigned long flags;
	31
	32	spin_lock_irqsave(&gus->reg_lock, flags);
	33	snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, 0x00);
	34	snd_gf1_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL);
	35	spin_unlock_irqrestore(&gus->reg_lock, flags);
	36	}
	37
5e2da206	38	static void snd_gf1_dma_program(struct snd_gus_card * gus,
1da177e4 LT	39	unsigned int addr,
	40	unsigned long buf_addr,
	41	unsigned int count,
	42	unsigned int cmd)
	43	{
	44	unsigned long flags;
	45	unsigned int address;
	46	unsigned char dma_cmd;
	47	unsigned int address_high;
	48
	49	// snd_printk("dma_transfer: addr=0x%x, buf=0x%lx, count=0x%x\n", addr, (long) buf, count);
	50
	51	if (gus->gf1.dma1 > 3) {
	52	if (gus->gf1.enh_mode) {
	53	address = addr >> 1;
	54	} else {
	55	if (addr & 0x1f) {
	56	snd_printd("snd_gf1_dma_transfer: unaligned address (0x%x)?\n", addr);
	57	return;
	58	}
	59	address = (addr & 0x000c0000) \| ((addr & 0x0003ffff) >> 1);
	60	}
	61	} else {
	62	address = addr;
	63	}
	64
	65	dma_cmd = SNDRV_GF1_DMA_ENABLE \| (unsigned short) cmd;
	66	#if 0
	67	dma_cmd \|= 0x08;
	68	#endif
	69	if (dma_cmd & SNDRV_GF1_DMA_16BIT) {
	70	count++;
	71	count &= ~1; /* align */
	72	}
	73	if (gus->gf1.dma1 > 3) {
	74	dma_cmd \|= SNDRV_GF1_DMA_WIDTH16;
	75	count++;
	76	count &= ~1; /* align */
	77	}
	78	snd_gf1_dma_ack(gus);
	79	snd_dma_program(gus->gf1.dma1, buf_addr, count, dma_cmd & SNDRV_GF1_DMA_READ ? DMA_MODE_READ : DMA_MODE_WRITE);
	80	#if 0
	81	snd_printk("address = 0x%x, count = 0x%x, dma_cmd = 0x%x\n", address << 1, count, dma_cmd);
	82	#endif
	83	spin_lock_irqsave(&gus->reg_lock, flags);
	84	if (gus->gf1.enh_mode) {
	85	address_high = ((address >> 16) & 0x000000f0) \| (address & 0x0000000f);
	86	snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
	87	snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH, (unsigned char) address_high);
	88	} else
	89	snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
	90	snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, dma_cmd);
	91	spin_unlock_irqrestore(&gus->reg_lock, flags);
	92	}
	93
5e2da206	94	static struct snd_gf1_dma_block snd_gf1_dma_next_block(struct snd_gus_card gus)
1da177e4	95	{
5e2da206	96	struct snd_gf1_dma_block *block;
1da177e4 LT	97
	98	/* PCM block have bigger priority than synthesizer one */
	99	if (gus->gf1.dma_data_pcm) {
	100	block = gus->gf1.dma_data_pcm;
	101	if (gus->gf1.dma_data_pcm_last == block) {
	102	gus->gf1.dma_data_pcm =
	103	gus->gf1.dma_data_pcm_last = NULL;
	104	} else {
	105	gus->gf1.dma_data_pcm = block->next;
	106	}
	107	} else if (gus->gf1.dma_data_synth) {
	108	block = gus->gf1.dma_data_synth;
	109	if (gus->gf1.dma_data_synth_last == block) {
	110	gus->gf1.dma_data_synth =
	111	gus->gf1.dma_data_synth_last = NULL;
	112	} else {
	113	gus->gf1.dma_data_synth = block->next;
	114	}
	115	} else {
	116	block = NULL;
	117	}
	118	if (block) {
	119	gus->gf1.dma_ack = block->ack;
	120	gus->gf1.dma_private_data = block->private_data;
	121	}
	122	return block;
	123	}
	124
	125
5e2da206	126	static void snd_gf1_dma_interrupt(struct snd_gus_card * gus)
1da177e4	127	{
5e2da206	128	struct snd_gf1_dma_block *block;
1da177e4 LT	129
	130	snd_gf1_dma_ack(gus);
	131	if (gus->gf1.dma_ack)
	132	gus->gf1.dma_ack(gus, gus->gf1.dma_private_data);
	133	spin_lock(&gus->dma_lock);
	134	if (gus->gf1.dma_data_pcm == NULL &&
	135	gus->gf1.dma_data_synth == NULL) {
	136	gus->gf1.dma_ack = NULL;
	137	gus->gf1.dma_flags &= ~SNDRV_GF1_DMA_TRIGGER;
	138	spin_unlock(&gus->dma_lock);
	139	return;
	140	}
	141	block = snd_gf1_dma_next_block(gus);
	142	spin_unlock(&gus->dma_lock);
	143	snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
	144	kfree(block);
	145	#if 0
	146	printk("program dma (IRQ) - addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n", addr, (long) buffer, count, cmd);
	147	#endif
	148	}
	149
5e2da206	150	int snd_gf1_dma_init(struct snd_gus_card * gus)
1da177e4	151	{
8b7547f9	152	mutex_lock(&gus->dma_mutex);
1da177e4 LT	153	gus->gf1.dma_shared++;
1da177e4 LT	154	if (gus->gf1.dma_shared > 1) {
8b7547f9	155	mutex_unlock(&gus->dma_mutex);
1da177e4 LT	156	return 0;
	157	}
	158	gus->gf1.interrupt_handler_dma_write = snd_gf1_dma_interrupt;
	159	gus->gf1.dma_data_pcm =
	160	gus->gf1.dma_data_pcm_last =
	161	gus->gf1.dma_data_synth =
	162	gus->gf1.dma_data_synth_last = NULL;
8b7547f9	163	mutex_unlock(&gus->dma_mutex);
1da177e4 LT	164	return 0;
	165	}
	166
5e2da206	167	int snd_gf1_dma_done(struct snd_gus_card * gus)
1da177e4	168	{
5e2da206	169	struct snd_gf1_dma_block *block;
1da177e4	170
8b7547f9	171	mutex_lock(&gus->dma_mutex);
1da177e4 LT	172	gus->gf1.dma_shared--;
	173	if (!gus->gf1.dma_shared) {
	174	snd_dma_disable(gus->gf1.dma1);
	175	snd_gf1_set_default_handlers(gus, SNDRV_GF1_HANDLER_DMA_WRITE);
	176	snd_gf1_dma_ack(gus);
	177	while ((block = gus->gf1.dma_data_pcm)) {
	178	gus->gf1.dma_data_pcm = block->next;
	179	kfree(block);
	180	}
	181	while ((block = gus->gf1.dma_data_synth)) {
	182	gus->gf1.dma_data_synth = block->next;
	183	kfree(block);
	184	}
	185	gus->gf1.dma_data_pcm_last =
	186	gus->gf1.dma_data_synth_last = NULL;
	187	}
8b7547f9	188	mutex_unlock(&gus->dma_mutex);
1da177e4 LT	189	return 0;
	190	}
	191
5e2da206 TI	192	int snd_gf1_dma_transfer_block(struct snd_gus_card * gus,
5e2da206 TI	193	struct snd_gf1_dma_block * __block,
1da177e4 LT	194	int atomic,
	195	int synth)
	196	{
	197	unsigned long flags;
5e2da206	198	struct snd_gf1_dma_block *block;
1da177e4 LT	199
	200	block = kmalloc(sizeof(*block), atomic ? GFP_ATOMIC : GFP_KERNEL);
	201	if (block == NULL) {
99b359ba	202	snd_printk(KERN_ERR "gf1: DMA transfer failure; not enough memory\n");
1da177e4 LT	203	return -ENOMEM;
	204	}
	205	block = __block;
	206	block->next = NULL;
	207	#if 0
	208	printk("addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n", block->addr, (long) block->buffer, block->count, block->cmd);
	209	#endif
	210	#if 0
	211	printk("gus->gf1.dma_data_pcm_last = 0x%lx\n", (long)gus->gf1.dma_data_pcm_last);
	212	printk("gus->gf1.dma_data_pcm = 0x%lx\n", (long)gus->gf1.dma_data_pcm);
	213	#endif
	214	spin_lock_irqsave(&gus->dma_lock, flags);
	215	if (synth) {
	216	if (gus->gf1.dma_data_synth_last) {
	217	gus->gf1.dma_data_synth_last->next = block;
	218	gus->gf1.dma_data_synth_last = block;
	219	} else {
	220	gus->gf1.dma_data_synth =
	221	gus->gf1.dma_data_synth_last = block;
	222	}
	223	} else {
	224	if (gus->gf1.dma_data_pcm_last) {
	225	gus->gf1.dma_data_pcm_last->next = block;
	226	gus->gf1.dma_data_pcm_last = block;
	227	} else {
	228	gus->gf1.dma_data_pcm =
	229	gus->gf1.dma_data_pcm_last = block;
	230	}
	231	}
	232	if (!(gus->gf1.dma_flags & SNDRV_GF1_DMA_TRIGGER)) {
	233	gus->gf1.dma_flags \|= SNDRV_GF1_DMA_TRIGGER;
	234	block = snd_gf1_dma_next_block(gus);
	235	spin_unlock_irqrestore(&gus->dma_lock, flags);
	236	if (block == NULL)
	237	return 0;
	238	snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
	239	kfree(block);
	240	return 0;
	241	}
	242	spin_unlock_irqrestore(&gus->dma_lock, flags);
	243	return 0;
	244	}