[net-next-2.6.git] / sound / arm / pxa2xx-ac97.c

/*
 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
 *
 * Author:	Nicolas Pitre
 * Created:	Dec 02, 2004
 * Copyright:	MontaVista Software Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/wait.h>
#include <linux/clk.h>
#include <linux/delay.h>

#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/ac97_codec.h>
#include <sound/initval.h>

#include <asm/irq.h>
#include <linux/mutex.h>
#include <asm/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-gpio.h>
#include <asm/arch/audio.h>

#include "pxa2xx-pcm.h"


static DEFINE_MUTEX(car_mutex);
static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
static volatile long gsr_bits;
static struct clk *ac97_clk;
#ifdef CONFIG_PXA27x
static struct clk *ac97conf_clk;
#endif

/*
 * Beware PXA27x bugs:
 *
 *   o Slot 12 read from modem space will hang controller.
 *   o CDONE, SDONE interrupt fails after any slot 12 IO.
 *
 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
 * 1 jiffy timeout if interrupt never comes).
 */ 

static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
{
	unsigned short val = -1;
	volatile u32 *reg_addr;

	mutex_lock(&car_mutex);

	/* set up primary or secondary codec space */
	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	reg_addr += (reg >> 1);

	/* start read access across the ac97 link */
	GSR = GSR_CDONE | GSR_SDONE;
	gsr_bits = 0;
	val = *reg_addr;
	if (reg == AC97_GPIO_STATUS)
		goto out;
	if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
	    !((GSR | gsr_bits) & GSR_SDONE)) {
		printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
				__func__, reg, GSR | gsr_bits);
		val = -1;
		goto out;
	}

	/* valid data now */
	GSR = GSR_CDONE | GSR_SDONE;
	gsr_bits = 0;
	val = *reg_addr;			
	/* but we've just started another cycle... */
	wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);

out:	mutex_unlock(&car_mutex);
	return val;
}

static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
{
	volatile u32 *reg_addr;

	mutex_lock(&car_mutex);

	/* set up primary or secondary codec space */
	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	reg_addr += (reg >> 1);

	GSR = GSR_CDONE | GSR_SDONE;
	gsr_bits = 0;
	*reg_addr = val;
	if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
	    !((GSR | gsr_bits) & GSR_CDONE))
		printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
				__func__, reg, GSR | gsr_bits);

	mutex_unlock(&car_mutex);
}

static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
{
	/* First, try cold reset */
	GCR &=  GCR_COLD_RST;  /* clear everything but nCRST */
	GCR &= ~GCR_COLD_RST;  /* then assert nCRST */

	gsr_bits = 0;
#ifdef CONFIG_PXA27x
	/* PXA27x Developers Manual section 13.5.2.2.1 */
	clk_enable(ac97conf_clk);
	udelay(5);
	clk_disable(ac97conf_clk);
	GCR = GCR_COLD_RST;
	udelay(50);
#else
	GCR = GCR_COLD_RST;
	GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
	wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#endif

	if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
		printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
				 __func__, gsr_bits);

		/* let's try warm reset */
		gsr_bits = 0;
#ifdef CONFIG_PXA27x
		/* warm reset broken on Bulverde,
		   so manually keep AC97 reset high */
		pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); 
		udelay(10);
		GCR |= GCR_WARM_RST;
		pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
		udelay(500);
#else
		GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
		wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#endif			

		if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
			printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
					 __func__, gsr_bits);
	}

	GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
	GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
}

static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
{
	long status;

	status = GSR;
	if (status) {
		GSR = status;
		gsr_bits |= status;
		wake_up(&gsr_wq);

#ifdef CONFIG_PXA27x
		/* Although we don't use those we still need to clear them
		   since they tend to spuriously trigger when MMC is used
		   (hardware bug? go figure)... */
		MISR = MISR_EOC;
		PISR = PISR_EOC;
		MCSR = MCSR_EOC;
#endif

		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
	.read	= pxa2xx_ac97_read,
	.write	= pxa2xx_ac97_write,
	.reset	= pxa2xx_ac97_reset,
};

static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
	.name			= "AC97 PCM out",
	.dev_addr		= __PREG(PCDR),
	.drcmr			= &DRCMRTXPCDR,
	.dcmd			= DCMD_INCSRCADDR | DCMD_FLOWTRG |
				  DCMD_BURST32 | DCMD_WIDTH4,
};

static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
	.name			= "AC97 PCM in",
	.dev_addr		= __PREG(PCDR),
	.drcmr			= &DRCMRRXPCDR,
	.dcmd			= DCMD_INCTRGADDR | DCMD_FLOWSRC |
				  DCMD_BURST32 | DCMD_WIDTH4,
};

static struct snd_pcm *pxa2xx_ac97_pcm;
static struct snd_ac97 *pxa2xx_ac97_ac97;

static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	pxa2xx_audio_ops_t *platform_ops;
	int r;

	runtime->hw.channels_min = 2;
	runtime->hw.channels_max = 2;

	r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
	    AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
	runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
	snd_pcm_limit_hw_rates(runtime);

       	platform_ops = substream->pcm->card->dev->platform_data;
	if (platform_ops && platform_ops->startup)
		return platform_ops->startup(substream, platform_ops->priv);
	else
		return 0;
}

static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
{
	pxa2xx_audio_ops_t *platform_ops;

       	platform_ops = substream->pcm->card->dev->platform_data;
	if (platform_ops && platform_ops->shutdown)
		platform_ops->shutdown(substream, platform_ops->priv);
}

static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
		  AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
	return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
}

static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
	.playback_params	= &pxa2xx_ac97_pcm_out,
	.capture_params		= &pxa2xx_ac97_pcm_in,
	.startup		= pxa2xx_ac97_pcm_startup,
	.shutdown		= pxa2xx_ac97_pcm_shutdown,
	.prepare		= pxa2xx_ac97_pcm_prepare,
};

#ifdef CONFIG_PM

static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
{
	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;

	snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
	snd_pcm_suspend_all(pxa2xx_ac97_pcm);
	snd_ac97_suspend(pxa2xx_ac97_ac97);
	if (platform_ops && platform_ops->suspend)
		platform_ops->suspend(platform_ops->priv);
	GCR |= GCR_ACLINK_OFF;
	clk_disable(ac97_clk);

	return 0;
}

static int pxa2xx_ac97_do_resume(struct snd_card *card)
{
	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;

	clk_enable(ac97_clk);
	if (platform_ops && platform_ops->resume)
		platform_ops->resume(platform_ops->priv);
	snd_ac97_resume(pxa2xx_ac97_ac97);
	snd_power_change_state(card, SNDRV_CTL_POWER_D0);

	return 0;
}

static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
{
	struct snd_card *card = platform_get_drvdata(dev);
	int ret = 0;

	if (card)
		ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);

	return ret;
}

static int pxa2xx_ac97_resume(struct platform_device *dev)
{
	struct snd_card *card = platform_get_drvdata(dev);
	int ret = 0;

	if (card)
		ret = pxa2xx_ac97_do_resume(card);

	return ret;
}

#else
#define pxa2xx_ac97_suspend	NULL
#define pxa2xx_ac97_resume	NULL
#endif

static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
{
	struct snd_card *card;
	struct snd_ac97_bus *ac97_bus;
	struct snd_ac97_template ac97_template;
	int ret;

	ret = -ENOMEM;
	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
			    THIS_MODULE, 0);
	if (!card)
		goto err;

	card->dev = &dev->dev;
	strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));

	ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
	if (ret)
		goto err;

	ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
	if (ret < 0)
		goto err;

	pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
	pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
	pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
	pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
#ifdef CONFIG_PXA27x
	/* Use GPIO 113 as AC97 Reset on Bulverde */
	pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
	ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
	if (IS_ERR(ac97conf_clk)) {
		ret = PTR_ERR(ac97conf_clk);
		ac97conf_clk = NULL;
		goto err;
	}
#endif

	ac97_clk = clk_get(&dev->dev, "AC97CLK");
	if (IS_ERR(ac97_clk)) {
		ret = PTR_ERR(ac97_clk);
		ac97_clk = NULL;
		goto err;
	}
	clk_enable(ac97_clk);

	ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
	if (ret)
		goto err;
	memset(&ac97_template, 0, sizeof(ac97_template));
	ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
	if (ret)
		goto err;

	snprintf(card->shortname, sizeof(card->shortname),
		 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
	snprintf(card->longname, sizeof(card->longname),
		 "%s (%s)", dev->dev.driver->name, card->mixername);

	snd_card_set_dev(card, &dev->dev);
	ret = snd_card_register(card);
	if (ret == 0) {
		platform_set_drvdata(dev, card);
		return 0;
	}

 err:
	if (card)
		snd_card_free(card);
	if (ac97_clk) {
		GCR |= GCR_ACLINK_OFF;
		free_irq(IRQ_AC97, NULL);
		clk_disable(ac97_clk);
		clk_put(ac97_clk);
		ac97_clk = NULL;
	}
#ifdef CONFIG_PXA27x
	if (ac97conf_clk) {
		clk_put(ac97conf_clk);
		ac97conf_clk = NULL;
	}
#endif
	return ret;
}

static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
{
	struct snd_card *card = platform_get_drvdata(dev);

	if (card) {
		snd_card_free(card);
		platform_set_drvdata(dev, NULL);
		GCR |= GCR_ACLINK_OFF;
		free_irq(IRQ_AC97, NULL);
		clk_disable(ac97_clk);
		clk_put(ac97_clk);
		ac97_clk = NULL;
#ifdef CONFIG_PXA27x
		clk_put(ac97conf_clk);
		ac97conf_clk = NULL;
#endif
	}

	return 0;
}

static struct platform_driver pxa2xx_ac97_driver = {
	.probe		= pxa2xx_ac97_probe,
	.remove		= __devexit_p(pxa2xx_ac97_remove),
	.suspend	= pxa2xx_ac97_suspend,
	.resume		= pxa2xx_ac97_resume,
	.driver		= {
		.name	= "pxa2xx-ac97",
	},
};

static int __init pxa2xx_ac97_init(void)
{
	return platform_driver_register(&pxa2xx_ac97_driver);
}

static void __exit pxa2xx_ac97_exit(void)
{
	platform_driver_unregister(&pxa2xx_ac97_driver);
}

module_init(pxa2xx_ac97_init);
module_exit(pxa2xx_ac97_exit);

MODULE_AUTHOR("Nicolas Pitre");
MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
MODULE_LICENSE("GPL");
Commit	Line	Data
2c484df0 TI	1	/*
	2	* linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
	3	*
	4	* Author: Nicolas Pitre
	5	* Created: Dec 02, 2004
	6	* Copyright: MontaVista Software Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/init.h>
	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
d052d1be	16	#include <linux/platform_device.h>
2c484df0 TI	17	#include <linux/interrupt.h>
2c484df0 TI	18	#include <linux/wait.h>
93873fbf	19	#include <linux/clk.h>
2c484df0 TI	20	#include <linux/delay.h>
2c484df0 TI	21
2c484df0 TI	22	#include <sound/core.h>
	23	#include <sound/pcm.h>
	24	#include <sound/ac97_codec.h>
	25	#include <sound/initval.h>
	26
	27	#include <asm/irq.h>
12aa7579	28	#include <linux/mutex.h>
2c484df0 TI	29	#include <asm/hardware.h>
2c484df0 TI	30	#include <asm/arch/pxa-regs.h>
a683b14d	31	#include <asm/arch/pxa2xx-gpio.h>
2c484df0 TI	32	#include <asm/arch/audio.h>
	33
	34	#include "pxa2xx-pcm.h"
	35
	36
12aa7579	37	static DEFINE_MUTEX(car_mutex);
2c484df0 TI	38	static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
2c484df0 TI	39	static volatile long gsr_bits;
93873fbf MB	40	static struct clk *ac97_clk;
	41	#ifdef CONFIG_PXA27x
	42	static struct clk *ac97conf_clk;
	43	#endif
2c484df0	44
ea265c0a NP	45	/*
	46	* Beware PXA27x bugs:
	47	*
	48	* o Slot 12 read from modem space will hang controller.
	49	* o CDONE, SDONE interrupt fails after any slot 12 IO.
	50	*
	51	* We therefore have an hybrid approach for waiting on SDONE (interrupt or
	52	* 1 jiffy timeout if interrupt never comes).
	53	*/
	54
d18f8376	55	static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
2c484df0 TI	56	{
	57	unsigned short val = -1;
	58	volatile u32 *reg_addr;
	59
12aa7579	60	mutex_lock(&car_mutex);
2c484df0 TI	61
	62	/* set up primary or secondary codec space */
	63	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	64	reg_addr += (reg >> 1);
	65
	66	/* start read access across the ac97 link */
ea265c0a	67	GSR = GSR_CDONE \| GSR_SDONE;
2c484df0 TI	68	gsr_bits = 0;
	69	val = *reg_addr;
	70	if (reg == AC97_GPIO_STATUS)
	71	goto out;
ea265c0a NP	72	if (wait_event_timeout(gsr_wq, (GSR \| gsr_bits) & GSR_SDONE, 1) <= 0 &&
ea265c0a NP	73	!((GSR \| gsr_bits) & GSR_SDONE)) {
2c484df0	74	printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
9bf8e7dd	75	__func__, reg, GSR \| gsr_bits);
2c484df0 TI	76	val = -1;
	77	goto out;
	78	}
	79
	80	/* valid data now */
ea265c0a	81	GSR = GSR_CDONE \| GSR_SDONE;
2c484df0 TI	82	gsr_bits = 0;
	83	val = *reg_addr;
	84	/* but we've just started another cycle... */
ea265c0a	85	wait_event_timeout(gsr_wq, (GSR \| gsr_bits) & GSR_SDONE, 1);
2c484df0	86
12aa7579	87	out: mutex_unlock(&car_mutex);
2c484df0 TI	88	return val;
	89	}
	90
d18f8376	91	static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
2c484df0 TI	92	{
	93	volatile u32 *reg_addr;
	94
12aa7579	95	mutex_lock(&car_mutex);
2c484df0	96
2c484df0 TI	97	/* set up primary or secondary codec space */
	98	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	99	reg_addr += (reg >> 1);
ea265c0a NP	100
ea265c0a NP	101	GSR = GSR_CDONE \| GSR_SDONE;
2c484df0 TI	102	gsr_bits = 0;
2c484df0 TI	103	*reg_addr = val;
ea265c0a NP	104	if (wait_event_timeout(gsr_wq, (GSR \| gsr_bits) & GSR_CDONE, 1) <= 0 &&
ea265c0a NP	105	!((GSR \| gsr_bits) & GSR_CDONE))
2c484df0	106	printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
9bf8e7dd	107	__func__, reg, GSR \| gsr_bits);
2c484df0	108
12aa7579	109	mutex_unlock(&car_mutex);
2c484df0 TI	110	}
2c484df0 TI	111
d18f8376	112	static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
2c484df0 TI	113	{
	114	/* First, try cold reset */
	115	GCR &= GCR_COLD_RST; /* clear everything but nCRST */
	116	GCR &= ~GCR_COLD_RST; /* then assert nCRST */
	117
	118	gsr_bits = 0;
	119	#ifdef CONFIG_PXA27x
	120	/* PXA27x Developers Manual section 13.5.2.2.1 */
93873fbf	121	clk_enable(ac97conf_clk);
2c484df0	122	udelay(5);
93873fbf	123	clk_disable(ac97conf_clk);
2c484df0 TI	124	GCR = GCR_COLD_RST;
	125	udelay(50);
	126	#else
	127	GCR = GCR_COLD_RST;
	128	GCR \|= GCR_CDONE_IE\|GCR_SDONE_IE;
	129	wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR \| GSR_SCR), 1);
	130	#endif
	131
	132	if (!((GSR \| gsr_bits) & (GSR_PCR \| GSR_SCR))) {
	133	printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
9bf8e7dd	134	__func__, gsr_bits);
2c484df0 TI	135
	136	/* let's try warm reset */
	137	gsr_bits = 0;
	138	#ifdef CONFIG_PXA27x
	139	/* warm reset broken on Bulverde,
	140	so manually keep AC97 reset high */
	141	pxa_gpio_mode(113 \| GPIO_OUT \| GPIO_DFLT_HIGH);
	142	udelay(10);
	143	GCR \|= GCR_WARM_RST;
	144	pxa_gpio_mode(113 \| GPIO_ALT_FN_2_OUT);
4a677ac5	145	udelay(500);
2c484df0	146	#else
4a677ac5	147	GCR \|= GCR_WARM_RST\|GCR_PRIRDY_IEN\|GCR_SECRDY_IEN;
2c484df0 TI	148	wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR \| GSR_SCR), 1);
	149	#endif
	150
	151	if (!((GSR \| gsr_bits) & (GSR_PCR \| GSR_SCR)))
	152	printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
9bf8e7dd	153	__func__, gsr_bits);
2c484df0 TI	154	}
	155
	156	GCR &= ~(GCR_PRIRDY_IEN\|GCR_SECRDY_IEN);
	157	GCR \|= GCR_SDONE_IE\|GCR_CDONE_IE;
	158	}
	159
7d12e780	160	static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
2c484df0 TI	161	{
	162	long status;
	163
	164	status = GSR;
	165	if (status) {
	166	GSR = status;
	167	gsr_bits \|= status;
	168	wake_up(&gsr_wq);
	169
	170	#ifdef CONFIG_PXA27x
	171	/* Although we don't use those we still need to clear them
	172	since they tend to spuriously trigger when MMC is used
	173	(hardware bug? go figure)... */
	174	MISR = MISR_EOC;
	175	PISR = PISR_EOC;
	176	MCSR = MCSR_EOC;
	177	#endif
	178
	179	return IRQ_HANDLED;
	180	}
	181
	182	return IRQ_NONE;
	183	}
	184
d18f8376	185	static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
2c484df0 TI	186	.read = pxa2xx_ac97_read,
	187	.write = pxa2xx_ac97_write,
	188	.reset = pxa2xx_ac97_reset,
	189	};
	190
d18f8376	191	static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
2c484df0 TI	192	.name = "AC97 PCM out",
	193	.dev_addr = __PREG(PCDR),
	194	.drcmr = &DRCMRTXPCDR,
	195	.dcmd = DCMD_INCSRCADDR \| DCMD_FLOWTRG \|
	196	DCMD_BURST32 \| DCMD_WIDTH4,
	197	};
	198
d18f8376	199	static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
2c484df0 TI	200	.name = "AC97 PCM in",
	201	.dev_addr = __PREG(PCDR),
	202	.drcmr = &DRCMRRXPCDR,
	203	.dcmd = DCMD_INCTRGADDR \| DCMD_FLOWSRC \|
	204	DCMD_BURST32 \| DCMD_WIDTH4,
	205	};
	206
d18f8376 TI	207	static struct snd_pcm *pxa2xx_ac97_pcm;
d18f8376 TI	208	static struct snd_ac97 *pxa2xx_ac97_ac97;
2c484df0	209
d18f8376	210	static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
2c484df0	211	{
d18f8376	212	struct snd_pcm_runtime *runtime = substream->runtime;
2c484df0 TI	213	pxa2xx_audio_ops_t *platform_ops;
	214	int r;
	215
	216	runtime->hw.channels_min = 2;
	217	runtime->hw.channels_max = 2;
	218
	219	r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
	220	AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
	221	runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
	222	snd_pcm_limit_hw_rates(runtime);
	223
	224	platform_ops = substream->pcm->card->dev->platform_data;
	225	if (platform_ops && platform_ops->startup)
	226	return platform_ops->startup(substream, platform_ops->priv);
	227	else
	228	return 0;
	229	}
	230
d18f8376	231	static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
2c484df0 TI	232	{
	233	pxa2xx_audio_ops_t *platform_ops;
	234
	235	platform_ops = substream->pcm->card->dev->platform_data;
	236	if (platform_ops && platform_ops->shutdown)
	237	platform_ops->shutdown(substream, platform_ops->priv);
	238	}
	239
d18f8376	240	static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
2c484df0	241	{
d18f8376	242	struct snd_pcm_runtime *runtime = substream->runtime;
2c484df0 TI	243	int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
	244	AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
	245	return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
	246	}
	247
d18f8376	248	static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
2c484df0 TI	249	.playback_params = &pxa2xx_ac97_pcm_out,
	250	.capture_params = &pxa2xx_ac97_pcm_in,
	251	.startup = pxa2xx_ac97_pcm_startup,
	252	.shutdown = pxa2xx_ac97_pcm_shutdown,
	253	.prepare = pxa2xx_ac97_pcm_prepare,
	254	};
	255
	256	#ifdef CONFIG_PM
	257
d18f8376	258	static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
2c484df0	259	{
792a6c51 TI	260	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
	261
	262	snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
	263	snd_pcm_suspend_all(pxa2xx_ac97_pcm);
	264	snd_ac97_suspend(pxa2xx_ac97_ac97);
	265	if (platform_ops && platform_ops->suspend)
	266	platform_ops->suspend(platform_ops->priv);
	267	GCR \|= GCR_ACLINK_OFF;
93873fbf	268	clk_disable(ac97_clk);
2c484df0 TI	269
	270	return 0;
	271	}
	272
d18f8376	273	static int pxa2xx_ac97_do_resume(struct snd_card *card)
2c484df0	274	{
792a6c51 TI	275	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
792a6c51 TI	276
93873fbf	277	clk_enable(ac97_clk);
792a6c51 TI	278	if (platform_ops && platform_ops->resume)
	279	platform_ops->resume(platform_ops->priv);
	280	snd_ac97_resume(pxa2xx_ac97_ac97);
	281	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2c484df0 TI	282
	283	return 0;
	284	}
	285
3ae5eaec	286	static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
2c484df0	287	{
d18f8376	288	struct snd_card *card = platform_get_drvdata(dev);
2c484df0 TI	289	int ret = 0;
2c484df0 TI	290
9480e307	291	if (card)
a55bfdc5	292	ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
2c484df0 TI	293
	294	return ret;
	295	}
	296
3ae5eaec	297	static int pxa2xx_ac97_resume(struct platform_device *dev)
2c484df0	298	{
d18f8376	299	struct snd_card *card = platform_get_drvdata(dev);
2c484df0 TI	300	int ret = 0;
2c484df0 TI	301
9480e307	302	if (card)
a55bfdc5	303	ret = pxa2xx_ac97_do_resume(card);
2c484df0 TI	304
	305	return ret;
	306	}
	307
	308	#else
	309	#define pxa2xx_ac97_suspend NULL
	310	#define pxa2xx_ac97_resume NULL
	311	#endif
	312
788c6043	313	static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
2c484df0	314	{
d18f8376 TI	315	struct snd_card *card;
	316	struct snd_ac97_bus *ac97_bus;
	317	struct snd_ac97_template ac97_template;
2c484df0 TI	318	int ret;
	319
	320	ret = -ENOMEM;
	321	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
	322	THIS_MODULE, 0);
	323	if (!card)
	324	goto err;
	325
3ae5eaec RK	326	card->dev = &dev->dev;
3ae5eaec RK	327	strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
2c484df0 TI	328
	329	ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
	330	if (ret)
	331	goto err;
	332
	333	ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
	334	if (ret < 0)
	335	goto err;
	336
	337	pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
	338	pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
	339	pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
	340	pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
	341	#ifdef CONFIG_PXA27x
	342	/* Use GPIO 113 as AC97 Reset on Bulverde */
	343	pxa_gpio_mode(113 \| GPIO_ALT_FN_2_OUT);
93873fbf MB	344	ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
	345	if (IS_ERR(ac97conf_clk)) {
	346	ret = PTR_ERR(ac97conf_clk);
	347	ac97conf_clk = NULL;
	348	goto err;
	349	}
2c484df0	350	#endif
93873fbf MB	351
	352	ac97_clk = clk_get(&dev->dev, "AC97CLK");
	353	if (IS_ERR(ac97_clk)) {
	354	ret = PTR_ERR(ac97_clk);
	355	ac97_clk = NULL;
	356	goto err;
	357	}
	358	clk_enable(ac97_clk);
2c484df0 TI	359
	360	ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
	361	if (ret)
	362	goto err;
	363	memset(&ac97_template, 0, sizeof(ac97_template));
	364	ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
	365	if (ret)
	366	goto err;
	367
	368	snprintf(card->shortname, sizeof(card->shortname),
	369	"%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
	370	snprintf(card->longname, sizeof(card->longname),
3ae5eaec	371	"%s (%s)", dev->dev.driver->name, card->mixername);
2c484df0	372
f78dfac9	373	snd_card_set_dev(card, &dev->dev);
2c484df0 TI	374	ret = snd_card_register(card);
2c484df0 TI	375	if (ret == 0) {
3ae5eaec	376	platform_set_drvdata(dev, card);
2c484df0 TI	377	return 0;
	378	}
	379
	380	err:
	381	if (card)
	382	snd_card_free(card);
93873fbf	383	if (ac97_clk) {
2c484df0 TI	384	GCR \|= GCR_ACLINK_OFF;
2c484df0 TI	385	free_irq(IRQ_AC97, NULL);
93873fbf MB	386	clk_disable(ac97_clk);
	387	clk_put(ac97_clk);
	388	ac97_clk = NULL;
	389	}
	390	#ifdef CONFIG_PXA27x
	391	if (ac97conf_clk) {
	392	clk_put(ac97conf_clk);
	393	ac97conf_clk = NULL;
2c484df0	394	}
93873fbf	395	#endif
2c484df0 TI	396	return ret;
	397	}
	398
788c6043	399	static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
2c484df0	400	{
d18f8376	401	struct snd_card *card = platform_get_drvdata(dev);
2c484df0 TI	402
	403	if (card) {
	404	snd_card_free(card);
3ae5eaec	405	platform_set_drvdata(dev, NULL);
2c484df0 TI	406	GCR \|= GCR_ACLINK_OFF;
2c484df0 TI	407	free_irq(IRQ_AC97, NULL);
93873fbf MB	408	clk_disable(ac97_clk);
	409	clk_put(ac97_clk);
	410	ac97_clk = NULL;
	411	#ifdef CONFIG_PXA27x
	412	clk_put(ac97conf_clk);
	413	ac97conf_clk = NULL;
	414	#endif
2c484df0 TI	415	}
	416
	417	return 0;
	418	}
	419
3ae5eaec	420	static struct platform_driver pxa2xx_ac97_driver = {
2c484df0	421	.probe = pxa2xx_ac97_probe,
788c6043	422	.remove = __devexit_p(pxa2xx_ac97_remove),
2c484df0 TI	423	.suspend = pxa2xx_ac97_suspend,
2c484df0 TI	424	.resume = pxa2xx_ac97_resume,
3ae5eaec RK	425	.driver = {
	426	.name = "pxa2xx-ac97",
	427	},
2c484df0 TI	428	};
	429
	430	static int __init pxa2xx_ac97_init(void)
	431	{
3ae5eaec	432	return platform_driver_register(&pxa2xx_ac97_driver);
2c484df0 TI	433	}
	434
	435	static void __exit pxa2xx_ac97_exit(void)
	436	{
3ae5eaec	437	platform_driver_unregister(&pxa2xx_ac97_driver);
2c484df0 TI	438	}
	439
	440	module_init(pxa2xx_ac97_init);
	441	module_exit(pxa2xx_ac97_exit);
	442
	443	MODULE_AUTHOR("Nicolas Pitre");
	444	MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
	445	MODULE_LICENSE("GPL");