[net-next-2.6.git] / lib / raid6 / altivec.uc

/* -*- linux-c -*- ------------------------------------------------------- *
 *
 *   Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation, Inc., 53 Temple Place Ste 330,
 *   Boston MA 02111-1307, USA; either version 2 of the License, or
 *   (at your option) any later version; incorporated herein by reference.
 *
 * ----------------------------------------------------------------------- */

/*
 * raid6altivec$#.c
 *
 * $#-way unrolled portable integer math RAID-6 instruction set
 *
 * This file is postprocessed using unroll.awk
 *
 * <benh> hpa: in process,
 * you can just "steal" the vec unit with enable_kernel_altivec() (but
 * bracked this with preempt_disable/enable or in a lock)
 */

#include <linux/raid/pq.h>

#ifdef CONFIG_ALTIVEC

#include <altivec.h>
#ifdef __KERNEL__
# include <asm/system.h>
# include <asm/cputable.h>
#endif

/*
 * This is the C data type to use.  We use a vector of
 * signed char so vec_cmpgt() will generate the right
 * instruction.
 */

typedef vector signed char unative_t;

#define NBYTES(x) ((vector signed char) {x,x,x,x, x,x,x,x, x,x,x,x, x,x,x,x})
#define NSIZE	sizeof(unative_t)

/*
 * The SHLBYTE() operation shifts each byte left by 1, *not*
 * rolling over into the next byte
 */
static inline __attribute_const__ unative_t SHLBYTE(unative_t v)
{
	return vec_add(v,v);
}

/*
 * The MASK() operation returns 0xFF in any byte for which the high
 * bit is 1, 0x00 for any byte for which the high bit is 0.
 */
static inline __attribute_const__ unative_t MASK(unative_t v)
{
	unative_t zv = NBYTES(0);

	/* vec_cmpgt returns a vector bool char; thus the need for the cast */
	return (unative_t)vec_cmpgt(zv, v);
}


/* This is noinline to make damned sure that gcc doesn't move any of the
   Altivec code around the enable/disable code */
static void noinline
raid6_altivec$#_gen_syndrome_real(int disks, size_t bytes, void **ptrs)
{
	u8 **dptr = (u8 **)ptrs;
	u8 *p, *q;
	int d, z, z0;

	unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
	unative_t x1d = NBYTES(0x1d);

	z0 = disks - 3;		/* Highest data disk */
	p = dptr[z0+1];		/* XOR parity */
	q = dptr[z0+2];		/* RS syndrome */

	for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
		wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
		for ( z = z0-1 ; z >= 0 ; z-- ) {
			wd$$ = *(unative_t *)&dptr[z][d+$$*NSIZE];
			wp$$ = vec_xor(wp$$, wd$$);
			w2$$ = MASK(wq$$);
			w1$$ = SHLBYTE(wq$$);
			w2$$ = vec_and(w2$$, x1d);
			w1$$ = vec_xor(w1$$, w2$$);
			wq$$ = vec_xor(w1$$, wd$$);
		}
		*(unative_t *)&p[d+NSIZE*$$] = wp$$;
		*(unative_t *)&q[d+NSIZE*$$] = wq$$;
	}
}

static void raid6_altivec$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
{
	preempt_disable();
	enable_kernel_altivec();

	raid6_altivec$#_gen_syndrome_real(disks, bytes, ptrs);

	preempt_enable();
}

int raid6_have_altivec(void);
#if $# == 1
int raid6_have_altivec(void)
{
	/* This assumes either all CPUs have Altivec or none does */
# ifdef __KERNEL__
	return cpu_has_feature(CPU_FTR_ALTIVEC);
# else
	return 1;
# endif
}
#endif

const struct raid6_calls raid6_altivec$# = {
	raid6_altivec$#_gen_syndrome,
	raid6_have_altivec,
	"altivecx$#",
	0
};

#endif /* CONFIG_ALTIVEC */
Commit	Line	Data
1da177e4 LT	1	/* -- linux-c -- ------------------------------------------------------- *
	2	*
	3	* Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation, Inc., 53 Temple Place Ste 330,
93ed05e2	8	* Boston MA 02111-1307, USA; either version 2 of the License, or
1da177e4 LT	9	* (at your option) any later version; incorporated herein by reference.
	10	*
	11	* ----------------------------------------------------------------------- */
	12
	13	/*
	14	* raid6altivec$#.c
	15	*
	16	* $#-way unrolled portable integer math RAID-6 instruction set
	17	*
dce3a7a4	18	* This file is postprocessed using unroll.awk
1da177e4 LT	19	*
	20	* <benh> hpa: in process,
	21	* you can just "steal" the vec unit with enable_kernel_altivec() (but
	22	* bracked this with preempt_disable/enable or in a lock)
	23	*/
	24
f701d589	25	#include <linux/raid/pq.h>
1da177e4 LT	26
	27	#ifdef CONFIG_ALTIVEC
	28
	29	#include <altivec.h>
d7e70ba4 PA	30	#ifdef __KERNEL__
	31	# include <asm/system.h>
	32	# include <asm/cputable.h>
	33	#endif
1da177e4 LT	34
1da177e4 LT	35	/*
d7e70ba4 PA	36	* This is the C data type to use. We use a vector of
	37	* signed char so vec_cmpgt() will generate the right
	38	* instruction.
1da177e4 LT	39	*/
1da177e4 LT	40
d7e70ba4	41	typedef vector signed char unative_t;
1da177e4	42
d7e70ba4	43	#define NBYTES(x) ((vector signed char) {x,x,x,x, x,x,x,x, x,x,x,x, x,x,x,x})
1da177e4 LT	44	#define NSIZE sizeof(unative_t)
	45
	46	/*
	47	* The SHLBYTE() operation shifts each byte left by 1, not
	48	* rolling over into the next byte
	49	*/
	50	static inline __attribute_const__ unative_t SHLBYTE(unative_t v)
	51	{
	52	return vec_add(v,v);
	53	}
	54
	55	/*
	56	* The MASK() operation returns 0xFF in any byte for which the high
	57	* bit is 1, 0x00 for any byte for which the high bit is 0.
	58	*/
	59	static inline __attribute_const__ unative_t MASK(unative_t v)
	60	{
	61	unative_t zv = NBYTES(0);
	62
	63	/* vec_cmpgt returns a vector bool char; thus the need for the cast */
	64	return (unative_t)vec_cmpgt(zv, v);
	65	}
	66
	67
	68	/* This is noinline to make damned sure that gcc doesn't move any of the
	69	Altivec code around the enable/disable code */
	70	static void noinline
	71	raid6_altivec$#_gen_syndrome_real(int disks, size_t bytes, void **ptrs)
	72	{
	73	u8 dptr = (u8 )ptrs;
	74	u8 p, q;
	75	int d, z, z0;
	76
	77	unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
	78	unative_t x1d = NBYTES(0x1d);
	79
	80	z0 = disks - 3; /* Highest data disk */
	81	p = dptr[z0+1]; /* XOR parity */
	82	q = dptr[z0+2]; /* RS syndrome */
	83
	84	for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
	85	wq$$ = wp$$ = (unative_t )&dptr[z0][d+$$*NSIZE];
	86	for ( z = z0-1 ; z >= 0 ; z-- ) {
	87	wd$$ = (unative_t )&dptr[z][d+$$*NSIZE];
	88	wp$$ = vec_xor(wp$$, wd$$);
	89	w2$$ = MASK(wq$$);
	90	w1$$ = SHLBYTE(wq$$);
	91	w2$$ = vec_and(w2$$, x1d);
	92	w1$$ = vec_xor(w1$$, w2$$);
	93	wq$$ = vec_xor(w1$$, wd$$);
	94	}
	95	(unative_t )&p[d+NSIZE*$$] = wp$$;
	96	(unative_t )&q[d+NSIZE*$$] = wq$$;
	97	}
	98	}
	99
	100	static void raid6_altivec$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
	101	{
	102	preempt_disable();
	103	enable_kernel_altivec();
	104
	105	raid6_altivec$#_gen_syndrome_real(disks, bytes, ptrs);
	106
	107	preempt_enable();
108	}
109
110	int raid6_have_altivec(void);
111	#if $# == 1
112	int raid6_have_altivec(void)
113	{
114	/* This assumes either all CPUs have Altivec or none does */
d7e70ba4	115	# ifdef __KERNEL__
1da177e4	116	return cpu_has_feature(CPU_FTR_ALTIVEC);
d7e70ba4 PA	117	# else
	118	return 1;
	119	# endif
1da177e4 LT	120	}
	121	#endif
	122
	123	const struct raid6_calls raid6_altivec$# = {
	124	raid6_altivec$#_gen_syndrome,
	125	raid6_have_altivec,
	126	"altivecx$#",
	127	0
	128	};
	129
	130	#endif /* CONFIG_ALTIVEC */