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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
1da177e4 LT |
20 | /** |
21 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 22 | * @irq: interrupt number to wait for |
1da177e4 LT |
23 | * |
24 | * This function waits for any pending IRQ handlers for this interrupt | |
25 | * to complete before returning. If you use this function while | |
26 | * holding a resource the IRQ handler may need you will deadlock. | |
27 | * | |
28 | * This function may be called - with care - from IRQ context. | |
29 | */ | |
30 | void synchronize_irq(unsigned int irq) | |
31 | { | |
cb5bc832 | 32 | struct irq_desc *desc = irq_to_desc(irq); |
a98ce5c6 | 33 | unsigned int status; |
1da177e4 | 34 | |
7d94f7ca | 35 | if (!desc) |
c2b5a251 MW |
36 | return; |
37 | ||
a98ce5c6 HX |
38 | do { |
39 | unsigned long flags; | |
40 | ||
41 | /* | |
42 | * Wait until we're out of the critical section. This might | |
43 | * give the wrong answer due to the lack of memory barriers. | |
44 | */ | |
45 | while (desc->status & IRQ_INPROGRESS) | |
46 | cpu_relax(); | |
47 | ||
48 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 49 | raw_spin_lock_irqsave(&desc->lock, flags); |
a98ce5c6 | 50 | status = desc->status; |
239007b8 | 51 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
52 | |
53 | /* Oops, that failed? */ | |
54 | } while (status & IRQ_INPROGRESS); | |
3aa551c9 TG |
55 | |
56 | /* | |
57 | * We made sure that no hardirq handler is running. Now verify | |
58 | * that no threaded handlers are active. | |
59 | */ | |
60 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 61 | } |
1da177e4 LT |
62 | EXPORT_SYMBOL(synchronize_irq); |
63 | ||
3aa551c9 TG |
64 | #ifdef CONFIG_SMP |
65 | cpumask_var_t irq_default_affinity; | |
66 | ||
771ee3b0 TG |
67 | /** |
68 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
69 | * @irq: Interrupt to check | |
70 | * | |
71 | */ | |
72 | int irq_can_set_affinity(unsigned int irq) | |
73 | { | |
08678b08 | 74 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
75 | |
76 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip || | |
77 | !desc->chip->set_affinity) | |
78 | return 0; | |
79 | ||
80 | return 1; | |
81 | } | |
82 | ||
591d2fb0 TG |
83 | /** |
84 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
85 | * @desc: irq descriptor which has affitnity changed | |
86 | * | |
87 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
88 | * to the interrupt thread itself. We can not call | |
89 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
90 | * code can be called from hard interrupt context. | |
91 | */ | |
92 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
93 | { |
94 | struct irqaction *action = desc->action; | |
95 | ||
96 | while (action) { | |
97 | if (action->thread) | |
591d2fb0 | 98 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
99 | action = action->next; |
100 | } | |
101 | } | |
102 | ||
771ee3b0 TG |
103 | /** |
104 | * irq_set_affinity - Set the irq affinity of a given irq | |
105 | * @irq: Interrupt to set affinity | |
106 | * @cpumask: cpumask | |
107 | * | |
108 | */ | |
0de26520 | 109 | int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
771ee3b0 | 110 | { |
08678b08 | 111 | struct irq_desc *desc = irq_to_desc(irq); |
f6d87f4b | 112 | unsigned long flags; |
771ee3b0 TG |
113 | |
114 | if (!desc->chip->set_affinity) | |
115 | return -EINVAL; | |
116 | ||
239007b8 | 117 | raw_spin_lock_irqsave(&desc->lock, flags); |
f6d87f4b | 118 | |
771ee3b0 | 119 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
57b150cc YL |
120 | if (desc->status & IRQ_MOVE_PCNTXT) { |
121 | if (!desc->chip->set_affinity(irq, cpumask)) { | |
122 | cpumask_copy(desc->affinity, cpumask); | |
591d2fb0 | 123 | irq_set_thread_affinity(desc); |
57b150cc YL |
124 | } |
125 | } | |
6ec3cfec | 126 | else { |
f6d87f4b | 127 | desc->status |= IRQ_MOVE_PENDING; |
7f7ace0c | 128 | cpumask_copy(desc->pending_mask, cpumask); |
f6d87f4b | 129 | } |
771ee3b0 | 130 | #else |
57b150cc YL |
131 | if (!desc->chip->set_affinity(irq, cpumask)) { |
132 | cpumask_copy(desc->affinity, cpumask); | |
591d2fb0 | 133 | irq_set_thread_affinity(desc); |
57b150cc | 134 | } |
771ee3b0 | 135 | #endif |
f6d87f4b | 136 | desc->status |= IRQ_AFFINITY_SET; |
239007b8 | 137 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
771ee3b0 TG |
138 | return 0; |
139 | } | |
140 | ||
18404756 MK |
141 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
142 | /* | |
143 | * Generic version of the affinity autoselector. | |
144 | */ | |
548c8933 | 145 | static int setup_affinity(unsigned int irq, struct irq_desc *desc) |
18404756 | 146 | { |
18404756 MK |
147 | if (!irq_can_set_affinity(irq)) |
148 | return 0; | |
149 | ||
f6d87f4b TG |
150 | /* |
151 | * Preserve an userspace affinity setup, but make sure that | |
152 | * one of the targets is online. | |
153 | */ | |
612e3684 | 154 | if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) { |
7f7ace0c | 155 | if (cpumask_any_and(desc->affinity, cpu_online_mask) |
0de26520 RR |
156 | < nr_cpu_ids) |
157 | goto set_affinity; | |
f6d87f4b TG |
158 | else |
159 | desc->status &= ~IRQ_AFFINITY_SET; | |
160 | } | |
161 | ||
7f7ace0c | 162 | cpumask_and(desc->affinity, cpu_online_mask, irq_default_affinity); |
0de26520 | 163 | set_affinity: |
7f7ace0c | 164 | desc->chip->set_affinity(irq, desc->affinity); |
18404756 | 165 | |
18404756 MK |
166 | return 0; |
167 | } | |
f6d87f4b | 168 | #else |
548c8933 | 169 | static inline int setup_affinity(unsigned int irq, struct irq_desc *d) |
f6d87f4b TG |
170 | { |
171 | return irq_select_affinity(irq); | |
172 | } | |
18404756 MK |
173 | #endif |
174 | ||
f6d87f4b TG |
175 | /* |
176 | * Called when affinity is set via /proc/irq | |
177 | */ | |
178 | int irq_select_affinity_usr(unsigned int irq) | |
179 | { | |
180 | struct irq_desc *desc = irq_to_desc(irq); | |
181 | unsigned long flags; | |
182 | int ret; | |
183 | ||
239007b8 | 184 | raw_spin_lock_irqsave(&desc->lock, flags); |
548c8933 | 185 | ret = setup_affinity(irq, desc); |
3aa551c9 | 186 | if (!ret) |
591d2fb0 | 187 | irq_set_thread_affinity(desc); |
239007b8 | 188 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
189 | |
190 | return ret; | |
191 | } | |
192 | ||
193 | #else | |
548c8933 | 194 | static inline int setup_affinity(unsigned int irq, struct irq_desc *desc) |
f6d87f4b TG |
195 | { |
196 | return 0; | |
197 | } | |
1da177e4 LT |
198 | #endif |
199 | ||
0a0c5168 RW |
200 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
201 | { | |
202 | if (suspend) { | |
203 | if (!desc->action || (desc->action->flags & IRQF_TIMER)) | |
204 | return; | |
205 | desc->status |= IRQ_SUSPENDED; | |
206 | } | |
207 | ||
208 | if (!desc->depth++) { | |
209 | desc->status |= IRQ_DISABLED; | |
210 | desc->chip->disable(irq); | |
211 | } | |
212 | } | |
213 | ||
1da177e4 LT |
214 | /** |
215 | * disable_irq_nosync - disable an irq without waiting | |
216 | * @irq: Interrupt to disable | |
217 | * | |
218 | * Disable the selected interrupt line. Disables and Enables are | |
219 | * nested. | |
220 | * Unlike disable_irq(), this function does not ensure existing | |
221 | * instances of the IRQ handler have completed before returning. | |
222 | * | |
223 | * This function may be called from IRQ context. | |
224 | */ | |
225 | void disable_irq_nosync(unsigned int irq) | |
226 | { | |
d3c60047 | 227 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
228 | unsigned long flags; |
229 | ||
7d94f7ca | 230 | if (!desc) |
c2b5a251 MW |
231 | return; |
232 | ||
70aedd24 | 233 | chip_bus_lock(irq, desc); |
239007b8 | 234 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 235 | __disable_irq(desc, irq, false); |
239007b8 | 236 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
70aedd24 | 237 | chip_bus_sync_unlock(irq, desc); |
1da177e4 | 238 | } |
1da177e4 LT |
239 | EXPORT_SYMBOL(disable_irq_nosync); |
240 | ||
241 | /** | |
242 | * disable_irq - disable an irq and wait for completion | |
243 | * @irq: Interrupt to disable | |
244 | * | |
245 | * Disable the selected interrupt line. Enables and Disables are | |
246 | * nested. | |
247 | * This function waits for any pending IRQ handlers for this interrupt | |
248 | * to complete before returning. If you use this function while | |
249 | * holding a resource the IRQ handler may need you will deadlock. | |
250 | * | |
251 | * This function may be called - with care - from IRQ context. | |
252 | */ | |
253 | void disable_irq(unsigned int irq) | |
254 | { | |
d3c60047 | 255 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 256 | |
7d94f7ca | 257 | if (!desc) |
c2b5a251 MW |
258 | return; |
259 | ||
1da177e4 LT |
260 | disable_irq_nosync(irq); |
261 | if (desc->action) | |
262 | synchronize_irq(irq); | |
263 | } | |
1da177e4 LT |
264 | EXPORT_SYMBOL(disable_irq); |
265 | ||
0a0c5168 | 266 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 267 | { |
0a0c5168 RW |
268 | if (resume) |
269 | desc->status &= ~IRQ_SUSPENDED; | |
270 | ||
1adb0850 TG |
271 | switch (desc->depth) { |
272 | case 0: | |
0a0c5168 | 273 | err_out: |
b8c512f6 | 274 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
275 | break; |
276 | case 1: { | |
277 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
278 | ||
0a0c5168 RW |
279 | if (desc->status & IRQ_SUSPENDED) |
280 | goto err_out; | |
1adb0850 TG |
281 | /* Prevent probing on this irq: */ |
282 | desc->status = status | IRQ_NOPROBE; | |
283 | check_irq_resend(desc, irq); | |
284 | /* fall-through */ | |
285 | } | |
286 | default: | |
287 | desc->depth--; | |
288 | } | |
289 | } | |
290 | ||
1da177e4 LT |
291 | /** |
292 | * enable_irq - enable handling of an irq | |
293 | * @irq: Interrupt to enable | |
294 | * | |
295 | * Undoes the effect of one call to disable_irq(). If this | |
296 | * matches the last disable, processing of interrupts on this | |
297 | * IRQ line is re-enabled. | |
298 | * | |
70aedd24 TG |
299 | * This function may be called from IRQ context only when |
300 | * desc->chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! | |
1da177e4 LT |
301 | */ |
302 | void enable_irq(unsigned int irq) | |
303 | { | |
d3c60047 | 304 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
305 | unsigned long flags; |
306 | ||
7d94f7ca | 307 | if (!desc) |
c2b5a251 MW |
308 | return; |
309 | ||
70aedd24 | 310 | chip_bus_lock(irq, desc); |
239007b8 | 311 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 312 | __enable_irq(desc, irq, false); |
239007b8 | 313 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
70aedd24 | 314 | chip_bus_sync_unlock(irq, desc); |
1da177e4 | 315 | } |
1da177e4 LT |
316 | EXPORT_SYMBOL(enable_irq); |
317 | ||
0c5d1eb7 | 318 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 319 | { |
08678b08 | 320 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
321 | int ret = -ENXIO; |
322 | ||
323 | if (desc->chip->set_wake) | |
324 | ret = desc->chip->set_wake(irq, on); | |
325 | ||
326 | return ret; | |
327 | } | |
328 | ||
ba9a2331 TG |
329 | /** |
330 | * set_irq_wake - control irq power management wakeup | |
331 | * @irq: interrupt to control | |
332 | * @on: enable/disable power management wakeup | |
333 | * | |
15a647eb DB |
334 | * Enable/disable power management wakeup mode, which is |
335 | * disabled by default. Enables and disables must match, | |
336 | * just as they match for non-wakeup mode support. | |
337 | * | |
338 | * Wakeup mode lets this IRQ wake the system from sleep | |
339 | * states like "suspend to RAM". | |
ba9a2331 TG |
340 | */ |
341 | int set_irq_wake(unsigned int irq, unsigned int on) | |
342 | { | |
08678b08 | 343 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 344 | unsigned long flags; |
2db87321 | 345 | int ret = 0; |
ba9a2331 | 346 | |
15a647eb DB |
347 | /* wakeup-capable irqs can be shared between drivers that |
348 | * don't need to have the same sleep mode behaviors. | |
349 | */ | |
239007b8 | 350 | raw_spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 351 | if (on) { |
2db87321 UKK |
352 | if (desc->wake_depth++ == 0) { |
353 | ret = set_irq_wake_real(irq, on); | |
354 | if (ret) | |
355 | desc->wake_depth = 0; | |
356 | else | |
357 | desc->status |= IRQ_WAKEUP; | |
358 | } | |
15a647eb DB |
359 | } else { |
360 | if (desc->wake_depth == 0) { | |
7a2c4770 | 361 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
362 | } else if (--desc->wake_depth == 0) { |
363 | ret = set_irq_wake_real(irq, on); | |
364 | if (ret) | |
365 | desc->wake_depth = 1; | |
366 | else | |
367 | desc->status &= ~IRQ_WAKEUP; | |
368 | } | |
15a647eb | 369 | } |
2db87321 | 370 | |
239007b8 | 371 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ba9a2331 TG |
372 | return ret; |
373 | } | |
374 | EXPORT_SYMBOL(set_irq_wake); | |
375 | ||
1da177e4 LT |
376 | /* |
377 | * Internal function that tells the architecture code whether a | |
378 | * particular irq has been exclusively allocated or is available | |
379 | * for driver use. | |
380 | */ | |
381 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
382 | { | |
d3c60047 | 383 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
384 | struct irqaction *action; |
385 | ||
7d94f7ca YL |
386 | if (!desc) |
387 | return 0; | |
388 | ||
389 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
390 | return 0; |
391 | ||
08678b08 | 392 | action = desc->action; |
1da177e4 | 393 | if (action) |
3cca53b0 | 394 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
395 | action = NULL; |
396 | ||
397 | return !action; | |
398 | } | |
399 | ||
6a6de9ef TG |
400 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
401 | { | |
402 | /* | |
403 | * If the architecture still has not overriden | |
404 | * the flow handler then zap the default. This | |
405 | * should catch incorrect flow-type setting. | |
406 | */ | |
407 | if (desc->handle_irq == &handle_bad_irq) | |
408 | desc->handle_irq = NULL; | |
409 | } | |
410 | ||
0c5d1eb7 | 411 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
82736f4d UKK |
412 | unsigned long flags) |
413 | { | |
414 | int ret; | |
0c5d1eb7 | 415 | struct irq_chip *chip = desc->chip; |
82736f4d UKK |
416 | |
417 | if (!chip || !chip->set_type) { | |
418 | /* | |
419 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
420 | * flow-types? | |
421 | */ | |
3ff68a6a | 422 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
423 | chip ? (chip->name ? : "unknown") : "unknown"); |
424 | return 0; | |
425 | } | |
426 | ||
f2b662da DB |
427 | /* caller masked out all except trigger mode flags */ |
428 | ret = chip->set_type(irq, flags); | |
82736f4d UKK |
429 | |
430 | if (ret) | |
c69ad71b | 431 | pr_err("setting trigger mode %d for irq %u failed (%pF)\n", |
f2b662da | 432 | (int)flags, irq, chip->set_type); |
0c5d1eb7 | 433 | else { |
f2b662da DB |
434 | if (flags & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
435 | flags |= IRQ_LEVEL; | |
0c5d1eb7 | 436 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ |
f2b662da DB |
437 | desc->status &= ~(IRQ_LEVEL | IRQ_TYPE_SENSE_MASK); |
438 | desc->status |= flags; | |
0c5d1eb7 | 439 | } |
82736f4d UKK |
440 | |
441 | return ret; | |
442 | } | |
443 | ||
b25c340c TG |
444 | /* |
445 | * Default primary interrupt handler for threaded interrupts. Is | |
446 | * assigned as primary handler when request_threaded_irq is called | |
447 | * with handler == NULL. Useful for oneshot interrupts. | |
448 | */ | |
449 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
450 | { | |
451 | return IRQ_WAKE_THREAD; | |
452 | } | |
453 | ||
399b5da2 TG |
454 | /* |
455 | * Primary handler for nested threaded interrupts. Should never be | |
456 | * called. | |
457 | */ | |
458 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
459 | { | |
460 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
461 | return IRQ_NONE; | |
462 | } | |
463 | ||
3aa551c9 TG |
464 | static int irq_wait_for_interrupt(struct irqaction *action) |
465 | { | |
466 | while (!kthread_should_stop()) { | |
467 | set_current_state(TASK_INTERRUPTIBLE); | |
f48fe81e TG |
468 | |
469 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
470 | &action->thread_flags)) { | |
3aa551c9 TG |
471 | __set_current_state(TASK_RUNNING); |
472 | return 0; | |
f48fe81e TG |
473 | } |
474 | schedule(); | |
3aa551c9 TG |
475 | } |
476 | return -1; | |
477 | } | |
478 | ||
b25c340c TG |
479 | /* |
480 | * Oneshot interrupts keep the irq line masked until the threaded | |
481 | * handler finished. unmask if the interrupt has not been disabled and | |
482 | * is marked MASKED. | |
483 | */ | |
484 | static void irq_finalize_oneshot(unsigned int irq, struct irq_desc *desc) | |
485 | { | |
0b1adaa0 | 486 | again: |
70aedd24 | 487 | chip_bus_lock(irq, desc); |
239007b8 | 488 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
489 | |
490 | /* | |
491 | * Implausible though it may be we need to protect us against | |
492 | * the following scenario: | |
493 | * | |
494 | * The thread is faster done than the hard interrupt handler | |
495 | * on the other CPU. If we unmask the irq line then the | |
496 | * interrupt can come in again and masks the line, leaves due | |
497 | * to IRQ_INPROGRESS and the irq line is masked forever. | |
498 | */ | |
499 | if (unlikely(desc->status & IRQ_INPROGRESS)) { | |
500 | raw_spin_unlock_irq(&desc->lock); | |
501 | chip_bus_sync_unlock(irq, desc); | |
502 | cpu_relax(); | |
503 | goto again; | |
504 | } | |
505 | ||
b25c340c TG |
506 | if (!(desc->status & IRQ_DISABLED) && (desc->status & IRQ_MASKED)) { |
507 | desc->status &= ~IRQ_MASKED; | |
508 | desc->chip->unmask(irq); | |
509 | } | |
239007b8 | 510 | raw_spin_unlock_irq(&desc->lock); |
70aedd24 | 511 | chip_bus_sync_unlock(irq, desc); |
b25c340c TG |
512 | } |
513 | ||
61f38261 | 514 | #ifdef CONFIG_SMP |
591d2fb0 TG |
515 | /* |
516 | * Check whether we need to change the affinity of the interrupt thread. | |
517 | */ | |
518 | static void | |
519 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
520 | { | |
521 | cpumask_var_t mask; | |
522 | ||
523 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
524 | return; | |
525 | ||
526 | /* | |
527 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
528 | * try again next time | |
529 | */ | |
530 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
531 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
532 | return; | |
533 | } | |
534 | ||
239007b8 | 535 | raw_spin_lock_irq(&desc->lock); |
591d2fb0 | 536 | cpumask_copy(mask, desc->affinity); |
239007b8 | 537 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
538 | |
539 | set_cpus_allowed_ptr(current, mask); | |
540 | free_cpumask_var(mask); | |
541 | } | |
61f38261 BP |
542 | #else |
543 | static inline void | |
544 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
545 | #endif | |
591d2fb0 | 546 | |
3aa551c9 TG |
547 | /* |
548 | * Interrupt handler thread | |
549 | */ | |
550 | static int irq_thread(void *data) | |
551 | { | |
552 | struct sched_param param = { .sched_priority = MAX_USER_RT_PRIO/2, }; | |
553 | struct irqaction *action = data; | |
554 | struct irq_desc *desc = irq_to_desc(action->irq); | |
b25c340c | 555 | int wake, oneshot = desc->status & IRQ_ONESHOT; |
3aa551c9 TG |
556 | |
557 | sched_setscheduler(current, SCHED_FIFO, ¶m); | |
558 | current->irqaction = action; | |
559 | ||
560 | while (!irq_wait_for_interrupt(action)) { | |
561 | ||
591d2fb0 TG |
562 | irq_thread_check_affinity(desc, action); |
563 | ||
3aa551c9 TG |
564 | atomic_inc(&desc->threads_active); |
565 | ||
239007b8 | 566 | raw_spin_lock_irq(&desc->lock); |
3aa551c9 TG |
567 | if (unlikely(desc->status & IRQ_DISABLED)) { |
568 | /* | |
569 | * CHECKME: We might need a dedicated | |
570 | * IRQ_THREAD_PENDING flag here, which | |
571 | * retriggers the thread in check_irq_resend() | |
572 | * but AFAICT IRQ_PENDING should be fine as it | |
573 | * retriggers the interrupt itself --- tglx | |
574 | */ | |
575 | desc->status |= IRQ_PENDING; | |
239007b8 | 576 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 | 577 | } else { |
239007b8 | 578 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 TG |
579 | |
580 | action->thread_fn(action->irq, action->dev_id); | |
b25c340c TG |
581 | |
582 | if (oneshot) | |
583 | irq_finalize_oneshot(action->irq, desc); | |
3aa551c9 TG |
584 | } |
585 | ||
586 | wake = atomic_dec_and_test(&desc->threads_active); | |
587 | ||
588 | if (wake && waitqueue_active(&desc->wait_for_threads)) | |
589 | wake_up(&desc->wait_for_threads); | |
590 | } | |
591 | ||
592 | /* | |
593 | * Clear irqaction. Otherwise exit_irq_thread() would make | |
594 | * fuzz about an active irq thread going into nirvana. | |
595 | */ | |
596 | current->irqaction = NULL; | |
597 | return 0; | |
598 | } | |
599 | ||
600 | /* | |
601 | * Called from do_exit() | |
602 | */ | |
603 | void exit_irq_thread(void) | |
604 | { | |
605 | struct task_struct *tsk = current; | |
606 | ||
607 | if (!tsk->irqaction) | |
608 | return; | |
609 | ||
610 | printk(KERN_ERR | |
611 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
612 | tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq); | |
613 | ||
614 | /* | |
615 | * Set the THREAD DIED flag to prevent further wakeups of the | |
616 | * soon to be gone threaded handler. | |
617 | */ | |
618 | set_bit(IRQTF_DIED, &tsk->irqaction->flags); | |
619 | } | |
620 | ||
1da177e4 LT |
621 | /* |
622 | * Internal function to register an irqaction - typically used to | |
623 | * allocate special interrupts that are part of the architecture. | |
624 | */ | |
d3c60047 | 625 | static int |
327ec569 | 626 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 627 | { |
f17c7545 | 628 | struct irqaction *old, **old_ptr; |
8b126b77 | 629 | const char *old_name = NULL; |
1da177e4 | 630 | unsigned long flags; |
399b5da2 | 631 | int nested, shared = 0; |
82736f4d | 632 | int ret; |
1da177e4 | 633 | |
7d94f7ca | 634 | if (!desc) |
c2b5a251 MW |
635 | return -EINVAL; |
636 | ||
f1c2662c | 637 | if (desc->chip == &no_irq_chip) |
1da177e4 LT |
638 | return -ENOSYS; |
639 | /* | |
640 | * Some drivers like serial.c use request_irq() heavily, | |
641 | * so we have to be careful not to interfere with a | |
642 | * running system. | |
643 | */ | |
3cca53b0 | 644 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
645 | /* |
646 | * This function might sleep, we want to call it first, | |
647 | * outside of the atomic block. | |
648 | * Yes, this might clear the entropy pool if the wrong | |
649 | * driver is attempted to be loaded, without actually | |
650 | * installing a new handler, but is this really a problem, | |
651 | * only the sysadmin is able to do this. | |
652 | */ | |
653 | rand_initialize_irq(irq); | |
654 | } | |
655 | ||
b25c340c TG |
656 | /* Oneshot interrupts are not allowed with shared */ |
657 | if ((new->flags & IRQF_ONESHOT) && (new->flags & IRQF_SHARED)) | |
658 | return -EINVAL; | |
659 | ||
3aa551c9 | 660 | /* |
399b5da2 TG |
661 | * Check whether the interrupt nests into another interrupt |
662 | * thread. | |
663 | */ | |
664 | nested = desc->status & IRQ_NESTED_THREAD; | |
665 | if (nested) { | |
666 | if (!new->thread_fn) | |
667 | return -EINVAL; | |
668 | /* | |
669 | * Replace the primary handler which was provided from | |
670 | * the driver for non nested interrupt handling by the | |
671 | * dummy function which warns when called. | |
672 | */ | |
673 | new->handler = irq_nested_primary_handler; | |
674 | } | |
675 | ||
3aa551c9 | 676 | /* |
399b5da2 TG |
677 | * Create a handler thread when a thread function is supplied |
678 | * and the interrupt does not nest into another interrupt | |
679 | * thread. | |
3aa551c9 | 680 | */ |
399b5da2 | 681 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
682 | struct task_struct *t; |
683 | ||
684 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
685 | new->name); | |
686 | if (IS_ERR(t)) | |
687 | return PTR_ERR(t); | |
688 | /* | |
689 | * We keep the reference to the task struct even if | |
690 | * the thread dies to avoid that the interrupt code | |
691 | * references an already freed task_struct. | |
692 | */ | |
693 | get_task_struct(t); | |
694 | new->thread = t; | |
3aa551c9 TG |
695 | } |
696 | ||
1da177e4 LT |
697 | /* |
698 | * The following block of code has to be executed atomically | |
699 | */ | |
239007b8 | 700 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
701 | old_ptr = &desc->action; |
702 | old = *old_ptr; | |
06fcb0c6 | 703 | if (old) { |
e76de9f8 TG |
704 | /* |
705 | * Can't share interrupts unless both agree to and are | |
706 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 707 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
708 | * set the trigger type must match. |
709 | */ | |
3cca53b0 | 710 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
711 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
712 | old_name = old->name; | |
f5163427 | 713 | goto mismatch; |
8b126b77 | 714 | } |
f5163427 | 715 | |
284c6680 | 716 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 717 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
718 | if ((old->flags & IRQF_PERCPU) != |
719 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
720 | goto mismatch; |
721 | #endif | |
1da177e4 LT |
722 | |
723 | /* add new interrupt at end of irq queue */ | |
724 | do { | |
f17c7545 IM |
725 | old_ptr = &old->next; |
726 | old = *old_ptr; | |
1da177e4 LT |
727 | } while (old); |
728 | shared = 1; | |
729 | } | |
730 | ||
1da177e4 | 731 | if (!shared) { |
6a6de9ef | 732 | irq_chip_set_defaults(desc->chip); |
e76de9f8 | 733 | |
3aa551c9 TG |
734 | init_waitqueue_head(&desc->wait_for_threads); |
735 | ||
e76de9f8 | 736 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 737 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
738 | ret = __irq_set_trigger(desc, irq, |
739 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 740 | |
3aa551c9 TG |
741 | if (ret) |
742 | goto out_thread; | |
e76de9f8 TG |
743 | } else |
744 | compat_irq_chip_set_default_handler(desc); | |
82736f4d UKK |
745 | #if defined(CONFIG_IRQ_PER_CPU) |
746 | if (new->flags & IRQF_PERCPU) | |
747 | desc->status |= IRQ_PER_CPU; | |
748 | #endif | |
6a6de9ef | 749 | |
b25c340c | 750 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | IRQ_ONESHOT | |
1adb0850 | 751 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f | 752 | |
b25c340c TG |
753 | if (new->flags & IRQF_ONESHOT) |
754 | desc->status |= IRQ_ONESHOT; | |
755 | ||
94d39e1f TG |
756 | if (!(desc->status & IRQ_NOAUTOEN)) { |
757 | desc->depth = 0; | |
758 | desc->status &= ~IRQ_DISABLED; | |
7e6e178a | 759 | desc->chip->startup(irq); |
e76de9f8 TG |
760 | } else |
761 | /* Undo nested disables: */ | |
762 | desc->depth = 1; | |
18404756 | 763 | |
612e3684 TG |
764 | /* Exclude IRQ from balancing if requested */ |
765 | if (new->flags & IRQF_NOBALANCING) | |
766 | desc->status |= IRQ_NO_BALANCING; | |
767 | ||
18404756 | 768 | /* Set default affinity mask once everything is setup */ |
548c8933 | 769 | setup_affinity(irq, desc); |
0c5d1eb7 DB |
770 | |
771 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
772 | && (new->flags & IRQF_TRIGGER_MASK) | |
773 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
774 | /* hope the handler works with the actual trigger mode... */ | |
775 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
776 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
777 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 778 | } |
82736f4d | 779 | |
69ab8494 | 780 | new->irq = irq; |
f17c7545 | 781 | *old_ptr = new; |
82736f4d | 782 | |
8528b0f1 LT |
783 | /* Reset broken irq detection when installing new handler */ |
784 | desc->irq_count = 0; | |
785 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
786 | |
787 | /* | |
788 | * Check whether we disabled the irq via the spurious handler | |
789 | * before. Reenable it and give it another chance. | |
790 | */ | |
791 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
792 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
0a0c5168 | 793 | __enable_irq(desc, irq, false); |
1adb0850 TG |
794 | } |
795 | ||
239007b8 | 796 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 797 | |
69ab8494 TG |
798 | /* |
799 | * Strictly no need to wake it up, but hung_task complains | |
800 | * when no hard interrupt wakes the thread up. | |
801 | */ | |
802 | if (new->thread) | |
803 | wake_up_process(new->thread); | |
804 | ||
2c6927a3 | 805 | register_irq_proc(irq, desc); |
1da177e4 LT |
806 | new->dir = NULL; |
807 | register_handler_proc(irq, new); | |
808 | ||
809 | return 0; | |
f5163427 DS |
810 | |
811 | mismatch: | |
3f050447 | 812 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 813 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 814 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
815 | if (old_name) |
816 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
817 | dump_stack(); |
818 | } | |
3f050447 | 819 | #endif |
3aa551c9 TG |
820 | ret = -EBUSY; |
821 | ||
822 | out_thread: | |
239007b8 | 823 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3aa551c9 TG |
824 | if (new->thread) { |
825 | struct task_struct *t = new->thread; | |
826 | ||
827 | new->thread = NULL; | |
828 | if (likely(!test_bit(IRQTF_DIED, &new->thread_flags))) | |
829 | kthread_stop(t); | |
830 | put_task_struct(t); | |
831 | } | |
832 | return ret; | |
1da177e4 LT |
833 | } |
834 | ||
d3c60047 TG |
835 | /** |
836 | * setup_irq - setup an interrupt | |
837 | * @irq: Interrupt line to setup | |
838 | * @act: irqaction for the interrupt | |
839 | * | |
840 | * Used to statically setup interrupts in the early boot process. | |
841 | */ | |
842 | int setup_irq(unsigned int irq, struct irqaction *act) | |
843 | { | |
844 | struct irq_desc *desc = irq_to_desc(irq); | |
845 | ||
846 | return __setup_irq(irq, desc, act); | |
847 | } | |
eb53b4e8 | 848 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 849 | |
cbf94f06 MD |
850 | /* |
851 | * Internal function to unregister an irqaction - used to free | |
852 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 853 | */ |
cbf94f06 | 854 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 855 | { |
d3c60047 | 856 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 857 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
858 | unsigned long flags; |
859 | ||
ae88a23b | 860 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 861 | |
7d94f7ca | 862 | if (!desc) |
f21cfb25 | 863 | return NULL; |
1da177e4 | 864 | |
239007b8 | 865 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
866 | |
867 | /* | |
868 | * There can be multiple actions per IRQ descriptor, find the right | |
869 | * one based on the dev_id: | |
870 | */ | |
f17c7545 | 871 | action_ptr = &desc->action; |
1da177e4 | 872 | for (;;) { |
f17c7545 | 873 | action = *action_ptr; |
1da177e4 | 874 | |
ae88a23b IM |
875 | if (!action) { |
876 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 877 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 878 | |
f21cfb25 | 879 | return NULL; |
ae88a23b | 880 | } |
1da177e4 | 881 | |
8316e381 IM |
882 | if (action->dev_id == dev_id) |
883 | break; | |
f17c7545 | 884 | action_ptr = &action->next; |
ae88a23b | 885 | } |
dbce706e | 886 | |
ae88a23b | 887 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 888 | *action_ptr = action->next; |
ae88a23b IM |
889 | |
890 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 891 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
ae88a23b IM |
892 | if (desc->chip->release) |
893 | desc->chip->release(irq, dev_id); | |
b77d6adc | 894 | #endif |
dbce706e | 895 | |
ae88a23b IM |
896 | /* If this was the last handler, shut down the IRQ line: */ |
897 | if (!desc->action) { | |
898 | desc->status |= IRQ_DISABLED; | |
899 | if (desc->chip->shutdown) | |
900 | desc->chip->shutdown(irq); | |
901 | else | |
902 | desc->chip->disable(irq); | |
903 | } | |
3aa551c9 | 904 | |
239007b8 | 905 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
906 | |
907 | unregister_handler_proc(irq, action); | |
908 | ||
909 | /* Make sure it's not being used on another CPU: */ | |
910 | synchronize_irq(irq); | |
1da177e4 | 911 | |
70edcd77 | 912 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
913 | /* |
914 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
915 | * event to happen even now it's being freed, so let's make sure that | |
916 | * is so by doing an extra call to the handler .... | |
917 | * | |
918 | * ( We do this after actually deregistering it, to make sure that a | |
919 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
920 | */ | |
921 | if (action->flags & IRQF_SHARED) { | |
922 | local_irq_save(flags); | |
923 | action->handler(irq, dev_id); | |
924 | local_irq_restore(flags); | |
1da177e4 | 925 | } |
ae88a23b | 926 | #endif |
2d860ad7 LT |
927 | |
928 | if (action->thread) { | |
929 | if (!test_bit(IRQTF_DIED, &action->thread_flags)) | |
930 | kthread_stop(action->thread); | |
931 | put_task_struct(action->thread); | |
932 | } | |
933 | ||
f21cfb25 MD |
934 | return action; |
935 | } | |
936 | ||
cbf94f06 MD |
937 | /** |
938 | * remove_irq - free an interrupt | |
939 | * @irq: Interrupt line to free | |
940 | * @act: irqaction for the interrupt | |
941 | * | |
942 | * Used to remove interrupts statically setup by the early boot process. | |
943 | */ | |
944 | void remove_irq(unsigned int irq, struct irqaction *act) | |
945 | { | |
946 | __free_irq(irq, act->dev_id); | |
947 | } | |
eb53b4e8 | 948 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 949 | |
f21cfb25 MD |
950 | /** |
951 | * free_irq - free an interrupt allocated with request_irq | |
952 | * @irq: Interrupt line to free | |
953 | * @dev_id: Device identity to free | |
954 | * | |
955 | * Remove an interrupt handler. The handler is removed and if the | |
956 | * interrupt line is no longer in use by any driver it is disabled. | |
957 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
958 | * on the card it drives before calling this function. The function | |
959 | * does not return until any executing interrupts for this IRQ | |
960 | * have completed. | |
961 | * | |
962 | * This function must not be called from interrupt context. | |
963 | */ | |
964 | void free_irq(unsigned int irq, void *dev_id) | |
965 | { | |
70aedd24 TG |
966 | struct irq_desc *desc = irq_to_desc(irq); |
967 | ||
968 | if (!desc) | |
969 | return; | |
970 | ||
971 | chip_bus_lock(irq, desc); | |
cbf94f06 | 972 | kfree(__free_irq(irq, dev_id)); |
70aedd24 | 973 | chip_bus_sync_unlock(irq, desc); |
1da177e4 | 974 | } |
1da177e4 LT |
975 | EXPORT_SYMBOL(free_irq); |
976 | ||
977 | /** | |
3aa551c9 | 978 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 979 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
980 | * @handler: Function to be called when the IRQ occurs. |
981 | * Primary handler for threaded interrupts | |
b25c340c TG |
982 | * If NULL and thread_fn != NULL the default |
983 | * primary handler is installed | |
f48fe81e TG |
984 | * @thread_fn: Function called from the irq handler thread |
985 | * If NULL, no irq thread is created | |
1da177e4 LT |
986 | * @irqflags: Interrupt type flags |
987 | * @devname: An ascii name for the claiming device | |
988 | * @dev_id: A cookie passed back to the handler function | |
989 | * | |
990 | * This call allocates interrupt resources and enables the | |
991 | * interrupt line and IRQ handling. From the point this | |
992 | * call is made your handler function may be invoked. Since | |
993 | * your handler function must clear any interrupt the board | |
994 | * raises, you must take care both to initialise your hardware | |
995 | * and to set up the interrupt handler in the right order. | |
996 | * | |
3aa551c9 TG |
997 | * If you want to set up a threaded irq handler for your device |
998 | * then you need to supply @handler and @thread_fn. @handler ist | |
999 | * still called in hard interrupt context and has to check | |
1000 | * whether the interrupt originates from the device. If yes it | |
1001 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1002 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1003 | * @thread_fn. This split handler design is necessary to support |
1004 | * shared interrupts. | |
1005 | * | |
1da177e4 LT |
1006 | * Dev_id must be globally unique. Normally the address of the |
1007 | * device data structure is used as the cookie. Since the handler | |
1008 | * receives this value it makes sense to use it. | |
1009 | * | |
1010 | * If your interrupt is shared you must pass a non NULL dev_id | |
1011 | * as this is required when freeing the interrupt. | |
1012 | * | |
1013 | * Flags: | |
1014 | * | |
3cca53b0 TG |
1015 | * IRQF_SHARED Interrupt is shared |
1016 | * IRQF_DISABLED Disable local interrupts while processing | |
1017 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy | |
0c5d1eb7 | 1018 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1019 | * |
1020 | */ | |
3aa551c9 TG |
1021 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1022 | irq_handler_t thread_fn, unsigned long irqflags, | |
1023 | const char *devname, void *dev_id) | |
1da177e4 | 1024 | { |
06fcb0c6 | 1025 | struct irqaction *action; |
08678b08 | 1026 | struct irq_desc *desc; |
d3c60047 | 1027 | int retval; |
1da177e4 | 1028 | |
470c6623 DB |
1029 | /* |
1030 | * handle_IRQ_event() always ignores IRQF_DISABLED except for | |
1031 | * the _first_ irqaction (sigh). That can cause oopsing, but | |
1032 | * the behavior is classified as "will not fix" so we need to | |
1033 | * start nudging drivers away from using that idiom. | |
1034 | */ | |
327ec569 IM |
1035 | if ((irqflags & (IRQF_SHARED|IRQF_DISABLED)) == |
1036 | (IRQF_SHARED|IRQF_DISABLED)) { | |
1037 | pr_warning( | |
1038 | "IRQ %d/%s: IRQF_DISABLED is not guaranteed on shared IRQs\n", | |
1039 | irq, devname); | |
1040 | } | |
470c6623 | 1041 | |
fbb9ce95 IM |
1042 | #ifdef CONFIG_LOCKDEP |
1043 | /* | |
1044 | * Lockdep wants atomic interrupt handlers: | |
1045 | */ | |
38515e90 | 1046 | irqflags |= IRQF_DISABLED; |
fbb9ce95 | 1047 | #endif |
1da177e4 LT |
1048 | /* |
1049 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1050 | * otherwise we'll have trouble later trying to figure out | |
1051 | * which interrupt is which (messes up the interrupt freeing | |
1052 | * logic etc). | |
1053 | */ | |
3cca53b0 | 1054 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1055 | return -EINVAL; |
7d94f7ca | 1056 | |
cb5bc832 | 1057 | desc = irq_to_desc(irq); |
7d94f7ca | 1058 | if (!desc) |
1da177e4 | 1059 | return -EINVAL; |
7d94f7ca | 1060 | |
08678b08 | 1061 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 1062 | return -EINVAL; |
b25c340c TG |
1063 | |
1064 | if (!handler) { | |
1065 | if (!thread_fn) | |
1066 | return -EINVAL; | |
1067 | handler = irq_default_primary_handler; | |
1068 | } | |
1da177e4 | 1069 | |
45535732 | 1070 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1071 | if (!action) |
1072 | return -ENOMEM; | |
1073 | ||
1074 | action->handler = handler; | |
3aa551c9 | 1075 | action->thread_fn = thread_fn; |
1da177e4 | 1076 | action->flags = irqflags; |
1da177e4 | 1077 | action->name = devname; |
1da177e4 LT |
1078 | action->dev_id = dev_id; |
1079 | ||
70aedd24 | 1080 | chip_bus_lock(irq, desc); |
d3c60047 | 1081 | retval = __setup_irq(irq, desc, action); |
70aedd24 TG |
1082 | chip_bus_sync_unlock(irq, desc); |
1083 | ||
377bf1e4 AV |
1084 | if (retval) |
1085 | kfree(action); | |
1086 | ||
a304e1b8 | 1087 | #ifdef CONFIG_DEBUG_SHIRQ |
6ce51c43 | 1088 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1089 | /* |
1090 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1091 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1092 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1093 | * run in parallel with our fake. | |
a304e1b8 | 1094 | */ |
59845b1f | 1095 | unsigned long flags; |
a304e1b8 | 1096 | |
377bf1e4 | 1097 | disable_irq(irq); |
59845b1f | 1098 | local_irq_save(flags); |
377bf1e4 | 1099 | |
59845b1f | 1100 | handler(irq, dev_id); |
377bf1e4 | 1101 | |
59845b1f | 1102 | local_irq_restore(flags); |
377bf1e4 | 1103 | enable_irq(irq); |
a304e1b8 DW |
1104 | } |
1105 | #endif | |
1da177e4 LT |
1106 | return retval; |
1107 | } | |
3aa551c9 | 1108 | EXPORT_SYMBOL(request_threaded_irq); |