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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * IRQ subsystem internal functions and variables: | |
3 | */ | |
e144710b | 4 | #include <linux/irqdesc.h> |
1da177e4 LT |
5 | |
6 | extern int noirqdebug; | |
7 | ||
a77c4635 TG |
8 | #define irq_data_to_desc(data) container_of(data, struct irq_desc, irq_data) |
9 | ||
6a6de9ef TG |
10 | /* Set default functions for irq_chip structures: */ |
11 | extern void irq_chip_set_defaults(struct irq_chip *chip); | |
12 | ||
13 | /* Set default handler: */ | |
14 | extern void compat_irq_chip_set_default_handler(struct irq_desc *desc); | |
15 | ||
0c5d1eb7 DB |
16 | extern int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
17 | unsigned long flags); | |
0a0c5168 RW |
18 | extern void __disable_irq(struct irq_desc *desc, unsigned int irq, bool susp); |
19 | extern void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume); | |
0c5d1eb7 | 20 | |
48a1b10a | 21 | extern struct lock_class_key irq_desc_lock_class; |
85ac16d0 | 22 | extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr); |
239007b8 | 23 | extern raw_spinlock_t sparse_irq_lock; |
0fa0ebbf | 24 | |
e144710b TG |
25 | /* Resending of interrupts :*/ |
26 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); | |
27 | ||
0fa0ebbf | 28 | #ifdef CONFIG_SPARSE_IRQ |
99558f0b | 29 | void replace_irq_desc(unsigned int irq, struct irq_desc *desc); |
0fa0ebbf | 30 | #endif |
48a1b10a | 31 | |
1da177e4 | 32 | #ifdef CONFIG_PROC_FS |
2c6927a3 | 33 | extern void register_irq_proc(unsigned int irq, struct irq_desc *desc); |
13bfe99e | 34 | extern void unregister_irq_proc(unsigned int irq, struct irq_desc *desc); |
1da177e4 LT |
35 | extern void register_handler_proc(unsigned int irq, struct irqaction *action); |
36 | extern void unregister_handler_proc(unsigned int irq, struct irqaction *action); | |
37 | #else | |
2c6927a3 | 38 | static inline void register_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
13bfe99e | 39 | static inline void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
1da177e4 LT |
40 | static inline void register_handler_proc(unsigned int irq, |
41 | struct irqaction *action) { } | |
42 | static inline void unregister_handler_proc(unsigned int irq, | |
43 | struct irqaction *action) { } | |
44 | #endif | |
45 | ||
f6d87f4b TG |
46 | extern int irq_select_affinity_usr(unsigned int irq); |
47 | ||
591d2fb0 | 48 | extern void irq_set_thread_affinity(struct irq_desc *desc); |
57b150cc | 49 | |
bd151412 TG |
50 | #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED |
51 | static inline void irq_end(unsigned int irq, struct irq_desc *desc) | |
52 | { | |
53 | if (desc->irq_data.chip && desc->irq_data.chip->end) | |
54 | desc->irq_data.chip->end(irq); | |
55 | } | |
56 | #else | |
57 | static inline void irq_end(unsigned int irq, struct irq_desc *desc) { } | |
58 | #endif | |
59 | ||
70aedd24 | 60 | /* Inline functions for support of irq chips on slow busses */ |
3876ec9e | 61 | static inline void chip_bus_lock(struct irq_desc *desc) |
70aedd24 | 62 | { |
3876ec9e TG |
63 | if (unlikely(desc->irq_data.chip->irq_bus_lock)) |
64 | desc->irq_data.chip->irq_bus_lock(&desc->irq_data); | |
70aedd24 TG |
65 | } |
66 | ||
3876ec9e | 67 | static inline void chip_bus_sync_unlock(struct irq_desc *desc) |
70aedd24 | 68 | { |
3876ec9e TG |
69 | if (unlikely(desc->irq_data.chip->irq_bus_sync_unlock)) |
70 | desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data); | |
70aedd24 TG |
71 | } |
72 | ||
43f77759 IM |
73 | /* |
74 | * Debugging printout: | |
75 | */ | |
76 | ||
77 | #include <linux/kallsyms.h> | |
78 | ||
79 | #define P(f) if (desc->status & f) printk("%14s set\n", #f) | |
80 | ||
81 | static inline void print_irq_desc(unsigned int irq, struct irq_desc *desc) | |
82 | { | |
83 | printk("irq %d, desc: %p, depth: %d, count: %d, unhandled: %d\n", | |
84 | irq, desc, desc->depth, desc->irq_count, desc->irqs_unhandled); | |
85 | printk("->handle_irq(): %p, ", desc->handle_irq); | |
86 | print_symbol("%s\n", (unsigned long)desc->handle_irq); | |
6b8ff312 TG |
87 | printk("->irq_data.chip(): %p, ", desc->irq_data.chip); |
88 | print_symbol("%s\n", (unsigned long)desc->irq_data.chip); | |
43f77759 IM |
89 | printk("->action(): %p\n", desc->action); |
90 | if (desc->action) { | |
91 | printk("->action->handler(): %p, ", desc->action->handler); | |
92 | print_symbol("%s\n", (unsigned long)desc->action->handler); | |
93 | } | |
94 | ||
95 | P(IRQ_INPROGRESS); | |
96 | P(IRQ_DISABLED); | |
97 | P(IRQ_PENDING); | |
98 | P(IRQ_REPLAY); | |
99 | P(IRQ_AUTODETECT); | |
100 | P(IRQ_WAITING); | |
101 | P(IRQ_LEVEL); | |
102 | P(IRQ_MASKED); | |
103 | #ifdef CONFIG_IRQ_PER_CPU | |
104 | P(IRQ_PER_CPU); | |
105 | #endif | |
106 | P(IRQ_NOPROBE); | |
107 | P(IRQ_NOREQUEST); | |
108 | P(IRQ_NOAUTOEN); | |
109 | } | |
110 | ||
111 | #undef P | |
112 | ||
e144710b TG |
113 | /* Stuff below will be cleaned up after the sparse allocator is done */ |
114 | ||
115 | #ifdef CONFIG_SMP | |
116 | /** | |
117 | * alloc_desc_masks - allocate cpumasks for irq_desc | |
118 | * @desc: pointer to irq_desc struct | |
119 | * @node: node which will be handling the cpumasks | |
120 | * @boot: true if need bootmem | |
121 | * | |
122 | * Allocates affinity and pending_mask cpumask if required. | |
123 | * Returns true if successful (or not required). | |
124 | */ | |
125 | static inline bool alloc_desc_masks(struct irq_desc *desc, int node, | |
126 | bool boot) | |
127 | { | |
128 | gfp_t gfp = GFP_ATOMIC; | |
129 | ||
130 | if (boot) | |
131 | gfp = GFP_NOWAIT; | |
132 | ||
133 | #ifdef CONFIG_CPUMASK_OFFSTACK | |
134 | if (!alloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node)) | |
135 | return false; | |
136 | ||
137 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
138 | if (!alloc_cpumask_var_node(&desc->pending_mask, gfp, node)) { | |
139 | free_cpumask_var(desc->irq_data.affinity); | |
140 | return false; | |
141 | } | |
142 | #endif | |
143 | #endif | |
144 | return true; | |
145 | } | |
146 | ||
147 | static inline void init_desc_masks(struct irq_desc *desc) | |
148 | { | |
149 | cpumask_setall(desc->irq_data.affinity); | |
150 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
151 | cpumask_clear(desc->pending_mask); | |
152 | #endif | |
153 | } | |
154 | ||
155 | /** | |
156 | * init_copy_desc_masks - copy cpumasks for irq_desc | |
157 | * @old_desc: pointer to old irq_desc struct | |
158 | * @new_desc: pointer to new irq_desc struct | |
159 | * | |
160 | * Insures affinity and pending_masks are copied to new irq_desc. | |
161 | * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the | |
162 | * irq_desc struct so the copy is redundant. | |
163 | */ | |
164 | ||
165 | static inline void init_copy_desc_masks(struct irq_desc *old_desc, | |
166 | struct irq_desc *new_desc) | |
167 | { | |
168 | #ifdef CONFIG_CPUMASK_OFFSTACK | |
169 | cpumask_copy(new_desc->irq_data.affinity, old_desc->irq_data.affinity); | |
170 | ||
171 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
172 | cpumask_copy(new_desc->pending_mask, old_desc->pending_mask); | |
173 | #endif | |
174 | #endif | |
175 | } | |
176 | ||
177 | static inline void free_desc_masks(struct irq_desc *old_desc, | |
178 | struct irq_desc *new_desc) | |
179 | { | |
180 | free_cpumask_var(old_desc->irq_data.affinity); | |
181 | ||
182 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
183 | free_cpumask_var(old_desc->pending_mask); | |
184 | #endif | |
185 | } | |
186 | ||
187 | #else /* !CONFIG_SMP */ | |
188 | ||
189 | static inline bool alloc_desc_masks(struct irq_desc *desc, int node, | |
190 | bool boot) | |
191 | { | |
192 | return true; | |
193 | } | |
194 | ||
195 | static inline void init_desc_masks(struct irq_desc *desc) | |
196 | { | |
197 | } | |
198 | ||
199 | static inline void init_copy_desc_masks(struct irq_desc *old_desc, | |
200 | struct irq_desc *new_desc) | |
201 | { | |
202 | } | |
203 | ||
204 | static inline void free_desc_masks(struct irq_desc *old_desc, | |
205 | struct irq_desc *new_desc) | |
206 | { | |
207 | } | |
208 | #endif /* CONFIG_SMP */ |