]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
948cd529 | 14 | #include <linux/slab.h> |
1da177e4 LT |
15 | #include <linux/module.h> |
16 | #include <linux/random.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/kernel_stat.h> | |
0b8f1efa YL |
19 | #include <linux/rculist.h> |
20 | #include <linux/hash.h> | |
0fa0ebbf | 21 | #include <linux/bootmem.h> |
ad8d75ff | 22 | #include <trace/events/irq.h> |
1da177e4 LT |
23 | |
24 | #include "internals.h" | |
25 | ||
0b8f1efa YL |
26 | /* |
27 | * lockdep: we want to handle all irq_desc locks as a single lock-class: | |
28 | */ | |
48a1b10a | 29 | struct lock_class_key irq_desc_lock_class; |
0b8f1efa | 30 | |
6a6de9ef TG |
31 | /** |
32 | * handle_bad_irq - handle spurious and unhandled irqs | |
43a1dd50 HK |
33 | * @irq: the interrupt number |
34 | * @desc: description of the interrupt | |
43a1dd50 HK |
35 | * |
36 | * Handles spurious and unhandled IRQ's. It also prints a debugmessage. | |
6a6de9ef | 37 | */ |
d6c88a50 | 38 | void handle_bad_irq(unsigned int irq, struct irq_desc *desc) |
6a6de9ef | 39 | { |
43f77759 | 40 | print_irq_desc(irq, desc); |
d6c88a50 | 41 | kstat_incr_irqs_this_cpu(irq, desc); |
6a6de9ef TG |
42 | ack_bad_irq(irq); |
43 | } | |
44 | ||
97179fd4 DD |
45 | #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS) |
46 | static void __init init_irq_default_affinity(void) | |
47 | { | |
28be225b | 48 | alloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT); |
97179fd4 DD |
49 | cpumask_setall(irq_default_affinity); |
50 | } | |
51 | #else | |
52 | static void __init init_irq_default_affinity(void) | |
53 | { | |
54 | } | |
55 | #endif | |
56 | ||
1da177e4 LT |
57 | /* |
58 | * Linux has a controller-independent interrupt architecture. | |
59 | * Every controller has a 'controller-template', that is used | |
60 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 61 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
62 | * controller. Thus drivers need not be aware of the |
63 | * interrupt-controller. | |
64 | * | |
65 | * The code is designed to be easily extended with new/different | |
66 | * interrupt controllers, without having to do assembly magic or | |
67 | * having to touch the generic code. | |
68 | * | |
69 | * Controller mappings for all interrupt sources: | |
70 | */ | |
85c0f909 | 71 | int nr_irqs = NR_IRQS; |
fa42d10d | 72 | EXPORT_SYMBOL_GPL(nr_irqs); |
d60458b2 | 73 | |
0b8f1efa | 74 | #ifdef CONFIG_SPARSE_IRQ |
92296c6d | 75 | |
0b8f1efa YL |
76 | static struct irq_desc irq_desc_init = { |
77 | .irq = -1, | |
78 | .status = IRQ_DISABLED, | |
79 | .chip = &no_irq_chip, | |
80 | .handle_irq = handle_bad_irq, | |
81 | .depth = 1, | |
82 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
0b8f1efa YL |
83 | }; |
84 | ||
948cd529 | 85 | void __ref init_kstat_irqs(struct irq_desc *desc, int node, int nr) |
0b8f1efa | 86 | { |
005bf0e6 | 87 | void *ptr; |
0b8f1efa | 88 | |
948cd529 PM |
89 | if (slab_is_available()) |
90 | ptr = kzalloc_node(nr * sizeof(*desc->kstat_irqs), | |
91 | GFP_ATOMIC, node); | |
92 | else | |
93 | ptr = alloc_bootmem_node(NODE_DATA(node), | |
94 | nr * sizeof(*desc->kstat_irqs)); | |
0b8f1efa | 95 | |
005bf0e6 YL |
96 | /* |
97 | * don't overwite if can not get new one | |
98 | * init_copy_kstat_irqs() could still use old one | |
99 | */ | |
100 | if (ptr) { | |
85ac16d0 | 101 | printk(KERN_DEBUG " alloc kstat_irqs on node %d\n", node); |
005bf0e6 YL |
102 | desc->kstat_irqs = ptr; |
103 | } | |
0b8f1efa YL |
104 | } |
105 | ||
85ac16d0 | 106 | static void init_one_irq_desc(int irq, struct irq_desc *desc, int node) |
0b8f1efa YL |
107 | { |
108 | memcpy(desc, &irq_desc_init, sizeof(struct irq_desc)); | |
793f7b12 IM |
109 | |
110 | spin_lock_init(&desc->lock); | |
0b8f1efa YL |
111 | desc->irq = irq; |
112 | #ifdef CONFIG_SMP | |
85ac16d0 | 113 | desc->node = node; |
0b8f1efa YL |
114 | #endif |
115 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); | |
85ac16d0 | 116 | init_kstat_irqs(desc, node, nr_cpu_ids); |
0b8f1efa YL |
117 | if (!desc->kstat_irqs) { |
118 | printk(KERN_ERR "can not alloc kstat_irqs\n"); | |
119 | BUG_ON(1); | |
120 | } | |
85ac16d0 | 121 | if (!alloc_desc_masks(desc, node, false)) { |
7f7ace0c MT |
122 | printk(KERN_ERR "can not alloc irq_desc cpumasks\n"); |
123 | BUG_ON(1); | |
124 | } | |
9ec4fa27 | 125 | init_desc_masks(desc); |
85ac16d0 | 126 | arch_init_chip_data(desc, node); |
0b8f1efa YL |
127 | } |
128 | ||
129 | /* | |
130 | * Protect the sparse_irqs: | |
131 | */ | |
48a1b10a | 132 | DEFINE_SPINLOCK(sparse_irq_lock); |
0b8f1efa | 133 | |
0fa0ebbf | 134 | struct irq_desc **irq_desc_ptrs __read_mostly; |
0b8f1efa | 135 | |
99d093d1 YL |
136 | static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = { |
137 | [0 ... NR_IRQS_LEGACY-1] = { | |
0b8f1efa YL |
138 | .irq = -1, |
139 | .status = IRQ_DISABLED, | |
140 | .chip = &no_irq_chip, | |
141 | .handle_irq = handle_bad_irq, | |
142 | .depth = 1, | |
143 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
0b8f1efa YL |
144 | } |
145 | }; | |
146 | ||
542d865b | 147 | static unsigned int *kstat_irqs_legacy; |
0b8f1efa | 148 | |
13a0c3c2 | 149 | int __init early_irq_init(void) |
0b8f1efa YL |
150 | { |
151 | struct irq_desc *desc; | |
152 | int legacy_count; | |
dad213ae | 153 | int node; |
0b8f1efa YL |
154 | int i; |
155 | ||
97179fd4 DD |
156 | init_irq_default_affinity(); |
157 | ||
4a046d17 YL |
158 | /* initialize nr_irqs based on nr_cpu_ids */ |
159 | arch_probe_nr_irqs(); | |
9594949b MT |
160 | printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d\n", NR_IRQS, nr_irqs); |
161 | ||
0b8f1efa YL |
162 | desc = irq_desc_legacy; |
163 | legacy_count = ARRAY_SIZE(irq_desc_legacy); | |
372e24b0 | 164 | node = first_online_node; |
0b8f1efa | 165 | |
0fa0ebbf | 166 | /* allocate irq_desc_ptrs array based on nr_irqs */ |
22fb4e71 | 167 | irq_desc_ptrs = kcalloc(nr_irqs, sizeof(void *), GFP_NOWAIT); |
0fa0ebbf | 168 | |
542d865b | 169 | /* allocate based on nr_cpu_ids */ |
dad213ae YL |
170 | kstat_irqs_legacy = kzalloc_node(NR_IRQS_LEGACY * nr_cpu_ids * |
171 | sizeof(int), GFP_NOWAIT, node); | |
542d865b | 172 | |
0b8f1efa YL |
173 | for (i = 0; i < legacy_count; i++) { |
174 | desc[i].irq = i; | |
372e24b0 YL |
175 | #ifdef CONFIG_SMP |
176 | desc[i].node = node; | |
177 | #endif | |
542d865b | 178 | desc[i].kstat_irqs = kstat_irqs_legacy + i * nr_cpu_ids; |
fa6beb37 | 179 | lockdep_set_class(&desc[i].lock, &irq_desc_lock_class); |
dad213ae | 180 | alloc_desc_masks(&desc[i], node, true); |
9ec4fa27 | 181 | init_desc_masks(&desc[i]); |
0b8f1efa YL |
182 | irq_desc_ptrs[i] = desc + i; |
183 | } | |
184 | ||
9594949b | 185 | for (i = legacy_count; i < nr_irqs; i++) |
0b8f1efa YL |
186 | irq_desc_ptrs[i] = NULL; |
187 | ||
13a0c3c2 | 188 | return arch_early_irq_init(); |
0b8f1efa YL |
189 | } |
190 | ||
191 | struct irq_desc *irq_to_desc(unsigned int irq) | |
192 | { | |
0fa0ebbf MT |
193 | if (irq_desc_ptrs && irq < nr_irqs) |
194 | return irq_desc_ptrs[irq]; | |
195 | ||
196 | return NULL; | |
0b8f1efa YL |
197 | } |
198 | ||
948cd529 | 199 | struct irq_desc * __ref irq_to_desc_alloc_node(unsigned int irq, int node) |
0b8f1efa YL |
200 | { |
201 | struct irq_desc *desc; | |
202 | unsigned long flags; | |
0b8f1efa | 203 | |
9594949b | 204 | if (irq >= nr_irqs) { |
e2f4d065 MT |
205 | WARN(1, "irq (%d) >= nr_irqs (%d) in irq_to_desc_alloc\n", |
206 | irq, nr_irqs); | |
0b8f1efa YL |
207 | return NULL; |
208 | } | |
209 | ||
210 | desc = irq_desc_ptrs[irq]; | |
211 | if (desc) | |
212 | return desc; | |
213 | ||
214 | spin_lock_irqsave(&sparse_irq_lock, flags); | |
215 | ||
216 | /* We have to check it to avoid races with another CPU */ | |
217 | desc = irq_desc_ptrs[irq]; | |
218 | if (desc) | |
219 | goto out_unlock; | |
220 | ||
948cd529 PM |
221 | if (slab_is_available()) |
222 | desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node); | |
223 | else | |
224 | desc = alloc_bootmem_node(NODE_DATA(node), sizeof(*desc)); | |
225 | ||
85ac16d0 | 226 | printk(KERN_DEBUG " alloc irq_desc for %d on node %d\n", irq, node); |
0b8f1efa YL |
227 | if (!desc) { |
228 | printk(KERN_ERR "can not alloc irq_desc\n"); | |
229 | BUG_ON(1); | |
230 | } | |
85ac16d0 | 231 | init_one_irq_desc(irq, desc, node); |
0b8f1efa YL |
232 | |
233 | irq_desc_ptrs[irq] = desc; | |
234 | ||
235 | out_unlock: | |
236 | spin_unlock_irqrestore(&sparse_irq_lock, flags); | |
237 | ||
238 | return desc; | |
239 | } | |
240 | ||
f9af0e70 | 241 | #else /* !CONFIG_SPARSE_IRQ */ |
0b8f1efa | 242 | |
e729aa16 | 243 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = { |
1da177e4 | 244 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 245 | .status = IRQ_DISABLED, |
f1c2662c | 246 | .chip = &no_irq_chip, |
7a55713a | 247 | .handle_irq = handle_bad_irq, |
94d39e1f | 248 | .depth = 1, |
aac3f2b6 | 249 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), |
1da177e4 LT |
250 | } |
251 | }; | |
08678b08 | 252 | |
d7e51e66 | 253 | static unsigned int kstat_irqs_all[NR_IRQS][NR_CPUS]; |
12026ea1 YL |
254 | int __init early_irq_init(void) |
255 | { | |
256 | struct irq_desc *desc; | |
257 | int count; | |
258 | int i; | |
259 | ||
97179fd4 DD |
260 | init_irq_default_affinity(); |
261 | ||
9594949b MT |
262 | printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS); |
263 | ||
12026ea1 YL |
264 | desc = irq_desc; |
265 | count = ARRAY_SIZE(irq_desc); | |
266 | ||
d7e51e66 | 267 | for (i = 0; i < count; i++) { |
12026ea1 | 268 | desc[i].irq = i; |
9ec4fa27 YL |
269 | alloc_desc_masks(&desc[i], 0, true); |
270 | init_desc_masks(&desc[i]); | |
d7e51e66 YL |
271 | desc[i].kstat_irqs = kstat_irqs_all[i]; |
272 | } | |
12026ea1 YL |
273 | return arch_early_irq_init(); |
274 | } | |
275 | ||
f9af0e70 KM |
276 | struct irq_desc *irq_to_desc(unsigned int irq) |
277 | { | |
278 | return (irq < NR_IRQS) ? irq_desc + irq : NULL; | |
279 | } | |
280 | ||
85ac16d0 | 281 | struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node) |
f9af0e70 KM |
282 | { |
283 | return irq_to_desc(irq); | |
284 | } | |
285 | #endif /* !CONFIG_SPARSE_IRQ */ | |
0b8f1efa | 286 | |
0f3c2a89 YL |
287 | void clear_kstat_irqs(struct irq_desc *desc) |
288 | { | |
289 | memset(desc->kstat_irqs, 0, nr_cpu_ids * sizeof(*(desc->kstat_irqs))); | |
290 | } | |
291 | ||
1da177e4 | 292 | /* |
77a5afec IM |
293 | * What should we do if we get a hw irq event on an illegal vector? |
294 | * Each architecture has to answer this themself. | |
1da177e4 | 295 | */ |
77a5afec | 296 | static void ack_bad(unsigned int irq) |
1da177e4 | 297 | { |
d3c60047 | 298 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 299 | |
08678b08 | 300 | print_irq_desc(irq, desc); |
1da177e4 LT |
301 | ack_bad_irq(irq); |
302 | } | |
303 | ||
77a5afec IM |
304 | /* |
305 | * NOP functions | |
306 | */ | |
307 | static void noop(unsigned int irq) | |
308 | { | |
309 | } | |
310 | ||
311 | static unsigned int noop_ret(unsigned int irq) | |
312 | { | |
313 | return 0; | |
314 | } | |
315 | ||
316 | /* | |
317 | * Generic no controller implementation | |
318 | */ | |
f1c2662c IM |
319 | struct irq_chip no_irq_chip = { |
320 | .name = "none", | |
77a5afec IM |
321 | .startup = noop_ret, |
322 | .shutdown = noop, | |
323 | .enable = noop, | |
324 | .disable = noop, | |
325 | .ack = ack_bad, | |
326 | .end = noop, | |
1da177e4 LT |
327 | }; |
328 | ||
f8b5473f TG |
329 | /* |
330 | * Generic dummy implementation which can be used for | |
331 | * real dumb interrupt sources | |
332 | */ | |
333 | struct irq_chip dummy_irq_chip = { | |
334 | .name = "dummy", | |
335 | .startup = noop_ret, | |
336 | .shutdown = noop, | |
337 | .enable = noop, | |
338 | .disable = noop, | |
339 | .ack = noop, | |
340 | .mask = noop, | |
341 | .unmask = noop, | |
342 | .end = noop, | |
343 | }; | |
344 | ||
1da177e4 LT |
345 | /* |
346 | * Special, empty irq handler: | |
347 | */ | |
7d12e780 | 348 | irqreturn_t no_action(int cpl, void *dev_id) |
1da177e4 LT |
349 | { |
350 | return IRQ_NONE; | |
351 | } | |
352 | ||
f48fe81e TG |
353 | static void warn_no_thread(unsigned int irq, struct irqaction *action) |
354 | { | |
355 | if (test_and_set_bit(IRQTF_WARNED, &action->thread_flags)) | |
356 | return; | |
357 | ||
358 | printk(KERN_WARNING "IRQ %d device %s returned IRQ_WAKE_THREAD " | |
359 | "but no thread function available.", irq, action->name); | |
360 | } | |
361 | ||
8d28bc75 IM |
362 | /** |
363 | * handle_IRQ_event - irq action chain handler | |
364 | * @irq: the interrupt number | |
8d28bc75 IM |
365 | * @action: the interrupt action chain for this irq |
366 | * | |
367 | * Handles the action chain of an irq event | |
1da177e4 | 368 | */ |
7d12e780 | 369 | irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action) |
1da177e4 | 370 | { |
908dcecd JB |
371 | irqreturn_t ret, retval = IRQ_NONE; |
372 | unsigned int status = 0; | |
1da177e4 | 373 | |
3cca53b0 | 374 | if (!(action->flags & IRQF_DISABLED)) |
366c7f55 | 375 | local_irq_enable_in_hardirq(); |
1da177e4 LT |
376 | |
377 | do { | |
af39241b | 378 | trace_irq_handler_entry(irq, action); |
7d12e780 | 379 | ret = action->handler(irq, action->dev_id); |
af39241b | 380 | trace_irq_handler_exit(irq, action, ret); |
3aa551c9 TG |
381 | |
382 | switch (ret) { | |
383 | case IRQ_WAKE_THREAD: | |
f48fe81e TG |
384 | /* |
385 | * Set result to handled so the spurious check | |
386 | * does not trigger. | |
387 | */ | |
388 | ret = IRQ_HANDLED; | |
389 | ||
390 | /* | |
391 | * Catch drivers which return WAKE_THREAD but | |
392 | * did not set up a thread function | |
393 | */ | |
394 | if (unlikely(!action->thread_fn)) { | |
395 | warn_no_thread(irq, action); | |
396 | break; | |
397 | } | |
398 | ||
3aa551c9 TG |
399 | /* |
400 | * Wake up the handler thread for this | |
401 | * action. In case the thread crashed and was | |
402 | * killed we just pretend that we handled the | |
403 | * interrupt. The hardirq handler above has | |
404 | * disabled the device interrupt, so no irq | |
405 | * storm is lurking. | |
406 | */ | |
407 | if (likely(!test_bit(IRQTF_DIED, | |
408 | &action->thread_flags))) { | |
409 | set_bit(IRQTF_RUNTHREAD, &action->thread_flags); | |
410 | wake_up_process(action->thread); | |
411 | } | |
412 | ||
3aa551c9 TG |
413 | /* Fall through to add to randomness */ |
414 | case IRQ_HANDLED: | |
1da177e4 | 415 | status |= action->flags; |
3aa551c9 TG |
416 | break; |
417 | ||
418 | default: | |
419 | break; | |
420 | } | |
421 | ||
1da177e4 LT |
422 | retval |= ret; |
423 | action = action->next; | |
424 | } while (action); | |
425 | ||
3cca53b0 | 426 | if (status & IRQF_SAMPLE_RANDOM) |
1da177e4 LT |
427 | add_interrupt_randomness(irq); |
428 | local_irq_disable(); | |
429 | ||
430 | return retval; | |
431 | } | |
432 | ||
af8c65b5 | 433 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
0e57aa11 TG |
434 | |
435 | #ifdef CONFIG_ENABLE_WARN_DEPRECATED | |
436 | # warning __do_IRQ is deprecated. Please convert to proper flow handlers | |
437 | #endif | |
438 | ||
8d28bc75 IM |
439 | /** |
440 | * __do_IRQ - original all in one highlevel IRQ handler | |
441 | * @irq: the interrupt number | |
8d28bc75 IM |
442 | * |
443 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
444 | * SMP cross-CPU interrupts have their own specific |
445 | * handlers). | |
8d28bc75 IM |
446 | * |
447 | * This is the original x86 implementation which is used for every | |
448 | * interrupt type. | |
1da177e4 | 449 | */ |
7ad5b3a5 | 450 | unsigned int __do_IRQ(unsigned int irq) |
1da177e4 | 451 | { |
08678b08 | 452 | struct irq_desc *desc = irq_to_desc(irq); |
06fcb0c6 | 453 | struct irqaction *action; |
1da177e4 LT |
454 | unsigned int status; |
455 | ||
d6c88a50 TG |
456 | kstat_incr_irqs_this_cpu(irq, desc); |
457 | ||
f26fdd59 | 458 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
459 | irqreturn_t action_ret; |
460 | ||
461 | /* | |
462 | * No locking required for CPU-local interrupts: | |
463 | */ | |
fcef5911 | 464 | if (desc->chip->ack) |
d1bef4ed | 465 | desc->chip->ack(irq); |
c642b839 RA |
466 | if (likely(!(desc->status & IRQ_DISABLED))) { |
467 | action_ret = handle_IRQ_event(irq, desc->action); | |
468 | if (!noirqdebug) | |
469 | note_interrupt(irq, desc, action_ret); | |
470 | } | |
d1bef4ed | 471 | desc->chip->end(irq); |
1da177e4 LT |
472 | return 1; |
473 | } | |
474 | ||
475 | spin_lock(&desc->lock); | |
fcef5911 | 476 | if (desc->chip->ack) |
d1bef4ed | 477 | desc->chip->ack(irq); |
1da177e4 LT |
478 | /* |
479 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
480 | * WAITING is used by probe to mark irqs that are being tested | |
481 | */ | |
482 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
483 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
484 | ||
485 | /* | |
486 | * If the IRQ is disabled for whatever reason, we cannot | |
487 | * use the action we have. | |
488 | */ | |
489 | action = NULL; | |
490 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
491 | action = desc->action; | |
492 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
493 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
494 | } | |
495 | desc->status = status; | |
496 | ||
497 | /* | |
498 | * If there is no IRQ handler or it was disabled, exit early. | |
499 | * Since we set PENDING, if another processor is handling | |
500 | * a different instance of this same irq, the other processor | |
501 | * will take care of it. | |
502 | */ | |
503 | if (unlikely(!action)) | |
504 | goto out; | |
505 | ||
506 | /* | |
507 | * Edge triggered interrupts need to remember | |
508 | * pending events. | |
509 | * This applies to any hw interrupts that allow a second | |
510 | * instance of the same irq to arrive while we are in do_IRQ | |
511 | * or in the handler. But the code here only handles the _second_ | |
512 | * instance of the irq, not the third or fourth. So it is mostly | |
513 | * useful for irq hardware that does not mask cleanly in an | |
514 | * SMP environment. | |
515 | */ | |
516 | for (;;) { | |
517 | irqreturn_t action_ret; | |
518 | ||
519 | spin_unlock(&desc->lock); | |
520 | ||
7d12e780 | 521 | action_ret = handle_IRQ_event(irq, action); |
1da177e4 | 522 | if (!noirqdebug) |
7d12e780 | 523 | note_interrupt(irq, desc, action_ret); |
b42172fc LT |
524 | |
525 | spin_lock(&desc->lock); | |
1da177e4 LT |
526 | if (likely(!(desc->status & IRQ_PENDING))) |
527 | break; | |
528 | desc->status &= ~IRQ_PENDING; | |
529 | } | |
530 | desc->status &= ~IRQ_INPROGRESS; | |
531 | ||
532 | out: | |
533 | /* | |
534 | * The ->end() handler has to deal with interrupts which got | |
535 | * disabled while the handler was running. | |
536 | */ | |
d1bef4ed | 537 | desc->chip->end(irq); |
1da177e4 LT |
538 | spin_unlock(&desc->lock); |
539 | ||
540 | return 1; | |
541 | } | |
af8c65b5 | 542 | #endif |
1da177e4 | 543 | |
243c7621 IM |
544 | void early_init_irq_lock_class(void) |
545 | { | |
10e58084 | 546 | struct irq_desc *desc; |
243c7621 IM |
547 | int i; |
548 | ||
0b8f1efa | 549 | for_each_irq_desc(i, desc) { |
10e58084 | 550 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); |
0b8f1efa | 551 | } |
0b8f1efa | 552 | } |
0b8f1efa | 553 | |
0b8f1efa YL |
554 | unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) |
555 | { | |
556 | struct irq_desc *desc = irq_to_desc(irq); | |
26ddd8d5 | 557 | return desc ? desc->kstat_irqs[cpu] : 0; |
243c7621 | 558 | } |
0b8f1efa YL |
559 | EXPORT_SYMBOL(kstat_irqs_cpu); |
560 |