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Commit | Line | Data |
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dd87eb3a TG |
1 | /* |
2 | * linux/kernel/irq/chip.c | |
3 | * | |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
6 | * | |
7 | * This file contains the core interrupt handling code, for irq-chip | |
8 | * based architectures. | |
9 | * | |
10 | * Detailed information is available in Documentation/DocBook/genericirq | |
11 | */ | |
12 | ||
13 | #include <linux/irq.h> | |
7fe3730d | 14 | #include <linux/msi.h> |
dd87eb3a TG |
15 | #include <linux/module.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
3a16d713 EB |
21 | /** |
22 | * dynamic_irq_init - initialize a dynamically allocated irq | |
23 | * @irq: irq number to initialize | |
24 | */ | |
25 | void dynamic_irq_init(unsigned int irq) | |
26 | { | |
0b8f1efa | 27 | struct irq_desc *desc; |
3a16d713 EB |
28 | unsigned long flags; |
29 | ||
0b8f1efa | 30 | desc = irq_to_desc(irq); |
7d94f7ca | 31 | if (!desc) { |
261c40c1 | 32 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); |
3a16d713 EB |
33 | return; |
34 | } | |
35 | ||
36 | /* Ensure we don't have left over values from a previous use of this irq */ | |
3a16d713 EB |
37 | spin_lock_irqsave(&desc->lock, flags); |
38 | desc->status = IRQ_DISABLED; | |
39 | desc->chip = &no_irq_chip; | |
40 | desc->handle_irq = handle_bad_irq; | |
41 | desc->depth = 1; | |
5b912c10 | 42 | desc->msi_desc = NULL; |
3a16d713 EB |
43 | desc->handler_data = NULL; |
44 | desc->chip_data = NULL; | |
45 | desc->action = NULL; | |
46 | desc->irq_count = 0; | |
47 | desc->irqs_unhandled = 0; | |
48 | #ifdef CONFIG_SMP | |
d366f8cb | 49 | cpus_setall(desc->affinity); |
3a16d713 EB |
50 | #endif |
51 | spin_unlock_irqrestore(&desc->lock, flags); | |
52 | } | |
53 | ||
54 | /** | |
55 | * dynamic_irq_cleanup - cleanup a dynamically allocated irq | |
56 | * @irq: irq number to initialize | |
57 | */ | |
58 | void dynamic_irq_cleanup(unsigned int irq) | |
59 | { | |
d3c60047 | 60 | struct irq_desc *desc = irq_to_desc(irq); |
3a16d713 EB |
61 | unsigned long flags; |
62 | ||
7d94f7ca | 63 | if (!desc) { |
261c40c1 | 64 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); |
3a16d713 EB |
65 | return; |
66 | } | |
67 | ||
3a16d713 | 68 | spin_lock_irqsave(&desc->lock, flags); |
1f80025e EB |
69 | if (desc->action) { |
70 | spin_unlock_irqrestore(&desc->lock, flags); | |
261c40c1 | 71 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", |
1f80025e | 72 | irq); |
1f80025e EB |
73 | return; |
74 | } | |
5b912c10 EB |
75 | desc->msi_desc = NULL; |
76 | desc->handler_data = NULL; | |
77 | desc->chip_data = NULL; | |
3a16d713 EB |
78 | desc->handle_irq = handle_bad_irq; |
79 | desc->chip = &no_irq_chip; | |
b6f3b780 | 80 | desc->name = NULL; |
3a16d713 EB |
81 | spin_unlock_irqrestore(&desc->lock, flags); |
82 | } | |
83 | ||
84 | ||
dd87eb3a TG |
85 | /** |
86 | * set_irq_chip - set the irq chip for an irq | |
87 | * @irq: irq number | |
88 | * @chip: pointer to irq chip description structure | |
89 | */ | |
90 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | |
91 | { | |
d3c60047 | 92 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
93 | unsigned long flags; |
94 | ||
7d94f7ca | 95 | if (!desc) { |
261c40c1 | 96 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
dd87eb3a TG |
97 | return -EINVAL; |
98 | } | |
99 | ||
100 | if (!chip) | |
101 | chip = &no_irq_chip; | |
102 | ||
dd87eb3a TG |
103 | spin_lock_irqsave(&desc->lock, flags); |
104 | irq_chip_set_defaults(chip); | |
105 | desc->chip = chip; | |
dd87eb3a TG |
106 | spin_unlock_irqrestore(&desc->lock, flags); |
107 | ||
108 | return 0; | |
109 | } | |
110 | EXPORT_SYMBOL(set_irq_chip); | |
111 | ||
112 | /** | |
0c5d1eb7 | 113 | * set_irq_type - set the irq trigger type for an irq |
dd87eb3a | 114 | * @irq: irq number |
0c5d1eb7 | 115 | * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h |
dd87eb3a TG |
116 | */ |
117 | int set_irq_type(unsigned int irq, unsigned int type) | |
118 | { | |
d3c60047 | 119 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
120 | unsigned long flags; |
121 | int ret = -ENXIO; | |
122 | ||
7d94f7ca | 123 | if (!desc) { |
dd87eb3a TG |
124 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
125 | return -ENODEV; | |
126 | } | |
127 | ||
0c5d1eb7 DB |
128 | if (type == IRQ_TYPE_NONE) |
129 | return 0; | |
130 | ||
131 | spin_lock_irqsave(&desc->lock, flags); | |
0b3682ba | 132 | ret = __irq_set_trigger(desc, irq, type); |
0c5d1eb7 | 133 | spin_unlock_irqrestore(&desc->lock, flags); |
dd87eb3a TG |
134 | return ret; |
135 | } | |
136 | EXPORT_SYMBOL(set_irq_type); | |
137 | ||
138 | /** | |
139 | * set_irq_data - set irq type data for an irq | |
140 | * @irq: Interrupt number | |
141 | * @data: Pointer to interrupt specific data | |
142 | * | |
143 | * Set the hardware irq controller data for an irq | |
144 | */ | |
145 | int set_irq_data(unsigned int irq, void *data) | |
146 | { | |
d3c60047 | 147 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
148 | unsigned long flags; |
149 | ||
7d94f7ca | 150 | if (!desc) { |
dd87eb3a TG |
151 | printk(KERN_ERR |
152 | "Trying to install controller data for IRQ%d\n", irq); | |
153 | return -EINVAL; | |
154 | } | |
155 | ||
dd87eb3a TG |
156 | spin_lock_irqsave(&desc->lock, flags); |
157 | desc->handler_data = data; | |
158 | spin_unlock_irqrestore(&desc->lock, flags); | |
159 | return 0; | |
160 | } | |
161 | EXPORT_SYMBOL(set_irq_data); | |
162 | ||
5b912c10 EB |
163 | /** |
164 | * set_irq_data - set irq type data for an irq | |
165 | * @irq: Interrupt number | |
472900b8 | 166 | * @entry: Pointer to MSI descriptor data |
5b912c10 EB |
167 | * |
168 | * Set the hardware irq controller data for an irq | |
169 | */ | |
170 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | |
171 | { | |
d3c60047 | 172 | struct irq_desc *desc = irq_to_desc(irq); |
5b912c10 EB |
173 | unsigned long flags; |
174 | ||
7d94f7ca | 175 | if (!desc) { |
5b912c10 EB |
176 | printk(KERN_ERR |
177 | "Trying to install msi data for IRQ%d\n", irq); | |
178 | return -EINVAL; | |
179 | } | |
7d94f7ca | 180 | |
5b912c10 EB |
181 | spin_lock_irqsave(&desc->lock, flags); |
182 | desc->msi_desc = entry; | |
7fe3730d ME |
183 | if (entry) |
184 | entry->irq = irq; | |
5b912c10 EB |
185 | spin_unlock_irqrestore(&desc->lock, flags); |
186 | return 0; | |
187 | } | |
188 | ||
dd87eb3a TG |
189 | /** |
190 | * set_irq_chip_data - set irq chip data for an irq | |
191 | * @irq: Interrupt number | |
192 | * @data: Pointer to chip specific data | |
193 | * | |
194 | * Set the hardware irq chip data for an irq | |
195 | */ | |
196 | int set_irq_chip_data(unsigned int irq, void *data) | |
197 | { | |
d3c60047 | 198 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
199 | unsigned long flags; |
200 | ||
7d94f7ca YL |
201 | if (!desc) { |
202 | printk(KERN_ERR | |
203 | "Trying to install chip data for IRQ%d\n", irq); | |
204 | return -EINVAL; | |
205 | } | |
206 | ||
207 | if (!desc->chip) { | |
dd87eb3a TG |
208 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); |
209 | return -EINVAL; | |
210 | } | |
211 | ||
212 | spin_lock_irqsave(&desc->lock, flags); | |
213 | desc->chip_data = data; | |
214 | spin_unlock_irqrestore(&desc->lock, flags); | |
215 | ||
216 | return 0; | |
217 | } | |
218 | EXPORT_SYMBOL(set_irq_chip_data); | |
219 | ||
220 | /* | |
221 | * default enable function | |
222 | */ | |
223 | static void default_enable(unsigned int irq) | |
224 | { | |
d3c60047 | 225 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
226 | |
227 | desc->chip->unmask(irq); | |
228 | desc->status &= ~IRQ_MASKED; | |
229 | } | |
230 | ||
231 | /* | |
232 | * default disable function | |
233 | */ | |
234 | static void default_disable(unsigned int irq) | |
235 | { | |
dd87eb3a TG |
236 | } |
237 | ||
238 | /* | |
239 | * default startup function | |
240 | */ | |
241 | static unsigned int default_startup(unsigned int irq) | |
242 | { | |
d3c60047 | 243 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 244 | |
08678b08 | 245 | desc->chip->enable(irq); |
dd87eb3a TG |
246 | return 0; |
247 | } | |
248 | ||
89d694b9 TG |
249 | /* |
250 | * default shutdown function | |
251 | */ | |
252 | static void default_shutdown(unsigned int irq) | |
253 | { | |
d3c60047 | 254 | struct irq_desc *desc = irq_to_desc(irq); |
89d694b9 TG |
255 | |
256 | desc->chip->mask(irq); | |
257 | desc->status |= IRQ_MASKED; | |
258 | } | |
259 | ||
dd87eb3a TG |
260 | /* |
261 | * Fixup enable/disable function pointers | |
262 | */ | |
263 | void irq_chip_set_defaults(struct irq_chip *chip) | |
264 | { | |
265 | if (!chip->enable) | |
266 | chip->enable = default_enable; | |
267 | if (!chip->disable) | |
268 | chip->disable = default_disable; | |
269 | if (!chip->startup) | |
270 | chip->startup = default_startup; | |
89d694b9 TG |
271 | /* |
272 | * We use chip->disable, when the user provided its own. When | |
273 | * we have default_disable set for chip->disable, then we need | |
274 | * to use default_shutdown, otherwise the irq line is not | |
275 | * disabled on free_irq(): | |
276 | */ | |
dd87eb3a | 277 | if (!chip->shutdown) |
89d694b9 TG |
278 | chip->shutdown = chip->disable != default_disable ? |
279 | chip->disable : default_shutdown; | |
dd87eb3a TG |
280 | if (!chip->name) |
281 | chip->name = chip->typename; | |
b86432b4 ZY |
282 | if (!chip->end) |
283 | chip->end = dummy_irq_chip.end; | |
dd87eb3a TG |
284 | } |
285 | ||
286 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | |
287 | { | |
288 | if (desc->chip->mask_ack) | |
289 | desc->chip->mask_ack(irq); | |
290 | else { | |
291 | desc->chip->mask(irq); | |
292 | desc->chip->ack(irq); | |
293 | } | |
294 | } | |
295 | ||
296 | /** | |
297 | * handle_simple_irq - Simple and software-decoded IRQs. | |
298 | * @irq: the interrupt number | |
299 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
300 | * |
301 | * Simple interrupts are either sent from a demultiplexing interrupt | |
302 | * handler or come from hardware, where no interrupt hardware control | |
303 | * is necessary. | |
304 | * | |
305 | * Note: The caller is expected to handle the ack, clear, mask and | |
306 | * unmask issues if necessary. | |
307 | */ | |
7ad5b3a5 | 308 | void |
7d12e780 | 309 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
310 | { |
311 | struct irqaction *action; | |
312 | irqreturn_t action_ret; | |
dd87eb3a TG |
313 | |
314 | spin_lock(&desc->lock); | |
315 | ||
316 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
317 | goto out_unlock; | |
971e5b35 | 318 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 319 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
320 | |
321 | action = desc->action; | |
971e5b35 | 322 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
dd87eb3a TG |
323 | goto out_unlock; |
324 | ||
325 | desc->status |= IRQ_INPROGRESS; | |
326 | spin_unlock(&desc->lock); | |
327 | ||
7d12e780 | 328 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 329 | if (!noirqdebug) |
7d12e780 | 330 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
331 | |
332 | spin_lock(&desc->lock); | |
333 | desc->status &= ~IRQ_INPROGRESS; | |
334 | out_unlock: | |
335 | spin_unlock(&desc->lock); | |
336 | } | |
337 | ||
338 | /** | |
339 | * handle_level_irq - Level type irq handler | |
340 | * @irq: the interrupt number | |
341 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
342 | * |
343 | * Level type interrupts are active as long as the hardware line has | |
344 | * the active level. This may require to mask the interrupt and unmask | |
345 | * it after the associated handler has acknowledged the device, so the | |
346 | * interrupt line is back to inactive. | |
347 | */ | |
7ad5b3a5 | 348 | void |
7d12e780 | 349 | handle_level_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 350 | { |
dd87eb3a TG |
351 | struct irqaction *action; |
352 | irqreturn_t action_ret; | |
353 | ||
354 | spin_lock(&desc->lock); | |
355 | mask_ack_irq(desc, irq); | |
356 | ||
357 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
86998aa6 | 358 | goto out_unlock; |
dd87eb3a | 359 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 360 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
361 | |
362 | /* | |
363 | * If its disabled or no action available | |
364 | * keep it masked and get out of here | |
365 | */ | |
366 | action = desc->action; | |
49663421 | 367 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
86998aa6 | 368 | goto out_unlock; |
dd87eb3a TG |
369 | |
370 | desc->status |= IRQ_INPROGRESS; | |
371 | spin_unlock(&desc->lock); | |
372 | ||
7d12e780 | 373 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 374 | if (!noirqdebug) |
7d12e780 | 375 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
376 | |
377 | spin_lock(&desc->lock); | |
378 | desc->status &= ~IRQ_INPROGRESS; | |
dd87eb3a TG |
379 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
380 | desc->chip->unmask(irq); | |
86998aa6 | 381 | out_unlock: |
dd87eb3a TG |
382 | spin_unlock(&desc->lock); |
383 | } | |
384 | ||
385 | /** | |
47c2a3aa | 386 | * handle_fasteoi_irq - irq handler for transparent controllers |
dd87eb3a TG |
387 | * @irq: the interrupt number |
388 | * @desc: the interrupt description structure for this irq | |
dd87eb3a | 389 | * |
47c2a3aa | 390 | * Only a single callback will be issued to the chip: an ->eoi() |
dd87eb3a TG |
391 | * call when the interrupt has been serviced. This enables support |
392 | * for modern forms of interrupt handlers, which handle the flow | |
393 | * details in hardware, transparently. | |
394 | */ | |
7ad5b3a5 | 395 | void |
7d12e780 | 396 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 397 | { |
dd87eb3a TG |
398 | struct irqaction *action; |
399 | irqreturn_t action_ret; | |
400 | ||
401 | spin_lock(&desc->lock); | |
402 | ||
403 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
404 | goto out; | |
405 | ||
406 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
d6c88a50 | 407 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
408 | |
409 | /* | |
410 | * If its disabled or no action available | |
76d21601 | 411 | * then mask it and get out of here: |
dd87eb3a TG |
412 | */ |
413 | action = desc->action; | |
98bb244b BH |
414 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
415 | desc->status |= IRQ_PENDING; | |
76d21601 IM |
416 | if (desc->chip->mask) |
417 | desc->chip->mask(irq); | |
dd87eb3a | 418 | goto out; |
98bb244b | 419 | } |
dd87eb3a TG |
420 | |
421 | desc->status |= IRQ_INPROGRESS; | |
98bb244b | 422 | desc->status &= ~IRQ_PENDING; |
dd87eb3a TG |
423 | spin_unlock(&desc->lock); |
424 | ||
7d12e780 | 425 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 426 | if (!noirqdebug) |
7d12e780 | 427 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
428 | |
429 | spin_lock(&desc->lock); | |
430 | desc->status &= ~IRQ_INPROGRESS; | |
431 | out: | |
47c2a3aa | 432 | desc->chip->eoi(irq); |
dd87eb3a TG |
433 | |
434 | spin_unlock(&desc->lock); | |
435 | } | |
436 | ||
437 | /** | |
438 | * handle_edge_irq - edge type IRQ handler | |
439 | * @irq: the interrupt number | |
440 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
441 | * |
442 | * Interrupt occures on the falling and/or rising edge of a hardware | |
443 | * signal. The occurence is latched into the irq controller hardware | |
444 | * and must be acked in order to be reenabled. After the ack another | |
445 | * interrupt can happen on the same source even before the first one | |
446 | * is handled by the assosiacted event handler. If this happens it | |
447 | * might be necessary to disable (mask) the interrupt depending on the | |
448 | * controller hardware. This requires to reenable the interrupt inside | |
449 | * of the loop which handles the interrupts which have arrived while | |
450 | * the handler was running. If all pending interrupts are handled, the | |
451 | * loop is left. | |
452 | */ | |
7ad5b3a5 | 453 | void |
7d12e780 | 454 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 455 | { |
dd87eb3a TG |
456 | spin_lock(&desc->lock); |
457 | ||
458 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
459 | ||
460 | /* | |
461 | * If we're currently running this IRQ, or its disabled, | |
462 | * we shouldn't process the IRQ. Mark it pending, handle | |
463 | * the necessary masking and go out | |
464 | */ | |
465 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | |
466 | !desc->action)) { | |
467 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | |
468 | mask_ack_irq(desc, irq); | |
469 | goto out_unlock; | |
470 | } | |
d6c88a50 | 471 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
472 | |
473 | /* Start handling the irq */ | |
474 | desc->chip->ack(irq); | |
475 | ||
476 | /* Mark the IRQ currently in progress.*/ | |
477 | desc->status |= IRQ_INPROGRESS; | |
478 | ||
479 | do { | |
480 | struct irqaction *action = desc->action; | |
481 | irqreturn_t action_ret; | |
482 | ||
483 | if (unlikely(!action)) { | |
484 | desc->chip->mask(irq); | |
485 | goto out_unlock; | |
486 | } | |
487 | ||
488 | /* | |
489 | * When another irq arrived while we were handling | |
490 | * one, we could have masked the irq. | |
491 | * Renable it, if it was not disabled in meantime. | |
492 | */ | |
493 | if (unlikely((desc->status & | |
494 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | |
495 | (IRQ_PENDING | IRQ_MASKED))) { | |
496 | desc->chip->unmask(irq); | |
497 | desc->status &= ~IRQ_MASKED; | |
498 | } | |
499 | ||
500 | desc->status &= ~IRQ_PENDING; | |
501 | spin_unlock(&desc->lock); | |
7d12e780 | 502 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 503 | if (!noirqdebug) |
7d12e780 | 504 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
505 | spin_lock(&desc->lock); |
506 | ||
507 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | |
508 | ||
509 | desc->status &= ~IRQ_INPROGRESS; | |
510 | out_unlock: | |
511 | spin_unlock(&desc->lock); | |
512 | } | |
513 | ||
dd87eb3a TG |
514 | /** |
515 | * handle_percpu_IRQ - Per CPU local irq handler | |
516 | * @irq: the interrupt number | |
517 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
518 | * |
519 | * Per CPU interrupts on SMP machines without locking requirements | |
520 | */ | |
7ad5b3a5 | 521 | void |
7d12e780 | 522 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
523 | { |
524 | irqreturn_t action_ret; | |
525 | ||
d6c88a50 | 526 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
527 | |
528 | if (desc->chip->ack) | |
529 | desc->chip->ack(irq); | |
530 | ||
7d12e780 | 531 | action_ret = handle_IRQ_event(irq, desc->action); |
dd87eb3a | 532 | if (!noirqdebug) |
7d12e780 | 533 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
534 | |
535 | if (desc->chip->eoi) | |
536 | desc->chip->eoi(irq); | |
537 | } | |
538 | ||
dd87eb3a | 539 | void |
a460e745 IM |
540 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
541 | const char *name) | |
dd87eb3a | 542 | { |
d3c60047 | 543 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
544 | unsigned long flags; |
545 | ||
7d94f7ca | 546 | if (!desc) { |
dd87eb3a TG |
547 | printk(KERN_ERR |
548 | "Trying to install type control for IRQ%d\n", irq); | |
549 | return; | |
550 | } | |
551 | ||
dd87eb3a TG |
552 | if (!handle) |
553 | handle = handle_bad_irq; | |
9d7ac8be | 554 | else if (desc->chip == &no_irq_chip) { |
f8b5473f | 555 | printk(KERN_WARNING "Trying to install %sinterrupt handler " |
b039db8e | 556 | "for IRQ%d\n", is_chained ? "chained " : "", irq); |
f8b5473f TG |
557 | /* |
558 | * Some ARM implementations install a handler for really dumb | |
559 | * interrupt hardware without setting an irq_chip. This worked | |
560 | * with the ARM no_irq_chip but the check in setup_irq would | |
561 | * prevent us to setup the interrupt at all. Switch it to | |
562 | * dummy_irq_chip for easy transition. | |
563 | */ | |
564 | desc->chip = &dummy_irq_chip; | |
565 | } | |
dd87eb3a TG |
566 | |
567 | spin_lock_irqsave(&desc->lock, flags); | |
568 | ||
569 | /* Uninstall? */ | |
570 | if (handle == handle_bad_irq) { | |
5575ddf7 JB |
571 | if (desc->chip != &no_irq_chip) |
572 | mask_ack_irq(desc, irq); | |
dd87eb3a TG |
573 | desc->status |= IRQ_DISABLED; |
574 | desc->depth = 1; | |
575 | } | |
576 | desc->handle_irq = handle; | |
a460e745 | 577 | desc->name = name; |
dd87eb3a TG |
578 | |
579 | if (handle != handle_bad_irq && is_chained) { | |
580 | desc->status &= ~IRQ_DISABLED; | |
581 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | |
582 | desc->depth = 0; | |
7e6e178a | 583 | desc->chip->startup(irq); |
dd87eb3a TG |
584 | } |
585 | spin_unlock_irqrestore(&desc->lock, flags); | |
586 | } | |
587 | ||
588 | void | |
589 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | |
57a58a94 | 590 | irq_flow_handler_t handle) |
dd87eb3a TG |
591 | { |
592 | set_irq_chip(irq, chip); | |
a460e745 | 593 | __set_irq_handler(irq, handle, 0, NULL); |
dd87eb3a TG |
594 | } |
595 | ||
a460e745 IM |
596 | void |
597 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | |
598 | irq_flow_handler_t handle, const char *name) | |
dd87eb3a | 599 | { |
a460e745 IM |
600 | set_irq_chip(irq, chip); |
601 | __set_irq_handler(irq, handle, 0, name); | |
dd87eb3a | 602 | } |
46f4f8f6 RB |
603 | |
604 | void __init set_irq_noprobe(unsigned int irq) | |
605 | { | |
d3c60047 | 606 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
607 | unsigned long flags; |
608 | ||
7d94f7ca | 609 | if (!desc) { |
46f4f8f6 | 610 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); |
46f4f8f6 RB |
611 | return; |
612 | } | |
613 | ||
46f4f8f6 RB |
614 | spin_lock_irqsave(&desc->lock, flags); |
615 | desc->status |= IRQ_NOPROBE; | |
616 | spin_unlock_irqrestore(&desc->lock, flags); | |
617 | } | |
618 | ||
619 | void __init set_irq_probe(unsigned int irq) | |
620 | { | |
d3c60047 | 621 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
622 | unsigned long flags; |
623 | ||
7d94f7ca | 624 | if (!desc) { |
46f4f8f6 | 625 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); |
46f4f8f6 RB |
626 | return; |
627 | } | |
628 | ||
46f4f8f6 RB |
629 | spin_lock_irqsave(&desc->lock, flags); |
630 | desc->status &= ~IRQ_NOPROBE; | |
631 | spin_unlock_irqrestore(&desc->lock, flags); | |
632 | } |