]> bbs.cooldavid.org Git - net-next-2.6.git/blame - kernel/irq/chip.c
Merge branches 'msm-fixes' and 'msm-video' of git://codeaurora.org/quic/kernel/dwalke...
[net-next-2.6.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
21/**
22 * set_irq_chip - set the irq chip for an irq
23 * @irq: irq number
24 * @chip: pointer to irq chip description structure
25 */
26int set_irq_chip(unsigned int irq, struct irq_chip *chip)
27{
d3c60047 28 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
29 unsigned long flags;
30
7d94f7ca 31 if (!desc) {
261c40c1 32 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
33 return -EINVAL;
34 }
35
36 if (!chip)
37 chip = &no_irq_chip;
38
239007b8 39 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 40 irq_chip_set_defaults(chip);
6b8ff312 41 desc->irq_data.chip = chip;
239007b8 42 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
43
44 return 0;
45}
46EXPORT_SYMBOL(set_irq_chip);
47
48/**
0c5d1eb7 49 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 50 * @irq: irq number
0c5d1eb7 51 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
52 */
53int set_irq_type(unsigned int irq, unsigned int type)
54{
d3c60047 55 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
56 unsigned long flags;
57 int ret = -ENXIO;
58
7d94f7ca 59 if (!desc) {
dd87eb3a
TG
60 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
61 return -ENODEV;
62 }
63
f2b662da 64 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
65 if (type == IRQ_TYPE_NONE)
66 return 0;
67
239007b8 68 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 69 ret = __irq_set_trigger(desc, irq, type);
239007b8 70 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
71 return ret;
72}
73EXPORT_SYMBOL(set_irq_type);
74
75/**
76 * set_irq_data - set irq type data for an irq
77 * @irq: Interrupt number
78 * @data: Pointer to interrupt specific data
79 *
80 * Set the hardware irq controller data for an irq
81 */
82int set_irq_data(unsigned int irq, void *data)
83{
d3c60047 84 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
85 unsigned long flags;
86
7d94f7ca 87 if (!desc) {
dd87eb3a
TG
88 printk(KERN_ERR
89 "Trying to install controller data for IRQ%d\n", irq);
90 return -EINVAL;
91 }
92
239007b8 93 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 94 desc->irq_data.handler_data = data;
239007b8 95 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
96 return 0;
97}
98EXPORT_SYMBOL(set_irq_data);
99
5b912c10 100/**
24b26d42 101 * set_irq_msi - set MSI descriptor data for an irq
5b912c10 102 * @irq: Interrupt number
472900b8 103 * @entry: Pointer to MSI descriptor data
5b912c10 104 *
24b26d42 105 * Set the MSI descriptor entry for an irq
5b912c10
EB
106 */
107int set_irq_msi(unsigned int irq, struct msi_desc *entry)
108{
d3c60047 109 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
110 unsigned long flags;
111
7d94f7ca 112 if (!desc) {
5b912c10
EB
113 printk(KERN_ERR
114 "Trying to install msi data for IRQ%d\n", irq);
115 return -EINVAL;
116 }
7d94f7ca 117
239007b8 118 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 119 desc->irq_data.msi_desc = entry;
7fe3730d
ME
120 if (entry)
121 entry->irq = irq;
239007b8 122 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
123 return 0;
124}
125
dd87eb3a
TG
126/**
127 * set_irq_chip_data - set irq chip data for an irq
128 * @irq: Interrupt number
129 * @data: Pointer to chip specific data
130 *
131 * Set the hardware irq chip data for an irq
132 */
133int set_irq_chip_data(unsigned int irq, void *data)
134{
d3c60047 135 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
136 unsigned long flags;
137
7d94f7ca
YL
138 if (!desc) {
139 printk(KERN_ERR
140 "Trying to install chip data for IRQ%d\n", irq);
141 return -EINVAL;
142 }
143
6b8ff312 144 if (!desc->irq_data.chip) {
dd87eb3a
TG
145 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
146 return -EINVAL;
147 }
148
239007b8 149 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 150 desc->irq_data.chip_data = data;
239007b8 151 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
152
153 return 0;
154}
155EXPORT_SYMBOL(set_irq_chip_data);
156
f303a6dd
TG
157struct irq_data *irq_get_irq_data(unsigned int irq)
158{
159 struct irq_desc *desc = irq_to_desc(irq);
160
161 return desc ? &desc->irq_data : NULL;
162}
163EXPORT_SYMBOL_GPL(irq_get_irq_data);
164
399b5da2
TG
165/**
166 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
167 *
168 * @irq: Interrupt number
169 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
170 *
171 * The IRQ_NESTED_THREAD flag indicates that on
172 * request_threaded_irq() no separate interrupt thread should be
173 * created for the irq as the handler are called nested in the
174 * context of a demultiplexing interrupt handler thread.
175 */
176void set_irq_nested_thread(unsigned int irq, int nest)
177{
178 struct irq_desc *desc = irq_to_desc(irq);
179 unsigned long flags;
180
181 if (!desc)
182 return;
183
239007b8 184 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
185 if (nest)
186 desc->status |= IRQ_NESTED_THREAD;
187 else
188 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 189 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
190}
191EXPORT_SYMBOL_GPL(set_irq_nested_thread);
192
dd87eb3a
TG
193/*
194 * default enable function
195 */
c5f75634 196static void default_enable(struct irq_data *data)
dd87eb3a 197{
c5f75634 198 struct irq_desc *desc = irq_data_to_desc(data);
dd87eb3a 199
0eda58b7 200 desc->irq_data.chip->irq_unmask(&desc->irq_data);
dd87eb3a
TG
201 desc->status &= ~IRQ_MASKED;
202}
203
204/*
205 * default disable function
206 */
bc310dda 207static void default_disable(struct irq_data *data)
dd87eb3a 208{
dd87eb3a
TG
209}
210
211/*
212 * default startup function
213 */
37e12df7 214static unsigned int default_startup(struct irq_data *data)
dd87eb3a 215{
37e12df7 216 struct irq_desc *desc = irq_data_to_desc(data);
08678b08 217
37e12df7 218 desc->irq_data.chip->irq_enable(data);
dd87eb3a
TG
219 return 0;
220}
221
89d694b9
TG
222/*
223 * default shutdown function
224 */
bc310dda 225static void default_shutdown(struct irq_data *data)
89d694b9 226{
bc310dda 227 struct irq_desc *desc = irq_data_to_desc(data);
89d694b9 228
e2c0f8ff 229 desc->irq_data.chip->irq_mask(&desc->irq_data);
89d694b9
TG
230 desc->status |= IRQ_MASKED;
231}
232
bd151412 233#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
3876ec9e 234/* Temporary migration helpers */
e2c0f8ff
TG
235static void compat_irq_mask(struct irq_data *data)
236{
237 data->chip->mask(data->irq);
238}
239
0eda58b7
TG
240static void compat_irq_unmask(struct irq_data *data)
241{
242 data->chip->unmask(data->irq);
243}
244
22a49163
TG
245static void compat_irq_ack(struct irq_data *data)
246{
247 data->chip->ack(data->irq);
248}
249
9205e31d
TG
250static void compat_irq_mask_ack(struct irq_data *data)
251{
252 data->chip->mask_ack(data->irq);
253}
254
0c5c1557
TG
255static void compat_irq_eoi(struct irq_data *data)
256{
257 data->chip->eoi(data->irq);
258}
259
c5f75634
TG
260static void compat_irq_enable(struct irq_data *data)
261{
262 data->chip->enable(data->irq);
263}
264
bc310dda
TG
265static void compat_irq_disable(struct irq_data *data)
266{
267 data->chip->disable(data->irq);
268}
269
270static void compat_irq_shutdown(struct irq_data *data)
271{
272 data->chip->shutdown(data->irq);
273}
274
37e12df7
TG
275static unsigned int compat_irq_startup(struct irq_data *data)
276{
277 return data->chip->startup(data->irq);
278}
279
c96b3b3c
TG
280static int compat_irq_set_affinity(struct irq_data *data,
281 const struct cpumask *dest, bool force)
282{
283 return data->chip->set_affinity(data->irq, dest);
284}
285
b2ba2c30
TG
286static int compat_irq_set_type(struct irq_data *data, unsigned int type)
287{
288 return data->chip->set_type(data->irq, type);
289}
290
2f7e99bb
TG
291static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
292{
293 return data->chip->set_wake(data->irq, on);
294}
295
21e2b8c6
TG
296static int compat_irq_retrigger(struct irq_data *data)
297{
298 return data->chip->retrigger(data->irq);
299}
300
3876ec9e
TG
301static void compat_bus_lock(struct irq_data *data)
302{
303 data->chip->bus_lock(data->irq);
304}
305
306static void compat_bus_sync_unlock(struct irq_data *data)
307{
308 data->chip->bus_sync_unlock(data->irq);
309}
bd151412 310#endif
3876ec9e 311
dd87eb3a
TG
312/*
313 * Fixup enable/disable function pointers
314 */
315void irq_chip_set_defaults(struct irq_chip *chip)
316{
bd151412 317#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
c5f75634
TG
318 /*
319 * Compat fixup functions need to be before we set the
320 * defaults for enable/disable/startup/shutdown
321 */
322 if (chip->enable)
323 chip->irq_enable = compat_irq_enable;
bc310dda
TG
324 if (chip->disable)
325 chip->irq_disable = compat_irq_disable;
326 if (chip->shutdown)
327 chip->irq_shutdown = compat_irq_shutdown;
37e12df7
TG
328 if (chip->startup)
329 chip->irq_startup = compat_irq_startup;
bd151412 330#endif
c5f75634
TG
331 /*
332 * The real defaults
333 */
334 if (!chip->irq_enable)
335 chip->irq_enable = default_enable;
bc310dda
TG
336 if (!chip->irq_disable)
337 chip->irq_disable = default_disable;
37e12df7
TG
338 if (!chip->irq_startup)
339 chip->irq_startup = default_startup;
89d694b9 340 /*
bc310dda
TG
341 * We use chip->irq_disable, when the user provided its own. When
342 * we have default_disable set for chip->irq_disable, then we need
89d694b9
TG
343 * to use default_shutdown, otherwise the irq line is not
344 * disabled on free_irq():
345 */
bc310dda
TG
346 if (!chip->irq_shutdown)
347 chip->irq_shutdown = chip->irq_disable != default_disable ?
348 chip->irq_disable : default_shutdown;
bd151412
TG
349
350#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
b86432b4
ZY
351 if (!chip->end)
352 chip->end = dummy_irq_chip.end;
3876ec9e 353
bc310dda
TG
354 /*
355 * Now fix up the remaining compat handlers
356 */
3876ec9e
TG
357 if (chip->bus_lock)
358 chip->irq_bus_lock = compat_bus_lock;
359 if (chip->bus_sync_unlock)
360 chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
e2c0f8ff
TG
361 if (chip->mask)
362 chip->irq_mask = compat_irq_mask;
0eda58b7
TG
363 if (chip->unmask)
364 chip->irq_unmask = compat_irq_unmask;
22a49163
TG
365 if (chip->ack)
366 chip->irq_ack = compat_irq_ack;
9205e31d
TG
367 if (chip->mask_ack)
368 chip->irq_mask_ack = compat_irq_mask_ack;
0c5c1557
TG
369 if (chip->eoi)
370 chip->irq_eoi = compat_irq_eoi;
c96b3b3c
TG
371 if (chip->set_affinity)
372 chip->irq_set_affinity = compat_irq_set_affinity;
b2ba2c30
TG
373 if (chip->set_type)
374 chip->irq_set_type = compat_irq_set_type;
2f7e99bb
TG
375 if (chip->set_wake)
376 chip->irq_set_wake = compat_irq_set_wake;
21e2b8c6
TG
377 if (chip->retrigger)
378 chip->irq_retrigger = compat_irq_retrigger;
bd151412 379#endif
dd87eb3a
TG
380}
381
9205e31d 382static inline void mask_ack_irq(struct irq_desc *desc)
dd87eb3a 383{
9205e31d
TG
384 if (desc->irq_data.chip->irq_mask_ack)
385 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
dd87eb3a 386 else {
e2c0f8ff 387 desc->irq_data.chip->irq_mask(&desc->irq_data);
22a49163
TG
388 if (desc->irq_data.chip->irq_ack)
389 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 390 }
0b1adaa0
TG
391 desc->status |= IRQ_MASKED;
392}
393
e2c0f8ff 394static inline void mask_irq(struct irq_desc *desc)
0b1adaa0 395{
e2c0f8ff
TG
396 if (desc->irq_data.chip->irq_mask) {
397 desc->irq_data.chip->irq_mask(&desc->irq_data);
0b1adaa0
TG
398 desc->status |= IRQ_MASKED;
399 }
400}
401
0eda58b7 402static inline void unmask_irq(struct irq_desc *desc)
0b1adaa0 403{
0eda58b7
TG
404 if (desc->irq_data.chip->irq_unmask) {
405 desc->irq_data.chip->irq_unmask(&desc->irq_data);
0b1adaa0
TG
406 desc->status &= ~IRQ_MASKED;
407 }
dd87eb3a
TG
408}
409
399b5da2
TG
410/*
411 * handle_nested_irq - Handle a nested irq from a irq thread
412 * @irq: the interrupt number
413 *
414 * Handle interrupts which are nested into a threaded interrupt
415 * handler. The handler function is called inside the calling
416 * threads context.
417 */
418void handle_nested_irq(unsigned int irq)
419{
420 struct irq_desc *desc = irq_to_desc(irq);
421 struct irqaction *action;
422 irqreturn_t action_ret;
423
424 might_sleep();
425
239007b8 426 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
427
428 kstat_incr_irqs_this_cpu(irq, desc);
429
430 action = desc->action;
431 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
432 goto out_unlock;
433
434 desc->status |= IRQ_INPROGRESS;
239007b8 435 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
436
437 action_ret = action->thread_fn(action->irq, action->dev_id);
438 if (!noirqdebug)
439 note_interrupt(irq, desc, action_ret);
440
239007b8 441 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
442 desc->status &= ~IRQ_INPROGRESS;
443
444out_unlock:
239007b8 445 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
446}
447EXPORT_SYMBOL_GPL(handle_nested_irq);
448
dd87eb3a
TG
449/**
450 * handle_simple_irq - Simple and software-decoded IRQs.
451 * @irq: the interrupt number
452 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
453 *
454 * Simple interrupts are either sent from a demultiplexing interrupt
455 * handler or come from hardware, where no interrupt hardware control
456 * is necessary.
457 *
458 * Note: The caller is expected to handle the ack, clear, mask and
459 * unmask issues if necessary.
460 */
7ad5b3a5 461void
7d12e780 462handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
463{
464 struct irqaction *action;
465 irqreturn_t action_ret;
dd87eb3a 466
239007b8 467 raw_spin_lock(&desc->lock);
dd87eb3a
TG
468
469 if (unlikely(desc->status & IRQ_INPROGRESS))
470 goto out_unlock;
971e5b35 471 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 472 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
473
474 action = desc->action;
971e5b35 475 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
476 goto out_unlock;
477
478 desc->status |= IRQ_INPROGRESS;
239007b8 479 raw_spin_unlock(&desc->lock);
dd87eb3a 480
7d12e780 481 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 482 if (!noirqdebug)
7d12e780 483 note_interrupt(irq, desc, action_ret);
dd87eb3a 484
239007b8 485 raw_spin_lock(&desc->lock);
dd87eb3a
TG
486 desc->status &= ~IRQ_INPROGRESS;
487out_unlock:
239007b8 488 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
489}
490
491/**
492 * handle_level_irq - Level type irq handler
493 * @irq: the interrupt number
494 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
495 *
496 * Level type interrupts are active as long as the hardware line has
497 * the active level. This may require to mask the interrupt and unmask
498 * it after the associated handler has acknowledged the device, so the
499 * interrupt line is back to inactive.
500 */
7ad5b3a5 501void
7d12e780 502handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 503{
dd87eb3a
TG
504 struct irqaction *action;
505 irqreturn_t action_ret;
506
239007b8 507 raw_spin_lock(&desc->lock);
9205e31d 508 mask_ack_irq(desc);
dd87eb3a
TG
509
510 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 511 goto out_unlock;
dd87eb3a 512 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 513 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
514
515 /*
516 * If its disabled or no action available
517 * keep it masked and get out of here
518 */
519 action = desc->action;
49663421 520 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 521 goto out_unlock;
dd87eb3a
TG
522
523 desc->status |= IRQ_INPROGRESS;
239007b8 524 raw_spin_unlock(&desc->lock);
dd87eb3a 525
7d12e780 526 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 527 if (!noirqdebug)
7d12e780 528 note_interrupt(irq, desc, action_ret);
dd87eb3a 529
239007b8 530 raw_spin_lock(&desc->lock);
dd87eb3a 531 desc->status &= ~IRQ_INPROGRESS;
b25c340c 532
0b1adaa0 533 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
0eda58b7 534 unmask_irq(desc);
86998aa6 535out_unlock:
239007b8 536 raw_spin_unlock(&desc->lock);
dd87eb3a 537}
14819ea1 538EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
539
540/**
47c2a3aa 541 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
542 * @irq: the interrupt number
543 * @desc: the interrupt description structure for this irq
dd87eb3a 544 *
47c2a3aa 545 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
546 * call when the interrupt has been serviced. This enables support
547 * for modern forms of interrupt handlers, which handle the flow
548 * details in hardware, transparently.
549 */
7ad5b3a5 550void
7d12e780 551handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 552{
dd87eb3a
TG
553 struct irqaction *action;
554 irqreturn_t action_ret;
555
239007b8 556 raw_spin_lock(&desc->lock);
dd87eb3a
TG
557
558 if (unlikely(desc->status & IRQ_INPROGRESS))
559 goto out;
560
561 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 562 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
563
564 /*
565 * If its disabled or no action available
76d21601 566 * then mask it and get out of here:
dd87eb3a
TG
567 */
568 action = desc->action;
98bb244b
BH
569 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
570 desc->status |= IRQ_PENDING;
e2c0f8ff 571 mask_irq(desc);
dd87eb3a 572 goto out;
98bb244b 573 }
dd87eb3a
TG
574
575 desc->status |= IRQ_INPROGRESS;
98bb244b 576 desc->status &= ~IRQ_PENDING;
239007b8 577 raw_spin_unlock(&desc->lock);
dd87eb3a 578
7d12e780 579 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 580 if (!noirqdebug)
7d12e780 581 note_interrupt(irq, desc, action_ret);
dd87eb3a 582
239007b8 583 raw_spin_lock(&desc->lock);
dd87eb3a
TG
584 desc->status &= ~IRQ_INPROGRESS;
585out:
0c5c1557 586 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a 587
239007b8 588 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
589}
590
591/**
592 * handle_edge_irq - edge type IRQ handler
593 * @irq: the interrupt number
594 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
595 *
596 * Interrupt occures on the falling and/or rising edge of a hardware
597 * signal. The occurence is latched into the irq controller hardware
598 * and must be acked in order to be reenabled. After the ack another
599 * interrupt can happen on the same source even before the first one
dfff0615 600 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
601 * might be necessary to disable (mask) the interrupt depending on the
602 * controller hardware. This requires to reenable the interrupt inside
603 * of the loop which handles the interrupts which have arrived while
604 * the handler was running. If all pending interrupts are handled, the
605 * loop is left.
606 */
7ad5b3a5 607void
7d12e780 608handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 609{
239007b8 610 raw_spin_lock(&desc->lock);
dd87eb3a
TG
611
612 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
613
614 /*
615 * If we're currently running this IRQ, or its disabled,
616 * we shouldn't process the IRQ. Mark it pending, handle
617 * the necessary masking and go out
618 */
619 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
620 !desc->action)) {
621 desc->status |= (IRQ_PENDING | IRQ_MASKED);
9205e31d 622 mask_ack_irq(desc);
dd87eb3a
TG
623 goto out_unlock;
624 }
d6c88a50 625 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
626
627 /* Start handling the irq */
22a49163 628 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a
TG
629
630 /* Mark the IRQ currently in progress.*/
631 desc->status |= IRQ_INPROGRESS;
632
633 do {
634 struct irqaction *action = desc->action;
635 irqreturn_t action_ret;
636
637 if (unlikely(!action)) {
e2c0f8ff 638 mask_irq(desc);
dd87eb3a
TG
639 goto out_unlock;
640 }
641
642 /*
643 * When another irq arrived while we were handling
644 * one, we could have masked the irq.
645 * Renable it, if it was not disabled in meantime.
646 */
647 if (unlikely((desc->status &
648 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
649 (IRQ_PENDING | IRQ_MASKED))) {
0eda58b7 650 unmask_irq(desc);
dd87eb3a
TG
651 }
652
653 desc->status &= ~IRQ_PENDING;
239007b8 654 raw_spin_unlock(&desc->lock);
7d12e780 655 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 656 if (!noirqdebug)
7d12e780 657 note_interrupt(irq, desc, action_ret);
239007b8 658 raw_spin_lock(&desc->lock);
dd87eb3a
TG
659
660 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
661
662 desc->status &= ~IRQ_INPROGRESS;
663out_unlock:
239007b8 664 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
665}
666
dd87eb3a 667/**
24b26d42 668 * handle_percpu_irq - Per CPU local irq handler
dd87eb3a
TG
669 * @irq: the interrupt number
670 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
671 *
672 * Per CPU interrupts on SMP machines without locking requirements
673 */
7ad5b3a5 674void
7d12e780 675handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
676{
677 irqreturn_t action_ret;
678
d6c88a50 679 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a 680
22a49163
TG
681 if (desc->irq_data.chip->irq_ack)
682 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 683
7d12e780 684 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 685 if (!noirqdebug)
7d12e780 686 note_interrupt(irq, desc, action_ret);
dd87eb3a 687
0c5c1557
TG
688 if (desc->irq_data.chip->irq_eoi)
689 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a
TG
690}
691
dd87eb3a 692void
a460e745
IM
693__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
694 const char *name)
dd87eb3a 695{
d3c60047 696 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
697 unsigned long flags;
698
7d94f7ca 699 if (!desc) {
dd87eb3a
TG
700 printk(KERN_ERR
701 "Trying to install type control for IRQ%d\n", irq);
702 return;
703 }
704
dd87eb3a
TG
705 if (!handle)
706 handle = handle_bad_irq;
6b8ff312 707 else if (desc->irq_data.chip == &no_irq_chip) {
f8b5473f 708 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 709 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
710 /*
711 * Some ARM implementations install a handler for really dumb
712 * interrupt hardware without setting an irq_chip. This worked
713 * with the ARM no_irq_chip but the check in setup_irq would
714 * prevent us to setup the interrupt at all. Switch it to
715 * dummy_irq_chip for easy transition.
716 */
6b8ff312 717 desc->irq_data.chip = &dummy_irq_chip;
f8b5473f 718 }
dd87eb3a 719
3876ec9e 720 chip_bus_lock(desc);
239007b8 721 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
722
723 /* Uninstall? */
724 if (handle == handle_bad_irq) {
6b8ff312 725 if (desc->irq_data.chip != &no_irq_chip)
9205e31d 726 mask_ack_irq(desc);
dd87eb3a
TG
727 desc->status |= IRQ_DISABLED;
728 desc->depth = 1;
729 }
730 desc->handle_irq = handle;
a460e745 731 desc->name = name;
dd87eb3a
TG
732
733 if (handle != handle_bad_irq && is_chained) {
734 desc->status &= ~IRQ_DISABLED;
735 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
736 desc->depth = 0;
37e12df7 737 desc->irq_data.chip->irq_startup(&desc->irq_data);
dd87eb3a 738 }
239007b8 739 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 740 chip_bus_sync_unlock(desc);
dd87eb3a 741}
14819ea1 742EXPORT_SYMBOL_GPL(__set_irq_handler);
dd87eb3a
TG
743
744void
745set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 746 irq_flow_handler_t handle)
dd87eb3a
TG
747{
748 set_irq_chip(irq, chip);
a460e745 749 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
750}
751
a460e745
IM
752void
753set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
754 irq_flow_handler_t handle, const char *name)
dd87eb3a 755{
a460e745
IM
756 set_irq_chip(irq, chip);
757 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 758}
46f4f8f6 759
44247184 760void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
46f4f8f6 761{
d3c60047 762 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
763 unsigned long flags;
764
44247184 765 if (!desc)
46f4f8f6 766 return;
46f4f8f6 767
44247184
TG
768 /* Sanitize flags */
769 set &= IRQF_MODIFY_MASK;
770 clr &= IRQF_MODIFY_MASK;
46f4f8f6 771
239007b8 772 raw_spin_lock_irqsave(&desc->lock, flags);
44247184
TG
773 desc->status &= ~clr;
774 desc->status |= set;
239007b8 775 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 776}