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[net-next-2.6.git] / kernel / irq / chip.c
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dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
ced5b697 21static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data)
3a16d713 22{
0b8f1efa 23 struct irq_desc *desc;
3a16d713
EB
24 unsigned long flags;
25
0b8f1efa 26 desc = irq_to_desc(irq);
7d94f7ca 27 if (!desc) {
261c40c1 28 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
29 return;
30 }
31
32 /* Ensure we don't have left over values from a previous use of this irq */
239007b8 33 raw_spin_lock_irqsave(&desc->lock, flags);
3a16d713
EB
34 desc->status = IRQ_DISABLED;
35 desc->chip = &no_irq_chip;
36 desc->handle_irq = handle_bad_irq;
37 desc->depth = 1;
5b912c10 38 desc->msi_desc = NULL;
3a16d713 39 desc->handler_data = NULL;
ced5b697
BP
40 if (!keep_chip_data)
41 desc->chip_data = NULL;
3a16d713
EB
42 desc->action = NULL;
43 desc->irq_count = 0;
44 desc->irqs_unhandled = 0;
45#ifdef CONFIG_SMP
7f7ace0c
MT
46 cpumask_setall(desc->affinity);
47#ifdef CONFIG_GENERIC_PENDING_IRQ
48 cpumask_clear(desc->pending_mask);
49#endif
3a16d713 50#endif
239007b8 51 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
52}
53
54/**
ced5b697 55 * dynamic_irq_init - initialize a dynamically allocated irq
3a16d713
EB
56 * @irq: irq number to initialize
57 */
ced5b697
BP
58void dynamic_irq_init(unsigned int irq)
59{
60 dynamic_irq_init_x(irq, false);
61}
62
63/**
64 * dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq
65 * @irq: irq number to initialize
66 *
67 * does not set irq_to_desc(irq)->chip_data to NULL
68 */
69void dynamic_irq_init_keep_chip_data(unsigned int irq)
70{
71 dynamic_irq_init_x(irq, true);
72}
73
74static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data)
3a16d713 75{
d3c60047 76 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
77 unsigned long flags;
78
7d94f7ca 79 if (!desc) {
261c40c1 80 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
81 return;
82 }
83
239007b8 84 raw_spin_lock_irqsave(&desc->lock, flags);
1f80025e 85 if (desc->action) {
239007b8 86 raw_spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 87 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 88 irq);
1f80025e
EB
89 return;
90 }
5b912c10
EB
91 desc->msi_desc = NULL;
92 desc->handler_data = NULL;
ced5b697
BP
93 if (!keep_chip_data)
94 desc->chip_data = NULL;
3a16d713
EB
95 desc->handle_irq = handle_bad_irq;
96 desc->chip = &no_irq_chip;
b6f3b780 97 desc->name = NULL;
0f3c2a89 98 clear_kstat_irqs(desc);
239007b8 99 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
100}
101
ced5b697
BP
102/**
103 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
104 * @irq: irq number to initialize
105 */
106void dynamic_irq_cleanup(unsigned int irq)
107{
108 dynamic_irq_cleanup_x(irq, false);
109}
110
111/**
112 * dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq
113 * @irq: irq number to initialize
114 *
115 * does not set irq_to_desc(irq)->chip_data to NULL
116 */
117void dynamic_irq_cleanup_keep_chip_data(unsigned int irq)
118{
119 dynamic_irq_cleanup_x(irq, true);
120}
121
3a16d713 122
dd87eb3a
TG
123/**
124 * set_irq_chip - set the irq chip for an irq
125 * @irq: irq number
126 * @chip: pointer to irq chip description structure
127 */
128int set_irq_chip(unsigned int irq, struct irq_chip *chip)
129{
d3c60047 130 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
131 unsigned long flags;
132
7d94f7ca 133 if (!desc) {
261c40c1 134 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
135 return -EINVAL;
136 }
137
138 if (!chip)
139 chip = &no_irq_chip;
140
239007b8 141 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
142 irq_chip_set_defaults(chip);
143 desc->chip = chip;
239007b8 144 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
145
146 return 0;
147}
148EXPORT_SYMBOL(set_irq_chip);
149
150/**
0c5d1eb7 151 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 152 * @irq: irq number
0c5d1eb7 153 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
154 */
155int set_irq_type(unsigned int irq, unsigned int type)
156{
d3c60047 157 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
158 unsigned long flags;
159 int ret = -ENXIO;
160
7d94f7ca 161 if (!desc) {
dd87eb3a
TG
162 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
163 return -ENODEV;
164 }
165
f2b662da 166 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
167 if (type == IRQ_TYPE_NONE)
168 return 0;
169
239007b8 170 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 171 ret = __irq_set_trigger(desc, irq, type);
239007b8 172 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
173 return ret;
174}
175EXPORT_SYMBOL(set_irq_type);
176
177/**
178 * set_irq_data - set irq type data for an irq
179 * @irq: Interrupt number
180 * @data: Pointer to interrupt specific data
181 *
182 * Set the hardware irq controller data for an irq
183 */
184int set_irq_data(unsigned int irq, void *data)
185{
d3c60047 186 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
187 unsigned long flags;
188
7d94f7ca 189 if (!desc) {
dd87eb3a
TG
190 printk(KERN_ERR
191 "Trying to install controller data for IRQ%d\n", irq);
192 return -EINVAL;
193 }
194
239007b8 195 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 196 desc->handler_data = data;
239007b8 197 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
198 return 0;
199}
200EXPORT_SYMBOL(set_irq_data);
201
5b912c10 202/**
24b26d42 203 * set_irq_msi - set MSI descriptor data for an irq
5b912c10 204 * @irq: Interrupt number
472900b8 205 * @entry: Pointer to MSI descriptor data
5b912c10 206 *
24b26d42 207 * Set the MSI descriptor entry for an irq
5b912c10
EB
208 */
209int set_irq_msi(unsigned int irq, struct msi_desc *entry)
210{
d3c60047 211 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
212 unsigned long flags;
213
7d94f7ca 214 if (!desc) {
5b912c10
EB
215 printk(KERN_ERR
216 "Trying to install msi data for IRQ%d\n", irq);
217 return -EINVAL;
218 }
7d94f7ca 219
239007b8 220 raw_spin_lock_irqsave(&desc->lock, flags);
5b912c10 221 desc->msi_desc = entry;
7fe3730d
ME
222 if (entry)
223 entry->irq = irq;
239007b8 224 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
225 return 0;
226}
227
dd87eb3a
TG
228/**
229 * set_irq_chip_data - set irq chip data for an irq
230 * @irq: Interrupt number
231 * @data: Pointer to chip specific data
232 *
233 * Set the hardware irq chip data for an irq
234 */
235int set_irq_chip_data(unsigned int irq, void *data)
236{
d3c60047 237 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
238 unsigned long flags;
239
7d94f7ca
YL
240 if (!desc) {
241 printk(KERN_ERR
242 "Trying to install chip data for IRQ%d\n", irq);
243 return -EINVAL;
244 }
245
246 if (!desc->chip) {
dd87eb3a
TG
247 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
248 return -EINVAL;
249 }
250
239007b8 251 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 252 desc->chip_data = data;
239007b8 253 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
254
255 return 0;
256}
257EXPORT_SYMBOL(set_irq_chip_data);
258
399b5da2
TG
259/**
260 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
261 *
262 * @irq: Interrupt number
263 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
264 *
265 * The IRQ_NESTED_THREAD flag indicates that on
266 * request_threaded_irq() no separate interrupt thread should be
267 * created for the irq as the handler are called nested in the
268 * context of a demultiplexing interrupt handler thread.
269 */
270void set_irq_nested_thread(unsigned int irq, int nest)
271{
272 struct irq_desc *desc = irq_to_desc(irq);
273 unsigned long flags;
274
275 if (!desc)
276 return;
277
239007b8 278 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
279 if (nest)
280 desc->status |= IRQ_NESTED_THREAD;
281 else
282 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 283 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
284}
285EXPORT_SYMBOL_GPL(set_irq_nested_thread);
286
dd87eb3a
TG
287/*
288 * default enable function
289 */
290static void default_enable(unsigned int irq)
291{
d3c60047 292 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
293
294 desc->chip->unmask(irq);
295 desc->status &= ~IRQ_MASKED;
296}
297
298/*
299 * default disable function
300 */
301static void default_disable(unsigned int irq)
302{
dd87eb3a
TG
303}
304
305/*
306 * default startup function
307 */
308static unsigned int default_startup(unsigned int irq)
309{
d3c60047 310 struct irq_desc *desc = irq_to_desc(irq);
08678b08 311
08678b08 312 desc->chip->enable(irq);
dd87eb3a
TG
313 return 0;
314}
315
89d694b9
TG
316/*
317 * default shutdown function
318 */
319static void default_shutdown(unsigned int irq)
320{
d3c60047 321 struct irq_desc *desc = irq_to_desc(irq);
89d694b9
TG
322
323 desc->chip->mask(irq);
324 desc->status |= IRQ_MASKED;
325}
326
dd87eb3a
TG
327/*
328 * Fixup enable/disable function pointers
329 */
330void irq_chip_set_defaults(struct irq_chip *chip)
331{
332 if (!chip->enable)
333 chip->enable = default_enable;
334 if (!chip->disable)
335 chip->disable = default_disable;
336 if (!chip->startup)
337 chip->startup = default_startup;
89d694b9
TG
338 /*
339 * We use chip->disable, when the user provided its own. When
340 * we have default_disable set for chip->disable, then we need
341 * to use default_shutdown, otherwise the irq line is not
342 * disabled on free_irq():
343 */
dd87eb3a 344 if (!chip->shutdown)
89d694b9
TG
345 chip->shutdown = chip->disable != default_disable ?
346 chip->disable : default_shutdown;
dd87eb3a
TG
347 if (!chip->name)
348 chip->name = chip->typename;
b86432b4
ZY
349 if (!chip->end)
350 chip->end = dummy_irq_chip.end;
dd87eb3a
TG
351}
352
353static inline void mask_ack_irq(struct irq_desc *desc, int irq)
354{
355 if (desc->chip->mask_ack)
356 desc->chip->mask_ack(irq);
357 else {
358 desc->chip->mask(irq);
efdc64f0
WC
359 if (desc->chip->ack)
360 desc->chip->ack(irq);
dd87eb3a 361 }
0b1adaa0
TG
362 desc->status |= IRQ_MASKED;
363}
364
365static inline void mask_irq(struct irq_desc *desc, int irq)
366{
367 if (desc->chip->mask) {
368 desc->chip->mask(irq);
369 desc->status |= IRQ_MASKED;
370 }
371}
372
373static inline void unmask_irq(struct irq_desc *desc, int irq)
374{
375 if (desc->chip->unmask) {
376 desc->chip->unmask(irq);
377 desc->status &= ~IRQ_MASKED;
378 }
dd87eb3a
TG
379}
380
399b5da2
TG
381/*
382 * handle_nested_irq - Handle a nested irq from a irq thread
383 * @irq: the interrupt number
384 *
385 * Handle interrupts which are nested into a threaded interrupt
386 * handler. The handler function is called inside the calling
387 * threads context.
388 */
389void handle_nested_irq(unsigned int irq)
390{
391 struct irq_desc *desc = irq_to_desc(irq);
392 struct irqaction *action;
393 irqreturn_t action_ret;
394
395 might_sleep();
396
239007b8 397 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
398
399 kstat_incr_irqs_this_cpu(irq, desc);
400
401 action = desc->action;
402 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
403 goto out_unlock;
404
405 desc->status |= IRQ_INPROGRESS;
239007b8 406 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
407
408 action_ret = action->thread_fn(action->irq, action->dev_id);
409 if (!noirqdebug)
410 note_interrupt(irq, desc, action_ret);
411
239007b8 412 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
413 desc->status &= ~IRQ_INPROGRESS;
414
415out_unlock:
239007b8 416 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
417}
418EXPORT_SYMBOL_GPL(handle_nested_irq);
419
dd87eb3a
TG
420/**
421 * handle_simple_irq - Simple and software-decoded IRQs.
422 * @irq: the interrupt number
423 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
424 *
425 * Simple interrupts are either sent from a demultiplexing interrupt
426 * handler or come from hardware, where no interrupt hardware control
427 * is necessary.
428 *
429 * Note: The caller is expected to handle the ack, clear, mask and
430 * unmask issues if necessary.
431 */
7ad5b3a5 432void
7d12e780 433handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
434{
435 struct irqaction *action;
436 irqreturn_t action_ret;
dd87eb3a 437
239007b8 438 raw_spin_lock(&desc->lock);
dd87eb3a
TG
439
440 if (unlikely(desc->status & IRQ_INPROGRESS))
441 goto out_unlock;
971e5b35 442 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 443 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
444
445 action = desc->action;
971e5b35 446 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
447 goto out_unlock;
448
449 desc->status |= IRQ_INPROGRESS;
239007b8 450 raw_spin_unlock(&desc->lock);
dd87eb3a 451
7d12e780 452 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 453 if (!noirqdebug)
7d12e780 454 note_interrupt(irq, desc, action_ret);
dd87eb3a 455
239007b8 456 raw_spin_lock(&desc->lock);
dd87eb3a
TG
457 desc->status &= ~IRQ_INPROGRESS;
458out_unlock:
239007b8 459 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
460}
461
462/**
463 * handle_level_irq - Level type irq handler
464 * @irq: the interrupt number
465 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
466 *
467 * Level type interrupts are active as long as the hardware line has
468 * the active level. This may require to mask the interrupt and unmask
469 * it after the associated handler has acknowledged the device, so the
470 * interrupt line is back to inactive.
471 */
7ad5b3a5 472void
7d12e780 473handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 474{
dd87eb3a
TG
475 struct irqaction *action;
476 irqreturn_t action_ret;
477
239007b8 478 raw_spin_lock(&desc->lock);
dd87eb3a
TG
479 mask_ack_irq(desc, irq);
480
481 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 482 goto out_unlock;
dd87eb3a 483 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 484 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
485
486 /*
487 * If its disabled or no action available
488 * keep it masked and get out of here
489 */
490 action = desc->action;
49663421 491 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 492 goto out_unlock;
dd87eb3a
TG
493
494 desc->status |= IRQ_INPROGRESS;
239007b8 495 raw_spin_unlock(&desc->lock);
dd87eb3a 496
7d12e780 497 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 498 if (!noirqdebug)
7d12e780 499 note_interrupt(irq, desc, action_ret);
dd87eb3a 500
239007b8 501 raw_spin_lock(&desc->lock);
dd87eb3a 502 desc->status &= ~IRQ_INPROGRESS;
b25c340c 503
0b1adaa0
TG
504 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
505 unmask_irq(desc, irq);
86998aa6 506out_unlock:
239007b8 507 raw_spin_unlock(&desc->lock);
dd87eb3a 508}
14819ea1 509EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
510
511/**
47c2a3aa 512 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
513 * @irq: the interrupt number
514 * @desc: the interrupt description structure for this irq
dd87eb3a 515 *
47c2a3aa 516 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
517 * call when the interrupt has been serviced. This enables support
518 * for modern forms of interrupt handlers, which handle the flow
519 * details in hardware, transparently.
520 */
7ad5b3a5 521void
7d12e780 522handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 523{
dd87eb3a
TG
524 struct irqaction *action;
525 irqreturn_t action_ret;
526
239007b8 527 raw_spin_lock(&desc->lock);
dd87eb3a
TG
528
529 if (unlikely(desc->status & IRQ_INPROGRESS))
530 goto out;
531
532 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 533 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
534
535 /*
536 * If its disabled or no action available
76d21601 537 * then mask it and get out of here:
dd87eb3a
TG
538 */
539 action = desc->action;
98bb244b
BH
540 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
541 desc->status |= IRQ_PENDING;
0b1adaa0 542 mask_irq(desc, irq);
dd87eb3a 543 goto out;
98bb244b 544 }
dd87eb3a
TG
545
546 desc->status |= IRQ_INPROGRESS;
98bb244b 547 desc->status &= ~IRQ_PENDING;
239007b8 548 raw_spin_unlock(&desc->lock);
dd87eb3a 549
7d12e780 550 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 551 if (!noirqdebug)
7d12e780 552 note_interrupt(irq, desc, action_ret);
dd87eb3a 553
239007b8 554 raw_spin_lock(&desc->lock);
dd87eb3a
TG
555 desc->status &= ~IRQ_INPROGRESS;
556out:
47c2a3aa 557 desc->chip->eoi(irq);
dd87eb3a 558
239007b8 559 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
560}
561
562/**
563 * handle_edge_irq - edge type IRQ handler
564 * @irq: the interrupt number
565 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
566 *
567 * Interrupt occures on the falling and/or rising edge of a hardware
568 * signal. The occurence is latched into the irq controller hardware
569 * and must be acked in order to be reenabled. After the ack another
570 * interrupt can happen on the same source even before the first one
dfff0615 571 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
572 * might be necessary to disable (mask) the interrupt depending on the
573 * controller hardware. This requires to reenable the interrupt inside
574 * of the loop which handles the interrupts which have arrived while
575 * the handler was running. If all pending interrupts are handled, the
576 * loop is left.
577 */
7ad5b3a5 578void
7d12e780 579handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 580{
239007b8 581 raw_spin_lock(&desc->lock);
dd87eb3a
TG
582
583 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
584
585 /*
586 * If we're currently running this IRQ, or its disabled,
587 * we shouldn't process the IRQ. Mark it pending, handle
588 * the necessary masking and go out
589 */
590 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
591 !desc->action)) {
592 desc->status |= (IRQ_PENDING | IRQ_MASKED);
593 mask_ack_irq(desc, irq);
594 goto out_unlock;
595 }
d6c88a50 596 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
597
598 /* Start handling the irq */
4dbc9ca2
TG
599 if (desc->chip->ack)
600 desc->chip->ack(irq);
dd87eb3a
TG
601
602 /* Mark the IRQ currently in progress.*/
603 desc->status |= IRQ_INPROGRESS;
604
605 do {
606 struct irqaction *action = desc->action;
607 irqreturn_t action_ret;
608
609 if (unlikely(!action)) {
0b1adaa0 610 mask_irq(desc, irq);
dd87eb3a
TG
611 goto out_unlock;
612 }
613
614 /*
615 * When another irq arrived while we were handling
616 * one, we could have masked the irq.
617 * Renable it, if it was not disabled in meantime.
618 */
619 if (unlikely((desc->status &
620 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
621 (IRQ_PENDING | IRQ_MASKED))) {
0b1adaa0 622 unmask_irq(desc, irq);
dd87eb3a
TG
623 }
624
625 desc->status &= ~IRQ_PENDING;
239007b8 626 raw_spin_unlock(&desc->lock);
7d12e780 627 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 628 if (!noirqdebug)
7d12e780 629 note_interrupt(irq, desc, action_ret);
239007b8 630 raw_spin_lock(&desc->lock);
dd87eb3a
TG
631
632 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
633
634 desc->status &= ~IRQ_INPROGRESS;
635out_unlock:
239007b8 636 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
637}
638
dd87eb3a 639/**
24b26d42 640 * handle_percpu_irq - Per CPU local irq handler
dd87eb3a
TG
641 * @irq: the interrupt number
642 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
643 *
644 * Per CPU interrupts on SMP machines without locking requirements
645 */
7ad5b3a5 646void
7d12e780 647handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
648{
649 irqreturn_t action_ret;
650
d6c88a50 651 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
652
653 if (desc->chip->ack)
654 desc->chip->ack(irq);
655
7d12e780 656 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 657 if (!noirqdebug)
7d12e780 658 note_interrupt(irq, desc, action_ret);
dd87eb3a 659
fcef5911 660 if (desc->chip->eoi)
dd87eb3a
TG
661 desc->chip->eoi(irq);
662}
663
dd87eb3a 664void
a460e745
IM
665__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
666 const char *name)
dd87eb3a 667{
d3c60047 668 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
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669 unsigned long flags;
670
7d94f7ca 671 if (!desc) {
dd87eb3a
TG
672 printk(KERN_ERR
673 "Trying to install type control for IRQ%d\n", irq);
674 return;
675 }
676
dd87eb3a
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677 if (!handle)
678 handle = handle_bad_irq;
9d7ac8be 679 else if (desc->chip == &no_irq_chip) {
f8b5473f 680 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 681 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
682 /*
683 * Some ARM implementations install a handler for really dumb
684 * interrupt hardware without setting an irq_chip. This worked
685 * with the ARM no_irq_chip but the check in setup_irq would
686 * prevent us to setup the interrupt at all. Switch it to
687 * dummy_irq_chip for easy transition.
688 */
689 desc->chip = &dummy_irq_chip;
690 }
dd87eb3a 691
70aedd24 692 chip_bus_lock(irq, desc);
239007b8 693 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
694
695 /* Uninstall? */
696 if (handle == handle_bad_irq) {
fcef5911 697 if (desc->chip != &no_irq_chip)
5575ddf7 698 mask_ack_irq(desc, irq);
dd87eb3a
TG
699 desc->status |= IRQ_DISABLED;
700 desc->depth = 1;
701 }
702 desc->handle_irq = handle;
a460e745 703 desc->name = name;
dd87eb3a
TG
704
705 if (handle != handle_bad_irq && is_chained) {
706 desc->status &= ~IRQ_DISABLED;
707 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
708 desc->depth = 0;
7e6e178a 709 desc->chip->startup(irq);
dd87eb3a 710 }
239007b8 711 raw_spin_unlock_irqrestore(&desc->lock, flags);
70aedd24 712 chip_bus_sync_unlock(irq, desc);
dd87eb3a 713}
14819ea1 714EXPORT_SYMBOL_GPL(__set_irq_handler);
dd87eb3a
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715
716void
717set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 718 irq_flow_handler_t handle)
dd87eb3a
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719{
720 set_irq_chip(irq, chip);
a460e745 721 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
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722}
723
a460e745
IM
724void
725set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
726 irq_flow_handler_t handle, const char *name)
dd87eb3a 727{
a460e745
IM
728 set_irq_chip(irq, chip);
729 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 730}
46f4f8f6 731
860652bf 732void set_irq_noprobe(unsigned int irq)
46f4f8f6 733{
d3c60047 734 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
735 unsigned long flags;
736
7d94f7ca 737 if (!desc) {
46f4f8f6 738 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
46f4f8f6
RB
739 return;
740 }
741
239007b8 742 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 743 desc->status |= IRQ_NOPROBE;
239007b8 744 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6
RB
745}
746
860652bf 747void set_irq_probe(unsigned int irq)
46f4f8f6 748{
d3c60047 749 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
750 unsigned long flags;
751
7d94f7ca 752 if (!desc) {
46f4f8f6 753 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
46f4f8f6
RB
754 return;
755 }
756
239007b8 757 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 758 desc->status &= ~IRQ_NOPROBE;
239007b8 759 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 760}