[net-next-2.6.git] / include / linux / svga.h

#ifndef _LINUX_SVGA_H
#define _LINUX_SVGA_H

#include <linux/pci.h>
#include <video/vga.h>

/* Terminator for register set */

#define VGA_REGSET_END_VAL	0xFF
#define VGA_REGSET_END		{VGA_REGSET_END_VAL, 0, 0}

struct vga_regset {
	u8 regnum;
	u8 lowbit;
	u8 highbit;
};

/* ------------------------------------------------------------------------- */

#define SVGA_FORMAT_END_VAL	0xFFFF
#define SVGA_FORMAT_END		{SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0}

struct svga_fb_format {
	/* var part */
	u32 bits_per_pixel;
	struct fb_bitfield red;
	struct fb_bitfield green;
	struct fb_bitfield blue;
	struct fb_bitfield transp;
	u32 nonstd;
	/* fix part */
	u32 type;
	u32 type_aux;
	u32 visual;
	u32 xpanstep;
	u32 xresstep;
};

struct svga_timing_regs {
	const struct vga_regset *h_total_regs;
	const struct vga_regset *h_display_regs;
	const struct vga_regset *h_blank_start_regs;
	const struct vga_regset *h_blank_end_regs;
	const struct vga_regset *h_sync_start_regs;
	const struct vga_regset *h_sync_end_regs;

	const struct vga_regset *v_total_regs;
	const struct vga_regset *v_display_regs;
	const struct vga_regset *v_blank_start_regs;
	const struct vga_regset *v_blank_end_regs;
	const struct vga_regset *v_sync_start_regs;
	const struct vga_regset *v_sync_end_regs;
};

struct svga_pll {
	u16 m_min;
	u16 m_max;
	u16 n_min;
	u16 n_max;
	u16 r_min;
	u16 r_max;  /* r_max < 32 */
	u32 f_vco_min;
	u32 f_vco_max;
	u32 f_base;
};


/* Write a value to the attribute register */

static inline void svga_wattr(u8 index, u8 data)
{
	inb(0x3DA);
	outb(index, 0x3C0);
	outb(data, 0x3C0);
}

/* Write a value to a sequence register with a mask */

static inline void svga_wseq_mask(u8 index, u8 data, u8 mask)
{
	vga_wseq(NULL, index, (data & mask) | (vga_rseq(NULL, index) & ~mask));
}

/* Write a value to a CRT register with a mask */

static inline void svga_wcrt_mask(u8 index, u8 data, u8 mask)
{
	vga_wcrt(NULL, index, (data & mask) | (vga_rcrt(NULL, index) & ~mask));
}

static inline int svga_primary_device(struct pci_dev *dev)
{
	u16 flags;
	pci_read_config_word(dev, PCI_COMMAND, &flags);
	return (flags & PCI_COMMAND_IO);
}


void svga_wcrt_multi(const struct vga_regset *regset, u32 value);
void svga_wseq_multi(const struct vga_regset *regset, u32 value);

void svga_set_default_gfx_regs(void);
void svga_set_default_atc_regs(void);
void svga_set_default_seq_regs(void);
void svga_set_default_crt_regs(void);
void svga_set_textmode_vga_regs(void);

void svga_settile(struct fb_info *info, struct fb_tilemap *map);
void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area);
void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect);
void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit);
void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor);
int svga_get_tilemax(struct fb_info *info);
void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps,
		   struct fb_var_screeninfo *var);

int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node);
int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node);
void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);

int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix);

#endif /* _LINUX_SVGA_H */
Commit	Line	Data
a268422d OZ	1	#ifndef _LINUX_SVGA_H
	2	#define _LINUX_SVGA_H
	3
a268422d OZ	4	#include <linux/pci.h>
	5	#include <video/vga.h>
	6
	7	/* Terminator for register set */
	8
	9	#define VGA_REGSET_END_VAL 0xFF
	10	#define VGA_REGSET_END {VGA_REGSET_END_VAL, 0, 0}
	11
	12	struct vga_regset {
	13	u8 regnum;
	14	u8 lowbit;
	15	u8 highbit;
	16	};
	17
	18	/* ------------------------------------------------------------------------- */
	19
	20	#define SVGA_FORMAT_END_VAL 0xFFFF
	21	#define SVGA_FORMAT_END {SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0}
	22
	23	struct svga_fb_format {
	24	/* var part */
	25	u32 bits_per_pixel;
	26	struct fb_bitfield red;
	27	struct fb_bitfield green;
	28	struct fb_bitfield blue;
	29	struct fb_bitfield transp;
	30	u32 nonstd;
	31	/* fix part */
	32	u32 type;
	33	u32 type_aux;
	34	u32 visual;
	35	u32 xpanstep;
	36	u32 xresstep;
	37	};
	38
	39	struct svga_timing_regs {
	40	const struct vga_regset *h_total_regs;
	41	const struct vga_regset *h_display_regs;
	42	const struct vga_regset *h_blank_start_regs;
	43	const struct vga_regset *h_blank_end_regs;
	44	const struct vga_regset *h_sync_start_regs;
	45	const struct vga_regset *h_sync_end_regs;
	46
	47	const struct vga_regset *v_total_regs;
	48	const struct vga_regset *v_display_regs;
	49	const struct vga_regset *v_blank_start_regs;
	50	const struct vga_regset *v_blank_end_regs;
	51	const struct vga_regset *v_sync_start_regs;
	52	const struct vga_regset *v_sync_end_regs;
	53	};
	54
	55	struct svga_pll {
	56	u16 m_min;
	57	u16 m_max;
	58	u16 n_min;
	59	u16 n_max;
	60	u16 r_min;
	61	u16 r_max; /* r_max < 32 */
	62	u32 f_vco_min;
	63	u32 f_vco_max;
	64	u32 f_base;
	65	};
	66
	67
68	/* Write a value to the attribute register */
69
70	static inline void svga_wattr(u8 index, u8 data)
71	{
72	inb(0x3DA);
73	outb(index, 0x3C0);
74	outb(data, 0x3C0);
75	}
76
77	/* Write a value to a sequence register with a mask */
78
79	static inline void svga_wseq_mask(u8 index, u8 data, u8 mask)
80	{
81	vga_wseq(NULL, index, (data & mask) \| (vga_rseq(NULL, index) & ~mask));
82	}
83
84	/* Write a value to a CRT register with a mask */
85
86	static inline void svga_wcrt_mask(u8 index, u8 data, u8 mask)
87	{
88	vga_wcrt(NULL, index, (data & mask) \| (vga_rcrt(NULL, index) & ~mask));
89	}
90
91	static inline int svga_primary_device(struct pci_dev *dev)
92	{
93	u16 flags;
94	pci_read_config_word(dev, PCI_COMMAND, &flags);
95	return (flags & PCI_COMMAND_IO);
96	}
97
98
99	void svga_wcrt_multi(const struct vga_regset *regset, u32 value);
100	void svga_wseq_multi(const struct vga_regset *regset, u32 value);
101
102	void svga_set_default_gfx_regs(void);
103	void svga_set_default_atc_regs(void);
104	void svga_set_default_seq_regs(void);
105	void svga_set_default_crt_regs(void);
106	void svga_set_textmode_vga_regs(void);
107
108	void svga_settile(struct fb_info info, struct fb_tilemap map);
109	void svga_tilecopy(struct fb_info info, struct fb_tilearea area);
110	void svga_tilefill(struct fb_info info, struct fb_tilerect rect);
111	void svga_tileblit(struct fb_info info, struct fb_tileblit blit);
112	void svga_tilecursor(struct fb_info info, struct fb_tilecursor cursor);
34ed25f5	113	int svga_get_tilemax(struct fb_info *info);
5a87ede9 AD	114	void svga_get_caps(struct fb_info info, struct fb_blit_caps caps,
5a87ede9 AD	115	struct fb_var_screeninfo *var);
a268422d OZ	116
	117	int svga_compute_pll(const struct svga_pll pll, u32 f_wanted, u16 m, u16 n, u16 r, int node);
	118	int svga_check_timings(const struct svga_timing_regs tm, struct fb_var_screeninfo var, int node);
	119	void svga_set_timings(const struct svga_timing_regs tm, struct fb_var_screeninfo var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);
	120
	121	int svga_match_format(const struct svga_fb_format frm, struct fb_var_screeninfo var, struct fb_fix_screeninfo *fix);
	122
a268422d OZ	123	#endif /* _LINUX_SVGA_H */
a268422d OZ	124