[net-next-2.6.git] / include / linux / sh_intc.h

#ifndef __SH_INTC_H
#define __SH_INTC_H

#include <linux/ioport.h>

typedef unsigned char intc_enum;

struct intc_vect {
	intc_enum enum_id;
	unsigned short vect;
};

#define INTC_VECT(enum_id, vect) { enum_id, vect }
#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))

struct intc_group {
	intc_enum enum_id;
	intc_enum enum_ids[32];
};

#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }

struct intc_subgroup {
	unsigned long reg, reg_width;
	intc_enum parent_id;
	intc_enum enum_ids[32];
};

struct intc_mask_reg {
	unsigned long set_reg, clr_reg, reg_width;
	intc_enum enum_ids[32];
#ifdef CONFIG_INTC_BALANCING
	unsigned long dist_reg;
#endif
#ifdef CONFIG_SMP
	unsigned long smp;
#endif
};

struct intc_prio_reg {
	unsigned long set_reg, clr_reg, reg_width, field_width;
	intc_enum enum_ids[16];
#ifdef CONFIG_SMP
	unsigned long smp;
#endif
};

struct intc_sense_reg {
	unsigned long reg, reg_width, field_width;
	intc_enum enum_ids[16];
};

#ifdef CONFIG_INTC_BALANCING
#define INTC_SMP_BALANCING(reg)	.dist_reg = (reg)
#else
#define INTC_SMP_BALANCING(reg)
#endif

#ifdef CONFIG_SMP
#define INTC_SMP(stride, nr)	.smp = (stride) | ((nr) << 8)
#else
#define INTC_SMP(stride, nr)
#endif

struct intc_hw_desc {
	struct intc_vect *vectors;
	unsigned int nr_vectors;
	struct intc_group *groups;
	unsigned int nr_groups;
	struct intc_mask_reg *mask_regs;
	unsigned int nr_mask_regs;
	struct intc_prio_reg *prio_regs;
	unsigned int nr_prio_regs;
	struct intc_sense_reg *sense_regs;
	unsigned int nr_sense_regs;
	struct intc_mask_reg *ack_regs;
	unsigned int nr_ack_regs;
	struct intc_subgroup *subgroups;
	unsigned int nr_subgroups;
};

#define _INTC_ARRAY(a) a, a == NULL ? 0 : sizeof(a)/sizeof(*a)

#define INTC_HW_DESC(vectors, groups, mask_regs,	\
		     prio_regs,	sense_regs, ack_regs)	\
{							\
	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),	\
	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),	\
	_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs),	\
}

struct intc_desc {
	char *name;
	struct resource *resource;
	unsigned int num_resources;
	intc_enum force_enable;
	intc_enum force_disable;
	struct intc_hw_desc hw;
};

#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups,		\
	mask_regs, prio_regs, sense_regs)				\
struct intc_desc symbol __initdata = {					\
	.name = chipname,						\
	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
			   prio_regs, sense_regs, NULL),		\
}

#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups,	\
	mask_regs, prio_regs, sense_regs, ack_regs)			\
struct intc_desc symbol __initdata = {					\
	.name = chipname,						\
	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
			   prio_regs, sense_regs, ack_regs),		\
}

int register_intc_controller(struct intc_desc *desc);
void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs);
int intc_set_priority(unsigned int irq, unsigned int prio);
int intc_irq_lookup(const char *chipname, intc_enum enum_id);
void intc_finalize(void);

#ifdef CONFIG_INTC_USERIMASK
int register_intc_userimask(unsigned long addr);
#else
static inline int register_intc_userimask(unsigned long addr)
{
	return 0;
}
#endif

#endif /* __SH_INTC_H */
Commit	Line	Data
bbfbd8b1 PM	1	#ifndef __SH_INTC_H
	2	#define __SH_INTC_H
	3
dec710b7 MD	4	#include <linux/ioport.h>
dec710b7 MD	5
bbfbd8b1 PM	6	typedef unsigned char intc_enum;
	7
	8	struct intc_vect {
	9	intc_enum enum_id;
	10	unsigned short vect;
	11	};
	12
	13	#define INTC_VECT(enum_id, vect) { enum_id, vect }
	14	#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
	15
	16	struct intc_group {
	17	intc_enum enum_id;
	18	intc_enum enum_ids[32];
	19	};
	20
	21	#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
	22
c1e30ad9 PM	23	struct intc_subgroup {
	24	unsigned long reg, reg_width;
	25	intc_enum parent_id;
	26	intc_enum enum_ids[32];
	27	};
	28
bbfbd8b1 PM	29	struct intc_mask_reg {
	30	unsigned long set_reg, clr_reg, reg_width;
	31	intc_enum enum_ids[32];
dc825b17 PM	32	#ifdef CONFIG_INTC_BALANCING
	33	unsigned long dist_reg;
	34	#endif
bbfbd8b1 PM	35	#ifdef CONFIG_SMP
	36	unsigned long smp;
	37	#endif
	38	};
	39
	40	struct intc_prio_reg {
	41	unsigned long set_reg, clr_reg, reg_width, field_width;
	42	intc_enum enum_ids[16];
	43	#ifdef CONFIG_SMP
	44	unsigned long smp;
	45	#endif
	46	};
	47
	48	struct intc_sense_reg {
	49	unsigned long reg, reg_width, field_width;
	50	intc_enum enum_ids[16];
	51	};
	52
dc825b17 PM	53	#ifdef CONFIG_INTC_BALANCING
	54	#define INTC_SMP_BALANCING(reg) .dist_reg = (reg)
	55	#else
	56	#define INTC_SMP_BALANCING(reg)
	57	#endif
	58
bbfbd8b1	59	#ifdef CONFIG_SMP
dc825b17	60	#define INTC_SMP(stride, nr) .smp = (stride) \| ((nr) << 8)
bbfbd8b1 PM	61	#else
	62	#define INTC_SMP(stride, nr)
	63	#endif
	64
577cd758	65	struct intc_hw_desc {
bbfbd8b1 PM	66	struct intc_vect *vectors;
	67	unsigned int nr_vectors;
	68	struct intc_group *groups;
	69	unsigned int nr_groups;
	70	struct intc_mask_reg *mask_regs;
	71	unsigned int nr_mask_regs;
	72	struct intc_prio_reg *prio_regs;
	73	unsigned int nr_prio_regs;
	74	struct intc_sense_reg *sense_regs;
	75	unsigned int nr_sense_regs;
bbfbd8b1 PM	76	struct intc_mask_reg *ack_regs;
bbfbd8b1 PM	77	unsigned int nr_ack_regs;
c1e30ad9 PM	78	struct intc_subgroup *subgroups;
c1e30ad9 PM	79	unsigned int nr_subgroups;
bbfbd8b1 PM	80	};
bbfbd8b1 PM	81
c1e30ad9 PM	82	#define _INTC_ARRAY(a) a, a == NULL ? 0 : sizeof(a)/sizeof(*a)
c1e30ad9 PM	83
577cd758 MD	84	#define INTC_HW_DESC(vectors, groups, mask_regs, \
	85	prio_regs, sense_regs, ack_regs) \
	86	{ \
	87	_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
	88	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
	89	_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
	90	}
	91
	92	struct intc_desc {
	93	char *name;
dec710b7 MD	94	struct resource *resource;
dec710b7 MD	95	unsigned int num_resources;
d5190953	96	intc_enum force_enable;
d85429a3	97	intc_enum force_disable;
577cd758 MD	98	struct intc_hw_desc hw;
	99	};
	100
bbfbd8b1 PM	101	#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
	102	mask_regs, prio_regs, sense_regs) \
	103	struct intc_desc symbol __initdata = { \
577cd758 MD	104	.name = chipname, \
	105	.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
	106	prio_regs, sense_regs, NULL), \
bbfbd8b1 PM	107	}
bbfbd8b1 PM	108
bbfbd8b1 PM	109	#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
	110	mask_regs, prio_regs, sense_regs, ack_regs) \
	111	struct intc_desc symbol __initdata = { \
577cd758 MD	112	.name = chipname, \
	113	.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
	114	prio_regs, sense_regs, ack_regs), \
bbfbd8b1	115	}
bbfbd8b1	116
2be6bb0c	117	int register_intc_controller(struct intc_desc *desc);
4bacd796	118	void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs);
bbfbd8b1	119	int intc_set_priority(unsigned int irq, unsigned int prio);
d74310d3	120	int intc_irq_lookup(const char *chipname, intc_enum enum_id);
c1e30ad9	121	void intc_finalize(void);
bbfbd8b1	122
43b8774d PM	123	#ifdef CONFIG_INTC_USERIMASK
	124	int register_intc_userimask(unsigned long addr);
	125	#else
	126	static inline int register_intc_userimask(unsigned long addr)
	127	{
	128	return 0;
	129	}
	130	#endif
	131
bbfbd8b1	132	#endif /* __SH_INTC_H */